]> Pileus Git - ~andy/linux/blob - drivers/video/s3c-fb.c
Merge branch 'fbdev-for-linus' into fbdev-next
[~andy/linux] / drivers / video / s3c-fb.c
1 /* linux/drivers/video/s3c-fb.c
2  *
3  * Copyright 2008 Openmoko Inc.
4  * Copyright 2008-2010 Simtec Electronics
5  *      Ben Dooks <ben@simtec.co.uk>
6  *      http://armlinux.simtec.co.uk/
7  *
8  * Samsung SoC Framebuffer driver
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software FoundatIon.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/init.h>
21 #include <linux/clk.h>
22 #include <linux/fb.h>
23 #include <linux/io.h>
24 #include <linux/uaccess.h>
25 #include <linux/interrupt.h>
26 #include <linux/pm_runtime.h>
27
28 #include <mach/map.h>
29 #include <plat/regs-fb-v4.h>
30 #include <plat/fb.h>
31
32 /* This driver will export a number of framebuffer interfaces depending
33  * on the configuration passed in via the platform data. Each fb instance
34  * maps to a hardware window. Currently there is no support for runtime
35  * setting of the alpha-blending functions that each window has, so only
36  * window 0 is actually useful.
37  *
38  * Window 0 is treated specially, it is used for the basis of the LCD
39  * output timings and as the control for the output power-down state.
40 */
41
42 /* note, the previous use of <mach/regs-fb.h> to get platform specific data
43  * has been replaced by using the platform device name to pick the correct
44  * configuration data for the system.
45 */
46
47 #ifdef CONFIG_FB_S3C_DEBUG_REGWRITE
48 #undef writel
49 #define writel(v, r) do { \
50         printk(KERN_DEBUG "%s: %08x => %p\n", __func__, (unsigned int)v, r); \
51         __raw_writel(v, r); } while (0)
52 #endif /* FB_S3C_DEBUG_REGWRITE */
53
54 /* irq_flags bits */
55 #define S3C_FB_VSYNC_IRQ_EN     0
56
57 #define VSYNC_TIMEOUT_MSEC 50
58
59 struct s3c_fb;
60
61 #define VALID_BPP(x) (1 << ((x) - 1))
62
63 #define OSD_BASE(win, variant) ((variant).osd + ((win) * (variant).osd_stride))
64 #define VIDOSD_A(win, variant) (OSD_BASE(win, variant) + 0x00)
65 #define VIDOSD_B(win, variant) (OSD_BASE(win, variant) + 0x04)
66 #define VIDOSD_C(win, variant) (OSD_BASE(win, variant) + 0x08)
67 #define VIDOSD_D(win, variant) (OSD_BASE(win, variant) + 0x0C)
68
69 /**
70  * struct s3c_fb_variant - fb variant information
71  * @is_2443: Set if S3C2443/S3C2416 style hardware.
72  * @nr_windows: The number of windows.
73  * @vidtcon: The base for the VIDTCONx registers
74  * @wincon: The base for the WINxCON registers.
75  * @winmap: The base for the WINxMAP registers.
76  * @keycon: The abse for the WxKEYCON registers.
77  * @buf_start: Offset of buffer start registers.
78  * @buf_size: Offset of buffer size registers.
79  * @buf_end: Offset of buffer end registers.
80  * @osd: The base for the OSD registers.
81  * @palette: Address of palette memory, or 0 if none.
82  * @has_prtcon: Set if has PRTCON register.
83  * @has_shadowcon: Set if has SHADOWCON register.
84  * @has_clksel: Set if VIDCON0 register has CLKSEL bit.
85  */
86 struct s3c_fb_variant {
87         unsigned int    is_2443:1;
88         unsigned short  nr_windows;
89         unsigned short  vidtcon;
90         unsigned short  wincon;
91         unsigned short  winmap;
92         unsigned short  keycon;
93         unsigned short  buf_start;
94         unsigned short  buf_end;
95         unsigned short  buf_size;
96         unsigned short  osd;
97         unsigned short  osd_stride;
98         unsigned short  palette[S3C_FB_MAX_WIN];
99
100         unsigned int    has_prtcon:1;
101         unsigned int    has_shadowcon:1;
102         unsigned int    has_clksel:1;
103 };
104
105 /**
106  * struct s3c_fb_win_variant
107  * @has_osd_c: Set if has OSD C register.
108  * @has_osd_d: Set if has OSD D register.
109  * @has_osd_alpha: Set if can change alpha transparency for a window.
110  * @palette_sz: Size of palette in entries.
111  * @palette_16bpp: Set if palette is 16bits wide.
112  * @osd_size_off: If != 0, supports setting up OSD for a window; the appropriate
113  *                register is located at the given offset from OSD_BASE.
114  * @valid_bpp: 1 bit per BPP setting to show valid bits-per-pixel.
115  *
116  * valid_bpp bit x is set if (x+1)BPP is supported.
117  */
118 struct s3c_fb_win_variant {
119         unsigned int    has_osd_c:1;
120         unsigned int    has_osd_d:1;
121         unsigned int    has_osd_alpha:1;
122         unsigned int    palette_16bpp:1;
123         unsigned short  osd_size_off;
124         unsigned short  palette_sz;
125         u32             valid_bpp;
126 };
127
128 /**
129  * struct s3c_fb_driverdata - per-device type driver data for init time.
130  * @variant: The variant information for this driver.
131  * @win: The window information for each window.
132  */
133 struct s3c_fb_driverdata {
134         struct s3c_fb_variant   variant;
135         struct s3c_fb_win_variant *win[S3C_FB_MAX_WIN];
136 };
137
138 /**
139  * struct s3c_fb_palette - palette information
140  * @r: Red bitfield.
141  * @g: Green bitfield.
142  * @b: Blue bitfield.
143  * @a: Alpha bitfield.
144  */
145 struct s3c_fb_palette {
146         struct fb_bitfield      r;
147         struct fb_bitfield      g;
148         struct fb_bitfield      b;
149         struct fb_bitfield      a;
150 };
151
152 /**
153  * struct s3c_fb_win - per window private data for each framebuffer.
154  * @windata: The platform data supplied for the window configuration.
155  * @parent: The hardware that this window is part of.
156  * @fbinfo: Pointer pack to the framebuffer info for this window.
157  * @varint: The variant information for this window.
158  * @palette_buffer: Buffer/cache to hold palette entries.
159  * @pseudo_palette: For use in TRUECOLOUR modes for entries 0..15/
160  * @index: The window number of this window.
161  * @palette: The bitfields for changing r/g/b into a hardware palette entry.
162  */
163 struct s3c_fb_win {
164         struct s3c_fb_pd_win    *windata;
165         struct s3c_fb           *parent;
166         struct fb_info          *fbinfo;
167         struct s3c_fb_palette    palette;
168         struct s3c_fb_win_variant variant;
169
170         u32                     *palette_buffer;
171         u32                      pseudo_palette[16];
172         unsigned int             index;
173 };
174
175 /**
176  * struct s3c_fb_vsync - vsync information
177  * @wait:       a queue for processes waiting for vsync
178  * @count:      vsync interrupt count
179  */
180 struct s3c_fb_vsync {
181         wait_queue_head_t       wait;
182         unsigned int            count;
183 };
184
185 /**
186  * struct s3c_fb - overall hardware state of the hardware
187  * @slock: The spinlock protection for this data sturcture.
188  * @dev: The device that we bound to, for printing, etc.
189  * @regs_res: The resource we claimed for the IO registers.
190  * @bus_clk: The clk (hclk) feeding our interface and possibly pixclk.
191  * @lcd_clk: The clk (sclk) feeding pixclk.
192  * @regs: The mapped hardware registers.
193  * @variant: Variant information for this hardware.
194  * @enabled: A bitmask of enabled hardware windows.
195  * @pdata: The platform configuration data passed with the device.
196  * @windows: The hardware windows that have been claimed.
197  * @irq_no: IRQ line number
198  * @irq_flags: irq flags
199  * @vsync_info: VSYNC-related information (count, queues...)
200  */
201 struct s3c_fb {
202         spinlock_t              slock;
203         struct device           *dev;
204         struct resource         *regs_res;
205         struct clk              *bus_clk;
206         struct clk              *lcd_clk;
207         void __iomem            *regs;
208         struct s3c_fb_variant    variant;
209
210         unsigned char            enabled;
211
212         struct s3c_fb_platdata  *pdata;
213         struct s3c_fb_win       *windows[S3C_FB_MAX_WIN];
214
215         int                      irq_no;
216         unsigned long            irq_flags;
217         struct s3c_fb_vsync      vsync_info;
218 };
219
220 /**
221  * s3c_fb_validate_win_bpp - validate the bits-per-pixel for this mode.
222  * @win: The device window.
223  * @bpp: The bit depth.
224  */
225 static bool s3c_fb_validate_win_bpp(struct s3c_fb_win *win, unsigned int bpp)
226 {
227         return win->variant.valid_bpp & VALID_BPP(bpp);
228 }
229
230 /**
231  * s3c_fb_check_var() - framebuffer layer request to verify a given mode.
232  * @var: The screen information to verify.
233  * @info: The framebuffer device.
234  *
235  * Framebuffer layer call to verify the given information and allow us to
236  * update various information depending on the hardware capabilities.
237  */
238 static int s3c_fb_check_var(struct fb_var_screeninfo *var,
239                             struct fb_info *info)
240 {
241         struct s3c_fb_win *win = info->par;
242         struct s3c_fb *sfb = win->parent;
243
244         dev_dbg(sfb->dev, "checking parameters\n");
245
246         var->xres_virtual = max(var->xres_virtual, var->xres);
247         var->yres_virtual = max(var->yres_virtual, var->yres);
248
249         if (!s3c_fb_validate_win_bpp(win, var->bits_per_pixel)) {
250                 dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n",
251                         win->index, var->bits_per_pixel);
252                 return -EINVAL;
253         }
254
255         /* always ensure these are zero, for drop through cases below */
256         var->transp.offset = 0;
257         var->transp.length = 0;
258
259         switch (var->bits_per_pixel) {
260         case 1:
261         case 2:
262         case 4:
263         case 8:
264                 if (sfb->variant.palette[win->index] != 0) {
265                         /* non palletised, A:1,R:2,G:3,B:2 mode */
266                         var->red.offset         = 4;
267                         var->green.offset       = 2;
268                         var->blue.offset        = 0;
269                         var->red.length         = 5;
270                         var->green.length       = 3;
271                         var->blue.length        = 2;
272                         var->transp.offset      = 7;
273                         var->transp.length      = 1;
274                 } else {
275                         var->red.offset = 0;
276                         var->red.length = var->bits_per_pixel;
277                         var->green      = var->red;
278                         var->blue       = var->red;
279                 }
280                 break;
281
282         case 19:
283                 /* 666 with one bit alpha/transparency */
284                 var->transp.offset      = 18;
285                 var->transp.length      = 1;
286         case 18:
287                 var->bits_per_pixel     = 32;
288
289                 /* 666 format */
290                 var->red.offset         = 12;
291                 var->green.offset       = 6;
292                 var->blue.offset        = 0;
293                 var->red.length         = 6;
294                 var->green.length       = 6;
295                 var->blue.length        = 6;
296                 break;
297
298         case 16:
299                 /* 16 bpp, 565 format */
300                 var->red.offset         = 11;
301                 var->green.offset       = 5;
302                 var->blue.offset        = 0;
303                 var->red.length         = 5;
304                 var->green.length       = 6;
305                 var->blue.length        = 5;
306                 break;
307
308         case 32:
309         case 28:
310         case 25:
311                 var->transp.length      = var->bits_per_pixel - 24;
312                 var->transp.offset      = 24;
313                 /* drop through */
314         case 24:
315                 /* our 24bpp is unpacked, so 32bpp */
316                 var->bits_per_pixel     = 32;
317                 var->red.offset         = 16;
318                 var->red.length         = 8;
319                 var->green.offset       = 8;
320                 var->green.length       = 8;
321                 var->blue.offset        = 0;
322                 var->blue.length        = 8;
323                 break;
324
325         default:
326                 dev_err(sfb->dev, "invalid bpp\n");
327         }
328
329         dev_dbg(sfb->dev, "%s: verified parameters\n", __func__);
330         return 0;
331 }
332
333 /**
334  * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock.
335  * @sfb: The hardware state.
336  * @pixclock: The pixel clock wanted, in picoseconds.
337  *
338  * Given the specified pixel clock, work out the necessary divider to get
339  * close to the output frequency.
340  */
341 static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
342 {
343         unsigned long clk;
344         unsigned long long tmp;
345         unsigned int result;
346
347         if (sfb->variant.has_clksel)
348                 clk = clk_get_rate(sfb->bus_clk);
349         else
350                 clk = clk_get_rate(sfb->lcd_clk);
351
352         tmp = (unsigned long long)clk;
353         tmp *= pixclk;
354
355         do_div(tmp, 1000000000UL);
356         result = (unsigned int)tmp / 1000;
357
358         dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
359                 pixclk, clk, result, clk / result);
360
361         return result;
362 }
363
364 /**
365  * s3c_fb_align_word() - align pixel count to word boundary
366  * @bpp: The number of bits per pixel
367  * @pix: The value to be aligned.
368  *
369  * Align the given pixel count so that it will start on an 32bit word
370  * boundary.
371  */
372 static int s3c_fb_align_word(unsigned int bpp, unsigned int pix)
373 {
374         int pix_per_word;
375
376         if (bpp > 16)
377                 return pix;
378
379         pix_per_word = (8 * 32) / bpp;
380         return ALIGN(pix, pix_per_word);
381 }
382
383 /**
384  * vidosd_set_size() - set OSD size for a window
385  *
386  * @win: the window to set OSD size for
387  * @size: OSD size register value
388  */
389 static void vidosd_set_size(struct s3c_fb_win *win, u32 size)
390 {
391         struct s3c_fb *sfb = win->parent;
392
393         /* OSD can be set up if osd_size_off != 0 for this window */
394         if (win->variant.osd_size_off)
395                 writel(size, sfb->regs + OSD_BASE(win->index, sfb->variant)
396                                 + win->variant.osd_size_off);
397 }
398
399 /**
400  * vidosd_set_alpha() - set alpha transparency for a window
401  *
402  * @win: the window to set OSD size for
403  * @alpha: alpha register value
404  */
405 static void vidosd_set_alpha(struct s3c_fb_win *win, u32 alpha)
406 {
407         struct s3c_fb *sfb = win->parent;
408
409         if (win->variant.has_osd_alpha)
410                 writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));
411 }
412
413 /**
414  * shadow_protect_win() - disable updating values from shadow registers at vsync
415  *
416  * @win: window to protect registers for
417  * @protect: 1 to protect (disable updates)
418  */
419 static void shadow_protect_win(struct s3c_fb_win *win, bool protect)
420 {
421         struct s3c_fb *sfb = win->parent;
422         u32 reg;
423
424         if (protect) {
425                 if (sfb->variant.has_prtcon) {
426                         writel(PRTCON_PROTECT, sfb->regs + PRTCON);
427                 } else if (sfb->variant.has_shadowcon) {
428                         reg = readl(sfb->regs + SHADOWCON);
429                         writel(reg | SHADOWCON_WINx_PROTECT(win->index),
430                                 sfb->regs + SHADOWCON);
431                 }
432         } else {
433                 if (sfb->variant.has_prtcon) {
434                         writel(0, sfb->regs + PRTCON);
435                 } else if (sfb->variant.has_shadowcon) {
436                         reg = readl(sfb->regs + SHADOWCON);
437                         writel(reg & ~SHADOWCON_WINx_PROTECT(win->index),
438                                 sfb->regs + SHADOWCON);
439                 }
440         }
441 }
442
443 /**
444  * s3c_fb_set_par() - framebuffer request to set new framebuffer state.
445  * @info: The framebuffer to change.
446  *
447  * Framebuffer layer request to set a new mode for the specified framebuffer
448  */
449 static int s3c_fb_set_par(struct fb_info *info)
450 {
451         struct fb_var_screeninfo *var = &info->var;
452         struct s3c_fb_win *win = info->par;
453         struct s3c_fb *sfb = win->parent;
454         void __iomem *regs = sfb->regs;
455         void __iomem *buf = regs;
456         int win_no = win->index;
457         u32 alpha = 0;
458         u32 data;
459         u32 pagewidth;
460         int clkdiv;
461
462         dev_dbg(sfb->dev, "setting framebuffer parameters\n");
463
464         shadow_protect_win(win, 1);
465
466         switch (var->bits_per_pixel) {
467         case 32:
468         case 24:
469         case 16:
470         case 12:
471                 info->fix.visual = FB_VISUAL_TRUECOLOR;
472                 break;
473         case 8:
474                 if (win->variant.palette_sz >= 256)
475                         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
476                 else
477                         info->fix.visual = FB_VISUAL_TRUECOLOR;
478                 break;
479         case 1:
480                 info->fix.visual = FB_VISUAL_MONO01;
481                 break;
482         default:
483                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
484                 break;
485         }
486
487         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
488
489         info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
490         info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
491
492         /* disable the window whilst we update it */
493         writel(0, regs + WINCON(win_no));
494
495         /* use platform specified window as the basis for the lcd timings */
496
497         if (win_no == sfb->pdata->default_win) {
498                 clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
499
500                 data = sfb->pdata->vidcon0;
501                 data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
502
503                 if (clkdiv > 1)
504                         data |= VIDCON0_CLKVAL_F(clkdiv-1) | VIDCON0_CLKDIR;
505                 else
506                         data &= ~VIDCON0_CLKDIR;        /* 1:1 clock */
507
508                 /* write the timing data to the panel */
509
510                 if (sfb->variant.is_2443)
511                         data |= (1 << 5);
512
513                 data |= VIDCON0_ENVID | VIDCON0_ENVID_F;
514                 writel(data, regs + VIDCON0);
515
516                 data = VIDTCON0_VBPD(var->upper_margin - 1) |
517                        VIDTCON0_VFPD(var->lower_margin - 1) |
518                        VIDTCON0_VSPW(var->vsync_len - 1);
519
520                 writel(data, regs + sfb->variant.vidtcon);
521
522                 data = VIDTCON1_HBPD(var->left_margin - 1) |
523                        VIDTCON1_HFPD(var->right_margin - 1) |
524                        VIDTCON1_HSPW(var->hsync_len - 1);
525
526                 /* VIDTCON1 */
527                 writel(data, regs + sfb->variant.vidtcon + 4);
528
529                 data = VIDTCON2_LINEVAL(var->yres - 1) |
530                        VIDTCON2_HOZVAL(var->xres - 1);
531                 writel(data, regs + sfb->variant.vidtcon + 8);
532         }
533
534         /* write the buffer address */
535
536         /* start and end registers stride is 8 */
537         buf = regs + win_no * 8;
538
539         writel(info->fix.smem_start, buf + sfb->variant.buf_start);
540
541         data = info->fix.smem_start + info->fix.line_length * var->yres;
542         writel(data, buf + sfb->variant.buf_end);
543
544         pagewidth = (var->xres * var->bits_per_pixel) >> 3;
545         data = VIDW_BUF_SIZE_OFFSET(info->fix.line_length - pagewidth) |
546                VIDW_BUF_SIZE_PAGEWIDTH(pagewidth);
547         writel(data, regs + sfb->variant.buf_size + (win_no * 4));
548
549         /* write 'OSD' registers to control position of framebuffer */
550
551         data = VIDOSDxA_TOPLEFT_X(0) | VIDOSDxA_TOPLEFT_Y(0);
552         writel(data, regs + VIDOSD_A(win_no, sfb->variant));
553
554         data = VIDOSDxB_BOTRIGHT_X(s3c_fb_align_word(var->bits_per_pixel,
555                                                      var->xres - 1)) |
556                VIDOSDxB_BOTRIGHT_Y(var->yres - 1);
557
558         writel(data, regs + VIDOSD_B(win_no, sfb->variant));
559
560         data = var->xres * var->yres;
561
562         alpha = VIDISD14C_ALPHA1_R(0xf) |
563                 VIDISD14C_ALPHA1_G(0xf) |
564                 VIDISD14C_ALPHA1_B(0xf);
565
566         vidosd_set_alpha(win, alpha);
567         vidosd_set_size(win, data);
568
569         /* Enable DMA channel for this window */
570         if (sfb->variant.has_shadowcon) {
571                 data = readl(sfb->regs + SHADOWCON);
572                 data |= SHADOWCON_CHx_ENABLE(win_no);
573                 writel(data, sfb->regs + SHADOWCON);
574         }
575
576         data = WINCONx_ENWIN;
577
578         /* note, since we have to round up the bits-per-pixel, we end up
579          * relying on the bitfield information for r/g/b/a to work out
580          * exactly which mode of operation is intended. */
581
582         switch (var->bits_per_pixel) {
583         case 1:
584                 data |= WINCON0_BPPMODE_1BPP;
585                 data |= WINCONx_BITSWP;
586                 data |= WINCONx_BURSTLEN_4WORD;
587                 break;
588         case 2:
589                 data |= WINCON0_BPPMODE_2BPP;
590                 data |= WINCONx_BITSWP;
591                 data |= WINCONx_BURSTLEN_8WORD;
592                 break;
593         case 4:
594                 data |= WINCON0_BPPMODE_4BPP;
595                 data |= WINCONx_BITSWP;
596                 data |= WINCONx_BURSTLEN_8WORD;
597                 break;
598         case 8:
599                 if (var->transp.length != 0)
600                         data |= WINCON1_BPPMODE_8BPP_1232;
601                 else
602                         data |= WINCON0_BPPMODE_8BPP_PALETTE;
603                 data |= WINCONx_BURSTLEN_8WORD;
604                 data |= WINCONx_BYTSWP;
605                 break;
606         case 16:
607                 if (var->transp.length != 0)
608                         data |= WINCON1_BPPMODE_16BPP_A1555;
609                 else
610                         data |= WINCON0_BPPMODE_16BPP_565;
611                 data |= WINCONx_HAWSWP;
612                 data |= WINCONx_BURSTLEN_16WORD;
613                 break;
614         case 24:
615         case 32:
616                 if (var->red.length == 6) {
617                         if (var->transp.length != 0)
618                                 data |= WINCON1_BPPMODE_19BPP_A1666;
619                         else
620                                 data |= WINCON1_BPPMODE_18BPP_666;
621                 } else if (var->transp.length == 1)
622                         data |= WINCON1_BPPMODE_25BPP_A1888
623                                 | WINCON1_BLD_PIX;
624                 else if ((var->transp.length == 4) ||
625                         (var->transp.length == 8))
626                         data |= WINCON1_BPPMODE_28BPP_A4888
627                                 | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
628                 else
629                         data |= WINCON0_BPPMODE_24BPP_888;
630
631                 data |= WINCONx_WSWP;
632                 data |= WINCONx_BURSTLEN_16WORD;
633                 break;
634         }
635
636         /* Enable the colour keying for the window below this one */
637         if (win_no > 0) {
638                 u32 keycon0_data = 0, keycon1_data = 0;
639                 void __iomem *keycon = regs + sfb->variant.keycon;
640
641                 keycon0_data = ~(WxKEYCON0_KEYBL_EN |
642                                 WxKEYCON0_KEYEN_F |
643                                 WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
644
645                 keycon1_data = WxKEYCON1_COLVAL(0xffffff);
646
647                 keycon += (win_no - 1) * 8;
648
649                 writel(keycon0_data, keycon + WKEYCON0);
650                 writel(keycon1_data, keycon + WKEYCON1);
651         }
652
653         writel(data, regs + sfb->variant.wincon + (win_no * 4));
654         writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
655
656         shadow_protect_win(win, 0);
657
658         return 0;
659 }
660
661 /**
662  * s3c_fb_update_palette() - set or schedule a palette update.
663  * @sfb: The hardware information.
664  * @win: The window being updated.
665  * @reg: The palette index being changed.
666  * @value: The computed palette value.
667  *
668  * Change the value of a palette register, either by directly writing to
669  * the palette (this requires the palette RAM to be disconnected from the
670  * hardware whilst this is in progress) or schedule the update for later.
671  *
672  * At the moment, since we have no VSYNC interrupt support, we simply set
673  * the palette entry directly.
674  */
675 static void s3c_fb_update_palette(struct s3c_fb *sfb,
676                                   struct s3c_fb_win *win,
677                                   unsigned int reg,
678                                   u32 value)
679 {
680         void __iomem *palreg;
681         u32 palcon;
682
683         palreg = sfb->regs + sfb->variant.palette[win->index];
684
685         dev_dbg(sfb->dev, "%s: win %d, reg %d (%p): %08x\n",
686                 __func__, win->index, reg, palreg, value);
687
688         win->palette_buffer[reg] = value;
689
690         palcon = readl(sfb->regs + WPALCON);
691         writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
692
693         if (win->variant.palette_16bpp)
694                 writew(value, palreg + (reg * 2));
695         else
696                 writel(value, palreg + (reg * 4));
697
698         writel(palcon, sfb->regs + WPALCON);
699 }
700
701 static inline unsigned int chan_to_field(unsigned int chan,
702                                          struct fb_bitfield *bf)
703 {
704         chan &= 0xffff;
705         chan >>= 16 - bf->length;
706         return chan << bf->offset;
707 }
708
709 /**
710  * s3c_fb_setcolreg() - framebuffer layer request to change palette.
711  * @regno: The palette index to change.
712  * @red: The red field for the palette data.
713  * @green: The green field for the palette data.
714  * @blue: The blue field for the palette data.
715  * @trans: The transparency (alpha) field for the palette data.
716  * @info: The framebuffer being changed.
717  */
718 static int s3c_fb_setcolreg(unsigned regno,
719                             unsigned red, unsigned green, unsigned blue,
720                             unsigned transp, struct fb_info *info)
721 {
722         struct s3c_fb_win *win = info->par;
723         struct s3c_fb *sfb = win->parent;
724         unsigned int val;
725
726         dev_dbg(sfb->dev, "%s: win %d: %d => rgb=%d/%d/%d\n",
727                 __func__, win->index, regno, red, green, blue);
728
729         switch (info->fix.visual) {
730         case FB_VISUAL_TRUECOLOR:
731                 /* true-colour, use pseudo-palette */
732
733                 if (regno < 16) {
734                         u32 *pal = info->pseudo_palette;
735
736                         val  = chan_to_field(red,   &info->var.red);
737                         val |= chan_to_field(green, &info->var.green);
738                         val |= chan_to_field(blue,  &info->var.blue);
739
740                         pal[regno] = val;
741                 }
742                 break;
743
744         case FB_VISUAL_PSEUDOCOLOR:
745                 if (regno < win->variant.palette_sz) {
746                         val  = chan_to_field(red, &win->palette.r);
747                         val |= chan_to_field(green, &win->palette.g);
748                         val |= chan_to_field(blue, &win->palette.b);
749
750                         s3c_fb_update_palette(sfb, win, regno, val);
751                 }
752
753                 break;
754
755         default:
756                 return 1;       /* unknown type */
757         }
758
759         return 0;
760 }
761
762 /**
763  * s3c_fb_enable() - Set the state of the main LCD output
764  * @sfb: The main framebuffer state.
765  * @enable: The state to set.
766  */
767 static void s3c_fb_enable(struct s3c_fb *sfb, int enable)
768 {
769         u32 vidcon0 = readl(sfb->regs + VIDCON0);
770
771         if (enable)
772                 vidcon0 |= VIDCON0_ENVID | VIDCON0_ENVID_F;
773         else {
774                 /* see the note in the framebuffer datasheet about
775                  * why you cannot take both of these bits down at the
776                  * same time. */
777
778                 if (!(vidcon0 & VIDCON0_ENVID))
779                         return;
780
781                 vidcon0 |= VIDCON0_ENVID;
782                 vidcon0 &= ~VIDCON0_ENVID_F;
783         }
784
785         writel(vidcon0, sfb->regs + VIDCON0);
786 }
787
788 /**
789  * s3c_fb_blank() - blank or unblank the given window
790  * @blank_mode: The blank state from FB_BLANK_*
791  * @info: The framebuffer to blank.
792  *
793  * Framebuffer layer request to change the power state.
794  */
795 static int s3c_fb_blank(int blank_mode, struct fb_info *info)
796 {
797         struct s3c_fb_win *win = info->par;
798         struct s3c_fb *sfb = win->parent;
799         unsigned int index = win->index;
800         u32 wincon;
801
802         dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
803
804         wincon = readl(sfb->regs + sfb->variant.wincon + (index * 4));
805
806         switch (blank_mode) {
807         case FB_BLANK_POWERDOWN:
808                 wincon &= ~WINCONx_ENWIN;
809                 sfb->enabled &= ~(1 << index);
810                 /* fall through to FB_BLANK_NORMAL */
811
812         case FB_BLANK_NORMAL:
813                 /* disable the DMA and display 0x0 (black) */
814                 writel(WINxMAP_MAP | WINxMAP_MAP_COLOUR(0x0),
815                        sfb->regs + sfb->variant.winmap + (index * 4));
816                 break;
817
818         case FB_BLANK_UNBLANK:
819                 writel(0x0, sfb->regs + sfb->variant.winmap + (index * 4));
820                 wincon |= WINCONx_ENWIN;
821                 sfb->enabled |= (1 << index);
822                 break;
823
824         case FB_BLANK_VSYNC_SUSPEND:
825         case FB_BLANK_HSYNC_SUSPEND:
826         default:
827                 return 1;
828         }
829
830         writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
831
832         /* Check the enabled state to see if we need to be running the
833          * main LCD interface, as if there are no active windows then
834          * it is highly likely that we also do not need to output
835          * anything.
836          */
837
838         /* We could do something like the following code, but the current
839          * system of using framebuffer events means that we cannot make
840          * the distinction between just window 0 being inactive and all
841          * the windows being down.
842          *
843          * s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
844         */
845
846         /* we're stuck with this until we can do something about overriding
847          * the power control using the blanking event for a single fb.
848          */
849         if (index == sfb->pdata->default_win)
850                 s3c_fb_enable(sfb, blank_mode != FB_BLANK_POWERDOWN ? 1 : 0);
851
852         return 0;
853 }
854
855 /**
856  * s3c_fb_pan_display() - Pan the display.
857  *
858  * Note that the offsets can be written to the device at any time, as their
859  * values are latched at each vsync automatically. This also means that only
860  * the last call to this function will have any effect on next vsync, but
861  * there is no need to sleep waiting for it to prevent tearing.
862  *
863  * @var: The screen information to verify.
864  * @info: The framebuffer device.
865  */
866 static int s3c_fb_pan_display(struct fb_var_screeninfo *var,
867                               struct fb_info *info)
868 {
869         struct s3c_fb_win *win  = info->par;
870         struct s3c_fb *sfb      = win->parent;
871         void __iomem *buf       = sfb->regs + win->index * 8;
872         unsigned int start_boff, end_boff;
873
874         /* Offset in bytes to the start of the displayed area */
875         start_boff = var->yoffset * info->fix.line_length;
876         /* X offset depends on the current bpp */
877         if (info->var.bits_per_pixel >= 8) {
878                 start_boff += var->xoffset * (info->var.bits_per_pixel >> 3);
879         } else {
880                 switch (info->var.bits_per_pixel) {
881                 case 4:
882                         start_boff += var->xoffset >> 1;
883                         break;
884                 case 2:
885                         start_boff += var->xoffset >> 2;
886                         break;
887                 case 1:
888                         start_boff += var->xoffset >> 3;
889                         break;
890                 default:
891                         dev_err(sfb->dev, "invalid bpp\n");
892                         return -EINVAL;
893                 }
894         }
895         /* Offset in bytes to the end of the displayed area */
896         end_boff = start_boff + info->var.yres * info->fix.line_length;
897
898         /* Temporarily turn off per-vsync update from shadow registers until
899          * both start and end addresses are updated to prevent corruption */
900         shadow_protect_win(win, 1);
901
902         writel(info->fix.smem_start + start_boff, buf + sfb->variant.buf_start);
903         writel(info->fix.smem_start + end_boff, buf + sfb->variant.buf_end);
904
905         shadow_protect_win(win, 0);
906
907         return 0;
908 }
909
910 /**
911  * s3c_fb_enable_irq() - enable framebuffer interrupts
912  * @sfb: main hardware state
913  */
914 static void s3c_fb_enable_irq(struct s3c_fb *sfb)
915 {
916         void __iomem *regs = sfb->regs;
917         u32 irq_ctrl_reg;
918
919         if (!test_and_set_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
920                 /* IRQ disabled, enable it */
921                 irq_ctrl_reg = readl(regs + VIDINTCON0);
922
923                 irq_ctrl_reg |= VIDINTCON0_INT_ENABLE;
924                 irq_ctrl_reg |= VIDINTCON0_INT_FRAME;
925
926                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL0_MASK;
927                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL0_VSYNC;
928                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL1_MASK;
929                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL1_NONE;
930
931                 writel(irq_ctrl_reg, regs + VIDINTCON0);
932         }
933 }
934
935 /**
936  * s3c_fb_disable_irq() - disable framebuffer interrupts
937  * @sfb: main hardware state
938  */
939 static void s3c_fb_disable_irq(struct s3c_fb *sfb)
940 {
941         void __iomem *regs = sfb->regs;
942         u32 irq_ctrl_reg;
943
944         if (test_and_clear_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
945                 /* IRQ enabled, disable it */
946                 irq_ctrl_reg = readl(regs + VIDINTCON0);
947
948                 irq_ctrl_reg &= ~VIDINTCON0_INT_FRAME;
949                 irq_ctrl_reg &= ~VIDINTCON0_INT_ENABLE;
950
951                 writel(irq_ctrl_reg, regs + VIDINTCON0);
952         }
953 }
954
955 static irqreturn_t s3c_fb_irq(int irq, void *dev_id)
956 {
957         struct s3c_fb *sfb = dev_id;
958         void __iomem  *regs = sfb->regs;
959         u32 irq_sts_reg;
960
961         spin_lock(&sfb->slock);
962
963         irq_sts_reg = readl(regs + VIDINTCON1);
964
965         if (irq_sts_reg & VIDINTCON1_INT_FRAME) {
966
967                 /* VSYNC interrupt, accept it */
968                 writel(VIDINTCON1_INT_FRAME, regs + VIDINTCON1);
969
970                 sfb->vsync_info.count++;
971                 wake_up_interruptible(&sfb->vsync_info.wait);
972         }
973
974         /* We only support waiting for VSYNC for now, so it's safe
975          * to always disable irqs here.
976          */
977         s3c_fb_disable_irq(sfb);
978
979         spin_unlock(&sfb->slock);
980         return IRQ_HANDLED;
981 }
982
983 /**
984  * s3c_fb_wait_for_vsync() - sleep until next VSYNC interrupt or timeout
985  * @sfb: main hardware state
986  * @crtc: head index.
987  */
988 static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc)
989 {
990         unsigned long count;
991         int ret;
992
993         if (crtc != 0)
994                 return -ENODEV;
995
996         count = sfb->vsync_info.count;
997         s3c_fb_enable_irq(sfb);
998         ret = wait_event_interruptible_timeout(sfb->vsync_info.wait,
999                                        count != sfb->vsync_info.count,
1000                                        msecs_to_jiffies(VSYNC_TIMEOUT_MSEC));
1001         if (ret == 0)
1002                 return -ETIMEDOUT;
1003
1004         return 0;
1005 }
1006
1007 static int s3c_fb_ioctl(struct fb_info *info, unsigned int cmd,
1008                         unsigned long arg)
1009 {
1010         struct s3c_fb_win *win = info->par;
1011         struct s3c_fb *sfb = win->parent;
1012         int ret;
1013         u32 crtc;
1014
1015         switch (cmd) {
1016         case FBIO_WAITFORVSYNC:
1017                 if (get_user(crtc, (u32 __user *)arg)) {
1018                         ret = -EFAULT;
1019                         break;
1020                 }
1021
1022                 ret = s3c_fb_wait_for_vsync(sfb, crtc);
1023                 break;
1024         default:
1025                 ret = -ENOTTY;
1026         }
1027
1028         return ret;
1029 }
1030
1031 static int s3c_fb_open(struct fb_info *info, int user)
1032 {
1033         struct s3c_fb_win *win = info->par;
1034         struct s3c_fb *sfb = win->parent;
1035
1036         pm_runtime_get_sync(sfb->dev);
1037
1038         return 0;
1039 }
1040
1041 static int s3c_fb_release(struct fb_info *info, int user)
1042 {
1043         struct s3c_fb_win *win = info->par;
1044         struct s3c_fb *sfb = win->parent;
1045
1046         pm_runtime_put_sync(sfb->dev);
1047
1048         return 0;
1049 }
1050
1051 static struct fb_ops s3c_fb_ops = {
1052         .owner          = THIS_MODULE,
1053         .fb_open        = s3c_fb_open,
1054         .fb_release     = s3c_fb_release,
1055         .fb_check_var   = s3c_fb_check_var,
1056         .fb_set_par     = s3c_fb_set_par,
1057         .fb_blank       = s3c_fb_blank,
1058         .fb_setcolreg   = s3c_fb_setcolreg,
1059         .fb_fillrect    = cfb_fillrect,
1060         .fb_copyarea    = cfb_copyarea,
1061         .fb_imageblit   = cfb_imageblit,
1062         .fb_pan_display = s3c_fb_pan_display,
1063         .fb_ioctl       = s3c_fb_ioctl,
1064 };
1065
1066 /**
1067  * s3c_fb_missing_pixclock() - calculates pixel clock
1068  * @mode: The video mode to change.
1069  *
1070  * Calculate the pixel clock when none has been given through platform data.
1071  */
1072 static void __devinit s3c_fb_missing_pixclock(struct fb_videomode *mode)
1073 {
1074         u64 pixclk = 1000000000000ULL;
1075         u32 div;
1076
1077         div  = mode->left_margin + mode->hsync_len + mode->right_margin +
1078                mode->xres;
1079         div *= mode->upper_margin + mode->vsync_len + mode->lower_margin +
1080                mode->yres;
1081         div *= mode->refresh ? : 60;
1082
1083         do_div(pixclk, div);
1084
1085         mode->pixclock = pixclk;
1086 }
1087
1088 /**
1089  * s3c_fb_alloc_memory() - allocate display memory for framebuffer window
1090  * @sfb: The base resources for the hardware.
1091  * @win: The window to initialise memory for.
1092  *
1093  * Allocate memory for the given framebuffer.
1094  */
1095 static int __devinit s3c_fb_alloc_memory(struct s3c_fb *sfb,
1096                                          struct s3c_fb_win *win)
1097 {
1098         struct s3c_fb_pd_win *windata = win->windata;
1099         unsigned int real_size, virt_size, size;
1100         struct fb_info *fbi = win->fbinfo;
1101         dma_addr_t map_dma;
1102
1103         dev_dbg(sfb->dev, "allocating memory for display\n");
1104
1105         real_size = windata->win_mode.xres * windata->win_mode.yres;
1106         virt_size = windata->virtual_x * windata->virtual_y;
1107
1108         dev_dbg(sfb->dev, "real_size=%u (%u.%u), virt_size=%u (%u.%u)\n",
1109                 real_size, windata->win_mode.xres, windata->win_mode.yres,
1110                 virt_size, windata->virtual_x, windata->virtual_y);
1111
1112         size = (real_size > virt_size) ? real_size : virt_size;
1113         size *= (windata->max_bpp > 16) ? 32 : windata->max_bpp;
1114         size /= 8;
1115
1116         fbi->fix.smem_len = size;
1117         size = PAGE_ALIGN(size);
1118
1119         dev_dbg(sfb->dev, "want %u bytes for window\n", size);
1120
1121         fbi->screen_base = dma_alloc_writecombine(sfb->dev, size,
1122                                                   &map_dma, GFP_KERNEL);
1123         if (!fbi->screen_base)
1124                 return -ENOMEM;
1125
1126         dev_dbg(sfb->dev, "mapped %x to %p\n",
1127                 (unsigned int)map_dma, fbi->screen_base);
1128
1129         memset(fbi->screen_base, 0x0, size);
1130         fbi->fix.smem_start = map_dma;
1131
1132         return 0;
1133 }
1134
1135 /**
1136  * s3c_fb_free_memory() - free the display memory for the given window
1137  * @sfb: The base resources for the hardware.
1138  * @win: The window to free the display memory for.
1139  *
1140  * Free the display memory allocated by s3c_fb_alloc_memory().
1141  */
1142 static void s3c_fb_free_memory(struct s3c_fb *sfb, struct s3c_fb_win *win)
1143 {
1144         struct fb_info *fbi = win->fbinfo;
1145
1146         if (fbi->screen_base)
1147                 dma_free_writecombine(sfb->dev, PAGE_ALIGN(fbi->fix.smem_len),
1148                               fbi->screen_base, fbi->fix.smem_start);
1149 }
1150
1151 /**
1152  * s3c_fb_release_win() - release resources for a framebuffer window.
1153  * @win: The window to cleanup the resources for.
1154  *
1155  * Release the resources that where claimed for the hardware window,
1156  * such as the framebuffer instance and any memory claimed for it.
1157  */
1158 static void s3c_fb_release_win(struct s3c_fb *sfb, struct s3c_fb_win *win)
1159 {
1160         u32 data;
1161
1162         if (win->fbinfo) {
1163                 if (sfb->variant.has_shadowcon) {
1164                         data = readl(sfb->regs + SHADOWCON);
1165                         data &= ~SHADOWCON_CHx_ENABLE(win->index);
1166                         data &= ~SHADOWCON_CHx_LOCAL_ENABLE(win->index);
1167                         writel(data, sfb->regs + SHADOWCON);
1168                 }
1169                 unregister_framebuffer(win->fbinfo);
1170                 if (win->fbinfo->cmap.len)
1171                         fb_dealloc_cmap(&win->fbinfo->cmap);
1172                 s3c_fb_free_memory(sfb, win);
1173                 framebuffer_release(win->fbinfo);
1174         }
1175 }
1176
1177 /**
1178  * s3c_fb_probe_win() - register an hardware window
1179  * @sfb: The base resources for the hardware
1180  * @variant: The variant information for this window.
1181  * @res: Pointer to where to place the resultant window.
1182  *
1183  * Allocate and do the basic initialisation for one of the hardware's graphics
1184  * windows.
1185  */
1186 static int __devinit s3c_fb_probe_win(struct s3c_fb *sfb, unsigned int win_no,
1187                                       struct s3c_fb_win_variant *variant,
1188                                       struct s3c_fb_win **res)
1189 {
1190         struct fb_var_screeninfo *var;
1191         struct fb_videomode *initmode;
1192         struct s3c_fb_pd_win *windata;
1193         struct s3c_fb_win *win;
1194         struct fb_info *fbinfo;
1195         int palette_size;
1196         int ret;
1197
1198         dev_dbg(sfb->dev, "probing window %d, variant %p\n", win_no, variant);
1199
1200         init_waitqueue_head(&sfb->vsync_info.wait);
1201
1202         palette_size = variant->palette_sz * 4;
1203
1204         fbinfo = framebuffer_alloc(sizeof(struct s3c_fb_win) +
1205                                    palette_size * sizeof(u32), sfb->dev);
1206         if (!fbinfo) {
1207                 dev_err(sfb->dev, "failed to allocate framebuffer\n");
1208                 return -ENOENT;
1209         }
1210
1211         windata = sfb->pdata->win[win_no];
1212         initmode = &windata->win_mode;
1213
1214         WARN_ON(windata->max_bpp == 0);
1215         WARN_ON(windata->win_mode.xres == 0);
1216         WARN_ON(windata->win_mode.yres == 0);
1217
1218         win = fbinfo->par;
1219         *res = win;
1220         var = &fbinfo->var;
1221         win->variant = *variant;
1222         win->fbinfo = fbinfo;
1223         win->parent = sfb;
1224         win->windata = windata;
1225         win->index = win_no;
1226         win->palette_buffer = (u32 *)(win + 1);
1227
1228         ret = s3c_fb_alloc_memory(sfb, win);
1229         if (ret) {
1230                 dev_err(sfb->dev, "failed to allocate display memory\n");
1231                 return ret;
1232         }
1233
1234         /* setup the r/b/g positions for the window's palette */
1235         if (win->variant.palette_16bpp) {
1236                 /* Set RGB 5:6:5 as default */
1237                 win->palette.r.offset = 11;
1238                 win->palette.r.length = 5;
1239                 win->palette.g.offset = 5;
1240                 win->palette.g.length = 6;
1241                 win->palette.b.offset = 0;
1242                 win->palette.b.length = 5;
1243
1244         } else {
1245                 /* Set 8bpp or 8bpp and 1bit alpha */
1246                 win->palette.r.offset = 16;
1247                 win->palette.r.length = 8;
1248                 win->palette.g.offset = 8;
1249                 win->palette.g.length = 8;
1250                 win->palette.b.offset = 0;
1251                 win->palette.b.length = 8;
1252         }
1253
1254         /* setup the initial video mode from the window */
1255         fb_videomode_to_var(&fbinfo->var, initmode);
1256
1257         fbinfo->fix.type        = FB_TYPE_PACKED_PIXELS;
1258         fbinfo->fix.accel       = FB_ACCEL_NONE;
1259         fbinfo->var.activate    = FB_ACTIVATE_NOW;
1260         fbinfo->var.vmode       = FB_VMODE_NONINTERLACED;
1261         fbinfo->var.bits_per_pixel = windata->default_bpp;
1262         fbinfo->fbops           = &s3c_fb_ops;
1263         fbinfo->flags           = FBINFO_FLAG_DEFAULT;
1264         fbinfo->pseudo_palette  = &win->pseudo_palette;
1265
1266         /* prepare to actually start the framebuffer */
1267
1268         ret = s3c_fb_check_var(&fbinfo->var, fbinfo);
1269         if (ret < 0) {
1270                 dev_err(sfb->dev, "check_var failed on initial video params\n");
1271                 return ret;
1272         }
1273
1274         /* create initial colour map */
1275
1276         ret = fb_alloc_cmap(&fbinfo->cmap, win->variant.palette_sz, 1);
1277         if (ret == 0)
1278                 fb_set_cmap(&fbinfo->cmap, fbinfo);
1279         else
1280                 dev_err(sfb->dev, "failed to allocate fb cmap\n");
1281
1282         s3c_fb_set_par(fbinfo);
1283
1284         dev_dbg(sfb->dev, "about to register framebuffer\n");
1285
1286         /* run the check_var and set_par on our configuration. */
1287
1288         ret = register_framebuffer(fbinfo);
1289         if (ret < 0) {
1290                 dev_err(sfb->dev, "failed to register framebuffer\n");
1291                 return ret;
1292         }
1293
1294         dev_info(sfb->dev, "window %d: fb %s\n", win_no, fbinfo->fix.id);
1295
1296         return 0;
1297 }
1298
1299 /**
1300  * s3c_fb_clear_win() - clear hardware window registers.
1301  * @sfb: The base resources for the hardware.
1302  * @win: The window to process.
1303  *
1304  * Reset the specific window registers to a known state.
1305  */
1306 static void s3c_fb_clear_win(struct s3c_fb *sfb, int win)
1307 {
1308         void __iomem *regs = sfb->regs;
1309         u32 reg;
1310
1311         writel(0, regs + sfb->variant.wincon + (win * 4));
1312         writel(0, regs + VIDOSD_A(win, sfb->variant));
1313         writel(0, regs + VIDOSD_B(win, sfb->variant));
1314         writel(0, regs + VIDOSD_C(win, sfb->variant));
1315         reg = readl(regs + SHADOWCON);
1316         writel(reg & ~SHADOWCON_WINx_PROTECT(win), regs + SHADOWCON);
1317 }
1318
1319 static int __devinit s3c_fb_probe(struct platform_device *pdev)
1320 {
1321         const struct platform_device_id *platid;
1322         struct s3c_fb_driverdata *fbdrv;
1323         struct device *dev = &pdev->dev;
1324         struct s3c_fb_platdata *pd;
1325         struct s3c_fb *sfb;
1326         struct resource *res;
1327         int win;
1328         int ret = 0;
1329
1330         platid = platform_get_device_id(pdev);
1331         fbdrv = (struct s3c_fb_driverdata *)platid->driver_data;
1332
1333         if (fbdrv->variant.nr_windows > S3C_FB_MAX_WIN) {
1334                 dev_err(dev, "too many windows, cannot attach\n");
1335                 return -EINVAL;
1336         }
1337
1338         pd = pdev->dev.platform_data;
1339         if (!pd) {
1340                 dev_err(dev, "no platform data specified\n");
1341                 return -EINVAL;
1342         }
1343
1344         sfb = kzalloc(sizeof(struct s3c_fb), GFP_KERNEL);
1345         if (!sfb) {
1346                 dev_err(dev, "no memory for framebuffers\n");
1347                 return -ENOMEM;
1348         }
1349
1350         dev_dbg(dev, "allocate new framebuffer %p\n", sfb);
1351
1352         sfb->dev = dev;
1353         sfb->pdata = pd;
1354         sfb->variant = fbdrv->variant;
1355
1356         spin_lock_init(&sfb->slock);
1357
1358         sfb->bus_clk = clk_get(dev, "lcd");
1359         if (IS_ERR(sfb->bus_clk)) {
1360                 dev_err(dev, "failed to get bus clock\n");
1361                 ret = PTR_ERR(sfb->bus_clk);
1362                 goto err_sfb;
1363         }
1364
1365         clk_enable(sfb->bus_clk);
1366
1367         if (!sfb->variant.has_clksel) {
1368                 sfb->lcd_clk = clk_get(dev, "sclk_fimd");
1369                 if (IS_ERR(sfb->lcd_clk)) {
1370                         dev_err(dev, "failed to get lcd clock\n");
1371                         ret = PTR_ERR(sfb->lcd_clk);
1372                         goto err_bus_clk;
1373                 }
1374
1375                 clk_enable(sfb->lcd_clk);
1376         }
1377
1378         pm_runtime_enable(sfb->dev);
1379
1380         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1381         if (!res) {
1382                 dev_err(dev, "failed to find registers\n");
1383                 ret = -ENOENT;
1384                 goto err_lcd_clk;
1385         }
1386
1387         sfb->regs_res = request_mem_region(res->start, resource_size(res),
1388                                            dev_name(dev));
1389         if (!sfb->regs_res) {
1390                 dev_err(dev, "failed to claim register region\n");
1391                 ret = -ENOENT;
1392                 goto err_lcd_clk;
1393         }
1394
1395         sfb->regs = ioremap(res->start, resource_size(res));
1396         if (!sfb->regs) {
1397                 dev_err(dev, "failed to map registers\n");
1398                 ret = -ENXIO;
1399                 goto err_req_region;
1400         }
1401
1402         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1403         if (!res) {
1404                 dev_err(dev, "failed to acquire irq resource\n");
1405                 ret = -ENOENT;
1406                 goto err_ioremap;
1407         }
1408         sfb->irq_no = res->start;
1409         ret = request_irq(sfb->irq_no, s3c_fb_irq,
1410                           0, "s3c_fb", sfb);
1411         if (ret) {
1412                 dev_err(dev, "irq request failed\n");
1413                 goto err_ioremap;
1414         }
1415
1416         dev_dbg(dev, "got resources (regs %p), probing windows\n", sfb->regs);
1417
1418         platform_set_drvdata(pdev, sfb);
1419         pm_runtime_get_sync(sfb->dev);
1420
1421         /* setup gpio and output polarity controls */
1422
1423         pd->setup_gpio();
1424
1425         writel(pd->vidcon1, sfb->regs + VIDCON1);
1426
1427         /* zero all windows before we do anything */
1428
1429         for (win = 0; win < fbdrv->variant.nr_windows; win++)
1430                 s3c_fb_clear_win(sfb, win);
1431
1432         /* initialise colour key controls */
1433         for (win = 0; win < (fbdrv->variant.nr_windows - 1); win++) {
1434                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1435
1436                 regs += (win * 8);
1437                 writel(0xffffff, regs + WKEYCON0);
1438                 writel(0xffffff, regs + WKEYCON1);
1439         }
1440
1441         /* we have the register setup, start allocating framebuffers */
1442
1443         for (win = 0; win < fbdrv->variant.nr_windows; win++) {
1444                 if (!pd->win[win])
1445                         continue;
1446
1447                 if (!pd->win[win]->win_mode.pixclock)
1448                         s3c_fb_missing_pixclock(&pd->win[win]->win_mode);
1449
1450                 ret = s3c_fb_probe_win(sfb, win, fbdrv->win[win],
1451                                        &sfb->windows[win]);
1452                 if (ret < 0) {
1453                         dev_err(dev, "failed to create window %d\n", win);
1454                         for (; win >= 0; win--)
1455                                 s3c_fb_release_win(sfb, sfb->windows[win]);
1456                         goto err_irq;
1457                 }
1458         }
1459
1460         platform_set_drvdata(pdev, sfb);
1461         pm_runtime_put_sync(sfb->dev);
1462
1463         return 0;
1464
1465 err_irq:
1466         free_irq(sfb->irq_no, sfb);
1467
1468 err_ioremap:
1469         iounmap(sfb->regs);
1470
1471 err_req_region:
1472         release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
1473
1474 err_lcd_clk:
1475         if (!sfb->variant.has_clksel) {
1476                 clk_disable(sfb->lcd_clk);
1477                 clk_put(sfb->lcd_clk);
1478         }
1479
1480 err_bus_clk:
1481         clk_disable(sfb->bus_clk);
1482         clk_put(sfb->bus_clk);
1483
1484 err_sfb:
1485         kfree(sfb);
1486         return ret;
1487 }
1488
1489 /**
1490  * s3c_fb_remove() - Cleanup on module finalisation
1491  * @pdev: The platform device we are bound to.
1492  *
1493  * Shutdown and then release all the resources that the driver allocated
1494  * on initialisation.
1495  */
1496 static int __devexit s3c_fb_remove(struct platform_device *pdev)
1497 {
1498         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1499         int win;
1500
1501         pm_runtime_get_sync(sfb->dev);
1502
1503         for (win = 0; win < S3C_FB_MAX_WIN; win++)
1504                 if (sfb->windows[win])
1505                         s3c_fb_release_win(sfb, sfb->windows[win]);
1506
1507         free_irq(sfb->irq_no, sfb);
1508
1509         iounmap(sfb->regs);
1510
1511         if (!sfb->variant.has_clksel) {
1512                 clk_disable(sfb->lcd_clk);
1513                 clk_put(sfb->lcd_clk);
1514         }
1515
1516         clk_disable(sfb->bus_clk);
1517         clk_put(sfb->bus_clk);
1518
1519         release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
1520
1521         pm_runtime_put_sync(sfb->dev);
1522         pm_runtime_disable(sfb->dev);
1523
1524         kfree(sfb);
1525         return 0;
1526 }
1527
1528 #ifdef CONFIG_PM
1529 static int s3c_fb_suspend(struct device *dev)
1530 {
1531         struct platform_device *pdev = to_platform_device(dev);
1532         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1533         struct s3c_fb_win *win;
1534         int win_no;
1535
1536         for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1537                 win = sfb->windows[win_no];
1538                 if (!win)
1539                         continue;
1540
1541                 /* use the blank function to push into power-down */
1542                 s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1543         }
1544
1545         if (!sfb->variant.has_clksel)
1546                 clk_disable(sfb->lcd_clk);
1547
1548         clk_disable(sfb->bus_clk);
1549         return 0;
1550 }
1551
1552 static int s3c_fb_resume(struct device *dev)
1553 {
1554         struct platform_device *pdev = to_platform_device(dev);
1555         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1556         struct s3c_fb_platdata *pd = sfb->pdata;
1557         struct s3c_fb_win *win;
1558         int win_no;
1559
1560         clk_enable(sfb->bus_clk);
1561
1562         if (!sfb->variant.has_clksel)
1563                 clk_enable(sfb->lcd_clk);
1564
1565         /* setup gpio and output polarity controls */
1566         pd->setup_gpio();
1567         writel(pd->vidcon1, sfb->regs + VIDCON1);
1568
1569         /* zero all windows before we do anything */
1570         for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1571                 s3c_fb_clear_win(sfb, win_no);
1572
1573         for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1574                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1575
1576                 regs += (win_no * 8);
1577                 writel(0xffffff, regs + WKEYCON0);
1578                 writel(0xffffff, regs + WKEYCON1);
1579         }
1580
1581         /* restore framebuffers */
1582         for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1583                 win = sfb->windows[win_no];
1584                 if (!win)
1585                         continue;
1586
1587                 dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1588                 s3c_fb_set_par(win->fbinfo);
1589         }
1590
1591         return 0;
1592 }
1593
1594 static int s3c_fb_runtime_suspend(struct device *dev)
1595 {
1596         struct platform_device *pdev = to_platform_device(dev);
1597         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1598         struct s3c_fb_win *win;
1599         int win_no;
1600
1601         for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1602                 win = sfb->windows[win_no];
1603                 if (!win)
1604                         continue;
1605
1606                 /* use the blank function to push into power-down */
1607                 s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1608         }
1609
1610         if (!sfb->variant.has_clksel)
1611                 clk_disable(sfb->lcd_clk);
1612
1613         clk_disable(sfb->bus_clk);
1614         return 0;
1615 }
1616
1617 static int s3c_fb_runtime_resume(struct device *dev)
1618 {
1619         struct platform_device *pdev = to_platform_device(dev);
1620         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1621         struct s3c_fb_platdata *pd = sfb->pdata;
1622         struct s3c_fb_win *win;
1623         int win_no;
1624
1625         clk_enable(sfb->bus_clk);
1626
1627         if (!sfb->variant.has_clksel)
1628                 clk_enable(sfb->lcd_clk);
1629
1630         /* setup gpio and output polarity controls */
1631         pd->setup_gpio();
1632         writel(pd->vidcon1, sfb->regs + VIDCON1);
1633
1634         /* zero all windows before we do anything */
1635         for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1636                 s3c_fb_clear_win(sfb, win_no);
1637
1638         for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1639                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1640
1641                 regs += (win_no * 8);
1642                 writel(0xffffff, regs + WKEYCON0);
1643                 writel(0xffffff, regs + WKEYCON1);
1644         }
1645
1646         /* restore framebuffers */
1647         for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1648                 win = sfb->windows[win_no];
1649                 if (!win)
1650                         continue;
1651
1652                 dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1653                 s3c_fb_set_par(win->fbinfo);
1654         }
1655
1656         return 0;
1657 }
1658
1659 #else
1660 #define s3c_fb_suspend NULL
1661 #define s3c_fb_resume  NULL
1662 #define s3c_fb_runtime_suspend NULL
1663 #define s3c_fb_runtime_resume NULL
1664 #endif
1665
1666
1667 #define VALID_BPP124 (VALID_BPP(1) | VALID_BPP(2) | VALID_BPP(4))
1668 #define VALID_BPP1248 (VALID_BPP124 | VALID_BPP(8))
1669
1670 static struct s3c_fb_win_variant s3c_fb_data_64xx_wins[] = {
1671         [0] = {
1672                 .has_osd_c      = 1,
1673                 .osd_size_off   = 0x8,
1674                 .palette_sz     = 256,
1675                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1676                                    VALID_BPP(18) | VALID_BPP(24)),
1677         },
1678         [1] = {
1679                 .has_osd_c      = 1,
1680                 .has_osd_d      = 1,
1681                 .osd_size_off   = 0xc,
1682                 .has_osd_alpha  = 1,
1683                 .palette_sz     = 256,
1684                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1685                                    VALID_BPP(18) | VALID_BPP(19) |
1686                                    VALID_BPP(24) | VALID_BPP(25) |
1687                                    VALID_BPP(28)),
1688         },
1689         [2] = {
1690                 .has_osd_c      = 1,
1691                 .has_osd_d      = 1,
1692                 .osd_size_off   = 0xc,
1693                 .has_osd_alpha  = 1,
1694                 .palette_sz     = 16,
1695                 .palette_16bpp  = 1,
1696                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1697                                    VALID_BPP(18) | VALID_BPP(19) |
1698                                    VALID_BPP(24) | VALID_BPP(25) |
1699                                    VALID_BPP(28)),
1700         },
1701         [3] = {
1702                 .has_osd_c      = 1,
1703                 .has_osd_alpha  = 1,
1704                 .palette_sz     = 16,
1705                 .palette_16bpp  = 1,
1706                 .valid_bpp      = (VALID_BPP124  | VALID_BPP(16) |
1707                                    VALID_BPP(18) | VALID_BPP(19) |
1708                                    VALID_BPP(24) | VALID_BPP(25) |
1709                                    VALID_BPP(28)),
1710         },
1711         [4] = {
1712                 .has_osd_c      = 1,
1713                 .has_osd_alpha  = 1,
1714                 .palette_sz     = 4,
1715                 .palette_16bpp  = 1,
1716                 .valid_bpp      = (VALID_BPP(1) | VALID_BPP(2) |
1717                                    VALID_BPP(16) | VALID_BPP(18) |
1718                                    VALID_BPP(19) | VALID_BPP(24) |
1719                                    VALID_BPP(25) | VALID_BPP(28)),
1720         },
1721 };
1722
1723 static struct s3c_fb_win_variant s3c_fb_data_s5p_wins[] = {
1724         [0] = {
1725                 .has_osd_c      = 1,
1726                 .osd_size_off   = 0x8,
1727                 .palette_sz     = 256,
1728                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1729                                    VALID_BPP(15) | VALID_BPP(16) |
1730                                    VALID_BPP(18) | VALID_BPP(19) |
1731                                    VALID_BPP(24) | VALID_BPP(25) |
1732                                    VALID_BPP(32)),
1733         },
1734         [1] = {
1735                 .has_osd_c      = 1,
1736                 .has_osd_d      = 1,
1737                 .osd_size_off   = 0xc,
1738                 .has_osd_alpha  = 1,
1739                 .palette_sz     = 256,
1740                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1741                                    VALID_BPP(15) | VALID_BPP(16) |
1742                                    VALID_BPP(18) | VALID_BPP(19) |
1743                                    VALID_BPP(24) | VALID_BPP(25) |
1744                                    VALID_BPP(32)),
1745         },
1746         [2] = {
1747                 .has_osd_c      = 1,
1748                 .has_osd_d      = 1,
1749                 .osd_size_off   = 0xc,
1750                 .has_osd_alpha  = 1,
1751                 .palette_sz     = 256,
1752                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1753                                    VALID_BPP(15) | VALID_BPP(16) |
1754                                    VALID_BPP(18) | VALID_BPP(19) |
1755                                    VALID_BPP(24) | VALID_BPP(25) |
1756                                    VALID_BPP(32)),
1757         },
1758         [3] = {
1759                 .has_osd_c      = 1,
1760                 .has_osd_alpha  = 1,
1761                 .palette_sz     = 256,
1762                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1763                                    VALID_BPP(15) | VALID_BPP(16) |
1764                                    VALID_BPP(18) | VALID_BPP(19) |
1765                                    VALID_BPP(24) | VALID_BPP(25) |
1766                                    VALID_BPP(32)),
1767         },
1768         [4] = {
1769                 .has_osd_c      = 1,
1770                 .has_osd_alpha  = 1,
1771                 .palette_sz     = 256,
1772                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1773                                    VALID_BPP(15) | VALID_BPP(16) |
1774                                    VALID_BPP(18) | VALID_BPP(19) |
1775                                    VALID_BPP(24) | VALID_BPP(25) |
1776                                    VALID_BPP(32)),
1777         },
1778 };
1779
1780 static struct s3c_fb_driverdata s3c_fb_data_64xx = {
1781         .variant = {
1782                 .nr_windows     = 5,
1783                 .vidtcon        = VIDTCON0,
1784                 .wincon         = WINCON(0),
1785                 .winmap         = WINxMAP(0),
1786                 .keycon         = WKEYCON,
1787                 .osd            = VIDOSD_BASE,
1788                 .osd_stride     = 16,
1789                 .buf_start      = VIDW_BUF_START(0),
1790                 .buf_size       = VIDW_BUF_SIZE(0),
1791                 .buf_end        = VIDW_BUF_END(0),
1792
1793                 .palette = {
1794                         [0] = 0x400,
1795                         [1] = 0x800,
1796                         [2] = 0x300,
1797                         [3] = 0x320,
1798                         [4] = 0x340,
1799                 },
1800
1801                 .has_prtcon     = 1,
1802                 .has_clksel     = 1,
1803         },
1804         .win[0] = &s3c_fb_data_64xx_wins[0],
1805         .win[1] = &s3c_fb_data_64xx_wins[1],
1806         .win[2] = &s3c_fb_data_64xx_wins[2],
1807         .win[3] = &s3c_fb_data_64xx_wins[3],
1808         .win[4] = &s3c_fb_data_64xx_wins[4],
1809 };
1810
1811 static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = {
1812         .variant = {
1813                 .nr_windows     = 5,
1814                 .vidtcon        = VIDTCON0,
1815                 .wincon         = WINCON(0),
1816                 .winmap         = WINxMAP(0),
1817                 .keycon         = WKEYCON,
1818                 .osd            = VIDOSD_BASE,
1819                 .osd_stride     = 16,
1820                 .buf_start      = VIDW_BUF_START(0),
1821                 .buf_size       = VIDW_BUF_SIZE(0),
1822                 .buf_end        = VIDW_BUF_END(0),
1823
1824                 .palette = {
1825                         [0] = 0x2400,
1826                         [1] = 0x2800,
1827                         [2] = 0x2c00,
1828                         [3] = 0x3000,
1829                         [4] = 0x3400,
1830                 },
1831
1832                 .has_prtcon     = 1,
1833                 .has_clksel     = 1,
1834         },
1835         .win[0] = &s3c_fb_data_s5p_wins[0],
1836         .win[1] = &s3c_fb_data_s5p_wins[1],
1837         .win[2] = &s3c_fb_data_s5p_wins[2],
1838         .win[3] = &s3c_fb_data_s5p_wins[3],
1839         .win[4] = &s3c_fb_data_s5p_wins[4],
1840 };
1841
1842 static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
1843         .variant = {
1844                 .nr_windows     = 5,
1845                 .vidtcon        = VIDTCON0,
1846                 .wincon         = WINCON(0),
1847                 .winmap         = WINxMAP(0),
1848                 .keycon         = WKEYCON,
1849                 .osd            = VIDOSD_BASE,
1850                 .osd_stride     = 16,
1851                 .buf_start      = VIDW_BUF_START(0),
1852                 .buf_size       = VIDW_BUF_SIZE(0),
1853                 .buf_end        = VIDW_BUF_END(0),
1854
1855                 .palette = {
1856                         [0] = 0x2400,
1857                         [1] = 0x2800,
1858                         [2] = 0x2c00,
1859                         [3] = 0x3000,
1860                         [4] = 0x3400,
1861                 },
1862
1863                 .has_shadowcon  = 1,
1864                 .has_clksel     = 1,
1865         },
1866         .win[0] = &s3c_fb_data_s5p_wins[0],
1867         .win[1] = &s3c_fb_data_s5p_wins[1],
1868         .win[2] = &s3c_fb_data_s5p_wins[2],
1869         .win[3] = &s3c_fb_data_s5p_wins[3],
1870         .win[4] = &s3c_fb_data_s5p_wins[4],
1871 };
1872
1873 static struct s3c_fb_driverdata s3c_fb_data_exynos4 = {
1874         .variant = {
1875                 .nr_windows     = 5,
1876                 .vidtcon        = VIDTCON0,
1877                 .wincon         = WINCON(0),
1878                 .winmap         = WINxMAP(0),
1879                 .keycon         = WKEYCON,
1880                 .osd            = VIDOSD_BASE,
1881                 .osd_stride     = 16,
1882                 .buf_start      = VIDW_BUF_START(0),
1883                 .buf_size       = VIDW_BUF_SIZE(0),
1884                 .buf_end        = VIDW_BUF_END(0),
1885
1886                 .palette = {
1887                         [0] = 0x2400,
1888                         [1] = 0x2800,
1889                         [2] = 0x2c00,
1890                         [3] = 0x3000,
1891                         [4] = 0x3400,
1892                 },
1893
1894                 .has_shadowcon  = 1,
1895         },
1896         .win[0] = &s3c_fb_data_s5p_wins[0],
1897         .win[1] = &s3c_fb_data_s5p_wins[1],
1898         .win[2] = &s3c_fb_data_s5p_wins[2],
1899         .win[3] = &s3c_fb_data_s5p_wins[3],
1900         .win[4] = &s3c_fb_data_s5p_wins[4],
1901 };
1902
1903 /* S3C2443/S3C2416 style hardware */
1904 static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
1905         .variant = {
1906                 .nr_windows     = 2,
1907                 .is_2443        = 1,
1908
1909                 .vidtcon        = 0x08,
1910                 .wincon         = 0x14,
1911                 .winmap         = 0xd0,
1912                 .keycon         = 0xb0,
1913                 .osd            = 0x28,
1914                 .osd_stride     = 12,
1915                 .buf_start      = 0x64,
1916                 .buf_size       = 0x94,
1917                 .buf_end        = 0x7c,
1918
1919                 .palette = {
1920                         [0] = 0x400,
1921                         [1] = 0x800,
1922                 },
1923                 .has_clksel     = 1,
1924         },
1925         .win[0] = &(struct s3c_fb_win_variant) {
1926                 .palette_sz     = 256,
1927                 .valid_bpp      = VALID_BPP1248 | VALID_BPP(16) | VALID_BPP(24),
1928         },
1929         .win[1] = &(struct s3c_fb_win_variant) {
1930                 .has_osd_c      = 1,
1931                 .has_osd_alpha  = 1,
1932                 .palette_sz     = 256,
1933                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1934                                    VALID_BPP(18) | VALID_BPP(19) |
1935                                    VALID_BPP(24) | VALID_BPP(25) |
1936                                    VALID_BPP(28)),
1937         },
1938 };
1939
1940 static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = {
1941         .variant = {
1942                 .nr_windows     = 3,
1943                 .vidtcon        = VIDTCON0,
1944                 .wincon         = WINCON(0),
1945                 .winmap         = WINxMAP(0),
1946                 .keycon         = WKEYCON,
1947                 .osd            = VIDOSD_BASE,
1948                 .osd_stride     = 16,
1949                 .buf_start      = VIDW_BUF_START(0),
1950                 .buf_size       = VIDW_BUF_SIZE(0),
1951                 .buf_end        = VIDW_BUF_END(0),
1952
1953                 .palette = {
1954                         [0] = 0x2400,
1955                         [1] = 0x2800,
1956                         [2] = 0x2c00,
1957                 },
1958         },
1959         .win[0] = &s3c_fb_data_s5p_wins[0],
1960         .win[1] = &s3c_fb_data_s5p_wins[1],
1961         .win[2] = &s3c_fb_data_s5p_wins[2],
1962 };
1963
1964 static struct platform_device_id s3c_fb_driver_ids[] = {
1965         {
1966                 .name           = "s3c-fb",
1967                 .driver_data    = (unsigned long)&s3c_fb_data_64xx,
1968         }, {
1969                 .name           = "s5pc100-fb",
1970                 .driver_data    = (unsigned long)&s3c_fb_data_s5pc100,
1971         }, {
1972                 .name           = "s5pv210-fb",
1973                 .driver_data    = (unsigned long)&s3c_fb_data_s5pv210,
1974         }, {
1975                 .name           = "exynos4-fb",
1976                 .driver_data    = (unsigned long)&s3c_fb_data_exynos4,
1977         }, {
1978                 .name           = "s3c2443-fb",
1979                 .driver_data    = (unsigned long)&s3c_fb_data_s3c2443,
1980         }, {
1981                 .name           = "s5p64x0-fb",
1982                 .driver_data    = (unsigned long)&s3c_fb_data_s5p64x0,
1983         },
1984         {},
1985 };
1986 MODULE_DEVICE_TABLE(platform, s3c_fb_driver_ids);
1987
1988 static const struct dev_pm_ops s3cfb_pm_ops = {
1989         .suspend        = s3c_fb_suspend,
1990         .resume         = s3c_fb_resume,
1991         .runtime_suspend        = s3c_fb_runtime_suspend,
1992         .runtime_resume         = s3c_fb_runtime_resume,
1993 };
1994
1995 static struct platform_driver s3c_fb_driver = {
1996         .probe          = s3c_fb_probe,
1997         .remove         = __devexit_p(s3c_fb_remove),
1998         .id_table       = s3c_fb_driver_ids,
1999         .driver         = {
2000                 .name   = "s3c-fb",
2001                 .owner  = THIS_MODULE,
2002                 .pm     = &s3cfb_pm_ops,
2003         },
2004 };
2005
2006 static int __init s3c_fb_init(void)
2007 {
2008         return platform_driver_register(&s3c_fb_driver);
2009 }
2010
2011 static void __exit s3c_fb_cleanup(void)
2012 {
2013         platform_driver_unregister(&s3c_fb_driver);
2014 }
2015
2016 module_init(s3c_fb_init);
2017 module_exit(s3c_fb_cleanup);
2018
2019 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
2020 MODULE_DESCRIPTION("Samsung S3C SoC Framebuffer driver");
2021 MODULE_LICENSE("GPL");
2022 MODULE_ALIAS("platform:s3c-fb");