2 * linux/drivers/video/omap2/dss/rfbi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "RFBI"
25 #include <linux/kernel.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/export.h>
28 #include <linux/vmalloc.h>
29 #include <linux/clk.h>
31 #include <linux/delay.h>
32 #include <linux/kfifo.h>
33 #include <linux/ktime.h>
34 #include <linux/hrtimer.h>
35 #include <linux/seq_file.h>
36 #include <linux/semaphore.h>
37 #include <linux/platform_device.h>
38 #include <linux/pm_runtime.h>
40 #include <video/omapdss.h>
43 struct rfbi_reg { u16 idx; };
45 #define RFBI_REG(idx) ((const struct rfbi_reg) { idx })
47 #define RFBI_REVISION RFBI_REG(0x0000)
48 #define RFBI_SYSCONFIG RFBI_REG(0x0010)
49 #define RFBI_SYSSTATUS RFBI_REG(0x0014)
50 #define RFBI_CONTROL RFBI_REG(0x0040)
51 #define RFBI_PIXEL_CNT RFBI_REG(0x0044)
52 #define RFBI_LINE_NUMBER RFBI_REG(0x0048)
53 #define RFBI_CMD RFBI_REG(0x004c)
54 #define RFBI_PARAM RFBI_REG(0x0050)
55 #define RFBI_DATA RFBI_REG(0x0054)
56 #define RFBI_READ RFBI_REG(0x0058)
57 #define RFBI_STATUS RFBI_REG(0x005c)
59 #define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18)
60 #define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18)
61 #define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18)
62 #define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18)
63 #define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18)
64 #define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18)
66 #define RFBI_VSYNC_WIDTH RFBI_REG(0x0090)
67 #define RFBI_HSYNC_WIDTH RFBI_REG(0x0094)
69 #define REG_FLD_MOD(idx, val, start, end) \
70 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
72 enum omap_rfbi_cycleformat {
73 OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
74 OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
75 OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
76 OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
79 enum omap_rfbi_datatype {
80 OMAP_DSS_RFBI_DATATYPE_12 = 0,
81 OMAP_DSS_RFBI_DATATYPE_16 = 1,
82 OMAP_DSS_RFBI_DATATYPE_18 = 2,
83 OMAP_DSS_RFBI_DATATYPE_24 = 3,
86 enum omap_rfbi_parallelmode {
87 OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
88 OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
89 OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
90 OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
93 static int rfbi_convert_timings(struct rfbi_timings *t);
94 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
97 struct platform_device *pdev;
100 unsigned long l4_khz;
102 enum omap_rfbi_datatype datatype;
103 enum omap_rfbi_parallelmode parallelmode;
105 enum omap_rfbi_te_mode te_mode;
108 void (*framedone_callback)(void *data);
109 void *framedone_callback_data;
111 struct omap_dss_device *dssdev[2];
113 struct semaphore bus_lock;
115 struct omap_video_timings timings;
118 struct rfbi_timings intf_timings;
121 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
123 __raw_writel(val, rfbi.base + idx.idx);
126 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
128 return __raw_readl(rfbi.base + idx.idx);
131 static int rfbi_runtime_get(void)
135 DSSDBG("rfbi_runtime_get\n");
137 r = pm_runtime_get_sync(&rfbi.pdev->dev);
139 return r < 0 ? r : 0;
142 static void rfbi_runtime_put(void)
146 DSSDBG("rfbi_runtime_put\n");
148 r = pm_runtime_put_sync(&rfbi.pdev->dev);
149 WARN_ON(r < 0 && r != -ENOSYS);
152 void rfbi_bus_lock(void)
154 down(&rfbi.bus_lock);
156 EXPORT_SYMBOL(rfbi_bus_lock);
158 void rfbi_bus_unlock(void)
162 EXPORT_SYMBOL(rfbi_bus_unlock);
164 void omap_rfbi_write_command(const void *buf, u32 len)
166 switch (rfbi.parallelmode) {
167 case OMAP_DSS_RFBI_PARALLELMODE_8:
171 rfbi_write_reg(RFBI_CMD, *b++);
175 case OMAP_DSS_RFBI_PARALLELMODE_16:
179 for (; len; len -= 2)
180 rfbi_write_reg(RFBI_CMD, *w++);
184 case OMAP_DSS_RFBI_PARALLELMODE_9:
185 case OMAP_DSS_RFBI_PARALLELMODE_12:
190 EXPORT_SYMBOL(omap_rfbi_write_command);
192 void omap_rfbi_read_data(void *buf, u32 len)
194 switch (rfbi.parallelmode) {
195 case OMAP_DSS_RFBI_PARALLELMODE_8:
199 rfbi_write_reg(RFBI_READ, 0);
200 *b++ = rfbi_read_reg(RFBI_READ);
205 case OMAP_DSS_RFBI_PARALLELMODE_16:
209 for (; len; len -= 2) {
210 rfbi_write_reg(RFBI_READ, 0);
211 *w++ = rfbi_read_reg(RFBI_READ);
216 case OMAP_DSS_RFBI_PARALLELMODE_9:
217 case OMAP_DSS_RFBI_PARALLELMODE_12:
222 EXPORT_SYMBOL(omap_rfbi_read_data);
224 void omap_rfbi_write_data(const void *buf, u32 len)
226 switch (rfbi.parallelmode) {
227 case OMAP_DSS_RFBI_PARALLELMODE_8:
231 rfbi_write_reg(RFBI_PARAM, *b++);
235 case OMAP_DSS_RFBI_PARALLELMODE_16:
239 for (; len; len -= 2)
240 rfbi_write_reg(RFBI_PARAM, *w++);
244 case OMAP_DSS_RFBI_PARALLELMODE_9:
245 case OMAP_DSS_RFBI_PARALLELMODE_12:
251 EXPORT_SYMBOL(omap_rfbi_write_data);
253 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
257 int start_offset = scr_width * y + x;
258 int horiz_offset = scr_width - w;
261 if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
262 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
263 const u16 __iomem *pd = buf;
267 for (i = 0; i < w; ++i) {
268 const u8 __iomem *b = (const u8 __iomem *)pd;
269 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
270 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
275 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
276 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
277 const u32 __iomem *pd = buf;
281 for (i = 0; i < w; ++i) {
282 const u8 __iomem *b = (const u8 __iomem *)pd;
283 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
284 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
285 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
290 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
291 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
292 const u16 __iomem *pd = buf;
296 for (i = 0; i < w; ++i) {
297 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
306 EXPORT_SYMBOL(omap_rfbi_write_pixels);
308 static int rfbi_transfer_area(struct omap_dss_device *dssdev,
309 void (*callback)(void *data), void *data)
313 u16 width = rfbi.timings.x_res;
314 u16 height = rfbi.timings.y_res;
316 /*BUG_ON(callback == 0);*/
317 BUG_ON(rfbi.framedone_callback != NULL);
319 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
321 dss_mgr_set_timings(dssdev->manager, &rfbi.timings);
323 r = dss_mgr_enable(dssdev->manager);
327 rfbi.framedone_callback = callback;
328 rfbi.framedone_callback_data = data;
330 rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
332 l = rfbi_read_reg(RFBI_CONTROL);
333 l = FLD_MOD(l, 1, 0, 0); /* enable */
334 if (!rfbi.te_enabled)
335 l = FLD_MOD(l, 1, 4, 4); /* ITE */
337 rfbi_write_reg(RFBI_CONTROL, l);
342 static void framedone_callback(void *data, u32 mask)
344 void (*callback)(void *data);
346 DSSDBG("FRAMEDONE\n");
348 REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
350 callback = rfbi.framedone_callback;
351 rfbi.framedone_callback = NULL;
353 if (callback != NULL)
354 callback(rfbi.framedone_callback_data);
358 static void rfbi_print_timings(void)
363 l = rfbi_read_reg(RFBI_CONFIG(0));
364 time = 1000000000 / rfbi.l4_khz;
368 DSSDBG("Tick time %u ps\n", time);
369 l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
370 DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
371 "REONTIME %d, REOFFTIME %d\n",
372 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
373 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
375 l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
376 DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
378 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
382 static void rfbi_print_timings(void) {}
388 static u32 extif_clk_period;
390 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
392 int bus_tick = extif_clk_period * div;
393 return (ps + bus_tick - 1) / bus_tick * bus_tick;
396 static int calc_reg_timing(struct rfbi_timings *t, int div)
400 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
402 t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
403 t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
404 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
406 t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
407 t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
408 t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
410 t->access_time = round_to_extif_ticks(t->access_time, div);
411 t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
412 t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
414 DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
415 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
416 DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
417 t->we_on_time, t->we_off_time, t->re_cycle_time,
419 DSSDBG("[reg]rdaccess %d cspulse %d\n",
420 t->access_time, t->cs_pulse_width);
422 return rfbi_convert_timings(t);
425 static int calc_extif_timings(struct rfbi_timings *t)
430 rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
431 for (div = 1; div <= max_clk_div; div++) {
432 if (calc_reg_timing(t, div) == 0)
436 if (div <= max_clk_div)
439 DSSERR("can't setup timings\n");
444 static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
449 r = calc_extif_timings(t);
451 DSSERR("Failed to calc timings\n");
454 BUG_ON(!t->converted);
456 rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
457 rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
459 /* TIMEGRANULARITY */
460 REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
461 (t->tim[2] ? 1 : 0), 4, 4);
463 rfbi_print_timings();
466 static int ps_to_rfbi_ticks(int time, int div)
468 unsigned long tick_ps;
471 /* Calculate in picosecs to yield more exact results */
472 tick_ps = 1000000000 / (rfbi.l4_khz) * div;
474 ret = (time + tick_ps - 1) / tick_ps;
479 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
481 *clk_period = 1000000000 / rfbi.l4_khz;
485 static int rfbi_convert_timings(struct rfbi_timings *t)
488 int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
489 int actim, recyc, wecyc;
490 int div = t->clk_div;
492 if (div <= 0 || div > 2)
495 /* Make sure that after conversion it still holds that:
496 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
497 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
499 weon = ps_to_rfbi_ticks(t->we_on_time, div);
500 weoff = ps_to_rfbi_ticks(t->we_off_time, div);
508 reon = ps_to_rfbi_ticks(t->re_on_time, div);
509 reoff = ps_to_rfbi_ticks(t->re_off_time, div);
517 cson = ps_to_rfbi_ticks(t->cs_on_time, div);
518 csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
521 if (csoff < max(weoff, reoff))
522 csoff = max(weoff, reoff);
537 actim = ps_to_rfbi_ticks(t->access_time, div);
543 wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
549 recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
555 cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
573 /* xxx FIX module selection missing */
574 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
575 unsigned hs_pulse_time, unsigned vs_pulse_time,
576 int hs_pol_inv, int vs_pol_inv, int extif_div)
582 hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
583 vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
586 if (mode == OMAP_DSS_RFBI_TE_MODE_2)
588 else /* OMAP_DSS_RFBI_TE_MODE_1 */
595 DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
596 mode, hs, vs, hs_pol_inv, vs_pol_inv);
598 rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
599 rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
601 l = rfbi_read_reg(RFBI_CONFIG(0));
613 EXPORT_SYMBOL(omap_rfbi_setup_te);
615 /* xxx FIX module selection missing */
616 int omap_rfbi_enable_te(bool enable, unsigned line)
620 DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
621 if (line > (1 << 11) - 1)
624 l = rfbi_read_reg(RFBI_CONFIG(0));
628 l |= rfbi.te_mode << 2;
631 rfbi_write_reg(RFBI_CONFIG(0), l);
632 rfbi_write_reg(RFBI_LINE_NUMBER, line);
636 EXPORT_SYMBOL(omap_rfbi_enable_te);
638 static int rfbi_configure(int rfbi_module, int bpp, int lines)
641 int cycle1 = 0, cycle2 = 0, cycle3 = 0;
642 enum omap_rfbi_cycleformat cycleformat;
643 enum omap_rfbi_datatype datatype;
644 enum omap_rfbi_parallelmode parallelmode;
648 datatype = OMAP_DSS_RFBI_DATATYPE_12;
651 datatype = OMAP_DSS_RFBI_DATATYPE_16;
654 datatype = OMAP_DSS_RFBI_DATATYPE_18;
657 datatype = OMAP_DSS_RFBI_DATATYPE_24;
663 rfbi.datatype = datatype;
667 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
670 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
673 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
676 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
682 rfbi.parallelmode = parallelmode;
684 if ((bpp % lines) == 0) {
685 switch (bpp / lines) {
687 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
690 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
693 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
699 } else if ((2 * bpp % lines) == 0) {
700 if ((2 * bpp / lines) == 3)
701 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
711 switch (cycleformat) {
712 case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
716 case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
721 case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
727 case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
729 cycle2 = (lines / 2) | ((lines / 2) << 16);
730 cycle3 = (lines << 16);
734 REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
737 l |= FLD_VAL(parallelmode, 1, 0);
738 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */
739 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */
740 l |= FLD_VAL(datatype, 6, 5);
741 /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
742 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */
743 l |= FLD_VAL(cycleformat, 10, 9);
744 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */
745 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */
746 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */
747 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */
748 l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */
749 l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */
750 l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */
751 rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
753 rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
754 rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
755 rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
758 l = rfbi_read_reg(RFBI_CONTROL);
759 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
760 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
761 rfbi_write_reg(RFBI_CONTROL, l);
764 DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
765 bpp, lines, cycle1, cycle2, cycle3);
770 int omap_rfbi_configure(struct omap_dss_device *dssdev)
772 return rfbi_configure(dssdev->phy.rfbi.channel, rfbi.pixel_size,
775 EXPORT_SYMBOL(omap_rfbi_configure);
777 int omap_rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
780 return rfbi_transfer_area(dssdev, callback, data);
782 EXPORT_SYMBOL(omap_rfbi_update);
784 void omapdss_rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h)
786 rfbi.timings.x_res = w;
787 rfbi.timings.y_res = h;
789 EXPORT_SYMBOL(omapdss_rfbi_set_size);
791 void omapdss_rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size)
793 rfbi.pixel_size = pixel_size;
795 EXPORT_SYMBOL(omapdss_rfbi_set_pixel_size);
797 void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
799 rfbi.data_lines = data_lines;
801 EXPORT_SYMBOL(omapdss_rfbi_set_data_lines);
803 void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
804 struct rfbi_timings *timings)
806 rfbi.intf_timings = *timings;
808 EXPORT_SYMBOL(omapdss_rfbi_set_interface_timings);
810 static void rfbi_dump_regs(struct seq_file *s)
812 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
814 if (rfbi_runtime_get())
817 DUMPREG(RFBI_REVISION);
818 DUMPREG(RFBI_SYSCONFIG);
819 DUMPREG(RFBI_SYSSTATUS);
820 DUMPREG(RFBI_CONTROL);
821 DUMPREG(RFBI_PIXEL_CNT);
822 DUMPREG(RFBI_LINE_NUMBER);
827 DUMPREG(RFBI_STATUS);
829 DUMPREG(RFBI_CONFIG(0));
830 DUMPREG(RFBI_ONOFF_TIME(0));
831 DUMPREG(RFBI_CYCLE_TIME(0));
832 DUMPREG(RFBI_DATA_CYCLE1(0));
833 DUMPREG(RFBI_DATA_CYCLE2(0));
834 DUMPREG(RFBI_DATA_CYCLE3(0));
836 DUMPREG(RFBI_CONFIG(1));
837 DUMPREG(RFBI_ONOFF_TIME(1));
838 DUMPREG(RFBI_CYCLE_TIME(1));
839 DUMPREG(RFBI_DATA_CYCLE1(1));
840 DUMPREG(RFBI_DATA_CYCLE2(1));
841 DUMPREG(RFBI_DATA_CYCLE3(1));
843 DUMPREG(RFBI_VSYNC_WIDTH);
844 DUMPREG(RFBI_HSYNC_WIDTH);
850 static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
852 struct dss_lcd_mgr_config mgr_config;
854 mgr_config.io_pad_mode = DSS_IO_PAD_MODE_RFBI;
856 mgr_config.stallmode = true;
857 /* Do we need fifohandcheck for RFBI? */
858 mgr_config.fifohandcheck = false;
860 mgr_config.video_port_width = rfbi.pixel_size;
861 mgr_config.lcden_sig_polarity = 0;
863 dss_mgr_set_lcd_config(dssdev->manager, &mgr_config);
866 * Set rfbi.timings with default values, the x_res and y_res fields
867 * are expected to be already configured by the panel driver via
868 * omapdss_rfbi_set_size()
870 rfbi.timings.hsw = 1;
871 rfbi.timings.hfp = 1;
872 rfbi.timings.hbp = 1;
873 rfbi.timings.vsw = 1;
874 rfbi.timings.vfp = 0;
875 rfbi.timings.vbp = 0;
877 rfbi.timings.interlace = false;
878 rfbi.timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
879 rfbi.timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
880 rfbi.timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
881 rfbi.timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH;
882 rfbi.timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
884 dss_mgr_set_timings(dssdev->manager, &rfbi.timings);
887 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev)
891 if (dssdev->manager == NULL) {
892 DSSERR("failed to enable display: no manager\n");
896 r = rfbi_runtime_get();
900 r = omap_dss_start_device(dssdev);
902 DSSERR("failed to start device\n");
906 r = omap_dispc_register_isr(framedone_callback, NULL,
907 DISPC_IRQ_FRAMEDONE);
909 DSSERR("can't get FRAMEDONE irq\n");
913 rfbi_config_lcd_manager(dssdev);
915 rfbi_configure(dssdev->phy.rfbi.channel, rfbi.pixel_size,
918 rfbi_set_timings(dssdev->phy.rfbi.channel, &rfbi.intf_timings);
922 omap_dss_stop_device(dssdev);
927 EXPORT_SYMBOL(omapdss_rfbi_display_enable);
929 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev)
931 omap_dispc_unregister_isr(framedone_callback, NULL,
932 DISPC_IRQ_FRAMEDONE);
933 omap_dss_stop_device(dssdev);
937 EXPORT_SYMBOL(omapdss_rfbi_display_disable);
939 static int __init rfbi_init_display(struct omap_dss_device *dssdev)
941 rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
945 static struct omap_dss_device * __init rfbi_find_dssdev(struct platform_device *pdev)
947 struct omap_dss_board_info *pdata = pdev->dev.platform_data;
948 const char *def_disp_name = dss_get_default_display_name();
949 struct omap_dss_device *def_dssdev;
954 for (i = 0; i < pdata->num_devices; ++i) {
955 struct omap_dss_device *dssdev = pdata->devices[i];
957 if (dssdev->type != OMAP_DISPLAY_TYPE_DBI)
960 if (def_dssdev == NULL)
963 if (def_disp_name != NULL &&
964 strcmp(dssdev->name, def_disp_name) == 0) {
973 static void __init rfbi_probe_pdata(struct platform_device *rfbidev)
975 struct omap_dss_device *plat_dssdev;
976 struct omap_dss_device *dssdev;
979 plat_dssdev = rfbi_find_dssdev(rfbidev);
984 dssdev = dss_alloc_and_init_device(&rfbidev->dev);
988 dss_copy_device_pdata(dssdev, plat_dssdev);
990 r = rfbi_init_display(dssdev);
992 DSSERR("device %s init failed: %d\n", dssdev->name, r);
993 dss_put_device(dssdev);
997 r = dss_add_device(dssdev);
999 DSSERR("device %s register failed: %d\n", dssdev->name, r);
1000 dss_put_device(dssdev);
1005 /* RFBI HW IP initialisation */
1006 static int __init omap_rfbihw_probe(struct platform_device *pdev)
1009 struct resource *rfbi_mem;
1015 sema_init(&rfbi.bus_lock, 1);
1017 rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
1019 DSSERR("can't get IORESOURCE_MEM RFBI\n");
1023 rfbi.base = devm_ioremap(&pdev->dev, rfbi_mem->start,
1024 resource_size(rfbi_mem));
1026 DSSERR("can't ioremap RFBI\n");
1030 clk = clk_get(&pdev->dev, "ick");
1032 DSSERR("can't get ick\n");
1033 return PTR_ERR(clk);
1036 rfbi.l4_khz = clk_get_rate(clk) / 1000;
1040 pm_runtime_enable(&pdev->dev);
1042 r = rfbi_runtime_get();
1044 goto err_runtime_get;
1048 rev = rfbi_read_reg(RFBI_REVISION);
1049 dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n",
1050 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
1054 dss_debugfs_create_file("rfbi", rfbi_dump_regs);
1056 rfbi_probe_pdata(pdev);
1061 pm_runtime_disable(&pdev->dev);
1065 static int __exit omap_rfbihw_remove(struct platform_device *pdev)
1067 dss_unregister_child_devices(&pdev->dev);
1068 pm_runtime_disable(&pdev->dev);
1072 static int rfbi_runtime_suspend(struct device *dev)
1074 dispc_runtime_put();
1079 static int rfbi_runtime_resume(struct device *dev)
1083 r = dispc_runtime_get();
1090 static const struct dev_pm_ops rfbi_pm_ops = {
1091 .runtime_suspend = rfbi_runtime_suspend,
1092 .runtime_resume = rfbi_runtime_resume,
1095 static struct platform_driver omap_rfbihw_driver = {
1096 .remove = __exit_p(omap_rfbihw_remove),
1098 .name = "omapdss_rfbi",
1099 .owner = THIS_MODULE,
1104 int __init rfbi_init_platform_driver(void)
1106 return platform_driver_probe(&omap_rfbihw_driver, omap_rfbihw_probe);
1109 void __exit rfbi_uninit_platform_driver(void)
1111 platform_driver_unregister(&omap_rfbihw_driver);