Pileus Git - ~andy/linux/blob - drivers/video/omap2/dss/dpi.c

   1 /*
   2  * linux/drivers/video/omap2/dss/dpi.c
   3  *
   4  * Copyright (C) 2009 Nokia Corporation
   5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   6  *
   7  * Some code and ideas taken from drivers/video/omap/ driver
   8  * by Imre Deak.
   9  *
  10  * This program is free software; you can redistribute it and/or modify it
  11  * under the terms of the GNU General Public License version 2 as published by
  12  * the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program.  If not, see <http://www.gnu.org/licenses/>.
  21  */
  22
  23 #define DSS_SUBSYS_NAME "DPI"
  24
  25 #include <linux/kernel.h>
  26 #include <linux/clk.h>
  27 #include <linux/delay.h>
  28 #include <linux/err.h>
  29 #include <linux/errno.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/regulator/consumer.h>
  32
  33 #include <video/omapdss.h>
  34 #include <plat/cpu.h>
  35
  36 #include "dss.h"
  37
  38 static struct {
  39         struct regulator *vdds_dsi_reg;
  40 } dpi;
  41
  42 static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
  43 {
  44         if (dssdev->clocks.dispc.dispc_fclk_src ==
  45                         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
  46                         dssdev->clocks.dispc.channel.lcd_clk_src ==
  47                         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC)
  48                 return true;
  49         else
  50                 return false;
  51 }
  52
  53 static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
  54                 unsigned long pck_req, unsigned long *fck, int *lck_div,
  55                 int *pck_div)
  56 {
  57         struct dsi_clock_info dsi_cinfo;
  58         struct dispc_clock_info dispc_cinfo;
  59         int r;
  60
  61         r = dsi_pll_calc_clock_div_pck(is_tft, pck_req, &dsi_cinfo,
  62                         &dispc_cinfo);
  63         if (r)
  64                 return r;
  65
  66         r = dsi_pll_set_clock_div(&dsi_cinfo);
  67         if (r)
  68                 return r;
  69
  70         dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
  71
  72         r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
  73         if (r)
  74                 return r;
  75
  76         *fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
  77         *lck_div = dispc_cinfo.lck_div;
  78         *pck_div = dispc_cinfo.pck_div;
  79
  80         return 0;
  81 }
  82
  83 static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
  84                 unsigned long pck_req, unsigned long *fck, int *lck_div,
  85                 int *pck_div)
  86 {
  87         struct dss_clock_info dss_cinfo;
  88         struct dispc_clock_info dispc_cinfo;
  89         int r;
  90
  91         r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
  92         if (r)
  93                 return r;
  94
  95         r = dss_set_clock_div(&dss_cinfo);
  96         if (r)
  97                 return r;
  98
  99         r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
 100         if (r)
 101                 return r;
 102
 103         *fck = dss_cinfo.fck;
 104         *lck_div = dispc_cinfo.lck_div;
 105         *pck_div = dispc_cinfo.pck_div;
 106
 107         return 0;
 108 }
 109
 110 static int dpi_set_mode(struct omap_dss_device *dssdev)
 111 {
 112         struct omap_video_timings *t = &dssdev->panel.timings;
 113         int lck_div = 0, pck_div = 0;
 114         unsigned long fck = 0;
 115         unsigned long pck;
 116         bool is_tft;
 117         int r = 0;
 118
 119         dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 120
 121         dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
 122                         dssdev->panel.acbi, dssdev->panel.acb);
 123
 124         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
 125
 126         if (dpi_use_dsi_pll(dssdev))
 127                 r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
 128                                 &fck, &lck_div, &pck_div);
 129         else
 130                 r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
 131                                 &fck, &lck_div, &pck_div);
 132         if (r)
 133                 goto err0;
 134
 135         pck = fck / lck_div / pck_div / 1000;
 136
 137         if (pck != t->pixel_clock) {
 138                 DSSWARN("Could not find exact pixel clock. "
 139                                 "Requested %d kHz, got %lu kHz\n",
 140                                 t->pixel_clock, pck);
 141
 142                 t->pixel_clock = pck;
 143         }
 144
 145         dispc_set_lcd_timings(dssdev->manager->id, t);
 146
 147 err0:
 148         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 149         return r;
 150 }
 151
 152 static int dpi_basic_init(struct omap_dss_device *dssdev)
 153 {
 154         bool is_tft;
 155
 156         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
 157
 158         dispc_set_parallel_interface_mode(dssdev->manager->id,
 159                         OMAP_DSS_PARALLELMODE_BYPASS);
 160         dispc_set_lcd_display_type(dssdev->manager->id, is_tft ?
 161                         OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
 162         dispc_set_tft_data_lines(dssdev->manager->id,
 163                         dssdev->phy.dpi.data_lines);
 164
 165         return 0;
 166 }
 167
 168 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
 169 {
 170         int r;
 171
 172         r = omap_dss_start_device(dssdev);
 173         if (r) {
 174                 DSSERR("failed to start device\n");
 175                 goto err0;
 176         }
 177
 178         if (cpu_is_omap34xx()) {
 179                 r = regulator_enable(dpi.vdds_dsi_reg);
 180                 if (r)
 181                         goto err1;
 182         }
 183
 184         dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 185
 186         r = dpi_basic_init(dssdev);
 187         if (r)
 188                 goto err2;
 189
 190         if (dpi_use_dsi_pll(dssdev)) {
 191                 dss_clk_enable(DSS_CLK_SYSCK);
 192                 r = dsi_pll_init(0, 1);
 193                 if (r)
 194                         goto err3;
 195         }
 196
 197         r = dpi_set_mode(dssdev);
 198         if (r)
 199                 goto err4;
 200
 201         mdelay(2);
 202
 203         dssdev->manager->enable(dssdev->manager);
 204
 205         return 0;
 206
 207 err4:
 208         if (dpi_use_dsi_pll(dssdev))
 209                 dsi_pll_uninit(true);
 210 err3:
 211         if (dpi_use_dsi_pll(dssdev))
 212                 dss_clk_disable(DSS_CLK_SYSCK);
 213 err2:
 214         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 215         if (cpu_is_omap34xx())
 216                 regulator_disable(dpi.vdds_dsi_reg);
 217 err1:
 218         omap_dss_stop_device(dssdev);
 219 err0:
 220         return r;
 221 }
 222 EXPORT_SYMBOL(omapdss_dpi_display_enable);
 223
 224 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
 225 {
 226         dssdev->manager->disable(dssdev->manager);
 227
 228         if (dpi_use_dsi_pll(dssdev)) {
 229                 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
 230                 dsi_pll_uninit(true);
 231                 dss_clk_disable(DSS_CLK_SYSCK);
 232         }
 233
 234         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 235
 236         if (cpu_is_omap34xx())
 237                 regulator_disable(dpi.vdds_dsi_reg);
 238
 239         omap_dss_stop_device(dssdev);
 240 }
 241 EXPORT_SYMBOL(omapdss_dpi_display_disable);
 242
 243 void dpi_set_timings(struct omap_dss_device *dssdev,
 244                         struct omap_video_timings *timings)
 245 {
 246         DSSDBG("dpi_set_timings\n");
 247         dssdev->panel.timings = *timings;
 248         if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
 249                 dpi_set_mode(dssdev);
 250                 dispc_go(dssdev->manager->id);
 251         }
 252 }
 253 EXPORT_SYMBOL(dpi_set_timings);
 254
 255 int dpi_check_timings(struct omap_dss_device *dssdev,
 256                         struct omap_video_timings *timings)
 257 {
 258         bool is_tft;
 259         int r;
 260         int lck_div, pck_div;
 261         unsigned long fck;
 262         unsigned long pck;
 263         struct dispc_clock_info dispc_cinfo;
 264
 265         if (!dispc_lcd_timings_ok(timings))
 266                 return -EINVAL;
 267
 268         if (timings->pixel_clock == 0)
 269                 return -EINVAL;
 270
 271         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
 272
 273         if (dpi_use_dsi_pll(dssdev)) {
 274                 struct dsi_clock_info dsi_cinfo;
 275                 r = dsi_pll_calc_clock_div_pck(is_tft,
 276                                 timings->pixel_clock * 1000,
 277                                 &dsi_cinfo, &dispc_cinfo);
 278
 279                 if (r)
 280                         return r;
 281
 282                 fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
 283         } else {
 284                 struct dss_clock_info dss_cinfo;
 285                 r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
 286                                 &dss_cinfo, &dispc_cinfo);
 287
 288                 if (r)
 289                         return r;
 290
 291                 fck = dss_cinfo.fck;
 292         }
 293
 294         lck_div = dispc_cinfo.lck_div;
 295         pck_div = dispc_cinfo.pck_div;
 296
 297         pck = fck / lck_div / pck_div / 1000;
 298
 299         timings->pixel_clock = pck;
 300
 301         return 0;
 302 }
 303 EXPORT_SYMBOL(dpi_check_timings);
 304
 305 int dpi_init_display(struct omap_dss_device *dssdev)
 306 {
 307         DSSDBG("init_display\n");
 308
 309         if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) {
 310                 struct regulator *vdds_dsi;
 311
 312                 vdds_dsi = dss_get_vdds_dsi();
 313
 314                 if (IS_ERR(vdds_dsi)) {
 315                         DSSERR("can't get VDDS_DSI regulator\n");
 316                         return PTR_ERR(vdds_dsi);
 317                 }
 318
 319                 dpi.vdds_dsi_reg = vdds_dsi;
 320         }
 321
 322         return 0;
 323 }
 324
 325 int dpi_init(void)
 326 {
 327         return 0;
 328 }
 329
 330 void dpi_exit(void)
 331 {
 332 }
 333