Pileus Git - ~andy/linux/blob - drivers/usb/host/xhci-mem.c

   1 /*
   2  * xHCI host controller driver
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/usb.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26
  27 #include "xhci.h"
  28
  29 /*
  30  * Allocates a generic ring segment from the ring pool, sets the dma address,
  31  * initializes the segment to zero, and sets the private next pointer to NULL.
  32  *
  33  * Section 4.11.1.1:
  34  * "All components of all Command and Transfer TRBs shall be initialized to '0'"
  35  */
  36 static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, gfp_t flags)
  37 {
  38         struct xhci_segment *seg;
  39         dma_addr_t      dma;
  40
  41         seg = kzalloc(sizeof *seg, flags);
  42         if (!seg)
  43                 return 0;
  44         xhci_dbg(xhci, "Allocating priv segment structure at %p\n", seg);
  45
  46         seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma);
  47         if (!seg->trbs) {
  48                 kfree(seg);
  49                 return 0;
  50         }
  51         xhci_dbg(xhci, "// Allocating segment at %p (virtual) 0x%llx (DMA)\n",
  52                         seg->trbs, (unsigned long long)dma);
  53
  54         memset(seg->trbs, 0, SEGMENT_SIZE);
  55         seg->dma = dma;
  56         seg->next = NULL;
  57
  58         return seg;
  59 }
  60
  61 static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg)
  62 {
  63         if (!seg)
  64                 return;
  65         if (seg->trbs) {
  66                 xhci_dbg(xhci, "Freeing DMA segment at %p (virtual) 0x%llx (DMA)\n",
  67                                 seg->trbs, (unsigned long long)seg->dma);
  68                 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma);
  69                 seg->trbs = NULL;
  70         }
  71         xhci_dbg(xhci, "Freeing priv segment structure at %p\n", seg);
  72         kfree(seg);
  73 }
  74
  75 /*
  76  * Make the prev segment point to the next segment.
  77  *
  78  * Change the last TRB in the prev segment to be a Link TRB which points to the
  79  * DMA address of the next segment.  The caller needs to set any Link TRB
  80  * related flags, such as End TRB, Toggle Cycle, and no snoop.
  81  */
  82 static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
  83                 struct xhci_segment *next, bool link_trbs)
  84 {
  85         u32 val;
  86
  87         if (!prev || !next)
  88                 return;
  89         prev->next = next;
  90         if (link_trbs) {
  91                 prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = next->dma;
  92
  93                 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */
  94                 val = prev->trbs[TRBS_PER_SEGMENT-1].link.control;
  95                 val &= ~TRB_TYPE_BITMASK;
  96                 val |= TRB_TYPE(TRB_LINK);
  97                 /* Always set the chain bit with 0.95 hardware */
  98                 if (xhci_link_trb_quirk(xhci))
  99                         val |= TRB_CHAIN;
 100                 prev->trbs[TRBS_PER_SEGMENT-1].link.control = val;
 101         }
 102         xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n",
 103                         (unsigned long long)prev->dma,
 104                         (unsigned long long)next->dma);
 105 }
 106
 107 /* XXX: Do we need the hcd structure in all these functions? */
 108 void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring)
 109 {
 110         struct xhci_segment *seg;
 111         struct xhci_segment *first_seg;
 112
 113         if (!ring || !ring->first_seg)
 114                 return;
 115         first_seg = ring->first_seg;
 116         seg = first_seg->next;
 117         xhci_dbg(xhci, "Freeing ring at %p\n", ring);
 118         while (seg != first_seg) {
 119                 struct xhci_segment *next = seg->next;
 120                 xhci_segment_free(xhci, seg);
 121                 seg = next;
 122         }
 123         xhci_segment_free(xhci, first_seg);
 124         ring->first_seg = NULL;
 125         kfree(ring);
 126 }
 127
 128 static void xhci_initialize_ring_info(struct xhci_ring *ring)
 129 {
 130         /* The ring is empty, so the enqueue pointer == dequeue pointer */
 131         ring->enqueue = ring->first_seg->trbs;
 132         ring->enq_seg = ring->first_seg;
 133         ring->dequeue = ring->enqueue;
 134         ring->deq_seg = ring->first_seg;
 135         /* The ring is initialized to 0. The producer must write 1 to the cycle
 136          * bit to handover ownership of the TRB, so PCS = 1.  The consumer must
 137          * compare CCS to the cycle bit to check ownership, so CCS = 1.
 138          */
 139         ring->cycle_state = 1;
 140         /* Not necessary for new rings, but needed for re-initialized rings */
 141         ring->enq_updates = 0;
 142         ring->deq_updates = 0;
 143 }
 144
 145 /**
 146  * Create a new ring with zero or more segments.
 147  *
 148  * Link each segment together into a ring.
 149  * Set the end flag and the cycle toggle bit on the last segment.
 150  * See section 4.9.1 and figures 15 and 16.
 151  */
 152 static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
 153                 unsigned int num_segs, bool link_trbs, gfp_t flags)
 154 {
 155         struct xhci_ring        *ring;
 156         struct xhci_segment     *prev;
 157
 158         ring = kzalloc(sizeof *(ring), flags);
 159         xhci_dbg(xhci, "Allocating ring at %p\n", ring);
 160         if (!ring)
 161                 return 0;
 162
 163         INIT_LIST_HEAD(&ring->td_list);
 164         if (num_segs == 0)
 165                 return ring;
 166
 167         ring->first_seg = xhci_segment_alloc(xhci, flags);
 168         if (!ring->first_seg)
 169                 goto fail;
 170         num_segs--;
 171
 172         prev = ring->first_seg;
 173         while (num_segs > 0) {
 174                 struct xhci_segment     *next;
 175
 176                 next = xhci_segment_alloc(xhci, flags);
 177                 if (!next)
 178                         goto fail;
 179                 xhci_link_segments(xhci, prev, next, link_trbs);
 180
 181                 prev = next;
 182                 num_segs--;
 183         }
 184         xhci_link_segments(xhci, prev, ring->first_seg, link_trbs);
 185
 186         if (link_trbs) {
 187                 /* See section 4.9.2.1 and 6.4.4.1 */
 188                 prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE);
 189                 xhci_dbg(xhci, "Wrote link toggle flag to"
 190                                 " segment %p (virtual), 0x%llx (DMA)\n",
 191                                 prev, (unsigned long long)prev->dma);
 192         }
 193         xhci_initialize_ring_info(ring);
 194         return ring;
 195
 196 fail:
 197         xhci_ring_free(xhci, ring);
 198         return 0;
 199 }
 200
 201 void xhci_free_or_cache_endpoint_ring(struct xhci_hcd *xhci,
 202                 struct xhci_virt_device *virt_dev,
 203                 unsigned int ep_index)
 204 {
 205         int rings_cached;
 206
 207         rings_cached = virt_dev->num_rings_cached;
 208         if (rings_cached < XHCI_MAX_RINGS_CACHED) {
 209                 virt_dev->num_rings_cached++;
 210                 rings_cached = virt_dev->num_rings_cached;
 211                 virt_dev->ring_cache[rings_cached] =
 212                         virt_dev->eps[ep_index].ring;
 213                 xhci_dbg(xhci, "Cached old ring, "
 214                                 "%d ring%s cached\n",
 215                                 rings_cached,
 216                                 (rings_cached > 1) ? "s" : "");
 217         } else {
 218                 xhci_ring_free(xhci, virt_dev->eps[ep_index].ring);
 219                 xhci_dbg(xhci, "Ring cache full (%d rings), "
 220                                 "freeing ring\n",
 221                                 virt_dev->num_rings_cached);
 222         }
 223         virt_dev->eps[ep_index].ring = NULL;
 224 }
 225
 226 /* Zero an endpoint ring (except for link TRBs) and move the enqueue and dequeue
 227  * pointers to the beginning of the ring.
 228  */
 229 static void xhci_reinit_cached_ring(struct xhci_hcd *xhci,
 230                 struct xhci_ring *ring)
 231 {
 232         struct xhci_segment     *seg = ring->first_seg;
 233         do {
 234                 memset(seg->trbs, 0,
 235                                 sizeof(union xhci_trb)*TRBS_PER_SEGMENT);
 236                 /* All endpoint rings have link TRBs */
 237                 xhci_link_segments(xhci, seg, seg->next, 1);
 238                 seg = seg->next;
 239         } while (seg != ring->first_seg);
 240         xhci_initialize_ring_info(ring);
 241         /* td list should be empty since all URBs have been cancelled,
 242          * but just in case...
 243          */
 244         INIT_LIST_HEAD(&ring->td_list);
 245 }
 246
 247 #define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32)
 248
 249 struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci,
 250                                                     int type, gfp_t flags)
 251 {
 252         struct xhci_container_ctx *ctx = kzalloc(sizeof(*ctx), flags);
 253         if (!ctx)
 254                 return NULL;
 255
 256         BUG_ON((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT));
 257         ctx->type = type;
 258         ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024;
 259         if (type == XHCI_CTX_TYPE_INPUT)
 260                 ctx->size += CTX_SIZE(xhci->hcc_params);
 261
 262         ctx->bytes = dma_pool_alloc(xhci->device_pool, flags, &ctx->dma);
 263         memset(ctx->bytes, 0, ctx->size);
 264         return ctx;
 265 }
 266
 267 void xhci_free_container_ctx(struct xhci_hcd *xhci,
 268                              struct xhci_container_ctx *ctx)
 269 {
 270         dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma);
 271         kfree(ctx);
 272 }
 273
 274 struct xhci_input_control_ctx *xhci_get_input_control_ctx(struct xhci_hcd *xhci,
 275                                               struct xhci_container_ctx *ctx)
 276 {
 277         BUG_ON(ctx->type != XHCI_CTX_TYPE_INPUT);
 278         return (struct xhci_input_control_ctx *)ctx->bytes;
 279 }
 280
 281 struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci,
 282                                         struct xhci_container_ctx *ctx)
 283 {
 284         if (ctx->type == XHCI_CTX_TYPE_DEVICE)
 285                 return (struct xhci_slot_ctx *)ctx->bytes;
 286
 287         return (struct xhci_slot_ctx *)
 288                 (ctx->bytes + CTX_SIZE(xhci->hcc_params));
 289 }
 290
 291 struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci,
 292                                     struct xhci_container_ctx *ctx,
 293                                     unsigned int ep_index)
 294 {
 295         /* increment ep index by offset of start of ep ctx array */
 296         ep_index++;
 297         if (ctx->type == XHCI_CTX_TYPE_INPUT)
 298                 ep_index++;
 299
 300         return (struct xhci_ep_ctx *)
 301                 (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params)));
 302 }
 303
 304 static void xhci_init_endpoint_timer(struct xhci_hcd *xhci,
 305                 struct xhci_virt_ep *ep)
 306 {
 307         init_timer(&ep->stop_cmd_timer);
 308         ep->stop_cmd_timer.data = (unsigned long) ep;
 309         ep->stop_cmd_timer.function = xhci_stop_endpoint_command_watchdog;
 310         ep->xhci = xhci;
 311 }
 312
 313 /* All the xhci_tds in the ring's TD list should be freed at this point */
 314 void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
 315 {
 316         struct xhci_virt_device *dev;
 317         int i;
 318
 319         /* Slot ID 0 is reserved */
 320         if (slot_id == 0 || !xhci->devs[slot_id])
 321                 return;
 322
 323         dev = xhci->devs[slot_id];
 324         xhci->dcbaa->dev_context_ptrs[slot_id] = 0;
 325         if (!dev)
 326                 return;
 327
 328         for (i = 0; i < 31; ++i)
 329                 if (dev->eps[i].ring)
 330                         xhci_ring_free(xhci, dev->eps[i].ring);
 331
 332         if (dev->ring_cache) {
 333                 for (i = 0; i < dev->num_rings_cached; i++)
 334                         xhci_ring_free(xhci, dev->ring_cache[i]);
 335                 kfree(dev->ring_cache);
 336         }
 337
 338         if (dev->in_ctx)
 339                 xhci_free_container_ctx(xhci, dev->in_ctx);
 340         if (dev->out_ctx)
 341                 xhci_free_container_ctx(xhci, dev->out_ctx);
 342
 343         kfree(xhci->devs[slot_id]);
 344         xhci->devs[slot_id] = 0;
 345 }
 346
 347 int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
 348                 struct usb_device *udev, gfp_t flags)
 349 {
 350         struct xhci_virt_device *dev;
 351         int i;
 352
 353         /* Slot ID 0 is reserved */
 354         if (slot_id == 0 || xhci->devs[slot_id]) {
 355                 xhci_warn(xhci, "Bad Slot ID %d\n", slot_id);
 356                 return 0;
 357         }
 358
 359         xhci->devs[slot_id] = kzalloc(sizeof(*xhci->devs[slot_id]), flags);
 360         if (!xhci->devs[slot_id])
 361                 return 0;
 362         dev = xhci->devs[slot_id];
 363
 364         /* Allocate the (output) device context that will be used in the HC. */
 365         dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
 366         if (!dev->out_ctx)
 367                 goto fail;
 368
 369         xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id,
 370                         (unsigned long long)dev->out_ctx->dma);
 371
 372         /* Allocate the (input) device context for address device command */
 373         dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags);
 374         if (!dev->in_ctx)
 375                 goto fail;
 376
 377         xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id,
 378                         (unsigned long long)dev->in_ctx->dma);
 379
 380         /* Initialize the cancellation list and watchdog timers for each ep */
 381         for (i = 0; i < 31; i++) {
 382                 xhci_init_endpoint_timer(xhci, &dev->eps[i]);
 383                 INIT_LIST_HEAD(&dev->eps[i].cancelled_td_list);
 384         }
 385
 386         /* Allocate endpoint 0 ring */
 387         dev->eps[0].ring = xhci_ring_alloc(xhci, 1, true, flags);
 388         if (!dev->eps[0].ring)
 389                 goto fail;
 390
 391         /* Allocate pointers to the ring cache */
 392         dev->ring_cache = kzalloc(
 393                         sizeof(struct xhci_ring *)*XHCI_MAX_RINGS_CACHED,
 394                         flags);
 395         if (!dev->ring_cache)
 396                 goto fail;
 397         dev->num_rings_cached = 0;
 398
 399         init_completion(&dev->cmd_completion);
 400         INIT_LIST_HEAD(&dev->cmd_list);
 401
 402         /* Point to output device context in dcbaa. */
 403         xhci->dcbaa->dev_context_ptrs[slot_id] = dev->out_ctx->dma;
 404         xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n",
 405                         slot_id,
 406                         &xhci->dcbaa->dev_context_ptrs[slot_id],
 407                         (unsigned long long) xhci->dcbaa->dev_context_ptrs[slot_id]);
 408
 409         return 1;
 410 fail:
 411         xhci_free_virt_device(xhci, slot_id);
 412         return 0;
 413 }
 414
 415 /* Setup an xHCI virtual device for a Set Address command */
 416 int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev)
 417 {
 418         struct xhci_virt_device *dev;
 419         struct xhci_ep_ctx      *ep0_ctx;
 420         struct usb_device       *top_dev;
 421         struct xhci_slot_ctx    *slot_ctx;
 422         struct xhci_input_control_ctx *ctrl_ctx;
 423
 424         dev = xhci->devs[udev->slot_id];
 425         /* Slot ID 0 is reserved */
 426         if (udev->slot_id == 0 || !dev) {
 427                 xhci_warn(xhci, "Slot ID %d is not assigned to this device\n",
 428                                 udev->slot_id);
 429                 return -EINVAL;
 430         }
 431         ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0);
 432         ctrl_ctx = xhci_get_input_control_ctx(xhci, dev->in_ctx);
 433         slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);
 434
 435         /* 2) New slot context and endpoint 0 context are valid*/
 436         ctrl_ctx->add_flags = SLOT_FLAG | EP0_FLAG;
 437
 438         /* 3) Only the control endpoint is valid - one endpoint context */
 439         slot_ctx->dev_info |= LAST_CTX(1);
 440
 441         slot_ctx->dev_info |= (u32) udev->route;
 442         switch (udev->speed) {
 443         case USB_SPEED_SUPER:
 444                 slot_ctx->dev_info |= (u32) SLOT_SPEED_SS;
 445                 break;
 446         case USB_SPEED_HIGH:
 447                 slot_ctx->dev_info |= (u32) SLOT_SPEED_HS;
 448                 break;
 449         case USB_SPEED_FULL:
 450                 slot_ctx->dev_info |= (u32) SLOT_SPEED_FS;
 451                 break;
 452         case USB_SPEED_LOW:
 453                 slot_ctx->dev_info |= (u32) SLOT_SPEED_LS;
 454                 break;
 455         case USB_SPEED_VARIABLE:
 456                 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
 457                 return -EINVAL;
 458                 break;
 459         default:
 460                 /* Speed was set earlier, this shouldn't happen. */
 461                 BUG();
 462         }
 463         /* Find the root hub port this device is under */
 464         for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
 465                         top_dev = top_dev->parent)
 466                 /* Found device below root hub */;
 467         slot_ctx->dev_info2 |= (u32) ROOT_HUB_PORT(top_dev->portnum);
 468         xhci_dbg(xhci, "Set root hub portnum to %d\n", top_dev->portnum);
 469
 470         /* Is this a LS/FS device under a HS hub? */
 471         if ((udev->speed == USB_SPEED_LOW || udev->speed == USB_SPEED_FULL) &&
 472                         udev->tt) {
 473                 slot_ctx->tt_info = udev->tt->hub->slot_id;
 474                 slot_ctx->tt_info |= udev->ttport << 8;
 475                 if (udev->tt->multi)
 476                         slot_ctx->dev_info |= DEV_MTT;
 477         }
 478         xhci_dbg(xhci, "udev->tt = %p\n", udev->tt);
 479         xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport);
 480
 481         /* Step 4 - ring already allocated */
 482         /* Step 5 */
 483         ep0_ctx->ep_info2 = EP_TYPE(CTRL_EP);
 484         /*
 485          * XXX: Not sure about wireless USB devices.
 486          */
 487         switch (udev->speed) {
 488         case USB_SPEED_SUPER:
 489                 ep0_ctx->ep_info2 |= MAX_PACKET(512);
 490                 break;
 491         case USB_SPEED_HIGH:
 492         /* USB core guesses at a 64-byte max packet first for FS devices */
 493         case USB_SPEED_FULL:
 494                 ep0_ctx->ep_info2 |= MAX_PACKET(64);
 495                 break;
 496         case USB_SPEED_LOW:
 497                 ep0_ctx->ep_info2 |= MAX_PACKET(8);
 498                 break;
 499         case USB_SPEED_VARIABLE:
 500                 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
 501                 return -EINVAL;
 502                 break;
 503         default:
 504                 /* New speed? */
 505                 BUG();
 506         }
 507         /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
 508         ep0_ctx->ep_info2 |= MAX_BURST(0);
 509         ep0_ctx->ep_info2 |= ERROR_COUNT(3);
 510
 511         ep0_ctx->deq =
 512                 dev->eps[0].ring->first_seg->dma;
 513         ep0_ctx->deq |= dev->eps[0].ring->cycle_state;
 514
 515         /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
 516
 517         return 0;
 518 }
 519
 520 /* Return the polling or NAK interval.
 521  *
 522  * The polling interval is expressed in "microframes".  If xHCI's Interval field
 523  * is set to N, it will service the endpoint every 2^(Interval)*125us.
 524  *
 525  * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
 526  * is set to 0.
 527  */
 528 static inline unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
 529                 struct usb_host_endpoint *ep)
 530 {
 531         unsigned int interval = 0;
 532
 533         switch (udev->speed) {
 534         case USB_SPEED_HIGH:
 535                 /* Max NAK rate */
 536                 if (usb_endpoint_xfer_control(&ep->desc) ||
 537                                 usb_endpoint_xfer_bulk(&ep->desc))
 538                         interval = ep->desc.bInterval;
 539                 /* Fall through - SS and HS isoc/int have same decoding */
 540         case USB_SPEED_SUPER:
 541                 if (usb_endpoint_xfer_int(&ep->desc) ||
 542                                 usb_endpoint_xfer_isoc(&ep->desc)) {
 543                         if (ep->desc.bInterval == 0)
 544                                 interval = 0;
 545                         else
 546                                 interval = ep->desc.bInterval - 1;
 547                         if (interval > 15)
 548                                 interval = 15;
 549                         if (interval != ep->desc.bInterval + 1)
 550                                 dev_warn(&udev->dev, "ep %#x - rounding interval to %d microframes\n",
 551                                                 ep->desc.bEndpointAddress, 1 << interval);
 552                 }
 553                 break;
 554         /* Convert bInterval (in 1-255 frames) to microframes and round down to
 555          * nearest power of 2.
 556          */
 557         case USB_SPEED_FULL:
 558         case USB_SPEED_LOW:
 559                 if (usb_endpoint_xfer_int(&ep->desc) ||
 560                                 usb_endpoint_xfer_isoc(&ep->desc)) {
 561                         interval = fls(8*ep->desc.bInterval) - 1;
 562                         if (interval > 10)
 563                                 interval = 10;
 564                         if (interval < 3)
 565                                 interval = 3;
 566                         if ((1 << interval) != 8*ep->desc.bInterval)
 567                                 dev_warn(&udev->dev, "ep %#x - rounding interval to %d microframes\n",
 568                                                 ep->desc.bEndpointAddress, 1 << interval);
 569                 }
 570                 break;
 571         default:
 572                 BUG();
 573         }
 574         return EP_INTERVAL(interval);
 575 }
 576
 577 static inline u32 xhci_get_endpoint_type(struct usb_device *udev,
 578                 struct usb_host_endpoint *ep)
 579 {
 580         int in;
 581         u32 type;
 582
 583         in = usb_endpoint_dir_in(&ep->desc);
 584         if (usb_endpoint_xfer_control(&ep->desc)) {
 585                 type = EP_TYPE(CTRL_EP);
 586         } else if (usb_endpoint_xfer_bulk(&ep->desc)) {
 587                 if (in)
 588                         type = EP_TYPE(BULK_IN_EP);
 589                 else
 590                         type = EP_TYPE(BULK_OUT_EP);
 591         } else if (usb_endpoint_xfer_isoc(&ep->desc)) {
 592                 if (in)
 593                         type = EP_TYPE(ISOC_IN_EP);
 594                 else
 595                         type = EP_TYPE(ISOC_OUT_EP);
 596         } else if (usb_endpoint_xfer_int(&ep->desc)) {
 597                 if (in)
 598                         type = EP_TYPE(INT_IN_EP);
 599                 else
 600                         type = EP_TYPE(INT_OUT_EP);
 601         } else {
 602                 BUG();
 603         }
 604         return type;
 605 }
 606
 607 int xhci_endpoint_init(struct xhci_hcd *xhci,
 608                 struct xhci_virt_device *virt_dev,
 609                 struct usb_device *udev,
 610                 struct usb_host_endpoint *ep,
 611                 gfp_t mem_flags)
 612 {
 613         unsigned int ep_index;
 614         struct xhci_ep_ctx *ep_ctx;
 615         struct xhci_ring *ep_ring;
 616         unsigned int max_packet;
 617         unsigned int max_burst;
 618
 619         ep_index = xhci_get_endpoint_index(&ep->desc);
 620         ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
 621
 622         /* Set up the endpoint ring */
 623         virt_dev->eps[ep_index].new_ring =
 624                 xhci_ring_alloc(xhci, 1, true, mem_flags);
 625         if (!virt_dev->eps[ep_index].new_ring) {
 626                 /* Attempt to use the ring cache */
 627                 if (virt_dev->num_rings_cached == 0)
 628                         return -ENOMEM;
 629                 virt_dev->eps[ep_index].new_ring =
 630                         virt_dev->ring_cache[virt_dev->num_rings_cached];
 631                 virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL;
 632                 virt_dev->num_rings_cached--;
 633                 xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring);
 634         }
 635         ep_ring = virt_dev->eps[ep_index].new_ring;
 636         ep_ctx->deq = ep_ring->first_seg->dma | ep_ring->cycle_state;
 637
 638         ep_ctx->ep_info = xhci_get_endpoint_interval(udev, ep);
 639
 640         /* FIXME dig Mult and streams info out of ep companion desc */
 641
 642         /* Allow 3 retries for everything but isoc;
 643          * error count = 0 means infinite retries.
 644          */
 645         if (!usb_endpoint_xfer_isoc(&ep->desc))
 646                 ep_ctx->ep_info2 = ERROR_COUNT(3);
 647         else
 648                 ep_ctx->ep_info2 = ERROR_COUNT(1);
 649
 650         ep_ctx->ep_info2 |= xhci_get_endpoint_type(udev, ep);
 651
 652         /* Set the max packet size and max burst */
 653         switch (udev->speed) {
 654         case USB_SPEED_SUPER:
 655                 max_packet = ep->desc.wMaxPacketSize;
 656                 ep_ctx->ep_info2 |= MAX_PACKET(max_packet);
 657                 /* dig out max burst from ep companion desc */
 658                 if (!ep->ss_ep_comp) {
 659                         xhci_warn(xhci, "WARN no SS endpoint companion descriptor.\n");
 660                         max_packet = 0;
 661                 } else {
 662                         max_packet = ep->ss_ep_comp->desc.bMaxBurst;
 663                 }
 664                 ep_ctx->ep_info2 |= MAX_BURST(max_packet);
 665                 break;
 666         case USB_SPEED_HIGH:
 667                 /* bits 11:12 specify the number of additional transaction
 668                  * opportunities per microframe (USB 2.0, section 9.6.6)
 669                  */
 670                 if (usb_endpoint_xfer_isoc(&ep->desc) ||
 671                                 usb_endpoint_xfer_int(&ep->desc)) {
 672                         max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11;
 673                         ep_ctx->ep_info2 |= MAX_BURST(max_burst);
 674                 }
 675                 /* Fall through */
 676         case USB_SPEED_FULL:
 677         case USB_SPEED_LOW:
 678                 max_packet = ep->desc.wMaxPacketSize & 0x3ff;
 679                 ep_ctx->ep_info2 |= MAX_PACKET(max_packet);
 680                 break;
 681         default:
 682                 BUG();
 683         }
 684         /* FIXME Debug endpoint context */
 685         return 0;
 686 }
 687
 688 void xhci_endpoint_zero(struct xhci_hcd *xhci,
 689                 struct xhci_virt_device *virt_dev,
 690                 struct usb_host_endpoint *ep)
 691 {
 692         unsigned int ep_index;
 693         struct xhci_ep_ctx *ep_ctx;
 694
 695         ep_index = xhci_get_endpoint_index(&ep->desc);
 696         ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
 697
 698         ep_ctx->ep_info = 0;
 699         ep_ctx->ep_info2 = 0;
 700         ep_ctx->deq = 0;
 701         ep_ctx->tx_info = 0;
 702         /* Don't free the endpoint ring until the set interface or configuration
 703          * request succeeds.
 704          */
 705 }
 706
 707 /* Copy output xhci_ep_ctx to the input xhci_ep_ctx copy.
 708  * Useful when you want to change one particular aspect of the endpoint and then
 709  * issue a configure endpoint command.
 710  */
 711 void xhci_endpoint_copy(struct xhci_hcd *xhci,
 712                 struct xhci_container_ctx *in_ctx,
 713                 struct xhci_container_ctx *out_ctx,
 714                 unsigned int ep_index)
 715 {
 716         struct xhci_ep_ctx *out_ep_ctx;
 717         struct xhci_ep_ctx *in_ep_ctx;
 718
 719         out_ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
 720         in_ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
 721
 722         in_ep_ctx->ep_info = out_ep_ctx->ep_info;
 723         in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2;
 724         in_ep_ctx->deq = out_ep_ctx->deq;
 725         in_ep_ctx->tx_info = out_ep_ctx->tx_info;
 726 }
 727
 728 /* Copy output xhci_slot_ctx to the input xhci_slot_ctx.
 729  * Useful when you want to change one particular aspect of the endpoint and then
 730  * issue a configure endpoint command.  Only the context entries field matters,
 731  * but we'll copy the whole thing anyway.
 732  */
 733 void xhci_slot_copy(struct xhci_hcd *xhci,
 734                 struct xhci_container_ctx *in_ctx,
 735                 struct xhci_container_ctx *out_ctx)
 736 {
 737         struct xhci_slot_ctx *in_slot_ctx;
 738         struct xhci_slot_ctx *out_slot_ctx;
 739
 740         in_slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
 741         out_slot_ctx = xhci_get_slot_ctx(xhci, out_ctx);
 742
 743         in_slot_ctx->dev_info = out_slot_ctx->dev_info;
 744         in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2;
 745         in_slot_ctx->tt_info = out_slot_ctx->tt_info;
 746         in_slot_ctx->dev_state = out_slot_ctx->dev_state;
 747 }
 748
 749 /* Set up the scratchpad buffer array and scratchpad buffers, if needed. */
 750 static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
 751 {
 752         int i;
 753         struct device *dev = xhci_to_hcd(xhci)->self.controller;
 754         int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
 755
 756         xhci_dbg(xhci, "Allocating %d scratchpad buffers\n", num_sp);
 757
 758         if (!num_sp)
 759                 return 0;
 760
 761         xhci->scratchpad = kzalloc(sizeof(*xhci->scratchpad), flags);
 762         if (!xhci->scratchpad)
 763                 goto fail_sp;
 764
 765         xhci->scratchpad->sp_array =
 766                 pci_alloc_consistent(to_pci_dev(dev),
 767                                      num_sp * sizeof(u64),
 768                                      &xhci->scratchpad->sp_dma);
 769         if (!xhci->scratchpad->sp_array)
 770                 goto fail_sp2;
 771
 772         xhci->scratchpad->sp_buffers = kzalloc(sizeof(void *) * num_sp, flags);
 773         if (!xhci->scratchpad->sp_buffers)
 774                 goto fail_sp3;
 775
 776         xhci->scratchpad->sp_dma_buffers =
 777                 kzalloc(sizeof(dma_addr_t) * num_sp, flags);
 778
 779         if (!xhci->scratchpad->sp_dma_buffers)
 780                 goto fail_sp4;
 781
 782         xhci->dcbaa->dev_context_ptrs[0] = xhci->scratchpad->sp_dma;
 783         for (i = 0; i < num_sp; i++) {
 784                 dma_addr_t dma;
 785                 void *buf = pci_alloc_consistent(to_pci_dev(dev),
 786                                                  xhci->page_size, &dma);
 787                 if (!buf)
 788                         goto fail_sp5;
 789
 790                 xhci->scratchpad->sp_array[i] = dma;
 791                 xhci->scratchpad->sp_buffers[i] = buf;
 792                 xhci->scratchpad->sp_dma_buffers[i] = dma;
 793         }
 794
 795         return 0;
 796
 797  fail_sp5:
 798         for (i = i - 1; i >= 0; i--) {
 799                 pci_free_consistent(to_pci_dev(dev), xhci->page_size,
 800                                     xhci->scratchpad->sp_buffers[i],
 801                                     xhci->scratchpad->sp_dma_buffers[i]);
 802         }
 803         kfree(xhci->scratchpad->sp_dma_buffers);
 804
 805  fail_sp4:
 806         kfree(xhci->scratchpad->sp_buffers);
 807
 808  fail_sp3:
 809         pci_free_consistent(to_pci_dev(dev), num_sp * sizeof(u64),
 810                             xhci->scratchpad->sp_array,
 811                             xhci->scratchpad->sp_dma);
 812
 813  fail_sp2:
 814         kfree(xhci->scratchpad);
 815         xhci->scratchpad = NULL;
 816
 817  fail_sp:
 818         return -ENOMEM;
 819 }
 820
 821 static void scratchpad_free(struct xhci_hcd *xhci)
 822 {
 823         int num_sp;
 824         int i;
 825         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
 826
 827         if (!xhci->scratchpad)
 828                 return;
 829
 830         num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
 831
 832         for (i = 0; i < num_sp; i++) {
 833                 pci_free_consistent(pdev, xhci->page_size,
 834                                     xhci->scratchpad->sp_buffers[i],
 835                                     xhci->scratchpad->sp_dma_buffers[i]);
 836         }
 837         kfree(xhci->scratchpad->sp_dma_buffers);
 838         kfree(xhci->scratchpad->sp_buffers);
 839         pci_free_consistent(pdev, num_sp * sizeof(u64),
 840                             xhci->scratchpad->sp_array,
 841                             xhci->scratchpad->sp_dma);
 842         kfree(xhci->scratchpad);
 843         xhci->scratchpad = NULL;
 844 }
 845
 846 struct xhci_command *xhci_alloc_command(struct xhci_hcd *xhci,
 847                 bool allocate_completion, gfp_t mem_flags)
 848 {
 849         struct xhci_command *command;
 850
 851         command = kzalloc(sizeof(*command), mem_flags);
 852         if (!command)
 853                 return NULL;
 854
 855         command->in_ctx =
 856                 xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, mem_flags);
 857         if (!command->in_ctx) {
 858                 kfree(command);
 859                 return NULL;
 860         }
 861
 862         if (allocate_completion) {
 863                 command->completion =
 864                         kzalloc(sizeof(struct completion), mem_flags);
 865                 if (!command->completion) {
 866                         xhci_free_container_ctx(xhci, command->in_ctx);
 867                         kfree(command);
 868                         return NULL;
 869                 }
 870                 init_completion(command->completion);
 871         }
 872
 873         command->status = 0;
 874         INIT_LIST_HEAD(&command->cmd_list);
 875         return command;
 876 }
 877
 878 void xhci_free_command(struct xhci_hcd *xhci,
 879                 struct xhci_command *command)
 880 {
 881         xhci_free_container_ctx(xhci,
 882                         command->in_ctx);
 883         kfree(command->completion);
 884         kfree(command);
 885 }
 886
 887 void xhci_mem_cleanup(struct xhci_hcd *xhci)
 888 {
 889         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
 890         int size;
 891         int i;
 892
 893         /* Free the Event Ring Segment Table and the actual Event Ring */
 894         if (xhci->ir_set) {
 895                 xhci_writel(xhci, 0, &xhci->ir_set->erst_size);
 896                 xhci_write_64(xhci, 0, &xhci->ir_set->erst_base);
 897                 xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue);
 898         }
 899         size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);
 900         if (xhci->erst.entries)
 901                 pci_free_consistent(pdev, size,
 902                                 xhci->erst.entries, xhci->erst.erst_dma_addr);
 903         xhci->erst.entries = NULL;
 904         xhci_dbg(xhci, "Freed ERST\n");
 905         if (xhci->event_ring)
 906                 xhci_ring_free(xhci, xhci->event_ring);
 907         xhci->event_ring = NULL;
 908         xhci_dbg(xhci, "Freed event ring\n");
 909
 910         xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring);
 911         if (xhci->cmd_ring)
 912                 xhci_ring_free(xhci, xhci->cmd_ring);
 913         xhci->cmd_ring = NULL;
 914         xhci_dbg(xhci, "Freed command ring\n");
 915
 916         for (i = 1; i < MAX_HC_SLOTS; ++i)
 917                 xhci_free_virt_device(xhci, i);
 918
 919         if (xhci->segment_pool)
 920                 dma_pool_destroy(xhci->segment_pool);
 921         xhci->segment_pool = NULL;
 922         xhci_dbg(xhci, "Freed segment pool\n");
 923
 924         if (xhci->device_pool)
 925                 dma_pool_destroy(xhci->device_pool);
 926         xhci->device_pool = NULL;
 927         xhci_dbg(xhci, "Freed device context pool\n");
 928
 929         xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr);
 930         if (xhci->dcbaa)
 931                 pci_free_consistent(pdev, sizeof(*xhci->dcbaa),
 932                                 xhci->dcbaa, xhci->dcbaa->dma);
 933         xhci->dcbaa = NULL;
 934
 935         scratchpad_free(xhci);
 936         xhci->page_size = 0;
 937         xhci->page_shift = 0;
 938 }
 939
 940 static int xhci_test_trb_in_td(struct xhci_hcd *xhci,
 941                 struct xhci_segment *input_seg,
 942                 union xhci_trb *start_trb,
 943                 union xhci_trb *end_trb,
 944                 dma_addr_t input_dma,
 945                 struct xhci_segment *result_seg,
 946                 char *test_name, int test_number)
 947 {
 948         unsigned long long start_dma;
 949         unsigned long long end_dma;
 950         struct xhci_segment *seg;
 951
 952         start_dma = xhci_trb_virt_to_dma(input_seg, start_trb);
 953         end_dma = xhci_trb_virt_to_dma(input_seg, end_trb);
 954
 955         seg = trb_in_td(input_seg, start_trb, end_trb, input_dma);
 956         if (seg != result_seg) {
 957                 xhci_warn(xhci, "WARN: %s TRB math test %d failed!\n",
 958                                 test_name, test_number);
 959                 xhci_warn(xhci, "Tested TRB math w/ seg %p and "
 960                                 "input DMA 0x%llx\n",
 961                                 input_seg,
 962                                 (unsigned long long) input_dma);
 963                 xhci_warn(xhci, "starting TRB %p (0x%llx DMA), "
 964                                 "ending TRB %p (0x%llx DMA)\n",
 965                                 start_trb, start_dma,
 966                                 end_trb, end_dma);
 967                 xhci_warn(xhci, "Expected seg %p, got seg %p\n",
 968                                 result_seg, seg);
 969                 return -1;
 970         }
 971         return 0;
 972 }
 973
 974 /* TRB math checks for xhci_trb_in_td(), using the command and event rings. */
 975 static int xhci_check_trb_in_td_math(struct xhci_hcd *xhci, gfp_t mem_flags)
 976 {
 977         struct {
 978                 dma_addr_t              input_dma;
 979                 struct xhci_segment     *result_seg;
 980         } simple_test_vector [] = {
 981                 /* A zeroed DMA field should fail */
 982                 { 0, NULL },
 983                 /* One TRB before the ring start should fail */
 984                 { xhci->event_ring->first_seg->dma - 16, NULL },
 985                 /* One byte before the ring start should fail */
 986                 { xhci->event_ring->first_seg->dma - 1, NULL },
 987                 /* Starting TRB should succeed */
 988                 { xhci->event_ring->first_seg->dma, xhci->event_ring->first_seg },
 989                 /* Ending TRB should succeed */
 990                 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16,
 991                         xhci->event_ring->first_seg },
 992                 /* One byte after the ring end should fail */
 993                 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16 + 1, NULL },
 994                 /* One TRB after the ring end should fail */
 995                 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT)*16, NULL },
 996                 /* An address of all ones should fail */
 997                 { (dma_addr_t) (~0), NULL },
 998         };
 999         struct {
1000                 struct xhci_segment     *input_seg;
1001                 union xhci_trb          *start_trb;
1002                 union xhci_trb          *end_trb;
1003                 dma_addr_t              input_dma;
1004                 struct xhci_segment     *result_seg;
1005         } complex_test_vector [] = {
1006                 /* Test feeding a valid DMA address from a different ring */
1007                 {       .input_seg = xhci->event_ring->first_seg,
1008                         .start_trb = xhci->event_ring->first_seg->trbs,
1009                         .end_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1010                         .input_dma = xhci->cmd_ring->first_seg->dma,
1011                         .result_seg = NULL,
1012                 },
1013                 /* Test feeding a valid end TRB from a different ring */
1014                 {       .input_seg = xhci->event_ring->first_seg,
1015                         .start_trb = xhci->event_ring->first_seg->trbs,
1016                         .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1017                         .input_dma = xhci->cmd_ring->first_seg->dma,
1018                         .result_seg = NULL,
1019                 },
1020                 /* Test feeding a valid start and end TRB from a different ring */
1021                 {       .input_seg = xhci->event_ring->first_seg,
1022                         .start_trb = xhci->cmd_ring->first_seg->trbs,
1023                         .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1024                         .input_dma = xhci->cmd_ring->first_seg->dma,
1025                         .result_seg = NULL,
1026                 },
1027                 /* TRB in this ring, but after this TD */
1028                 {       .input_seg = xhci->event_ring->first_seg,
1029                         .start_trb = &xhci->event_ring->first_seg->trbs[0],
1030                         .end_trb = &xhci->event_ring->first_seg->trbs[3],
1031                         .input_dma = xhci->event_ring->first_seg->dma + 4*16,
1032                         .result_seg = NULL,
1033                 },
1034                 /* TRB in this ring, but before this TD */
1035                 {       .input_seg = xhci->event_ring->first_seg,
1036                         .start_trb = &xhci->event_ring->first_seg->trbs[3],
1037                         .end_trb = &xhci->event_ring->first_seg->trbs[6],
1038                         .input_dma = xhci->event_ring->first_seg->dma + 2*16,
1039                         .result_seg = NULL,
1040                 },
1041                 /* TRB in this ring, but after this wrapped TD */
1042                 {       .input_seg = xhci->event_ring->first_seg,
1043                         .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1044                         .end_trb = &xhci->event_ring->first_seg->trbs[1],
1045                         .input_dma = xhci->event_ring->first_seg->dma + 2*16,
1046                         .result_seg = NULL,
1047                 },
1048                 /* TRB in this ring, but before this wrapped TD */
1049                 {       .input_seg = xhci->event_ring->first_seg,
1050                         .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1051                         .end_trb = &xhci->event_ring->first_seg->trbs[1],
1052                         .input_dma = xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 4)*16,
1053                         .result_seg = NULL,
1054                 },
1055                 /* TRB not in this ring, and we have a wrapped TD */
1056                 {       .input_seg = xhci->event_ring->first_seg,
1057                         .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1058                         .end_trb = &xhci->event_ring->first_seg->trbs[1],
1059                         .input_dma = xhci->cmd_ring->first_seg->dma + 2*16,
1060                         .result_seg = NULL,
1061                 },
1062         };
1063
1064         unsigned int num_tests;
1065         int i, ret;
1066
1067         num_tests = sizeof(simple_test_vector) / sizeof(simple_test_vector[0]);
1068         for (i = 0; i < num_tests; i++) {
1069                 ret = xhci_test_trb_in_td(xhci,
1070                                 xhci->event_ring->first_seg,
1071                                 xhci->event_ring->first_seg->trbs,
1072                                 &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1073                                 simple_test_vector[i].input_dma,
1074                                 simple_test_vector[i].result_seg,
1075                                 "Simple", i);
1076                 if (ret < 0)
1077                         return ret;
1078         }
1079
1080         num_tests = sizeof(complex_test_vector) / sizeof(complex_test_vector[0]);
1081         for (i = 0; i < num_tests; i++) {
1082                 ret = xhci_test_trb_in_td(xhci,
1083                                 complex_test_vector[i].input_seg,
1084                                 complex_test_vector[i].start_trb,
1085                                 complex_test_vector[i].end_trb,
1086                                 complex_test_vector[i].input_dma,
1087                                 complex_test_vector[i].result_seg,
1088                                 "Complex", i);
1089                 if (ret < 0)
1090                         return ret;
1091         }
1092         xhci_dbg(xhci, "TRB math tests passed.\n");
1093         return 0;
1094 }
1095
1096
1097 int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
1098 {
1099         dma_addr_t      dma;
1100         struct device   *dev = xhci_to_hcd(xhci)->self.controller;
1101         unsigned int    val, val2;
1102         u64             val_64;
1103         struct xhci_segment     *seg;
1104         u32 page_size;
1105         int i;
1106
1107         page_size = xhci_readl(xhci, &xhci->op_regs->page_size);
1108         xhci_dbg(xhci, "Supported page size register = 0x%x\n", page_size);
1109         for (i = 0; i < 16; i++) {
1110                 if ((0x1 & page_size) != 0)
1111                         break;
1112                 page_size = page_size >> 1;
1113         }
1114         if (i < 16)
1115                 xhci_dbg(xhci, "Supported page size of %iK\n", (1 << (i+12)) / 1024);
1116         else
1117                 xhci_warn(xhci, "WARN: no supported page size\n");
1118         /* Use 4K pages, since that's common and the minimum the HC supports */
1119         xhci->page_shift = 12;
1120         xhci->page_size = 1 << xhci->page_shift;
1121         xhci_dbg(xhci, "HCD page size set to %iK\n", xhci->page_size / 1024);
1122
1123         /*
1124          * Program the Number of Device Slots Enabled field in the CONFIG
1125          * register with the max value of slots the HC can handle.
1126          */
1127         val = HCS_MAX_SLOTS(xhci_readl(xhci, &xhci->cap_regs->hcs_params1));
1128         xhci_dbg(xhci, "// xHC can handle at most %d device slots.\n",
1129                         (unsigned int) val);
1130         val2 = xhci_readl(xhci, &xhci->op_regs->config_reg);
1131         val |= (val2 & ~HCS_SLOTS_MASK);
1132         xhci_dbg(xhci, "// Setting Max device slots reg = 0x%x.\n",
1133                         (unsigned int) val);
1134         xhci_writel(xhci, val, &xhci->op_regs->config_reg);
1135
1136         /*
1137          * Section 5.4.8 - doorbell array must be
1138          * "physically contiguous and 64-byte (cache line) aligned".
1139          */
1140         xhci->dcbaa = pci_alloc_consistent(to_pci_dev(dev),
1141                         sizeof(*xhci->dcbaa), &dma);
1142         if (!xhci->dcbaa)
1143                 goto fail;
1144         memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa));
1145         xhci->dcbaa->dma = dma;
1146         xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n",
1147                         (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);
1148         xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);
1149
1150         /*
1151          * Initialize the ring segment pool.  The ring must be a contiguous
1152          * structure comprised of TRBs.  The TRBs must be 16 byte aligned,
1153          * however, the command ring segment needs 64-byte aligned segments,
1154          * so we pick the greater alignment need.
1155          */
1156         xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
1157                         SEGMENT_SIZE, 64, xhci->page_size);
1158
1159         /* See Table 46 and Note on Figure 55 */
1160         xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev,
1161                         2112, 64, xhci->page_size);
1162         if (!xhci->segment_pool || !xhci->device_pool)
1163                 goto fail;
1164
1165         /* Set up the command ring to have one segments for now. */
1166         xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags);
1167         if (!xhci->cmd_ring)
1168                 goto fail;
1169         xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring);
1170         xhci_dbg(xhci, "First segment DMA is 0x%llx\n",
1171                         (unsigned long long)xhci->cmd_ring->first_seg->dma);
1172
1173         /* Set the address in the Command Ring Control register */
1174         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
1175         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
1176                 (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |
1177                 xhci->cmd_ring->cycle_state;
1178         xhci_dbg(xhci, "// Setting command ring address to 0x%x\n", val);
1179         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
1180         xhci_dbg_cmd_ptrs(xhci);
1181
1182         val = xhci_readl(xhci, &xhci->cap_regs->db_off);
1183         val &= DBOFF_MASK;
1184         xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x"
1185                         " from cap regs base addr\n", val);
1186         xhci->dba = (void *) xhci->cap_regs + val;
1187         xhci_dbg_regs(xhci);
1188         xhci_print_run_regs(xhci);
1189         /* Set ir_set to interrupt register set 0 */
1190         xhci->ir_set = (void *) xhci->run_regs->ir_set;
1191
1192         /*
1193          * Event ring setup: Allocate a normal ring, but also setup
1194          * the event ring segment table (ERST).  Section 4.9.3.
1195          */
1196         xhci_dbg(xhci, "// Allocating event ring\n");
1197         xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, false, flags);
1198         if (!xhci->event_ring)
1199                 goto fail;
1200         if (xhci_check_trb_in_td_math(xhci, flags) < 0)
1201                 goto fail;
1202
1203         xhci->erst.entries = pci_alloc_consistent(to_pci_dev(dev),
1204                         sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS, &dma);
1205         if (!xhci->erst.entries)
1206                 goto fail;
1207         xhci_dbg(xhci, "// Allocated event ring segment table at 0x%llx\n",
1208                         (unsigned long long)dma);
1209
1210         memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS);
1211         xhci->erst.num_entries = ERST_NUM_SEGS;
1212         xhci->erst.erst_dma_addr = dma;
1213         xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx\n",
1214                         xhci->erst.num_entries,
1215                         xhci->erst.entries,
1216                         (unsigned long long)xhci->erst.erst_dma_addr);
1217
1218         /* set ring base address and size for each segment table entry */
1219         for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) {
1220                 struct xhci_erst_entry *entry = &xhci->erst.entries[val];
1221                 entry->seg_addr = seg->dma;
1222                 entry->seg_size = TRBS_PER_SEGMENT;
1223                 entry->rsvd = 0;
1224                 seg = seg->next;
1225         }
1226
1227         /* set ERST count with the number of entries in the segment table */
1228         val = xhci_readl(xhci, &xhci->ir_set->erst_size);
1229         val &= ERST_SIZE_MASK;
1230         val |= ERST_NUM_SEGS;
1231         xhci_dbg(xhci, "// Write ERST size = %i to ir_set 0 (some bits preserved)\n",
1232                         val);
1233         xhci_writel(xhci, val, &xhci->ir_set->erst_size);
1234
1235         xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n");
1236         /* set the segment table base address */
1237         xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n",
1238                         (unsigned long long)xhci->erst.erst_dma_addr);
1239         val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);
1240         val_64 &= ERST_PTR_MASK;
1241         val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
1242         xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);
1243
1244         /* Set the event ring dequeue address */
1245         xhci_set_hc_event_deq(xhci);
1246         xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n");
1247         xhci_print_ir_set(xhci, xhci->ir_set, 0);
1248
1249         /*
1250          * XXX: Might need to set the Interrupter Moderation Register to
1251          * something other than the default (~1ms minimum between interrupts).
1252          * See section 5.5.1.2.
1253          */
1254         init_completion(&xhci->addr_dev);
1255         for (i = 0; i < MAX_HC_SLOTS; ++i)
1256                 xhci->devs[i] = 0;
1257
1258         if (scratchpad_alloc(xhci, flags))
1259                 goto fail;
1260
1261         return 0;
1262
1263 fail:
1264         xhci_warn(xhci, "Couldn't initialize memory\n");
1265         xhci_mem_cleanup(xhci);
1266         return -ENOMEM;
1267 }