]> Pileus Git - ~andy/linux/blob - drivers/usb/host/uhci-hub.c
Merge branch 'exynos-drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git...
[~andy/linux] / drivers / usb / host / uhci-hub.c
1 /*
2  * Universal Host Controller Interface driver for USB.
3  *
4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5  *
6  * (C) Copyright 1999 Linus Torvalds
7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8  * (C) Copyright 1999 Randy Dunlap
9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12  * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
13  */
14
15 static const __u8 root_hub_hub_des[] =
16 {
17         0x09,                   /*  __u8  bLength; */
18         0x29,                   /*  __u8  bDescriptorType; Hub-descriptor */
19         0x02,                   /*  __u8  bNbrPorts; */
20         0x0a,                   /* __u16  wHubCharacteristics; */
21         0x00,                   /*   (per-port OC, no power switching) */
22         0x01,                   /*  __u8  bPwrOn2pwrGood; 2ms */
23         0x00,                   /*  __u8  bHubContrCurrent; 0 mA */
24         0x00,                   /*  __u8  DeviceRemovable; *** 7 Ports max */
25         0xff                    /*  __u8  PortPwrCtrlMask; *** 7 ports max */
26 };
27
28 #define UHCI_RH_MAXCHILD        7
29
30 /* must write as zeroes */
31 #define WZ_BITS         (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)
32
33 /* status change bits:  nonzero writes will clear */
34 #define RWC_BITS        (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
35
36 /* suspend/resume bits: port suspended or port resuming */
37 #define SUSPEND_BITS    (USBPORTSC_SUSP | USBPORTSC_RD)
38
39 /* A port that either is connected or has a changed-bit set will prevent
40  * us from AUTO_STOPPING.
41  */
42 static int any_ports_active(struct uhci_hcd *uhci)
43 {
44         int port;
45
46         for (port = 0; port < uhci->rh_numports; ++port) {
47                 if ((uhci_readw(uhci, USBPORTSC1 + port * 2) &
48                                 (USBPORTSC_CCS | RWC_BITS)) ||
49                                 test_bit(port, &uhci->port_c_suspend))
50                         return 1;
51         }
52         return 0;
53 }
54
55 static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
56 {
57         int port;
58         int mask = RWC_BITS;
59
60         /* Some boards (both VIA and Intel apparently) report bogus
61          * overcurrent indications, causing massive log spam unless
62          * we completely ignore them.  This doesn't seem to be a problem
63          * with the chipset so much as with the way it is connected on
64          * the motherboard; if the overcurrent input is left to float
65          * then it may constantly register false positives. */
66         if (ignore_oc)
67                 mask &= ~USBPORTSC_OCC;
68
69         *buf = 0;
70         for (port = 0; port < uhci->rh_numports; ++port) {
71                 if ((uhci_readw(uhci, USBPORTSC1 + port * 2) & mask) ||
72                                 test_bit(port, &uhci->port_c_suspend))
73                         *buf |= (1 << (port + 1));
74         }
75         return !!*buf;
76 }
77
78 #define OK(x)                   len = (x); break
79
80 #define CLR_RH_PORTSTAT(x) \
81         status = uhci_readw(uhci, port_addr);   \
82         status &= ~(RWC_BITS|WZ_BITS); \
83         status &= ~(x); \
84         status |= RWC_BITS & (x); \
85         uhci_writew(uhci, status, port_addr)
86
87 #define SET_RH_PORTSTAT(x) \
88         status = uhci_readw(uhci, port_addr);   \
89         status |= (x); \
90         status &= ~(RWC_BITS|WZ_BITS); \
91         uhci_writew(uhci, status, port_addr)
92
93 /* UHCI controllers don't automatically stop resume signalling after 20 msec,
94  * so we have to poll and check timeouts in order to take care of it.
95  */
96 static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
97                 unsigned long port_addr)
98 {
99         int status;
100         int i;
101
102         if (uhci_readw(uhci, port_addr) & SUSPEND_BITS) {
103                 CLR_RH_PORTSTAT(SUSPEND_BITS);
104                 if (test_bit(port, &uhci->resuming_ports))
105                         set_bit(port, &uhci->port_c_suspend);
106
107                 /* The controller won't actually turn off the RD bit until
108                  * it has had a chance to send a low-speed EOP sequence,
109                  * which is supposed to take 3 bit times (= 2 microseconds).
110                  * Experiments show that some controllers take longer, so
111                  * we'll poll for completion. */
112                 for (i = 0; i < 10; ++i) {
113                         if (!(uhci_readw(uhci, port_addr) & SUSPEND_BITS))
114                                 break;
115                         udelay(1);
116                 }
117         }
118         clear_bit(port, &uhci->resuming_ports);
119         usb_hcd_end_port_resume(&uhci_to_hcd(uhci)->self, port);
120 }
121
122 /* Wait for the UHCI controller in HP's iLO2 server management chip.
123  * It can take up to 250 us to finish a reset and set the CSC bit.
124  */
125 static void wait_for_HP(struct uhci_hcd *uhci, unsigned long port_addr)
126 {
127         int i;
128
129         for (i = 10; i < 250; i += 10) {
130                 if (uhci_readw(uhci, port_addr) & USBPORTSC_CSC)
131                         return;
132                 udelay(10);
133         }
134         /* Log a warning? */
135 }
136
137 static void uhci_check_ports(struct uhci_hcd *uhci)
138 {
139         unsigned int port;
140         unsigned long port_addr;
141         int status;
142
143         for (port = 0; port < uhci->rh_numports; ++port) {
144                 port_addr = USBPORTSC1 + 2 * port;
145                 status = uhci_readw(uhci, port_addr);
146                 if (unlikely(status & USBPORTSC_PR)) {
147                         if (time_after_eq(jiffies, uhci->ports_timeout)) {
148                                 CLR_RH_PORTSTAT(USBPORTSC_PR);
149                                 udelay(10);
150
151                                 /* HP's server management chip requires
152                                  * a longer delay. */
153                                 if (uhci->wait_for_hp)
154                                         wait_for_HP(uhci, port_addr);
155
156                                 /* If the port was enabled before, turning
157                                  * reset on caused a port enable change.
158                                  * Turning reset off causes a port connect
159                                  * status change.  Clear these changes. */
160                                 CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC);
161                                 SET_RH_PORTSTAT(USBPORTSC_PE);
162                         }
163                 }
164                 if (unlikely(status & USBPORTSC_RD)) {
165                         if (!test_bit(port, &uhci->resuming_ports)) {
166
167                                 /* Port received a wakeup request */
168                                 set_bit(port, &uhci->resuming_ports);
169                                 uhci->ports_timeout = jiffies +
170                                                 msecs_to_jiffies(25);
171                                 usb_hcd_start_port_resume(
172                                                 &uhci_to_hcd(uhci)->self, port);
173
174                                 /* Make sure we see the port again
175                                  * after the resuming period is over. */
176                                 mod_timer(&uhci_to_hcd(uhci)->rh_timer,
177                                                 uhci->ports_timeout);
178                         } else if (time_after_eq(jiffies,
179                                                 uhci->ports_timeout)) {
180                                 uhci_finish_suspend(uhci, port, port_addr);
181                         }
182                 }
183         }
184 }
185
186 static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
187 {
188         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
189         unsigned long flags;
190         int status = 0;
191
192         spin_lock_irqsave(&uhci->lock, flags);
193
194         uhci_scan_schedule(uhci);
195         if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
196                 goto done;
197         uhci_check_ports(uhci);
198
199         status = get_hub_status_data(uhci, buf);
200
201         switch (uhci->rh_state) {
202             case UHCI_RH_SUSPENDED:
203                 /* if port change, ask to be resumed */
204                 if (status || uhci->resuming_ports) {
205                         status = 1;
206                         usb_hcd_resume_root_hub(hcd);
207                 }
208                 break;
209
210             case UHCI_RH_AUTO_STOPPED:
211                 /* if port change, auto start */
212                 if (status)
213                         wakeup_rh(uhci);
214                 break;
215
216             case UHCI_RH_RUNNING:
217                 /* are any devices attached? */
218                 if (!any_ports_active(uhci)) {
219                         uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
220                         uhci->auto_stop_time = jiffies + HZ;
221                 }
222                 break;
223
224             case UHCI_RH_RUNNING_NODEVS:
225                 /* auto-stop if nothing connected for 1 second */
226                 if (any_ports_active(uhci))
227                         uhci->rh_state = UHCI_RH_RUNNING;
228                 else if (time_after_eq(jiffies, uhci->auto_stop_time) &&
229                                 !uhci->wait_for_hp)
230                         suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
231                 break;
232
233             default:
234                 break;
235         }
236
237 done:
238         spin_unlock_irqrestore(&uhci->lock, flags);
239         return status;
240 }
241
242 /* size of returned buffer is part of USB spec */
243 static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
244                         u16 wIndex, char *buf, u16 wLength)
245 {
246         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
247         int status, lstatus, retval = 0, len = 0;
248         unsigned int port = wIndex - 1;
249         unsigned long port_addr = USBPORTSC1 + 2 * port;
250         u16 wPortChange, wPortStatus;
251         unsigned long flags;
252
253         if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
254                 return -ETIMEDOUT;
255
256         spin_lock_irqsave(&uhci->lock, flags);
257         switch (typeReq) {
258
259         case GetHubStatus:
260                 *(__le32 *)buf = cpu_to_le32(0);
261                 OK(4);          /* hub power */
262         case GetPortStatus:
263                 if (port >= uhci->rh_numports)
264                         goto err;
265
266                 uhci_check_ports(uhci);
267                 status = uhci_readw(uhci, port_addr);
268
269                 /* Intel controllers report the OverCurrent bit active on.
270                  * VIA controllers report it active off, so we'll adjust the
271                  * bit value.  (It's not standardized in the UHCI spec.)
272                  */
273                 if (uhci->oc_low)
274                         status ^= USBPORTSC_OC;
275
276                 /* UHCI doesn't support C_RESET (always false) */
277                 wPortChange = lstatus = 0;
278                 if (status & USBPORTSC_CSC)
279                         wPortChange |= USB_PORT_STAT_C_CONNECTION;
280                 if (status & USBPORTSC_PEC)
281                         wPortChange |= USB_PORT_STAT_C_ENABLE;
282                 if ((status & USBPORTSC_OCC) && !ignore_oc)
283                         wPortChange |= USB_PORT_STAT_C_OVERCURRENT;
284
285                 if (test_bit(port, &uhci->port_c_suspend)) {
286                         wPortChange |= USB_PORT_STAT_C_SUSPEND;
287                         lstatus |= 1;
288                 }
289                 if (test_bit(port, &uhci->resuming_ports))
290                         lstatus |= 4;
291
292                 /* UHCI has no power switching (always on) */
293                 wPortStatus = USB_PORT_STAT_POWER;
294                 if (status & USBPORTSC_CCS)
295                         wPortStatus |= USB_PORT_STAT_CONNECTION;
296                 if (status & USBPORTSC_PE) {
297                         wPortStatus |= USB_PORT_STAT_ENABLE;
298                         if (status & SUSPEND_BITS)
299                                 wPortStatus |= USB_PORT_STAT_SUSPEND;
300                 }
301                 if (status & USBPORTSC_OC)
302                         wPortStatus |= USB_PORT_STAT_OVERCURRENT;
303                 if (status & USBPORTSC_PR)
304                         wPortStatus |= USB_PORT_STAT_RESET;
305                 if (status & USBPORTSC_LSDA)
306                         wPortStatus |= USB_PORT_STAT_LOW_SPEED;
307
308                 if (wPortChange)
309                         dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
310                                         wIndex, status, lstatus);
311
312                 *(__le16 *)buf = cpu_to_le16(wPortStatus);
313                 *(__le16 *)(buf + 2) = cpu_to_le16(wPortChange);
314                 OK(4);
315         case SetHubFeature:             /* We don't implement these */
316         case ClearHubFeature:
317                 switch (wValue) {
318                 case C_HUB_OVER_CURRENT:
319                 case C_HUB_LOCAL_POWER:
320                         OK(0);
321                 default:
322                         goto err;
323                 }
324                 break;
325         case SetPortFeature:
326                 if (port >= uhci->rh_numports)
327                         goto err;
328
329                 switch (wValue) {
330                 case USB_PORT_FEAT_SUSPEND:
331                         SET_RH_PORTSTAT(USBPORTSC_SUSP);
332                         OK(0);
333                 case USB_PORT_FEAT_RESET:
334                         SET_RH_PORTSTAT(USBPORTSC_PR);
335
336                         /* Reset terminates Resume signalling */
337                         uhci_finish_suspend(uhci, port, port_addr);
338
339                         /* USB v2.0 7.1.7.5 */
340                         uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
341                         OK(0);
342                 case USB_PORT_FEAT_POWER:
343                         /* UHCI has no power switching */
344                         OK(0);
345                 default:
346                         goto err;
347                 }
348                 break;
349         case ClearPortFeature:
350                 if (port >= uhci->rh_numports)
351                         goto err;
352
353                 switch (wValue) {
354                 case USB_PORT_FEAT_ENABLE:
355                         CLR_RH_PORTSTAT(USBPORTSC_PE);
356
357                         /* Disable terminates Resume signalling */
358                         uhci_finish_suspend(uhci, port, port_addr);
359                         OK(0);
360                 case USB_PORT_FEAT_C_ENABLE:
361                         CLR_RH_PORTSTAT(USBPORTSC_PEC);
362                         OK(0);
363                 case USB_PORT_FEAT_SUSPEND:
364                         if (!(uhci_readw(uhci, port_addr) & USBPORTSC_SUSP)) {
365
366                                 /* Make certain the port isn't suspended */
367                                 uhci_finish_suspend(uhci, port, port_addr);
368                         } else if (!test_and_set_bit(port,
369                                                 &uhci->resuming_ports)) {
370                                 SET_RH_PORTSTAT(USBPORTSC_RD);
371
372                                 /* The controller won't allow RD to be set
373                                  * if the port is disabled.  When this happens
374                                  * just skip the Resume signalling.
375                                  */
376                                 if (!(uhci_readw(uhci, port_addr) &
377                                                 USBPORTSC_RD))
378                                         uhci_finish_suspend(uhci, port,
379                                                         port_addr);
380                                 else
381                                         /* USB v2.0 7.1.7.7 */
382                                         uhci->ports_timeout = jiffies +
383                                                 msecs_to_jiffies(20);
384                         }
385                         OK(0);
386                 case USB_PORT_FEAT_C_SUSPEND:
387                         clear_bit(port, &uhci->port_c_suspend);
388                         OK(0);
389                 case USB_PORT_FEAT_POWER:
390                         /* UHCI has no power switching */
391                         goto err;
392                 case USB_PORT_FEAT_C_CONNECTION:
393                         CLR_RH_PORTSTAT(USBPORTSC_CSC);
394                         OK(0);
395                 case USB_PORT_FEAT_C_OVER_CURRENT:
396                         CLR_RH_PORTSTAT(USBPORTSC_OCC);
397                         OK(0);
398                 case USB_PORT_FEAT_C_RESET:
399                         /* this driver won't report these */
400                         OK(0);
401                 default:
402                         goto err;
403                 }
404                 break;
405         case GetHubDescriptor:
406                 len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
407                 memcpy(buf, root_hub_hub_des, len);
408                 if (len > 2)
409                         buf[2] = uhci->rh_numports;
410                 OK(len);
411         default:
412 err:
413                 retval = -EPIPE;
414         }
415         spin_unlock_irqrestore(&uhci->lock, flags);
416
417         return retval;
418 }