Pileus Git - ~andy/linux/blob - drivers/usb/host/ohci-nxp.c

   1 /*
   2  * driver for NXP USB Host devices
   3  *
   4  * Currently supported OHCI host devices:
   5  * - Philips PNX4008
   6  * - NXP LPC32xx
   7  *
   8  * Authors: Dmitry Chigirev <source@mvista.com>
   9  *          Vitaly Wool <vitalywool@gmail.com>
  10  *
  11  * register initialization is based on code examples provided by Philips
  12  * Copyright (c) 2005 Koninklijke Philips Electronics N.V.
  13  *
  14  * NOTE: This driver does not have suspend/resume functionality
  15  * This driver is intended for engineering development purposes only
  16  *
  17  * 2005-2006 (c) MontaVista Software, Inc. This file is licensed under
  18  * the terms of the GNU General Public License version 2. This program
  19  * is licensed "as is" without any warranty of any kind, whether express
  20  * or implied.
  21  */
  22 #include <linux/clk.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/i2c.h>
  25
  26 #include <mach/hardware.h>
  27 #include <asm/mach-types.h>
  28 #include <asm/io.h>
  29
  30 #include <mach/platform.h>
  31 #include <mach/irqs.h>
  32 #include <asm/gpio.h>
  33
  34 #define USB_CONFIG_BASE         0x31020000
  35 #define PWRMAN_BASE             0x40004000
  36
  37 #define USB_CTRL                IO_ADDRESS(PWRMAN_BASE + 0x64)
  38
  39 /* USB_CTRL bit defines */
  40 #define USB_SLAVE_HCLK_EN       (1 << 24)
  41 #define USB_HOST_NEED_CLK_EN    (1 << 21)
  42
  43 #define USB_OTG_CLK_CTRL        IO_ADDRESS(USB_CONFIG_BASE + 0xFF4)
  44 #define USB_OTG_CLK_STAT        IO_ADDRESS(USB_CONFIG_BASE + 0xFF8)
  45
  46 /* USB_OTG_CLK_CTRL bit defines */
  47 #define AHB_M_CLOCK_ON          (1 << 4)
  48 #define OTG_CLOCK_ON            (1 << 3)
  49 #define I2C_CLOCK_ON            (1 << 2)
  50 #define DEV_CLOCK_ON            (1 << 1)
  51 #define HOST_CLOCK_ON           (1 << 0)
  52
  53 #define USB_OTG_STAT_CONTROL    IO_ADDRESS(USB_CONFIG_BASE + 0x110)
  54
  55 /* USB_OTG_STAT_CONTROL bit defines */
  56 #define TRANSPARENT_I2C_EN      (1 << 7)
  57 #define HOST_EN                 (1 << 0)
  58
  59 /* ISP1301 USB transceiver I2C registers */
  60 #define ISP1301_MODE_CONTROL_1          0x04    /* u8 read, set, +1 clear */
  61
  62 #define MC1_SPEED_REG           (1 << 0)
  63 #define MC1_SUSPEND_REG         (1 << 1)
  64 #define MC1_DAT_SE0             (1 << 2)
  65 #define MC1_TRANSPARENT         (1 << 3)
  66 #define MC1_BDIS_ACON_EN        (1 << 4)
  67 #define MC1_OE_INT_EN           (1 << 5)
  68 #define MC1_UART_EN             (1 << 6)
  69 #define MC1_MASK                0x7f
  70
  71 #define ISP1301_MODE_CONTROL_2          0x12    /* u8 read, set, +1 clear */
  72
  73 #define MC2_GLOBAL_PWR_DN       (1 << 0)
  74 #define MC2_SPD_SUSP_CTRL       (1 << 1)
  75 #define MC2_BI_DI               (1 << 2)
  76 #define MC2_TRANSP_BDIR0        (1 << 3)
  77 #define MC2_TRANSP_BDIR1        (1 << 4)
  78 #define MC2_AUDIO_EN            (1 << 5)
  79 #define MC2_PSW_EN              (1 << 6)
  80 #define MC2_EN2V7               (1 << 7)
  81
  82 #define ISP1301_OTG_CONTROL_1           0x06    /* u8 read, set, +1 clear */
  83 #       define  OTG1_DP_PULLUP          (1 << 0)
  84 #       define  OTG1_DM_PULLUP          (1 << 1)
  85 #       define  OTG1_DP_PULLDOWN        (1 << 2)
  86 #       define  OTG1_DM_PULLDOWN        (1 << 3)
  87 #       define  OTG1_ID_PULLDOWN        (1 << 4)
  88 #       define  OTG1_VBUS_DRV           (1 << 5)
  89 #       define  OTG1_VBUS_DISCHRG       (1 << 6)
  90 #       define  OTG1_VBUS_CHRG          (1 << 7)
  91 #define ISP1301_OTG_STATUS              0x10    /* u8 readonly */
  92 #       define  OTG_B_SESS_END          (1 << 6)
  93 #       define  OTG_B_SESS_VLD          (1 << 7)
  94
  95 #define ISP1301_I2C_ADDR 0x2C
  96
  97 #define ISP1301_I2C_MODE_CONTROL_1 0x4
  98 #define ISP1301_I2C_MODE_CONTROL_2 0x12
  99 #define ISP1301_I2C_OTG_CONTROL_1 0x6
 100 #define ISP1301_I2C_OTG_CONTROL_2 0x10
 101 #define ISP1301_I2C_INTERRUPT_SOURCE 0x8
 102 #define ISP1301_I2C_INTERRUPT_LATCH 0xA
 103 #define ISP1301_I2C_INTERRUPT_FALLING 0xC
 104 #define ISP1301_I2C_INTERRUPT_RISING 0xE
 105 #define ISP1301_I2C_REG_CLEAR_ADDR 1
 106
 107 /* On LPC32xx, those are undefined */
 108 #ifndef start_int_set_falling_edge
 109 #define start_int_set_falling_edge(irq)
 110 #define start_int_set_rising_edge(irq)
 111 #define start_int_ack(irq)
 112 #define start_int_mask(irq)
 113 #define start_int_umask(irq)
 114 #endif
 115
 116 static struct i2c_driver isp1301_driver;
 117 static struct i2c_client *isp1301_i2c_client;
 118
 119 extern int usb_disabled(void);
 120 extern int ocpi_enable(void);
 121
 122 static struct clk *usb_clk;
 123
 124 static const unsigned short normal_i2c[] =
 125     { ISP1301_I2C_ADDR, ISP1301_I2C_ADDR + 1, I2C_CLIENT_END };
 126
 127 static int isp1301_probe(struct i2c_client *client,
 128                          const struct i2c_device_id *id)
 129 {
 130         return 0;
 131 }
 132
 133 static int isp1301_remove(struct i2c_client *client)
 134 {
 135         return 0;
 136 }
 137
 138 static const struct i2c_device_id isp1301_id[] = {
 139         { "isp1301_nxp", 0 },
 140         { }
 141 };
 142
 143 static struct i2c_driver isp1301_driver = {
 144         .driver = {
 145                 .name = "isp1301_nxp",
 146         },
 147         .probe = isp1301_probe,
 148         .remove = isp1301_remove,
 149         .id_table = isp1301_id,
 150 };
 151
 152 static void isp1301_configure_pnx4008(void)
 153 {
 154         /* PNX4008 only supports DAT_SE0 USB mode */
 155         /* PNX4008 R2A requires setting the MAX603 to output 3.6V */
 156         /* Power up externel charge-pump */
 157
 158         i2c_smbus_write_byte_data(isp1301_i2c_client,
 159                 ISP1301_I2C_MODE_CONTROL_1, MC1_DAT_SE0 | MC1_SPEED_REG);
 160         i2c_smbus_write_byte_data(isp1301_i2c_client,
 161                 ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR,
 162                 ~(MC1_DAT_SE0 | MC1_SPEED_REG));
 163         i2c_smbus_write_byte_data(isp1301_i2c_client,
 164                 ISP1301_I2C_MODE_CONTROL_2,
 165                 MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL);
 166         i2c_smbus_write_byte_data(isp1301_i2c_client,
 167                 ISP1301_I2C_MODE_CONTROL_2 | ISP1301_I2C_REG_CLEAR_ADDR,
 168                 ~(MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL));
 169         i2c_smbus_write_byte_data(isp1301_i2c_client,
 170                 ISP1301_I2C_OTG_CONTROL_1, OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN);
 171         i2c_smbus_write_byte_data(isp1301_i2c_client,
 172                 ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR,
 173                 ~(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN));
 174         i2c_smbus_write_byte_data(isp1301_i2c_client,
 175                 ISP1301_I2C_INTERRUPT_LATCH | ISP1301_I2C_REG_CLEAR_ADDR, 0xFF);
 176         i2c_smbus_write_byte_data(isp1301_i2c_client,
 177                 ISP1301_I2C_INTERRUPT_FALLING | ISP1301_I2C_REG_CLEAR_ADDR,
 178                 0xFF);
 179         i2c_smbus_write_byte_data(isp1301_i2c_client,
 180                 ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR,
 181                 0xFF);
 182 }
 183
 184 static void isp1301_configure_lpc32xx(void)
 185 {
 186         /* LPC32XX only supports DAT_SE0 USB mode */
 187         /* This sequence is important */
 188
 189         /* Disable transparent UART mode first */
 190         i2c_smbus_write_byte_data(isp1301_i2c_client,
 191                 (ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR),
 192                 MC1_UART_EN);
 193         i2c_smbus_write_byte_data(isp1301_i2c_client,
 194                 (ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR),
 195                 ~MC1_SPEED_REG);
 196         i2c_smbus_write_byte_data(isp1301_i2c_client,
 197                                   ISP1301_I2C_MODE_CONTROL_1, MC1_SPEED_REG);
 198         i2c_smbus_write_byte_data(isp1301_i2c_client,
 199                   (ISP1301_I2C_MODE_CONTROL_2 | ISP1301_I2C_REG_CLEAR_ADDR),
 200                   ~0);
 201         i2c_smbus_write_byte_data(isp1301_i2c_client,
 202                 ISP1301_I2C_MODE_CONTROL_2,
 203                 (MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL));
 204         i2c_smbus_write_byte_data(isp1301_i2c_client,
 205                 (ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR), ~0);
 206         i2c_smbus_write_byte_data(isp1301_i2c_client,
 207                 ISP1301_I2C_MODE_CONTROL_1, MC1_DAT_SE0);
 208         i2c_smbus_write_byte_data(isp1301_i2c_client,
 209                 ISP1301_I2C_OTG_CONTROL_1,
 210                 (OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN));
 211         i2c_smbus_write_byte_data(isp1301_i2c_client,
 212                 (ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR),
 213                 (OTG1_DM_PULLUP | OTG1_DP_PULLUP));
 214         i2c_smbus_write_byte_data(isp1301_i2c_client,
 215                 ISP1301_I2C_INTERRUPT_LATCH | ISP1301_I2C_REG_CLEAR_ADDR, ~0);
 216         i2c_smbus_write_byte_data(isp1301_i2c_client,
 217                 ISP1301_I2C_INTERRUPT_FALLING | ISP1301_I2C_REG_CLEAR_ADDR,
 218                 ~0);
 219         i2c_smbus_write_byte_data(isp1301_i2c_client,
 220                 ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR, ~0);
 221
 222         /* Enable usb_need_clk clock after transceiver is initialized */
 223         __raw_writel((__raw_readl(USB_CTRL) | (1 << 22)), USB_CTRL);
 224
 225         printk(KERN_INFO "ISP1301 Vendor ID  : 0x%04x\n",
 226               i2c_smbus_read_word_data(isp1301_i2c_client, 0x00));
 227         printk(KERN_INFO "ISP1301 Product ID : 0x%04x\n",
 228               i2c_smbus_read_word_data(isp1301_i2c_client, 0x02));
 229         printk(KERN_INFO "ISP1301 Version ID : 0x%04x\n",
 230               i2c_smbus_read_word_data(isp1301_i2c_client, 0x14));
 231 }
 232
 233 static void isp1301_configure(void)
 234 {
 235         if (machine_is_pnx4008())
 236                 isp1301_configure_pnx4008();
 237         else
 238                 isp1301_configure_lpc32xx();
 239 }
 240
 241 static inline void isp1301_vbus_on(void)
 242 {
 243         i2c_smbus_write_byte_data(isp1301_i2c_client, ISP1301_I2C_OTG_CONTROL_1,
 244                                   OTG1_VBUS_DRV);
 245 }
 246
 247 static inline void isp1301_vbus_off(void)
 248 {
 249         i2c_smbus_write_byte_data(isp1301_i2c_client,
 250                 ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR,
 251                 OTG1_VBUS_DRV);
 252 }
 253
 254 static void nxp_start_hc(void)
 255 {
 256         unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN;
 257         __raw_writel(tmp, USB_OTG_STAT_CONTROL);
 258         isp1301_vbus_on();
 259 }
 260
 261 static void nxp_stop_hc(void)
 262 {
 263         unsigned long tmp;
 264         isp1301_vbus_off();
 265         tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN;
 266         __raw_writel(tmp, USB_OTG_STAT_CONTROL);
 267 }
 268
 269 static int __devinit ohci_nxp_start(struct usb_hcd *hcd)
 270 {
 271         struct ohci_hcd *ohci = hcd_to_ohci(hcd);
 272         int ret;
 273
 274         if ((ret = ohci_init(ohci)) < 0)
 275                 return ret;
 276
 277         if ((ret = ohci_run(ohci)) < 0) {
 278                 dev_err(hcd->self.controller, "can't start\n");
 279                 ohci_stop(hcd);
 280                 return ret;
 281         }
 282         return 0;
 283 }
 284
 285 static const struct hc_driver ohci_nxp_hc_driver = {
 286         .description = hcd_name,
 287         .product_desc =         "nxp OHCI",
 288
 289         /*
 290          * generic hardware linkage
 291          */
 292         .irq = ohci_irq,
 293         .flags = HCD_USB11 | HCD_MEMORY,
 294
 295         .hcd_priv_size =        sizeof(struct ohci_hcd),
 296         /*
 297          * basic lifecycle operations
 298          */
 299         .start = ohci_nxp_start,
 300         .stop = ohci_stop,
 301         .shutdown = ohci_shutdown,
 302
 303         /*
 304          * managing i/o requests and associated device resources
 305          */
 306         .urb_enqueue = ohci_urb_enqueue,
 307         .urb_dequeue = ohci_urb_dequeue,
 308         .endpoint_disable = ohci_endpoint_disable,
 309
 310         /*
 311          * scheduling support
 312          */
 313         .get_frame_number = ohci_get_frame,
 314
 315         /*
 316          * root hub support
 317          */
 318         .hub_status_data = ohci_hub_status_data,
 319         .hub_control = ohci_hub_control,
 320 #ifdef  CONFIG_PM
 321         .bus_suspend = ohci_bus_suspend,
 322         .bus_resume = ohci_bus_resume,
 323 #endif
 324         .start_port_reset = ohci_start_port_reset,
 325 };
 326
 327 #define USB_CLOCK_MASK (AHB_M_CLOCK_ON| OTG_CLOCK_ON | HOST_CLOCK_ON | I2C_CLOCK_ON)
 328
 329 static void nxp_set_usb_bits(void)
 330 {
 331         if (machine_is_pnx4008()) {
 332                 start_int_set_falling_edge(SE_USB_OTG_ATX_INT_N);
 333                 start_int_ack(SE_USB_OTG_ATX_INT_N);
 334                 start_int_umask(SE_USB_OTG_ATX_INT_N);
 335
 336                 start_int_set_rising_edge(SE_USB_OTG_TIMER_INT);
 337                 start_int_ack(SE_USB_OTG_TIMER_INT);
 338                 start_int_umask(SE_USB_OTG_TIMER_INT);
 339
 340                 start_int_set_rising_edge(SE_USB_I2C_INT);
 341                 start_int_ack(SE_USB_I2C_INT);
 342                 start_int_umask(SE_USB_I2C_INT);
 343
 344                 start_int_set_rising_edge(SE_USB_INT);
 345                 start_int_ack(SE_USB_INT);
 346                 start_int_umask(SE_USB_INT);
 347
 348                 start_int_set_rising_edge(SE_USB_NEED_CLK_INT);
 349                 start_int_ack(SE_USB_NEED_CLK_INT);
 350                 start_int_umask(SE_USB_NEED_CLK_INT);
 351
 352                 start_int_set_rising_edge(SE_USB_AHB_NEED_CLK_INT);
 353                 start_int_ack(SE_USB_AHB_NEED_CLK_INT);
 354                 start_int_umask(SE_USB_AHB_NEED_CLK_INT);
 355         }
 356 }
 357
 358 static void nxp_unset_usb_bits(void)
 359 {
 360         if (machine_is_pnx4008()) {
 361                 start_int_mask(SE_USB_OTG_ATX_INT_N);
 362                 start_int_mask(SE_USB_OTG_TIMER_INT);
 363                 start_int_mask(SE_USB_I2C_INT);
 364                 start_int_mask(SE_USB_INT);
 365                 start_int_mask(SE_USB_NEED_CLK_INT);
 366                 start_int_mask(SE_USB_AHB_NEED_CLK_INT);
 367         }
 368 }
 369
 370 static int __devinit usb_hcd_nxp_probe(struct platform_device *pdev)
 371 {
 372         struct usb_hcd *hcd = 0;
 373         struct ohci_hcd *ohci;
 374         const struct hc_driver *driver = &ohci_nxp_hc_driver;
 375         struct i2c_adapter *i2c_adap;
 376         struct i2c_board_info i2c_info;
 377
 378         int ret = 0, irq;
 379
 380         dev_dbg(&pdev->dev, "%s: " DRIVER_DESC " (nxp)\n", hcd_name);
 381         if (usb_disabled()) {
 382                 err("USB is disabled");
 383                 ret = -ENODEV;
 384                 goto out;
 385         }
 386
 387         if (pdev->num_resources != 2
 388             || pdev->resource[0].flags != IORESOURCE_MEM
 389             || pdev->resource[1].flags != IORESOURCE_IRQ) {
 390                 err("Invalid resource configuration");
 391                 ret = -ENODEV;
 392                 goto out;
 393         }
 394
 395         /* Enable AHB slave USB clock, needed for further USB clock control */
 396         __raw_writel(USB_SLAVE_HCLK_EN | (1 << 19), USB_CTRL);
 397
 398         ret = i2c_add_driver(&isp1301_driver);
 399         if (ret < 0) {
 400                 err("failed to add ISP1301 driver");
 401                 goto out;
 402         }
 403         i2c_adap = i2c_get_adapter(2);
 404         memset(&i2c_info, 0, sizeof(struct i2c_board_info));
 405         strlcpy(i2c_info.type, "isp1301_nxp", I2C_NAME_SIZE);
 406         isp1301_i2c_client = i2c_new_probed_device(i2c_adap, &i2c_info,
 407                                                    normal_i2c, NULL);
 408         i2c_put_adapter(i2c_adap);
 409         if (!isp1301_i2c_client) {
 410                 err("failed to connect I2C to ISP1301 USB Transceiver");
 411                 ret = -ENODEV;
 412                 goto out_i2c_driver;
 413         }
 414
 415         isp1301_configure();
 416
 417         /* Enable USB PLL */
 418         usb_clk = clk_get(&pdev->dev, "ck_pll5");
 419         if (IS_ERR(usb_clk)) {
 420                 err("failed to acquire USB PLL");
 421                 ret = PTR_ERR(usb_clk);
 422                 goto out1;
 423         }
 424
 425         ret = clk_enable(usb_clk);
 426         if (ret < 0) {
 427                 err("failed to start USB PLL");
 428                 goto out2;
 429         }
 430
 431         ret = clk_set_rate(usb_clk, 48000);
 432         if (ret < 0) {
 433                 err("failed to set USB clock rate");
 434                 goto out3;
 435         }
 436
 437         __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
 438
 439         /* Set to enable all needed USB clocks */
 440         __raw_writel(USB_CLOCK_MASK, USB_OTG_CLK_CTRL);
 441
 442         while ((__raw_readl(USB_OTG_CLK_STAT) & USB_CLOCK_MASK) !=
 443                USB_CLOCK_MASK) ;
 444
 445         hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev));
 446         if (!hcd) {
 447                 err("Failed to allocate HC buffer");
 448                 ret = -ENOMEM;
 449                 goto out3;
 450         }
 451
 452         /* Set all USB bits in the Start Enable register */
 453         nxp_set_usb_bits();
 454
 455         hcd->rsrc_start = pdev->resource[0].start;
 456         hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
 457         if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
 458                 dev_dbg(&pdev->dev, "request_mem_region failed\n");
 459                 ret =  -ENOMEM;
 460                 goto out4;
 461         }
 462         hcd->regs = (void __iomem *)pdev->resource[0].start;
 463
 464         irq = platform_get_irq(pdev, 0);
 465         if (irq < 0) {
 466                 ret = -ENXIO;
 467                 goto out4;
 468         }
 469
 470         nxp_start_hc();
 471         platform_set_drvdata(pdev, hcd);
 472         ohci = hcd_to_ohci(hcd);
 473         ohci_hcd_init(ohci);
 474
 475         dev_info(&pdev->dev, "at 0x%p, irq %d\n", hcd->regs, hcd->irq);
 476         ret = usb_add_hcd(hcd, irq, 0);
 477         if (ret == 0)
 478                 return ret;
 479
 480         nxp_stop_hc();
 481 out4:
 482         nxp_unset_usb_bits();
 483         usb_put_hcd(hcd);
 484 out3:
 485         clk_disable(usb_clk);
 486 out2:
 487         clk_put(usb_clk);
 488 out1:
 489         i2c_unregister_device(isp1301_i2c_client);
 490         isp1301_i2c_client = NULL;
 491 out_i2c_driver:
 492         i2c_del_driver(&isp1301_driver);
 493 out:
 494         return ret;
 495 }
 496
 497 static int usb_hcd_nxp_remove(struct platform_device *pdev)
 498 {
 499         struct usb_hcd *hcd = platform_get_drvdata(pdev);
 500
 501         usb_remove_hcd(hcd);
 502         nxp_stop_hc();
 503         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
 504         usb_put_hcd(hcd);
 505         nxp_unset_usb_bits();
 506         clk_disable(usb_clk);
 507         clk_put(usb_clk);
 508         i2c_unregister_device(isp1301_i2c_client);
 509         isp1301_i2c_client = NULL;
 510         i2c_del_driver(&isp1301_driver);
 511
 512         platform_set_drvdata(pdev, NULL);
 513
 514         return 0;
 515 }
 516
 517 /* work with hotplug and coldplug */
 518 MODULE_ALIAS("platform:usb-ohci");
 519
 520 static struct platform_driver usb_hcd_nxp_driver = {
 521         .driver = {
 522                 .name = "usb-ohci",
 523                 .owner  = THIS_MODULE,
 524         },
 525         .probe = usb_hcd_nxp_probe,
 526         .remove = usb_hcd_nxp_remove,
 527 };
 528