Pileus Git - ~andy/linux/blob - drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/ktime.h>
  35 #include <linux/list.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/usb.h>
  38 #include <linux/usb/hcd.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/debugfs.h>
  42 #include <linux/slab.h>
  43 #include <linux/uaccess.h>
  44
  45 #include <asm/byteorder.h>
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/system.h>
  49 #include <asm/unaligned.h>
  50
  51 #if defined(CONFIG_PPC_PS3)
  52 #include <asm/firmware.h>
  53 #endif
  54
  55 /*-------------------------------------------------------------------------*/
  56
  57 /*
  58  * EHCI hc_driver implementation ... experimental, incomplete.
  59  * Based on the final 1.0 register interface specification.
  60  *
  61  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  62  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  63  * Next comes "CardBay", using USB 2.0 signals.
  64  *
  65  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  66  * Special thanks to Intel and VIA for providing host controllers to
  67  * test this driver on, and Cypress (including In-System Design) for
  68  * providing early devices for those host controllers to talk to!
  69  */
  70
  71 #define DRIVER_AUTHOR "David Brownell"
  72 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  73
  74 static const char       hcd_name [] = "ehci_hcd";
  75
  76
  77 #undef VERBOSE_DEBUG
  78 #undef EHCI_URB_TRACE
  79
  80 #ifdef DEBUG
  81 #define EHCI_STATS
  82 #endif
  83
  84 /* magic numbers that can affect system performance */
  85 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  86 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  87 #define EHCI_TUNE_RL_TT         0
  88 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  89 #define EHCI_TUNE_MULT_TT       1
  90 /*
  91  * Some drivers think it's safe to schedule isochronous transfers more than
  92  * 256 ms into the future (partly as a result of an old bug in the scheduling
  93  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  94  * length of 512 frames instead of 256.
  95  */
  96 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  97
  98 #define EHCI_IAA_MSECS          10              /* arbitrary */
  99 #define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
 100 #define EHCI_ASYNC_JIFFIES      (HZ/20)         /* async idle timeout */
 101 #define EHCI_SHRINK_JIFFIES     (DIV_ROUND_UP(HZ, 200) + 1)
 102                                                 /* 5-ms async qh unlink delay */
 103
 104 /* Initial IRQ latency:  faster than hw default */
 105 static int log2_irq_thresh = 0;         // 0 to 6
 106 module_param (log2_irq_thresh, int, S_IRUGO);
 107 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
 108
 109 /* initial park setting:  slower than hw default */
 110 static unsigned park = 0;
 111 module_param (park, uint, S_IRUGO);
 112 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 113
 114 /* for flakey hardware, ignore overcurrent indicators */
 115 static int ignore_oc = 0;
 116 module_param (ignore_oc, bool, S_IRUGO);
 117 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 118
 119 /* for link power management(LPM) feature */
 120 static unsigned int hird;
 121 module_param(hird, int, S_IRUGO);
 122 MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
 123
 124 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 125
 126 /*-------------------------------------------------------------------------*/
 127
 128 #include "ehci.h"
 129 #include "ehci-dbg.c"
 130 #include "pci-quirks.h"
 131
 132 /*-------------------------------------------------------------------------*/
 133
 134 static void
 135 timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
 136 {
 137         /* Don't override timeouts which shrink or (later) disable
 138          * the async ring; just the I/O watchdog.  Note that if a
 139          * SHRINK were pending, OFF would never be requested.
 140          */
 141         if (timer_pending(&ehci->watchdog)
 142                         && ((BIT(TIMER_ASYNC_SHRINK) | BIT(TIMER_ASYNC_OFF))
 143                                 & ehci->actions))
 144                 return;
 145
 146         if (!test_and_set_bit(action, &ehci->actions)) {
 147                 unsigned long t;
 148
 149                 switch (action) {
 150                 case TIMER_IO_WATCHDOG:
 151                         if (!ehci->need_io_watchdog)
 152                                 return;
 153                         t = EHCI_IO_JIFFIES;
 154                         break;
 155                 case TIMER_ASYNC_OFF:
 156                         t = EHCI_ASYNC_JIFFIES;
 157                         break;
 158                 /* case TIMER_ASYNC_SHRINK: */
 159                 default:
 160                         t = EHCI_SHRINK_JIFFIES;
 161                         break;
 162                 }
 163                 mod_timer(&ehci->watchdog, t + jiffies);
 164         }
 165 }
 166
 167 /*-------------------------------------------------------------------------*/
 168
 169 /*
 170  * handshake - spin reading hc until handshake completes or fails
 171  * @ptr: address of hc register to be read
 172  * @mask: bits to look at in result of read
 173  * @done: value of those bits when handshake succeeds
 174  * @usec: timeout in microseconds
 175  *
 176  * Returns negative errno, or zero on success
 177  *
 178  * Success happens when the "mask" bits have the specified value (hardware
 179  * handshake done).  There are two failure modes:  "usec" have passed (major
 180  * hardware flakeout), or the register reads as all-ones (hardware removed).
 181  *
 182  * That last failure should_only happen in cases like physical cardbus eject
 183  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 184  * bridge shutdown:  shutting down the bridge before the devices using it.
 185  */
 186 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 187                       u32 mask, u32 done, int usec)
 188 {
 189         u32     result;
 190
 191         do {
 192                 result = ehci_readl(ehci, ptr);
 193                 if (result == ~(u32)0)          /* card removed */
 194                         return -ENODEV;
 195                 result &= mask;
 196                 if (result == done)
 197                         return 0;
 198                 udelay (1);
 199                 usec--;
 200         } while (usec > 0);
 201         return -ETIMEDOUT;
 202 }
 203
 204 /* check TDI/ARC silicon is in host mode */
 205 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 206 {
 207         u32 __iomem     *reg_ptr;
 208         u32             tmp;
 209
 210         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 211         tmp = ehci_readl(ehci, reg_ptr);
 212         return (tmp & 3) == USBMODE_CM_HC;
 213 }
 214
 215 /* force HC to halt state from unknown (EHCI spec section 2.3) */
 216 static int ehci_halt (struct ehci_hcd *ehci)
 217 {
 218         u32     temp = ehci_readl(ehci, &ehci->regs->status);
 219
 220         /* disable any irqs left enabled by previous code */
 221         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 222
 223         if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
 224                 return 0;
 225         }
 226
 227         if ((temp & STS_HALT) != 0)
 228                 return 0;
 229
 230         temp = ehci_readl(ehci, &ehci->regs->command);
 231         temp &= ~CMD_RUN;
 232         ehci_writel(ehci, temp, &ehci->regs->command);
 233         return handshake (ehci, &ehci->regs->status,
 234                           STS_HALT, STS_HALT, 16 * 125);
 235 }
 236
 237 #if defined(CONFIG_USB_SUSPEND) && defined(CONFIG_PPC_PS3)
 238
 239 /*
 240  * The EHCI controller of the Cell Super Companion Chip used in the
 241  * PS3 will stop the root hub after all root hub ports are suspended.
 242  * When in this condition handshake will return -ETIMEDOUT.  The
 243  * STS_HLT bit will not be set, so inspection of the frame index is
 244  * used here to test for the condition.  If the condition is found
 245  * return success to allow the USB suspend to complete.
 246  */
 247
 248 static int handshake_for_broken_root_hub(struct ehci_hcd *ehci,
 249                                          void __iomem *ptr, u32 mask, u32 done,
 250                                          int usec)
 251 {
 252         unsigned int old_index;
 253         int error;
 254
 255         if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
 256                 return -ETIMEDOUT;
 257
 258         old_index = ehci_read_frame_index(ehci);
 259
 260         error = handshake(ehci, ptr, mask, done, usec);
 261
 262         if (error == -ETIMEDOUT && ehci_read_frame_index(ehci) == old_index)
 263                 return 0;
 264
 265         return error;
 266 }
 267
 268 #else
 269
 270 static int handshake_for_broken_root_hub(struct ehci_hcd *ehci,
 271                                          void __iomem *ptr, u32 mask, u32 done,
 272                                          int usec)
 273 {
 274         return -ETIMEDOUT;
 275 }
 276
 277 #endif
 278
 279 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
 280                                        u32 mask, u32 done, int usec)
 281 {
 282         int error;
 283
 284         error = handshake(ehci, ptr, mask, done, usec);
 285         if (error == -ETIMEDOUT)
 286                 error = handshake_for_broken_root_hub(ehci, ptr, mask, done,
 287                                                       usec);
 288
 289         if (error) {
 290                 ehci_halt(ehci);
 291                 ehci->rh_state = EHCI_RH_HALTED;
 292                 ehci_err(ehci, "force halt; handshake %p %08x %08x -> %d\n",
 293                         ptr, mask, done, error);
 294         }
 295
 296         return error;
 297 }
 298
 299 /* put TDI/ARC silicon into EHCI mode */
 300 static void tdi_reset (struct ehci_hcd *ehci)
 301 {
 302         u32 __iomem     *reg_ptr;
 303         u32             tmp;
 304
 305         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 306         tmp = ehci_readl(ehci, reg_ptr);
 307         tmp |= USBMODE_CM_HC;
 308         /* The default byte access to MMR space is LE after
 309          * controller reset. Set the required endian mode
 310          * for transfer buffers to match the host microprocessor
 311          */
 312         if (ehci_big_endian_mmio(ehci))
 313                 tmp |= USBMODE_BE;
 314         ehci_writel(ehci, tmp, reg_ptr);
 315 }
 316
 317 /* reset a non-running (STS_HALT == 1) controller */
 318 static int ehci_reset (struct ehci_hcd *ehci)
 319 {
 320         int     retval;
 321         u32     command = ehci_readl(ehci, &ehci->regs->command);
 322
 323         /* If the EHCI debug controller is active, special care must be
 324          * taken before and after a host controller reset */
 325         if (ehci->debug && !dbgp_reset_prep())
 326                 ehci->debug = NULL;
 327
 328         command |= CMD_RESET;
 329         dbg_cmd (ehci, "reset", command);
 330         ehci_writel(ehci, command, &ehci->regs->command);
 331         ehci->rh_state = EHCI_RH_HALTED;
 332         ehci->next_statechange = jiffies;
 333         retval = handshake (ehci, &ehci->regs->command,
 334                             CMD_RESET, 0, 250 * 1000);
 335
 336         if (ehci->has_hostpc) {
 337                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 338                         (u32 __iomem *)(((u8 *)ehci->regs) + USBMODE_EX));
 339                 ehci_writel(ehci, TXFIFO_DEFAULT,
 340                         (u32 __iomem *)(((u8 *)ehci->regs) + TXFILLTUNING));
 341         }
 342         if (retval)
 343                 return retval;
 344
 345         if (ehci_is_TDI(ehci))
 346                 tdi_reset (ehci);
 347
 348         if (ehci->debug)
 349                 dbgp_external_startup();
 350
 351         return retval;
 352 }
 353
 354 /* idle the controller (from running) */
 355 static void ehci_quiesce (struct ehci_hcd *ehci)
 356 {
 357         u32     temp;
 358
 359 #ifdef DEBUG
 360         if (ehci->rh_state != EHCI_RH_RUNNING)
 361                 BUG ();
 362 #endif
 363
 364         /* wait for any schedule enables/disables to take effect */
 365         temp = ehci_readl(ehci, &ehci->regs->command) << 10;
 366         temp &= STS_ASS | STS_PSS;
 367         if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
 368                                         STS_ASS | STS_PSS, temp, 16 * 125))
 369                 return;
 370
 371         /* then disable anything that's still active */
 372         temp = ehci_readl(ehci, &ehci->regs->command);
 373         temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
 374         ehci_writel(ehci, temp, &ehci->regs->command);
 375
 376         /* hardware can take 16 microframes to turn off ... */
 377         handshake_on_error_set_halt(ehci, &ehci->regs->status,
 378                                     STS_ASS | STS_PSS, 0, 16 * 125);
 379 }
 380
 381 /*-------------------------------------------------------------------------*/
 382
 383 static void end_unlink_async(struct ehci_hcd *ehci);
 384 static void ehci_work(struct ehci_hcd *ehci);
 385
 386 #include "ehci-hub.c"
 387 #include "ehci-lpm.c"
 388 #include "ehci-mem.c"
 389 #include "ehci-q.c"
 390 #include "ehci-sched.c"
 391 #include "ehci-sysfs.c"
 392
 393 /*-------------------------------------------------------------------------*/
 394
 395 static void ehci_iaa_watchdog(unsigned long param)
 396 {
 397         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 398         unsigned long           flags;
 399
 400         spin_lock_irqsave (&ehci->lock, flags);
 401
 402         /* Lost IAA irqs wedge things badly; seen first with a vt8235.
 403          * So we need this watchdog, but must protect it against both
 404          * (a) SMP races against real IAA firing and retriggering, and
 405          * (b) clean HC shutdown, when IAA watchdog was pending.
 406          */
 407         if (ehci->reclaim
 408                         && !timer_pending(&ehci->iaa_watchdog)
 409                         && ehci->rh_state == EHCI_RH_RUNNING) {
 410                 u32 cmd, status;
 411
 412                 /* If we get here, IAA is *REALLY* late.  It's barely
 413                  * conceivable that the system is so busy that CMD_IAAD
 414                  * is still legitimately set, so let's be sure it's
 415                  * clear before we read STS_IAA.  (The HC should clear
 416                  * CMD_IAAD when it sets STS_IAA.)
 417                  */
 418                 cmd = ehci_readl(ehci, &ehci->regs->command);
 419                 if (cmd & CMD_IAAD)
 420                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 421                                         &ehci->regs->command);
 422
 423                 /* If IAA is set here it either legitimately triggered
 424                  * before we cleared IAAD above (but _way_ late, so we'll
 425                  * still count it as lost) ... or a silicon erratum:
 426                  * - VIA seems to set IAA without triggering the IRQ;
 427                  * - IAAD potentially cleared without setting IAA.
 428                  */
 429                 status = ehci_readl(ehci, &ehci->regs->status);
 430                 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
 431                         COUNT (ehci->stats.lost_iaa);
 432                         ehci_writel(ehci, STS_IAA, &ehci->regs->status);
 433                 }
 434
 435                 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
 436                                 status, cmd);
 437                 end_unlink_async(ehci);
 438         }
 439
 440         spin_unlock_irqrestore(&ehci->lock, flags);
 441 }
 442
 443 static void ehci_watchdog(unsigned long param)
 444 {
 445         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 446         unsigned long           flags;
 447
 448         spin_lock_irqsave(&ehci->lock, flags);
 449
 450         /* stop async processing after it's idled a bit */
 451         if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
 452                 start_unlink_async (ehci, ehci->async);
 453
 454         /* ehci could run by timer, without IRQs ... */
 455         ehci_work (ehci);
 456
 457         spin_unlock_irqrestore (&ehci->lock, flags);
 458 }
 459
 460 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 461  * The firmware seems to think that powering off is a wakeup event!
 462  * This routine turns off remote wakeup and everything else, on all ports.
 463  */
 464 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 465 {
 466         int     port = HCS_N_PORTS(ehci->hcs_params);
 467
 468         while (port--)
 469                 ehci_writel(ehci, PORT_RWC_BITS,
 470                                 &ehci->regs->port_status[port]);
 471 }
 472
 473 /*
 474  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 475  * Should be called with ehci->lock held.
 476  */
 477 static void ehci_silence_controller(struct ehci_hcd *ehci)
 478 {
 479         ehci_halt(ehci);
 480         ehci_turn_off_all_ports(ehci);
 481
 482         /* make BIOS/etc use companion controller during reboot */
 483         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 484
 485         /* unblock posted writes */
 486         ehci_readl(ehci, &ehci->regs->configured_flag);
 487 }
 488
 489 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 490  * This forcibly disables dma and IRQs, helping kexec and other cases
 491  * where the next system software may expect clean state.
 492  */
 493 static void ehci_shutdown(struct usb_hcd *hcd)
 494 {
 495         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 496
 497         del_timer_sync(&ehci->watchdog);
 498         del_timer_sync(&ehci->iaa_watchdog);
 499
 500         spin_lock_irq(&ehci->lock);
 501         ehci_silence_controller(ehci);
 502         spin_unlock_irq(&ehci->lock);
 503 }
 504
 505 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
 506 {
 507         unsigned port;
 508
 509         if (!HCS_PPC (ehci->hcs_params))
 510                 return;
 511
 512         ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
 513         for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
 514                 (void) ehci_hub_control(ehci_to_hcd(ehci),
 515                                 is_on ? SetPortFeature : ClearPortFeature,
 516                                 USB_PORT_FEAT_POWER,
 517                                 port--, NULL, 0);
 518         /* Flush those writes */
 519         ehci_readl(ehci, &ehci->regs->command);
 520         msleep(20);
 521 }
 522
 523 /*-------------------------------------------------------------------------*/
 524
 525 /*
 526  * ehci_work is called from some interrupts, timers, and so on.
 527  * it calls driver completion functions, after dropping ehci->lock.
 528  */
 529 static void ehci_work (struct ehci_hcd *ehci)
 530 {
 531         timer_action_done (ehci, TIMER_IO_WATCHDOG);
 532
 533         /* another CPU may drop ehci->lock during a schedule scan while
 534          * it reports urb completions.  this flag guards against bogus
 535          * attempts at re-entrant schedule scanning.
 536          */
 537         if (ehci->scanning)
 538                 return;
 539         ehci->scanning = 1;
 540         scan_async (ehci);
 541         if (ehci->next_uframe != -1)
 542                 scan_periodic (ehci);
 543         ehci->scanning = 0;
 544
 545         /* the IO watchdog guards against hardware or driver bugs that
 546          * misplace IRQs, and should let us run completely without IRQs.
 547          * such lossage has been observed on both VT6202 and VT8235.
 548          */
 549         if (ehci->rh_state == EHCI_RH_RUNNING &&
 550                         (ehci->async->qh_next.ptr != NULL ||
 551                          ehci->periodic_sched != 0))
 552                 timer_action (ehci, TIMER_IO_WATCHDOG);
 553 }
 554
 555 /*
 556  * Called when the ehci_hcd module is removed.
 557  */
 558 static void ehci_stop (struct usb_hcd *hcd)
 559 {
 560         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 561
 562         ehci_dbg (ehci, "stop\n");
 563
 564         /* no more interrupts ... */
 565         del_timer_sync (&ehci->watchdog);
 566         del_timer_sync(&ehci->iaa_watchdog);
 567
 568         spin_lock_irq(&ehci->lock);
 569         if (ehci->rh_state == EHCI_RH_RUNNING)
 570                 ehci_quiesce (ehci);
 571
 572         ehci_silence_controller(ehci);
 573         ehci_reset (ehci);
 574         spin_unlock_irq(&ehci->lock);
 575
 576         remove_sysfs_files(ehci);
 577         remove_debug_files (ehci);
 578
 579         /* root hub is shut down separately (first, when possible) */
 580         spin_lock_irq (&ehci->lock);
 581         if (ehci->async)
 582                 ehci_work (ehci);
 583         spin_unlock_irq (&ehci->lock);
 584         ehci_mem_cleanup (ehci);
 585
 586         if (ehci->amd_pll_fix == 1)
 587                 usb_amd_dev_put();
 588
 589 #ifdef  EHCI_STATS
 590         ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
 591                 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
 592                 ehci->stats.lost_iaa);
 593         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 594                 ehci->stats.complete, ehci->stats.unlink);
 595 #endif
 596
 597         dbg_status (ehci, "ehci_stop completed",
 598                     ehci_readl(ehci, &ehci->regs->status));
 599 }
 600
 601 /* one-time init, only for memory state */
 602 static int ehci_init(struct usb_hcd *hcd)
 603 {
 604         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 605         u32                     temp;
 606         int                     retval;
 607         u32                     hcc_params;
 608         struct ehci_qh_hw       *hw;
 609
 610         spin_lock_init(&ehci->lock);
 611
 612         /*
 613          * keep io watchdog by default, those good HCDs could turn off it later
 614          */
 615         ehci->need_io_watchdog = 1;
 616         init_timer(&ehci->watchdog);
 617         ehci->watchdog.function = ehci_watchdog;
 618         ehci->watchdog.data = (unsigned long) ehci;
 619
 620         init_timer(&ehci->iaa_watchdog);
 621         ehci->iaa_watchdog.function = ehci_iaa_watchdog;
 622         ehci->iaa_watchdog.data = (unsigned long) ehci;
 623
 624         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 625
 626         /*
 627          * by default set standard 80% (== 100 usec/uframe) max periodic
 628          * bandwidth as required by USB 2.0
 629          */
 630         ehci->uframe_periodic_max = 100;
 631
 632         /*
 633          * hw default: 1K periodic list heads, one per frame.
 634          * periodic_size can shrink by USBCMD update if hcc_params allows.
 635          */
 636         ehci->periodic_size = DEFAULT_I_TDPS;
 637         INIT_LIST_HEAD(&ehci->cached_itd_list);
 638         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 639
 640         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 641                 /* periodic schedule size can be smaller than default */
 642                 switch (EHCI_TUNE_FLS) {
 643                 case 0: ehci->periodic_size = 1024; break;
 644                 case 1: ehci->periodic_size = 512; break;
 645                 case 2: ehci->periodic_size = 256; break;
 646                 default:        BUG();
 647                 }
 648         }
 649         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 650                 return retval;
 651
 652         /* controllers may cache some of the periodic schedule ... */
 653         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 654                 ehci->i_thresh = 2 + 8;
 655         else                                    // N microframes cached
 656                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 657
 658         ehci->reclaim = NULL;
 659         ehci->next_uframe = -1;
 660         ehci->clock_frame = -1;
 661
 662         /*
 663          * dedicate a qh for the async ring head, since we couldn't unlink
 664          * a 'real' qh without stopping the async schedule [4.8].  use it
 665          * as the 'reclamation list head' too.
 666          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 667          * from automatically advancing to the next td after short reads.
 668          */
 669         ehci->async->qh_next.qh = NULL;
 670         hw = ehci->async->hw;
 671         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 672         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 673         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 674         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 675         ehci->async->qh_state = QH_STATE_LINKED;
 676         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 677
 678         /* clear interrupt enables, set irq latency */
 679         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 680                 log2_irq_thresh = 0;
 681         temp = 1 << (16 + log2_irq_thresh);
 682         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 683                 ehci->has_ppcd = 1;
 684                 ehci_dbg(ehci, "enable per-port change event\n");
 685                 temp |= CMD_PPCEE;
 686         }
 687         if (HCC_CANPARK(hcc_params)) {
 688                 /* HW default park == 3, on hardware that supports it (like
 689                  * NVidia and ALI silicon), maximizes throughput on the async
 690                  * schedule by avoiding QH fetches between transfers.
 691                  *
 692                  * With fast usb storage devices and NForce2, "park" seems to
 693                  * make problems:  throughput reduction (!), data errors...
 694                  */
 695                 if (park) {
 696                         park = min(park, (unsigned) 3);
 697                         temp |= CMD_PARK;
 698                         temp |= park << 8;
 699                 }
 700                 ehci_dbg(ehci, "park %d\n", park);
 701         }
 702         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 703                 /* periodic schedule size can be smaller than default */
 704                 temp &= ~(3 << 2);
 705                 temp |= (EHCI_TUNE_FLS << 2);
 706         }
 707         if (HCC_LPM(hcc_params)) {
 708                 /* support link power management EHCI 1.1 addendum */
 709                 ehci_dbg(ehci, "support lpm\n");
 710                 ehci->has_lpm = 1;
 711                 if (hird > 0xf) {
 712                         ehci_dbg(ehci, "hird %d invalid, use default 0",
 713                         hird);
 714                         hird = 0;
 715                 }
 716                 temp |= hird << 24;
 717         }
 718         ehci->command = temp;
 719
 720         /* Accept arbitrarily long scatter-gather lists */
 721         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 722                 hcd->self.sg_tablesize = ~0;
 723         return 0;
 724 }
 725
 726 /* start HC running; it's halted, ehci_init() has been run (once) */
 727 static int ehci_run (struct usb_hcd *hcd)
 728 {
 729         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 730         u32                     temp;
 731         u32                     hcc_params;
 732
 733         hcd->uses_new_polling = 1;
 734
 735         /* EHCI spec section 4.1 */
 736
 737         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 738         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 739
 740         /*
 741          * hcc_params controls whether ehci->regs->segment must (!!!)
 742          * be used; it constrains QH/ITD/SITD and QTD locations.
 743          * pci_pool consistent memory always uses segment zero.
 744          * streaming mappings for I/O buffers, like pci_map_single(),
 745          * can return segments above 4GB, if the device allows.
 746          *
 747          * NOTE:  the dma mask is visible through dma_supported(), so
 748          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 749          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 750          * host side drivers though.
 751          */
 752         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 753         if (HCC_64BIT_ADDR(hcc_params)) {
 754                 ehci_writel(ehci, 0, &ehci->regs->segment);
 755 #if 0
 756 // this is deeply broken on almost all architectures
 757                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 758                         ehci_info(ehci, "enabled 64bit DMA\n");
 759 #endif
 760         }
 761
 762
 763         // Philips, Intel, and maybe others need CMD_RUN before the
 764         // root hub will detect new devices (why?); NEC doesn't
 765         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 766         ehci->command |= CMD_RUN;
 767         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 768         dbg_cmd (ehci, "init", ehci->command);
 769
 770         /*
 771          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 772          * are explicitly handed to companion controller(s), so no TT is
 773          * involved with the root hub.  (Except where one is integrated,
 774          * and there's no companion controller unless maybe for USB OTG.)
 775          *
 776          * Turning on the CF flag will transfer ownership of all ports
 777          * from the companions to the EHCI controller.  If any of the
 778          * companions are in the middle of a port reset at the time, it
 779          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 780          * guarantees that no resets are in progress.  After we set CF,
 781          * a short delay lets the hardware catch up; new resets shouldn't
 782          * be started before the port switching actions could complete.
 783          */
 784         down_write(&ehci_cf_port_reset_rwsem);
 785         ehci->rh_state = EHCI_RH_RUNNING;
 786         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 787         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 788         msleep(5);
 789         up_write(&ehci_cf_port_reset_rwsem);
 790         ehci->last_periodic_enable = ktime_get_real();
 791
 792         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 793         ehci_info (ehci,
 794                 "USB %x.%x started, EHCI %x.%02x%s\n",
 795                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 796                 temp >> 8, temp & 0xff,
 797                 ignore_oc ? ", overcurrent ignored" : "");
 798
 799         ehci_writel(ehci, INTR_MASK,
 800                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 801
 802         /* GRR this is run-once init(), being done every time the HC starts.
 803          * So long as they're part of class devices, we can't do it init()
 804          * since the class device isn't created that early.
 805          */
 806         create_debug_files(ehci);
 807         create_sysfs_files(ehci);
 808
 809         return 0;
 810 }
 811
 812 static int __maybe_unused ehci_setup (struct usb_hcd *hcd)
 813 {
 814         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 815         int retval;
 816
 817         ehci->regs = (void __iomem *)ehci->caps +
 818             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 819         dbg_hcs_params(ehci, "reset");
 820         dbg_hcc_params(ehci, "reset");
 821
 822         /* cache this readonly data; minimize chip reads */
 823         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 824
 825         ehci->sbrn = HCD_USB2;
 826
 827         retval = ehci_halt(ehci);
 828         if (retval)
 829                 return retval;
 830
 831         /* data structure init */
 832         retval = ehci_init(hcd);
 833         if (retval)
 834                 return retval;
 835
 836         ehci_reset(ehci);
 837
 838         return 0;
 839 }
 840
 841 /*-------------------------------------------------------------------------*/
 842
 843 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 844 {
 845         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 846         u32                     status, masked_status, pcd_status = 0, cmd;
 847         int                     bh;
 848
 849         spin_lock (&ehci->lock);
 850
 851         status = ehci_readl(ehci, &ehci->regs->status);
 852
 853         /* e.g. cardbus physical eject */
 854         if (status == ~(u32) 0) {
 855                 ehci_dbg (ehci, "device removed\n");
 856                 goto dead;
 857         }
 858
 859         /* Shared IRQ? */
 860         masked_status = status & INTR_MASK;
 861         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 862                 spin_unlock(&ehci->lock);
 863                 return IRQ_NONE;
 864         }
 865
 866         /* clear (just) interrupts */
 867         ehci_writel(ehci, masked_status, &ehci->regs->status);
 868         cmd = ehci_readl(ehci, &ehci->regs->command);
 869         bh = 0;
 870
 871 #ifdef  VERBOSE_DEBUG
 872         /* unrequested/ignored: Frame List Rollover */
 873         dbg_status (ehci, "irq", status);
 874 #endif
 875
 876         /* INT, ERR, and IAA interrupt rates can be throttled */
 877
 878         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 879         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 880                 if (likely ((status & STS_ERR) == 0))
 881                         COUNT (ehci->stats.normal);
 882                 else
 883                         COUNT (ehci->stats.error);
 884                 bh = 1;
 885         }
 886
 887         /* complete the unlinking of some qh [4.15.2.3] */
 888         if (status & STS_IAA) {
 889                 /* guard against (alleged) silicon errata */
 890                 if (cmd & CMD_IAAD) {
 891                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 892                                         &ehci->regs->command);
 893                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 894                 }
 895                 if (ehci->reclaim) {
 896                         COUNT(ehci->stats.reclaim);
 897                         end_unlink_async(ehci);
 898                 } else
 899                         ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
 900         }
 901
 902         /* remote wakeup [4.3.1] */
 903         if (status & STS_PCD) {
 904                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 905                 u32             ppcd = 0;
 906
 907                 /* kick root hub later */
 908                 pcd_status = status;
 909
 910                 /* resume root hub? */
 911                 if (!(cmd & CMD_RUN))
 912                         usb_hcd_resume_root_hub(hcd);
 913
 914                 /* get per-port change detect bits */
 915                 if (ehci->has_ppcd)
 916                         ppcd = status >> 16;
 917
 918                 while (i--) {
 919                         int pstatus;
 920
 921                         /* leverage per-port change bits feature */
 922                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
 923                                 continue;
 924                         pstatus = ehci_readl(ehci,
 925                                          &ehci->regs->port_status[i]);
 926
 927                         if (pstatus & PORT_OWNER)
 928                                 continue;
 929                         if (!(test_bit(i, &ehci->suspended_ports) &&
 930                                         ((pstatus & PORT_RESUME) ||
 931                                                 !(pstatus & PORT_SUSPEND)) &&
 932                                         (pstatus & PORT_PE) &&
 933                                         ehci->reset_done[i] == 0))
 934                                 continue;
 935
 936                         /* start 20 msec resume signaling from this port,
 937                          * and make khubd collect PORT_STAT_C_SUSPEND to
 938                          * stop that signaling.  Use 5 ms extra for safety,
 939                          * like usb_port_resume() does.
 940                          */
 941                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 942                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 943                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 944                 }
 945         }
 946
 947         /* PCI errors [4.15.2.4] */
 948         if (unlikely ((status & STS_FATAL) != 0)) {
 949                 ehci_err(ehci, "fatal error\n");
 950                 dbg_cmd(ehci, "fatal", cmd);
 951                 dbg_status(ehci, "fatal", status);
 952                 ehci_halt(ehci);
 953 dead:
 954                 ehci_reset(ehci);
 955                 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 956                 usb_hc_died(hcd);
 957                 /* generic layer kills/unlinks all urbs, then
 958                  * uses ehci_stop to clean up the rest
 959                  */
 960                 bh = 1;
 961         }
 962
 963         if (bh)
 964                 ehci_work (ehci);
 965         spin_unlock (&ehci->lock);
 966         if (pcd_status)
 967                 usb_hcd_poll_rh_status(hcd);
 968         return IRQ_HANDLED;
 969 }
 970
 971 /*-------------------------------------------------------------------------*/
 972
 973 /*
 974  * non-error returns are a promise to giveback() the urb later
 975  * we drop ownership so next owner (or urb unlink) can get it
 976  *
 977  * urb + dev is in hcd.self.controller.urb_list
 978  * we're queueing TDs onto software and hardware lists
 979  *
 980  * hcd-specific init for hcpriv hasn't been done yet
 981  *
 982  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 983  * to a (possibly active) QH, and the same QH scanning code.
 984  */
 985 static int ehci_urb_enqueue (
 986         struct usb_hcd  *hcd,
 987         struct urb      *urb,
 988         gfp_t           mem_flags
 989 ) {
 990         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 991         struct list_head        qtd_list;
 992
 993         INIT_LIST_HEAD (&qtd_list);
 994
 995         switch (usb_pipetype (urb->pipe)) {
 996         case PIPE_CONTROL:
 997                 /* qh_completions() code doesn't handle all the fault cases
 998                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 999                  */
1000                 if (urb->transfer_buffer_length > (16 * 1024))
1001                         return -EMSGSIZE;
1002                 /* FALLTHROUGH */
1003         /* case PIPE_BULK: */
1004         default:
1005                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
1006                         return -ENOMEM;
1007                 return submit_async(ehci, urb, &qtd_list, mem_flags);
1008
1009         case PIPE_INTERRUPT:
1010                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
1011                         return -ENOMEM;
1012                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
1013
1014         case PIPE_ISOCHRONOUS:
1015                 if (urb->dev->speed == USB_SPEED_HIGH)
1016                         return itd_submit (ehci, urb, mem_flags);
1017                 else
1018                         return sitd_submit (ehci, urb, mem_flags);
1019         }
1020 }
1021
1022 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1023 {
1024         /* failfast */
1025         if (ehci->rh_state != EHCI_RH_RUNNING && ehci->reclaim)
1026                 end_unlink_async(ehci);
1027
1028         /* If the QH isn't linked then there's nothing we can do
1029          * unless we were called during a giveback, in which case
1030          * qh_completions() has to deal with it.
1031          */
1032         if (qh->qh_state != QH_STATE_LINKED) {
1033                 if (qh->qh_state == QH_STATE_COMPLETING)
1034                         qh->needs_rescan = 1;
1035                 return;
1036         }
1037
1038         /* defer till later if busy */
1039         if (ehci->reclaim) {
1040                 struct ehci_qh          *last;
1041
1042                 for (last = ehci->reclaim;
1043                                 last->reclaim;
1044                                 last = last->reclaim)
1045                         continue;
1046                 qh->qh_state = QH_STATE_UNLINK_WAIT;
1047                 last->reclaim = qh;
1048
1049         /* start IAA cycle */
1050         } else
1051                 start_unlink_async (ehci, qh);
1052 }
1053
1054 /* remove from hardware lists
1055  * completions normally happen asynchronously
1056  */
1057
1058 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1059 {
1060         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1061         struct ehci_qh          *qh;
1062         unsigned long           flags;
1063         int                     rc;
1064
1065         spin_lock_irqsave (&ehci->lock, flags);
1066         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
1067         if (rc)
1068                 goto done;
1069
1070         switch (usb_pipetype (urb->pipe)) {
1071         // case PIPE_CONTROL:
1072         // case PIPE_BULK:
1073         default:
1074                 qh = (struct ehci_qh *) urb->hcpriv;
1075                 if (!qh)
1076                         break;
1077                 switch (qh->qh_state) {
1078                 case QH_STATE_LINKED:
1079                 case QH_STATE_COMPLETING:
1080                         unlink_async(ehci, qh);
1081                         break;
1082                 case QH_STATE_UNLINK:
1083                 case QH_STATE_UNLINK_WAIT:
1084                         /* already started */
1085                         break;
1086                 case QH_STATE_IDLE:
1087                         /* QH might be waiting for a Clear-TT-Buffer */
1088                         qh_completions(ehci, qh);
1089                         break;
1090                 }
1091                 break;
1092
1093         case PIPE_INTERRUPT:
1094                 qh = (struct ehci_qh *) urb->hcpriv;
1095                 if (!qh)
1096                         break;
1097                 switch (qh->qh_state) {
1098                 case QH_STATE_LINKED:
1099                 case QH_STATE_COMPLETING:
1100                         intr_deschedule (ehci, qh);
1101                         break;
1102                 case QH_STATE_IDLE:
1103                         qh_completions (ehci, qh);
1104                         break;
1105                 default:
1106                         ehci_dbg (ehci, "bogus qh %p state %d\n",
1107                                         qh, qh->qh_state);
1108                         goto done;
1109                 }
1110                 break;
1111
1112         case PIPE_ISOCHRONOUS:
1113                 // itd or sitd ...
1114
1115                 // wait till next completion, do it then.
1116                 // completion irqs can wait up to 1024 msec,
1117                 break;
1118         }
1119 done:
1120         spin_unlock_irqrestore (&ehci->lock, flags);
1121         return rc;
1122 }
1123
1124 /*-------------------------------------------------------------------------*/
1125
1126 // bulk qh holds the data toggle
1127
1128 static void
1129 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1130 {
1131         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1132         unsigned long           flags;
1133         struct ehci_qh          *qh, *tmp;
1134
1135         /* ASSERT:  any requests/urbs are being unlinked */
1136         /* ASSERT:  nobody can be submitting urbs for this any more */
1137
1138 rescan:
1139         spin_lock_irqsave (&ehci->lock, flags);
1140         qh = ep->hcpriv;
1141         if (!qh)
1142                 goto done;
1143
1144         /* endpoints can be iso streams.  for now, we don't
1145          * accelerate iso completions ... so spin a while.
1146          */
1147         if (qh->hw == NULL) {
1148                 ehci_vdbg (ehci, "iso delay\n");
1149                 goto idle_timeout;
1150         }
1151
1152         if (ehci->rh_state != EHCI_RH_RUNNING)
1153                 qh->qh_state = QH_STATE_IDLE;
1154         switch (qh->qh_state) {
1155         case QH_STATE_LINKED:
1156         case QH_STATE_COMPLETING:
1157                 for (tmp = ehci->async->qh_next.qh;
1158                                 tmp && tmp != qh;
1159                                 tmp = tmp->qh_next.qh)
1160                         continue;
1161                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
1162                  * may already be unlinked.
1163                  */
1164                 if (tmp)
1165                         unlink_async(ehci, qh);
1166                 /* FALL THROUGH */
1167         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1168         case QH_STATE_UNLINK_WAIT:
1169 idle_timeout:
1170                 spin_unlock_irqrestore (&ehci->lock, flags);
1171                 schedule_timeout_uninterruptible(1);
1172                 goto rescan;
1173         case QH_STATE_IDLE:             /* fully unlinked */
1174                 if (qh->clearing_tt)
1175                         goto idle_timeout;
1176                 if (list_empty (&qh->qtd_list)) {
1177                         qh_put (qh);
1178                         break;
1179                 }
1180                 /* else FALL THROUGH */
1181         default:
1182                 /* caller was supposed to have unlinked any requests;
1183                  * that's not our job.  just leak this memory.
1184                  */
1185                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1186                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1187                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1188                 break;
1189         }
1190         ep->hcpriv = NULL;
1191 done:
1192         spin_unlock_irqrestore (&ehci->lock, flags);
1193 }
1194
1195 static void
1196 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1197 {
1198         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1199         struct ehci_qh          *qh;
1200         int                     eptype = usb_endpoint_type(&ep->desc);
1201         int                     epnum = usb_endpoint_num(&ep->desc);
1202         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1203         unsigned long           flags;
1204
1205         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1206                 return;
1207
1208         spin_lock_irqsave(&ehci->lock, flags);
1209         qh = ep->hcpriv;
1210
1211         /* For Bulk and Interrupt endpoints we maintain the toggle state
1212          * in the hardware; the toggle bits in udev aren't used at all.
1213          * When an endpoint is reset by usb_clear_halt() we must reset
1214          * the toggle bit in the QH.
1215          */
1216         if (qh) {
1217                 usb_settoggle(qh->dev, epnum, is_out, 0);
1218                 if (!list_empty(&qh->qtd_list)) {
1219                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1220                 } else if (qh->qh_state == QH_STATE_LINKED ||
1221                                 qh->qh_state == QH_STATE_COMPLETING) {
1222
1223                         /* The toggle value in the QH can't be updated
1224                          * while the QH is active.  Unlink it now;
1225                          * re-linking will call qh_refresh().
1226                          */
1227                         if (eptype == USB_ENDPOINT_XFER_BULK)
1228                                 unlink_async(ehci, qh);
1229                         else
1230                                 intr_deschedule(ehci, qh);
1231                 }
1232         }
1233         spin_unlock_irqrestore(&ehci->lock, flags);
1234 }
1235
1236 static int ehci_get_frame (struct usb_hcd *hcd)
1237 {
1238         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1239         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1240 }
1241
1242 /*-------------------------------------------------------------------------*/
1243
1244 MODULE_DESCRIPTION(DRIVER_DESC);
1245 MODULE_AUTHOR (DRIVER_AUTHOR);
1246 MODULE_LICENSE ("GPL");
1247
1248 #ifdef CONFIG_PCI
1249 #include "ehci-pci.c"
1250 #define PCI_DRIVER              ehci_pci_driver
1251 #endif
1252
1253 #ifdef CONFIG_USB_EHCI_FSL
1254 #include "ehci-fsl.c"
1255 #define PLATFORM_DRIVER         ehci_fsl_driver
1256 #endif
1257
1258 #ifdef CONFIG_USB_EHCI_MXC
1259 #include "ehci-mxc.c"
1260 #define PLATFORM_DRIVER         ehci_mxc_driver
1261 #endif
1262
1263 #ifdef CONFIG_USB_EHCI_SH
1264 #include "ehci-sh.c"
1265 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1266 #endif
1267
1268 #ifdef CONFIG_MIPS_ALCHEMY
1269 #include "ehci-au1xxx.c"
1270 #define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1271 #endif
1272
1273 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1274 #include "ehci-omap.c"
1275 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1276 #endif
1277
1278 #ifdef CONFIG_PPC_PS3
1279 #include "ehci-ps3.c"
1280 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1281 #endif
1282
1283 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1284 #include "ehci-ppc-of.c"
1285 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1286 #endif
1287
1288 #ifdef CONFIG_XPS_USB_HCD_XILINX
1289 #include "ehci-xilinx-of.c"
1290 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1291 #endif
1292
1293 #ifdef CONFIG_PLAT_ORION
1294 #include "ehci-orion.c"
1295 #define PLATFORM_DRIVER         ehci_orion_driver
1296 #endif
1297
1298 #ifdef CONFIG_ARCH_IXP4XX
1299 #include "ehci-ixp4xx.c"
1300 #define PLATFORM_DRIVER         ixp4xx_ehci_driver
1301 #endif
1302
1303 #ifdef CONFIG_USB_W90X900_EHCI
1304 #include "ehci-w90x900.c"
1305 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1306 #endif
1307
1308 #ifdef CONFIG_ARCH_AT91
1309 #include "ehci-atmel.c"
1310 #define PLATFORM_DRIVER         ehci_atmel_driver
1311 #endif
1312
1313 #ifdef CONFIG_USB_OCTEON_EHCI
1314 #include "ehci-octeon.c"
1315 #define PLATFORM_DRIVER         ehci_octeon_driver
1316 #endif
1317
1318 #ifdef CONFIG_USB_CNS3XXX_EHCI
1319 #include "ehci-cns3xxx.c"
1320 #define PLATFORM_DRIVER         cns3xxx_ehci_driver
1321 #endif
1322
1323 #ifdef CONFIG_ARCH_VT8500
1324 #include "ehci-vt8500.c"
1325 #define PLATFORM_DRIVER         vt8500_ehci_driver
1326 #endif
1327
1328 #ifdef CONFIG_PLAT_SPEAR
1329 #include "ehci-spear.c"
1330 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1331 #endif
1332
1333 #ifdef CONFIG_USB_EHCI_MSM
1334 #include "ehci-msm.c"
1335 #define PLATFORM_DRIVER         ehci_msm_driver
1336 #endif
1337
1338 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1339 #include "ehci-pmcmsp.c"
1340 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1341 #endif
1342
1343 #ifdef CONFIG_USB_EHCI_TEGRA
1344 #include "ehci-tegra.c"
1345 #define PLATFORM_DRIVER         tegra_ehci_driver
1346 #endif
1347
1348 #ifdef CONFIG_USB_EHCI_S5P
1349 #include "ehci-s5p.c"
1350 #define PLATFORM_DRIVER         s5p_ehci_driver
1351 #endif
1352
1353 #ifdef CONFIG_USB_EHCI_ATH79
1354 #include "ehci-ath79.c"
1355 #define PLATFORM_DRIVER         ehci_ath79_driver
1356 #endif
1357
1358 #ifdef CONFIG_SPARC_LEON
1359 #include "ehci-grlib.c"
1360 #define PLATFORM_DRIVER         ehci_grlib_driver
1361 #endif
1362
1363 #ifdef CONFIG_USB_PXA168_EHCI
1364 #include "ehci-pxa168.c"
1365 #define PLATFORM_DRIVER         ehci_pxa168_driver
1366 #endif
1367
1368 #ifdef CONFIG_NLM_XLR
1369 #include "ehci-xls.c"
1370 #define PLATFORM_DRIVER         ehci_xls_driver
1371 #endif
1372
1373 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1374     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1375     !defined(XILINX_OF_PLATFORM_DRIVER)
1376 #error "missing bus glue for ehci-hcd"
1377 #endif
1378
1379 static int __init ehci_hcd_init(void)
1380 {
1381         int retval = 0;
1382
1383         if (usb_disabled())
1384                 return -ENODEV;
1385
1386         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1387         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1388         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1389                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1390                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1391                                 " before uhci_hcd and ohci_hcd, not after\n");
1392
1393         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1394                  hcd_name,
1395                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1396                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1397
1398 #ifdef DEBUG
1399         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1400         if (!ehci_debug_root) {
1401                 retval = -ENOENT;
1402                 goto err_debug;
1403         }
1404 #endif
1405
1406 #ifdef PLATFORM_DRIVER
1407         retval = platform_driver_register(&PLATFORM_DRIVER);
1408         if (retval < 0)
1409                 goto clean0;
1410 #endif
1411
1412 #ifdef PCI_DRIVER
1413         retval = pci_register_driver(&PCI_DRIVER);
1414         if (retval < 0)
1415                 goto clean1;
1416 #endif
1417
1418 #ifdef PS3_SYSTEM_BUS_DRIVER
1419         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1420         if (retval < 0)
1421                 goto clean2;
1422 #endif
1423
1424 #ifdef OF_PLATFORM_DRIVER
1425         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1426         if (retval < 0)
1427                 goto clean3;
1428 #endif
1429
1430 #ifdef XILINX_OF_PLATFORM_DRIVER
1431         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1432         if (retval < 0)
1433                 goto clean4;
1434 #endif
1435         return retval;
1436
1437 #ifdef XILINX_OF_PLATFORM_DRIVER
1438         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1439 clean4:
1440 #endif
1441 #ifdef OF_PLATFORM_DRIVER
1442         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1443 clean3:
1444 #endif
1445 #ifdef PS3_SYSTEM_BUS_DRIVER
1446         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1447 clean2:
1448 #endif
1449 #ifdef PCI_DRIVER
1450         pci_unregister_driver(&PCI_DRIVER);
1451 clean1:
1452 #endif
1453 #ifdef PLATFORM_DRIVER
1454         platform_driver_unregister(&PLATFORM_DRIVER);
1455 clean0:
1456 #endif
1457 #ifdef DEBUG
1458         debugfs_remove(ehci_debug_root);
1459         ehci_debug_root = NULL;
1460 err_debug:
1461 #endif
1462         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1463         return retval;
1464 }
1465 module_init(ehci_hcd_init);
1466
1467 static void __exit ehci_hcd_cleanup(void)
1468 {
1469 #ifdef XILINX_OF_PLATFORM_DRIVER
1470         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1471 #endif
1472 #ifdef OF_PLATFORM_DRIVER
1473         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1474 #endif
1475 #ifdef PLATFORM_DRIVER
1476         platform_driver_unregister(&PLATFORM_DRIVER);
1477 #endif
1478 #ifdef PCI_DRIVER
1479         pci_unregister_driver(&PCI_DRIVER);
1480 #endif
1481 #ifdef PS3_SYSTEM_BUS_DRIVER
1482         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1483 #endif
1484 #ifdef DEBUG
1485         debugfs_remove(ehci_debug_root);
1486 #endif
1487         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1488 }
1489 module_exit(ehci_hcd_cleanup);
1490