Pileus Git - ~andy/linux/blob - drivers/usb/gadget/pxa25x_udc.c

   1 /*
   2  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
   3  *
   4  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
   5  * Copyright (C) 2003 Robert Schwebel, Pengutronix
   6  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
   7  * Copyright (C) 2003 David Brownell
   8  * Copyright (C) 2003 Joshua Wise
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  */
  15
  16 /* #define VERBOSE_DEBUG */
  17
  18 #include <linux/device.h>
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/ioport.h>
  22 #include <linux/types.h>
  23 #include <linux/errno.h>
  24 #include <linux/delay.h>
  25 #include <linux/slab.h>
  26 #include <linux/init.h>
  27 #include <linux/timer.h>
  28 #include <linux/list.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/mm.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/irq.h>
  34 #include <linux/clk.h>
  35 #include <linux/err.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/debugfs.h>
  38 #include <linux/io.h>
  39 #include <linux/prefetch.h>
  40
  41 #include <asm/byteorder.h>
  42 #include <asm/dma.h>
  43 #include <asm/gpio.h>
  44 #include <asm/system.h>
  45 #include <asm/mach-types.h>
  46 #include <asm/unaligned.h>
  47
  48 #include <linux/usb/ch9.h>
  49 #include <linux/usb/gadget.h>
  50 #include <linux/usb/otg.h>
  51
  52 /*
  53  * This driver is PXA25x only.  Grab the right register definitions.
  54  */
  55 #ifdef CONFIG_ARCH_PXA
  56 #include <mach/pxa25x-udc.h>
  57 #endif
  58
  59 #ifdef CONFIG_ARCH_LUBBOCK
  60 #include <mach/lubbock.h>
  61 #endif
  62
  63 #include <asm/mach/udc_pxa2xx.h>
  64
  65
  66 /*
  67  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
  68  * series processors.  The UDC for the IXP 4xx series is very similar.
  69  * There are fifteen endpoints, in addition to ep0.
  70  *
  71  * Such controller drivers work with a gadget driver.  The gadget driver
  72  * returns descriptors, implements configuration and data protocols used
  73  * by the host to interact with this device, and allocates endpoints to
  74  * the different protocol interfaces.  The controller driver virtualizes
  75  * usb hardware so that the gadget drivers will be more portable.
  76  *
  77  * This UDC hardware wants to implement a bit too much USB protocol, so
  78  * it constrains the sorts of USB configuration change events that work.
  79  * The errata for these chips are misleading; some "fixed" bugs from
  80  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
  81  *
  82  * Note that the UDC hardware supports DMA (except on IXP) but that's
  83  * not used here.  IN-DMA (to host) is simple enough, when the data is
  84  * suitably aligned (16 bytes) ... the network stack doesn't do that,
  85  * other software can.  OUT-DMA is buggy in most chip versions, as well
  86  * as poorly designed (data toggle not automatic).  So this driver won't
  87  * bother using DMA.  (Mostly-working IN-DMA support was available in
  88  * kernels before 2.6.23, but was never enabled or well tested.)
  89  */
  90
  91 #define DRIVER_VERSION  "30-June-2007"
  92 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
  93
  94
  95 static const char driver_name [] = "pxa25x_udc";
  96
  97 static const char ep0name [] = "ep0";
  98
  99
 100 #ifdef CONFIG_ARCH_IXP4XX
 101
 102 /* cpu-specific register addresses are compiled in to this code */
 103 #ifdef CONFIG_ARCH_PXA
 104 #error "Can't configure both IXP and PXA"
 105 #endif
 106
 107 /* IXP doesn't yet support <linux/clk.h> */
 108 #define clk_get(dev,name)       NULL
 109 #define clk_enable(clk)         do { } while (0)
 110 #define clk_disable(clk)        do { } while (0)
 111 #define clk_put(clk)            do { } while (0)
 112
 113 #endif
 114
 115 #include "pxa25x_udc.h"
 116
 117
 118 #ifdef  CONFIG_USB_PXA25X_SMALL
 119 #define SIZE_STR        " (small)"
 120 #else
 121 #define SIZE_STR        ""
 122 #endif
 123
 124 /* ---------------------------------------------------------------------------
 125  *      endpoint related parts of the api to the usb controller hardware,
 126  *      used by gadget driver; and the inner talker-to-hardware core.
 127  * ---------------------------------------------------------------------------
 128  */
 129
 130 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
 131 static void nuke (struct pxa25x_ep *, int status);
 132
 133 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
 134 static void pullup_off(void)
 135 {
 136         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 137         int off_level = mach->gpio_pullup_inverted;
 138
 139         if (gpio_is_valid(mach->gpio_pullup))
 140                 gpio_set_value(mach->gpio_pullup, off_level);
 141         else if (mach->udc_command)
 142                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
 143 }
 144
 145 static void pullup_on(void)
 146 {
 147         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 148         int on_level = !mach->gpio_pullup_inverted;
 149
 150         if (gpio_is_valid(mach->gpio_pullup))
 151                 gpio_set_value(mach->gpio_pullup, on_level);
 152         else if (mach->udc_command)
 153                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
 154 }
 155
 156 static void pio_irq_enable(int bEndpointAddress)
 157 {
 158         bEndpointAddress &= 0xf;
 159         if (bEndpointAddress < 8)
 160                 UICR0 &= ~(1 << bEndpointAddress);
 161         else {
 162                 bEndpointAddress -= 8;
 163                 UICR1 &= ~(1 << bEndpointAddress);
 164         }
 165 }
 166
 167 static void pio_irq_disable(int bEndpointAddress)
 168 {
 169         bEndpointAddress &= 0xf;
 170         if (bEndpointAddress < 8)
 171                 UICR0 |= 1 << bEndpointAddress;
 172         else {
 173                 bEndpointAddress -= 8;
 174                 UICR1 |= 1 << bEndpointAddress;
 175         }
 176 }
 177
 178 /* The UDCCR reg contains mask and interrupt status bits,
 179  * so using '|=' isn't safe as it may ack an interrupt.
 180  */
 181 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
 182
 183 static inline void udc_set_mask_UDCCR(int mask)
 184 {
 185         UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
 186 }
 187
 188 static inline void udc_clear_mask_UDCCR(int mask)
 189 {
 190         UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
 191 }
 192
 193 static inline void udc_ack_int_UDCCR(int mask)
 194 {
 195         /* udccr contains the bits we dont want to change */
 196         __u32 udccr = UDCCR & UDCCR_MASK_BITS;
 197
 198         UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
 199 }
 200
 201 /*
 202  * endpoint enable/disable
 203  *
 204  * we need to verify the descriptors used to enable endpoints.  since pxa25x
 205  * endpoint configurations are fixed, and are pretty much always enabled,
 206  * there's not a lot to manage here.
 207  *
 208  * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
 209  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
 210  * for a single interface (with only the default altsetting) and for gadget
 211  * drivers that don't halt endpoints (not reset by set_interface).  that also
 212  * means that if you use ISO, you must violate the USB spec rule that all
 213  * iso endpoints must be in non-default altsettings.
 214  */
 215 static int pxa25x_ep_enable (struct usb_ep *_ep,
 216                 const struct usb_endpoint_descriptor *desc)
 217 {
 218         struct pxa25x_ep        *ep;
 219         struct pxa25x_udc       *dev;
 220
 221         ep = container_of (_ep, struct pxa25x_ep, ep);
 222         if (!_ep || !desc || ep->desc || _ep->name == ep0name
 223                         || desc->bDescriptorType != USB_DT_ENDPOINT
 224                         || ep->bEndpointAddress != desc->bEndpointAddress
 225                         || ep->fifo_size < usb_endpoint_maxp (desc)) {
 226                 DMSG("%s, bad ep or descriptor\n", __func__);
 227                 return -EINVAL;
 228         }
 229
 230         /* xfer types must match, except that interrupt ~= bulk */
 231         if (ep->bmAttributes != desc->bmAttributes
 232                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 233                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 234                 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
 235                 return -EINVAL;
 236         }
 237
 238         /* hardware _could_ do smaller, but driver doesn't */
 239         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 240                                 && usb_endpoint_maxp (desc)
 241                                                 != BULK_FIFO_SIZE)
 242                         || !desc->wMaxPacketSize) {
 243                 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
 244                 return -ERANGE;
 245         }
 246
 247         dev = ep->dev;
 248         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
 249                 DMSG("%s, bogus device state\n", __func__);
 250                 return -ESHUTDOWN;
 251         }
 252
 253         ep->desc = desc;
 254         ep->stopped = 0;
 255         ep->pio_irqs = 0;
 256         ep->ep.maxpacket = usb_endpoint_maxp (desc);
 257
 258         /* flush fifo (mostly for OUT buffers) */
 259         pxa25x_ep_fifo_flush (_ep);
 260
 261         /* ... reset halt state too, if we could ... */
 262
 263         DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
 264         return 0;
 265 }
 266
 267 static int pxa25x_ep_disable (struct usb_ep *_ep)
 268 {
 269         struct pxa25x_ep        *ep;
 270         unsigned long           flags;
 271
 272         ep = container_of (_ep, struct pxa25x_ep, ep);
 273         if (!_ep || !ep->desc) {
 274                 DMSG("%s, %s not enabled\n", __func__,
 275                         _ep ? ep->ep.name : NULL);
 276                 return -EINVAL;
 277         }
 278         local_irq_save(flags);
 279
 280         nuke (ep, -ESHUTDOWN);
 281
 282         /* flush fifo (mostly for IN buffers) */
 283         pxa25x_ep_fifo_flush (_ep);
 284
 285         ep->desc = NULL;
 286         ep->ep.desc = NULL;
 287         ep->stopped = 1;
 288
 289         local_irq_restore(flags);
 290         DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
 291         return 0;
 292 }
 293
 294 /*-------------------------------------------------------------------------*/
 295
 296 /* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
 297  * must still pass correctly initialized endpoints, since other controller
 298  * drivers may care about how it's currently set up (dma issues etc).
 299  */
 300
 301 /*
 302  *      pxa25x_ep_alloc_request - allocate a request data structure
 303  */
 304 static struct usb_request *
 305 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
 306 {
 307         struct pxa25x_request *req;
 308
 309         req = kzalloc(sizeof(*req), gfp_flags);
 310         if (!req)
 311                 return NULL;
 312
 313         INIT_LIST_HEAD (&req->queue);
 314         return &req->req;
 315 }
 316
 317
 318 /*
 319  *      pxa25x_ep_free_request - deallocate a request data structure
 320  */
 321 static void
 322 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
 323 {
 324         struct pxa25x_request   *req;
 325
 326         req = container_of (_req, struct pxa25x_request, req);
 327         WARN_ON(!list_empty (&req->queue));
 328         kfree(req);
 329 }
 330
 331 /*-------------------------------------------------------------------------*/
 332
 333 /*
 334  *      done - retire a request; caller blocked irqs
 335  */
 336 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
 337 {
 338         unsigned                stopped = ep->stopped;
 339
 340         list_del_init(&req->queue);
 341
 342         if (likely (req->req.status == -EINPROGRESS))
 343                 req->req.status = status;
 344         else
 345                 status = req->req.status;
 346
 347         if (status && status != -ESHUTDOWN)
 348                 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
 349                         ep->ep.name, &req->req, status,
 350                         req->req.actual, req->req.length);
 351
 352         /* don't modify queue heads during completion callback */
 353         ep->stopped = 1;
 354         req->req.complete(&ep->ep, &req->req);
 355         ep->stopped = stopped;
 356 }
 357
 358
 359 static inline void ep0_idle (struct pxa25x_udc *dev)
 360 {
 361         dev->ep0state = EP0_IDLE;
 362 }
 363
 364 static int
 365 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
 366 {
 367         u8              *buf;
 368         unsigned        length, count;
 369
 370         buf = req->req.buf + req->req.actual;
 371         prefetch(buf);
 372
 373         /* how big will this packet be? */
 374         length = min(req->req.length - req->req.actual, max);
 375         req->req.actual += length;
 376
 377         count = length;
 378         while (likely(count--))
 379                 *uddr = *buf++;
 380
 381         return length;
 382 }
 383
 384 /*
 385  * write to an IN endpoint fifo, as many packets as possible.
 386  * irqs will use this to write the rest later.
 387  * caller guarantees at least one packet buffer is ready (or a zlp).
 388  */
 389 static int
 390 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 391 {
 392         unsigned                max;
 393
 394         max = usb_endpoint_maxp(ep->desc);
 395         do {
 396                 unsigned        count;
 397                 int             is_last, is_short;
 398
 399                 count = write_packet(ep->reg_uddr, req, max);
 400
 401                 /* last packet is usually short (or a zlp) */
 402                 if (unlikely (count != max))
 403                         is_last = is_short = 1;
 404                 else {
 405                         if (likely(req->req.length != req->req.actual)
 406                                         || req->req.zero)
 407                                 is_last = 0;
 408                         else
 409                                 is_last = 1;
 410                         /* interrupt/iso maxpacket may not fill the fifo */
 411                         is_short = unlikely (max < ep->fifo_size);
 412                 }
 413
 414                 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
 415                         ep->ep.name, count,
 416                         is_last ? "/L" : "", is_short ? "/S" : "",
 417                         req->req.length - req->req.actual, req);
 418
 419                 /* let loose that packet. maybe try writing another one,
 420                  * double buffering might work.  TSP, TPC, and TFS
 421                  * bit values are the same for all normal IN endpoints.
 422                  */
 423                 *ep->reg_udccs = UDCCS_BI_TPC;
 424                 if (is_short)
 425                         *ep->reg_udccs = UDCCS_BI_TSP;
 426
 427                 /* requests complete when all IN data is in the FIFO */
 428                 if (is_last) {
 429                         done (ep, req, 0);
 430                         if (list_empty(&ep->queue))
 431                                 pio_irq_disable (ep->bEndpointAddress);
 432                         return 1;
 433                 }
 434
 435                 // TODO experiment: how robust can fifo mode tweaking be?
 436                 // double buffering is off in the default fifo mode, which
 437                 // prevents TFS from being set here.
 438
 439         } while (*ep->reg_udccs & UDCCS_BI_TFS);
 440         return 0;
 441 }
 442
 443 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
 444  * ep0 data stage.  these chips want very simple state transitions.
 445  */
 446 static inline
 447 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
 448 {
 449         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
 450         USIR0 = USIR0_IR0;
 451         dev->req_pending = 0;
 452         DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
 453                 __func__, tag, UDCCS0, flags);
 454 }
 455
 456 static int
 457 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 458 {
 459         unsigned        count;
 460         int             is_short;
 461
 462         count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
 463         ep->dev->stats.write.bytes += count;
 464
 465         /* last packet "must be" short (or a zlp) */
 466         is_short = (count != EP0_FIFO_SIZE);
 467
 468         DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
 469                 req->req.length - req->req.actual, req);
 470
 471         if (unlikely (is_short)) {
 472                 if (ep->dev->req_pending)
 473                         ep0start(ep->dev, UDCCS0_IPR, "short IN");
 474                 else
 475                         UDCCS0 = UDCCS0_IPR;
 476
 477                 count = req->req.length;
 478                 done (ep, req, 0);
 479                 ep0_idle(ep->dev);
 480 #ifndef CONFIG_ARCH_IXP4XX
 481 #if 1
 482                 /* This seems to get rid of lost status irqs in some cases:
 483                  * host responds quickly, or next request involves config
 484                  * change automagic, or should have been hidden, or ...
 485                  *
 486                  * FIXME get rid of all udelays possible...
 487                  */
 488                 if (count >= EP0_FIFO_SIZE) {
 489                         count = 100;
 490                         do {
 491                                 if ((UDCCS0 & UDCCS0_OPR) != 0) {
 492                                         /* clear OPR, generate ack */
 493                                         UDCCS0 = UDCCS0_OPR;
 494                                         break;
 495                                 }
 496                                 count--;
 497                                 udelay(1);
 498                         } while (count);
 499                 }
 500 #endif
 501 #endif
 502         } else if (ep->dev->req_pending)
 503                 ep0start(ep->dev, 0, "IN");
 504         return is_short;
 505 }
 506
 507
 508 /*
 509  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
 510  * transfers and put them into the request.  caller should have made
 511  * sure there's at least one packet ready.
 512  *
 513  * returns true if the request completed because of short packet or the
 514  * request buffer having filled (and maybe overran till end-of-packet).
 515  */
 516 static int
 517 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 518 {
 519         for (;;) {
 520                 u32             udccs;
 521                 u8              *buf;
 522                 unsigned        bufferspace, count, is_short;
 523
 524                 /* make sure there's a packet in the FIFO.
 525                  * UDCCS_{BO,IO}_RPC are all the same bit value.
 526                  * UDCCS_{BO,IO}_RNE are all the same bit value.
 527                  */
 528                 udccs = *ep->reg_udccs;
 529                 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
 530                         break;
 531                 buf = req->req.buf + req->req.actual;
 532                 prefetchw(buf);
 533                 bufferspace = req->req.length - req->req.actual;
 534
 535                 /* read all bytes from this packet */
 536                 if (likely (udccs & UDCCS_BO_RNE)) {
 537                         count = 1 + (0x0ff & *ep->reg_ubcr);
 538                         req->req.actual += min (count, bufferspace);
 539                 } else /* zlp */
 540                         count = 0;
 541                 is_short = (count < ep->ep.maxpacket);
 542                 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
 543                         ep->ep.name, udccs, count,
 544                         is_short ? "/S" : "",
 545                         req, req->req.actual, req->req.length);
 546                 while (likely (count-- != 0)) {
 547                         u8      byte = (u8) *ep->reg_uddr;
 548
 549                         if (unlikely (bufferspace == 0)) {
 550                                 /* this happens when the driver's buffer
 551                                  * is smaller than what the host sent.
 552                                  * discard the extra data.
 553                                  */
 554                                 if (req->req.status != -EOVERFLOW)
 555                                         DMSG("%s overflow %d\n",
 556                                                 ep->ep.name, count);
 557                                 req->req.status = -EOVERFLOW;
 558                         } else {
 559                                 *buf++ = byte;
 560                                 bufferspace--;
 561                         }
 562                 }
 563                 *ep->reg_udccs =  UDCCS_BO_RPC;
 564                 /* RPC/RSP/RNE could now reflect the other packet buffer */
 565
 566                 /* iso is one request per packet */
 567                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 568                         if (udccs & UDCCS_IO_ROF)
 569                                 req->req.status = -EHOSTUNREACH;
 570                         /* more like "is_done" */
 571                         is_short = 1;
 572                 }
 573
 574                 /* completion */
 575                 if (is_short || req->req.actual == req->req.length) {
 576                         done (ep, req, 0);
 577                         if (list_empty(&ep->queue))
 578                                 pio_irq_disable (ep->bEndpointAddress);
 579                         return 1;
 580                 }
 581
 582                 /* finished that packet.  the next one may be waiting... */
 583         }
 584         return 0;
 585 }
 586
 587 /*
 588  * special ep0 version of the above.  no UBCR0 or double buffering; status
 589  * handshaking is magic.  most device protocols don't need control-OUT.
 590  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
 591  * protocols do use them.
 592  */
 593 static int
 594 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 595 {
 596         u8              *buf, byte;
 597         unsigned        bufferspace;
 598
 599         buf = req->req.buf + req->req.actual;
 600         bufferspace = req->req.length - req->req.actual;
 601
 602         while (UDCCS0 & UDCCS0_RNE) {
 603                 byte = (u8) UDDR0;
 604
 605                 if (unlikely (bufferspace == 0)) {
 606                         /* this happens when the driver's buffer
 607                          * is smaller than what the host sent.
 608                          * discard the extra data.
 609                          */
 610                         if (req->req.status != -EOVERFLOW)
 611                                 DMSG("%s overflow\n", ep->ep.name);
 612                         req->req.status = -EOVERFLOW;
 613                 } else {
 614                         *buf++ = byte;
 615                         req->req.actual++;
 616                         bufferspace--;
 617                 }
 618         }
 619
 620         UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
 621
 622         /* completion */
 623         if (req->req.actual >= req->req.length)
 624                 return 1;
 625
 626         /* finished that packet.  the next one may be waiting... */
 627         return 0;
 628 }
 629
 630 /*-------------------------------------------------------------------------*/
 631
 632 static int
 633 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 634 {
 635         struct pxa25x_request   *req;
 636         struct pxa25x_ep        *ep;
 637         struct pxa25x_udc       *dev;
 638         unsigned long           flags;
 639
 640         req = container_of(_req, struct pxa25x_request, req);
 641         if (unlikely (!_req || !_req->complete || !_req->buf
 642                         || !list_empty(&req->queue))) {
 643                 DMSG("%s, bad params\n", __func__);
 644                 return -EINVAL;
 645         }
 646
 647         ep = container_of(_ep, struct pxa25x_ep, ep);
 648         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
 649                 DMSG("%s, bad ep\n", __func__);
 650                 return -EINVAL;
 651         }
 652
 653         dev = ep->dev;
 654         if (unlikely (!dev->driver
 655                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
 656                 DMSG("%s, bogus device state\n", __func__);
 657                 return -ESHUTDOWN;
 658         }
 659
 660         /* iso is always one packet per request, that's the only way
 661          * we can report per-packet status.  that also helps with dma.
 662          */
 663         if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 664                         && req->req.length > usb_endpoint_maxp (ep->desc)))
 665                 return -EMSGSIZE;
 666
 667         DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
 668                 _ep->name, _req, _req->length, _req->buf);
 669
 670         local_irq_save(flags);
 671
 672         _req->status = -EINPROGRESS;
 673         _req->actual = 0;
 674
 675         /* kickstart this i/o queue? */
 676         if (list_empty(&ep->queue) && !ep->stopped) {
 677                 if (ep->desc == NULL/* ep0 */) {
 678                         unsigned        length = _req->length;
 679
 680                         switch (dev->ep0state) {
 681                         case EP0_IN_DATA_PHASE:
 682                                 dev->stats.write.ops++;
 683                                 if (write_ep0_fifo(ep, req))
 684                                         req = NULL;
 685                                 break;
 686
 687                         case EP0_OUT_DATA_PHASE:
 688                                 dev->stats.read.ops++;
 689                                 /* messy ... */
 690                                 if (dev->req_config) {
 691                                         DBG(DBG_VERBOSE, "ep0 config ack%s\n",
 692                                                 dev->has_cfr ?  "" : " raced");
 693                                         if (dev->has_cfr)
 694                                                 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
 695                                                         |UDCCFR_MB1;
 696                                         done(ep, req, 0);
 697                                         dev->ep0state = EP0_END_XFER;
 698                                         local_irq_restore (flags);
 699                                         return 0;
 700                                 }
 701                                 if (dev->req_pending)
 702                                         ep0start(dev, UDCCS0_IPR, "OUT");
 703                                 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
 704                                                 && read_ep0_fifo(ep, req))) {
 705                                         ep0_idle(dev);
 706                                         done(ep, req, 0);
 707                                         req = NULL;
 708                                 }
 709                                 break;
 710
 711                         default:
 712                                 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
 713                                 local_irq_restore (flags);
 714                                 return -EL2HLT;
 715                         }
 716                 /* can the FIFO can satisfy the request immediately? */
 717                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
 718                         if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
 719                                         && write_fifo(ep, req))
 720                                 req = NULL;
 721                 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
 722                                 && read_fifo(ep, req)) {
 723                         req = NULL;
 724                 }
 725
 726                 if (likely (req && ep->desc))
 727                         pio_irq_enable(ep->bEndpointAddress);
 728         }
 729
 730         /* pio or dma irq handler advances the queue. */
 731         if (likely(req != NULL))
 732                 list_add_tail(&req->queue, &ep->queue);
 733         local_irq_restore(flags);
 734
 735         return 0;
 736 }
 737
 738
 739 /*
 740  *      nuke - dequeue ALL requests
 741  */
 742 static void nuke(struct pxa25x_ep *ep, int status)
 743 {
 744         struct pxa25x_request *req;
 745
 746         /* called with irqs blocked */
 747         while (!list_empty(&ep->queue)) {
 748                 req = list_entry(ep->queue.next,
 749                                 struct pxa25x_request,
 750                                 queue);
 751                 done(ep, req, status);
 752         }
 753         if (ep->desc)
 754                 pio_irq_disable (ep->bEndpointAddress);
 755 }
 756
 757
 758 /* dequeue JUST ONE request */
 759 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 760 {
 761         struct pxa25x_ep        *ep;
 762         struct pxa25x_request   *req;
 763         unsigned long           flags;
 764
 765         ep = container_of(_ep, struct pxa25x_ep, ep);
 766         if (!_ep || ep->ep.name == ep0name)
 767                 return -EINVAL;
 768
 769         local_irq_save(flags);
 770
 771         /* make sure it's actually queued on this endpoint */
 772         list_for_each_entry (req, &ep->queue, queue) {
 773                 if (&req->req == _req)
 774                         break;
 775         }
 776         if (&req->req != _req) {
 777                 local_irq_restore(flags);
 778                 return -EINVAL;
 779         }
 780
 781         done(ep, req, -ECONNRESET);
 782
 783         local_irq_restore(flags);
 784         return 0;
 785 }
 786
 787 /*-------------------------------------------------------------------------*/
 788
 789 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
 790 {
 791         struct pxa25x_ep        *ep;
 792         unsigned long           flags;
 793
 794         ep = container_of(_ep, struct pxa25x_ep, ep);
 795         if (unlikely (!_ep
 796                         || (!ep->desc && ep->ep.name != ep0name))
 797                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 798                 DMSG("%s, bad ep\n", __func__);
 799                 return -EINVAL;
 800         }
 801         if (value == 0) {
 802                 /* this path (reset toggle+halt) is needed to implement
 803                  * SET_INTERFACE on normal hardware.  but it can't be
 804                  * done from software on the PXA UDC, and the hardware
 805                  * forgets to do it as part of SET_INTERFACE automagic.
 806                  */
 807                 DMSG("only host can clear %s halt\n", _ep->name);
 808                 return -EROFS;
 809         }
 810
 811         local_irq_save(flags);
 812
 813         if ((ep->bEndpointAddress & USB_DIR_IN) != 0
 814                         && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
 815                            || !list_empty(&ep->queue))) {
 816                 local_irq_restore(flags);
 817                 return -EAGAIN;
 818         }
 819
 820         /* FST bit is the same for control, bulk in, bulk out, interrupt in */
 821         *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
 822
 823         /* ep0 needs special care */
 824         if (!ep->desc) {
 825                 start_watchdog(ep->dev);
 826                 ep->dev->req_pending = 0;
 827                 ep->dev->ep0state = EP0_STALL;
 828
 829         /* and bulk/intr endpoints like dropping stalls too */
 830         } else {
 831                 unsigned i;
 832                 for (i = 0; i < 1000; i += 20) {
 833                         if (*ep->reg_udccs & UDCCS_BI_SST)
 834                                 break;
 835                         udelay(20);
 836                 }
 837         }
 838         local_irq_restore(flags);
 839
 840         DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
 841         return 0;
 842 }
 843
 844 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
 845 {
 846         struct pxa25x_ep        *ep;
 847
 848         ep = container_of(_ep, struct pxa25x_ep, ep);
 849         if (!_ep) {
 850                 DMSG("%s, bad ep\n", __func__);
 851                 return -ENODEV;
 852         }
 853         /* pxa can't report unclaimed bytes from IN fifos */
 854         if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
 855                 return -EOPNOTSUPP;
 856         if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
 857                         || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
 858                 return 0;
 859         else
 860                 return (*ep->reg_ubcr & 0xfff) + 1;
 861 }
 862
 863 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
 864 {
 865         struct pxa25x_ep        *ep;
 866
 867         ep = container_of(_ep, struct pxa25x_ep, ep);
 868         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
 869                 DMSG("%s, bad ep\n", __func__);
 870                 return;
 871         }
 872
 873         /* toggle and halt bits stay unchanged */
 874
 875         /* for OUT, just read and discard the FIFO contents. */
 876         if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
 877                 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
 878                         (void) *ep->reg_uddr;
 879                 return;
 880         }
 881
 882         /* most IN status is the same, but ISO can't stall */
 883         *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
 884                 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 885                         ? 0 : UDCCS_BI_SST);
 886 }
 887
 888
 889 static struct usb_ep_ops pxa25x_ep_ops = {
 890         .enable         = pxa25x_ep_enable,
 891         .disable        = pxa25x_ep_disable,
 892
 893         .alloc_request  = pxa25x_ep_alloc_request,
 894         .free_request   = pxa25x_ep_free_request,
 895
 896         .queue          = pxa25x_ep_queue,
 897         .dequeue        = pxa25x_ep_dequeue,
 898
 899         .set_halt       = pxa25x_ep_set_halt,
 900         .fifo_status    = pxa25x_ep_fifo_status,
 901         .fifo_flush     = pxa25x_ep_fifo_flush,
 902 };
 903
 904
 905 /* ---------------------------------------------------------------------------
 906  *      device-scoped parts of the api to the usb controller hardware
 907  * ---------------------------------------------------------------------------
 908  */
 909
 910 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
 911 {
 912         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
 913 }
 914
 915 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
 916 {
 917         /* host may not have enabled remote wakeup */
 918         if ((UDCCS0 & UDCCS0_DRWF) == 0)
 919                 return -EHOSTUNREACH;
 920         udc_set_mask_UDCCR(UDCCR_RSM);
 921         return 0;
 922 }
 923
 924 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
 925 static void udc_enable (struct pxa25x_udc *);
 926 static void udc_disable(struct pxa25x_udc *);
 927
 928 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
 929  * in active use.
 930  */
 931 static int pullup(struct pxa25x_udc *udc)
 932 {
 933         int is_active = udc->vbus && udc->pullup && !udc->suspended;
 934         DMSG("%s\n", is_active ? "active" : "inactive");
 935         if (is_active) {
 936                 if (!udc->active) {
 937                         udc->active = 1;
 938                         /* Enable clock for USB device */
 939                         clk_enable(udc->clk);
 940                         udc_enable(udc);
 941                 }
 942         } else {
 943                 if (udc->active) {
 944                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
 945                                 DMSG("disconnect %s\n", udc->driver
 946                                         ? udc->driver->driver.name
 947                                         : "(no driver)");
 948                                 stop_activity(udc, udc->driver);
 949                         }
 950                         udc_disable(udc);
 951                         /* Disable clock for USB device */
 952                         clk_disable(udc->clk);
 953                         udc->active = 0;
 954                 }
 955
 956         }
 957         return 0;
 958 }
 959
 960 /* VBUS reporting logically comes from a transceiver */
 961 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 962 {
 963         struct pxa25x_udc       *udc;
 964
 965         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 966         udc->vbus = is_active;
 967         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
 968         pullup(udc);
 969         return 0;
 970 }
 971
 972 /* drivers may have software control over D+ pullup */
 973 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
 974 {
 975         struct pxa25x_udc       *udc;
 976
 977         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 978
 979         /* not all boards support pullup control */
 980         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
 981                 return -EOPNOTSUPP;
 982
 983         udc->pullup = (is_active != 0);
 984         pullup(udc);
 985         return 0;
 986 }
 987
 988 /* boards may consume current from VBUS, up to 100-500mA based on config.
 989  * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
 990  * violate USB specs.
 991  */
 992 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
 993 {
 994         struct pxa25x_udc       *udc;
 995
 996         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 997
 998         if (udc->transceiver)
 999                 return usb_phy_set_power(udc->transceiver, mA);
1000         return -EOPNOTSUPP;
1001 }
1002
1003 static int pxa25x_start(struct usb_gadget_driver *driver,
1004                 int (*bind)(struct usb_gadget *));
1005 static int pxa25x_stop(struct usb_gadget_driver *driver);
1006
1007 static const struct usb_gadget_ops pxa25x_udc_ops = {
1008         .get_frame      = pxa25x_udc_get_frame,
1009         .wakeup         = pxa25x_udc_wakeup,
1010         .vbus_session   = pxa25x_udc_vbus_session,
1011         .pullup         = pxa25x_udc_pullup,
1012         .vbus_draw      = pxa25x_udc_vbus_draw,
1013         .start          = pxa25x_start,
1014         .stop           = pxa25x_stop,
1015 };
1016
1017 /*-------------------------------------------------------------------------*/
1018
1019 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1020
1021 static int
1022 udc_seq_show(struct seq_file *m, void *_d)
1023 {
1024         struct pxa25x_udc       *dev = m->private;
1025         unsigned long           flags;
1026         int                     i;
1027         u32                     tmp;
1028
1029         local_irq_save(flags);
1030
1031         /* basic device status */
1032         seq_printf(m, DRIVER_DESC "\n"
1033                 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1034                 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1035                 dev->driver ? dev->driver->driver.name : "(none)",
1036                 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
1037
1038         /* registers for device and ep0 */
1039         seq_printf(m,
1040                 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1041                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1042
1043         tmp = UDCCR;
1044         seq_printf(m,
1045                 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1046                 (tmp & UDCCR_REM) ? " rem" : "",
1047                 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1048                 (tmp & UDCCR_SRM) ? " srm" : "",
1049                 (tmp & UDCCR_SUSIR) ? " susir" : "",
1050                 (tmp & UDCCR_RESIR) ? " resir" : "",
1051                 (tmp & UDCCR_RSM) ? " rsm" : "",
1052                 (tmp & UDCCR_UDA) ? " uda" : "",
1053                 (tmp & UDCCR_UDE) ? " ude" : "");
1054
1055         tmp = UDCCS0;
1056         seq_printf(m,
1057                 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1058                 (tmp & UDCCS0_SA) ? " sa" : "",
1059                 (tmp & UDCCS0_RNE) ? " rne" : "",
1060                 (tmp & UDCCS0_FST) ? " fst" : "",
1061                 (tmp & UDCCS0_SST) ? " sst" : "",
1062                 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1063                 (tmp & UDCCS0_FTF) ? " ftf" : "",
1064                 (tmp & UDCCS0_IPR) ? " ipr" : "",
1065                 (tmp & UDCCS0_OPR) ? " opr" : "");
1066
1067         if (dev->has_cfr) {
1068                 tmp = UDCCFR;
1069                 seq_printf(m,
1070                         "udccfr %02X =%s%s\n", tmp,
1071                         (tmp & UDCCFR_AREN) ? " aren" : "",
1072                         (tmp & UDCCFR_ACM) ? " acm" : "");
1073         }
1074
1075         if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
1076                 goto done;
1077
1078         seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1079                 dev->stats.write.bytes, dev->stats.write.ops,
1080                 dev->stats.read.bytes, dev->stats.read.ops,
1081                 dev->stats.irqs);
1082
1083         /* dump endpoint queues */
1084         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1085                 struct pxa25x_ep        *ep = &dev->ep [i];
1086                 struct pxa25x_request   *req;
1087
1088                 if (i != 0) {
1089                         const struct usb_endpoint_descriptor    *desc;
1090
1091                         desc = ep->desc;
1092                         if (!desc)
1093                                 continue;
1094                         tmp = *dev->ep [i].reg_udccs;
1095                         seq_printf(m,
1096                                 "%s max %d %s udccs %02x irqs %lu\n",
1097                                 ep->ep.name, usb_endpoint_maxp(desc),
1098                                 "pio", tmp, ep->pio_irqs);
1099                         /* TODO translate all five groups of udccs bits! */
1100
1101                 } else /* ep0 should only have one transfer queued */
1102                         seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1103                                 ep->pio_irqs);
1104
1105                 if (list_empty(&ep->queue)) {
1106                         seq_printf(m, "\t(nothing queued)\n");
1107                         continue;
1108                 }
1109                 list_for_each_entry(req, &ep->queue, queue) {
1110                         seq_printf(m,
1111                                         "\treq %p len %d/%d buf %p\n",
1112                                         &req->req, req->req.actual,
1113                                         req->req.length, req->req.buf);
1114                 }
1115         }
1116
1117 done:
1118         local_irq_restore(flags);
1119         return 0;
1120 }
1121
1122 static int
1123 udc_debugfs_open(struct inode *inode, struct file *file)
1124 {
1125         return single_open(file, udc_seq_show, inode->i_private);
1126 }
1127
1128 static const struct file_operations debug_fops = {
1129         .open           = udc_debugfs_open,
1130         .read           = seq_read,
1131         .llseek         = seq_lseek,
1132         .release        = single_release,
1133         .owner          = THIS_MODULE,
1134 };
1135
1136 #define create_debug_files(dev) \
1137         do { \
1138                 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1139                         S_IRUGO, NULL, dev, &debug_fops); \
1140         } while (0)
1141 #define remove_debug_files(dev) \
1142         do { \
1143                 if (dev->debugfs_udc) \
1144                         debugfs_remove(dev->debugfs_udc); \
1145         } while (0)
1146
1147 #else   /* !CONFIG_USB_GADGET_DEBUG_FILES */
1148
1149 #define create_debug_files(dev) do {} while (0)
1150 #define remove_debug_files(dev) do {} while (0)
1151
1152 #endif  /* CONFIG_USB_GADGET_DEBUG_FILES */
1153
1154 /*-------------------------------------------------------------------------*/
1155
1156 /*
1157  *      udc_disable - disable USB device controller
1158  */
1159 static void udc_disable(struct pxa25x_udc *dev)
1160 {
1161         /* block all irqs */
1162         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1163         UICR0 = UICR1 = 0xff;
1164         UFNRH = UFNRH_SIM;
1165
1166         /* if hardware supports it, disconnect from usb */
1167         pullup_off();
1168
1169         udc_clear_mask_UDCCR(UDCCR_UDE);
1170
1171         ep0_idle (dev);
1172         dev->gadget.speed = USB_SPEED_UNKNOWN;
1173 }
1174
1175
1176 /*
1177  *      udc_reinit - initialize software state
1178  */
1179 static void udc_reinit(struct pxa25x_udc *dev)
1180 {
1181         u32     i;
1182
1183         /* device/ep0 records init */
1184         INIT_LIST_HEAD (&dev->gadget.ep_list);
1185         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1186         dev->ep0state = EP0_IDLE;
1187
1188         /* basic endpoint records init */
1189         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1190                 struct pxa25x_ep *ep = &dev->ep[i];
1191
1192                 if (i != 0)
1193                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1194
1195                 ep->desc = NULL;
1196                 ep->ep.desc = NULL;
1197                 ep->stopped = 0;
1198                 INIT_LIST_HEAD (&ep->queue);
1199                 ep->pio_irqs = 0;
1200         }
1201
1202         /* the rest was statically initialized, and is read-only */
1203 }
1204
1205 /* until it's enabled, this UDC should be completely invisible
1206  * to any USB host.
1207  */
1208 static void udc_enable (struct pxa25x_udc *dev)
1209 {
1210         udc_clear_mask_UDCCR(UDCCR_UDE);
1211
1212         /* try to clear these bits before we enable the udc */
1213         udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1214
1215         ep0_idle(dev);
1216         dev->gadget.speed = USB_SPEED_UNKNOWN;
1217         dev->stats.irqs = 0;
1218
1219         /*
1220          * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1221          * - enable UDC
1222          * - if RESET is already in progress, ack interrupt
1223          * - unmask reset interrupt
1224          */
1225         udc_set_mask_UDCCR(UDCCR_UDE);
1226         if (!(UDCCR & UDCCR_UDA))
1227                 udc_ack_int_UDCCR(UDCCR_RSTIR);
1228
1229         if (dev->has_cfr /* UDC_RES2 is defined */) {
1230                 /* pxa255 (a0+) can avoid a set_config race that could
1231                  * prevent gadget drivers from configuring correctly
1232                  */
1233                 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1234         } else {
1235                 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1236                  * which could result in missing packets and interrupts.
1237                  * supposedly one bit per endpoint, controlling whether it
1238                  * double buffers or not; ACM/AREN bits fit into the holes.
1239                  * zero bits (like USIR0_IRx) disable double buffering.
1240                  */
1241                 UDC_RES1 = 0x00;
1242                 UDC_RES2 = 0x00;
1243         }
1244
1245         /* enable suspend/resume and reset irqs */
1246         udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1247
1248         /* enable ep0 irqs */
1249         UICR0 &= ~UICR0_IM0;
1250
1251         /* if hardware supports it, pullup D+ and wait for reset */
1252         pullup_on();
1253 }
1254
1255
1256 /* when a driver is successfully registered, it will receive
1257  * control requests including set_configuration(), which enables
1258  * non-control requests.  then usb traffic follows until a
1259  * disconnect is reported.  then a host may connect again, or
1260  * the driver might get unbound.
1261  */
1262 static int pxa25x_start(struct usb_gadget_driver *driver,
1263                 int (*bind)(struct usb_gadget *))
1264 {
1265         struct pxa25x_udc       *dev = the_controller;
1266         int                     retval;
1267
1268         if (!driver
1269                         || driver->max_speed < USB_SPEED_FULL
1270                         || !bind
1271                         || !driver->disconnect
1272                         || !driver->setup)
1273                 return -EINVAL;
1274         if (!dev)
1275                 return -ENODEV;
1276         if (dev->driver)
1277                 return -EBUSY;
1278
1279         /* first hook up the driver ... */
1280         dev->driver = driver;
1281         dev->gadget.dev.driver = &driver->driver;
1282         dev->pullup = 1;
1283
1284         retval = device_add (&dev->gadget.dev);
1285         if (retval) {
1286 fail:
1287                 dev->driver = NULL;
1288                 dev->gadget.dev.driver = NULL;
1289                 return retval;
1290         }
1291         retval = bind(&dev->gadget);
1292         if (retval) {
1293                 DMSG("bind to driver %s --> error %d\n",
1294                                 driver->driver.name, retval);
1295                 device_del (&dev->gadget.dev);
1296                 goto fail;
1297         }
1298
1299         /* ... then enable host detection and ep0; and we're ready
1300          * for set_configuration as well as eventual disconnect.
1301          */
1302         DMSG("registered gadget driver '%s'\n", driver->driver.name);
1303
1304         /* connect to bus through transceiver */
1305         if (dev->transceiver) {
1306                 retval = otg_set_peripheral(dev->transceiver->otg,
1307                                                 &dev->gadget);
1308                 if (retval) {
1309                         DMSG("can't bind to transceiver\n");
1310                         if (driver->unbind)
1311                                 driver->unbind(&dev->gadget);
1312                         goto bind_fail;
1313                 }
1314         }
1315
1316         pullup(dev);
1317         dump_state(dev);
1318         return 0;
1319 bind_fail:
1320         return retval;
1321 }
1322
1323 static void
1324 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1325 {
1326         int i;
1327
1328         /* don't disconnect drivers more than once */
1329         if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1330                 driver = NULL;
1331         dev->gadget.speed = USB_SPEED_UNKNOWN;
1332
1333         /* prevent new request submissions, kill any outstanding requests  */
1334         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1335                 struct pxa25x_ep *ep = &dev->ep[i];
1336
1337                 ep->stopped = 1;
1338                 nuke(ep, -ESHUTDOWN);
1339         }
1340         del_timer_sync(&dev->timer);
1341
1342         /* report disconnect; the driver is already quiesced */
1343         if (driver)
1344                 driver->disconnect(&dev->gadget);
1345
1346         /* re-init driver-visible data structures */
1347         udc_reinit(dev);
1348 }
1349
1350 static int pxa25x_stop(struct usb_gadget_driver *driver)
1351 {
1352         struct pxa25x_udc       *dev = the_controller;
1353
1354         if (!dev)
1355                 return -ENODEV;
1356         if (!driver || driver != dev->driver || !driver->unbind)
1357                 return -EINVAL;
1358
1359         local_irq_disable();
1360         dev->pullup = 0;
1361         pullup(dev);
1362         stop_activity(dev, driver);
1363         local_irq_enable();
1364
1365         if (dev->transceiver)
1366                 (void) otg_set_peripheral(dev->transceiver->otg, NULL);
1367
1368         driver->unbind(&dev->gadget);
1369         dev->gadget.dev.driver = NULL;
1370         dev->driver = NULL;
1371
1372         device_del (&dev->gadget.dev);
1373
1374         DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1375         dump_state(dev);
1376         return 0;
1377 }
1378
1379 /*-------------------------------------------------------------------------*/
1380
1381 #ifdef CONFIG_ARCH_LUBBOCK
1382
1383 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1384  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1385  */
1386
1387 static irqreturn_t
1388 lubbock_vbus_irq(int irq, void *_dev)
1389 {
1390         struct pxa25x_udc       *dev = _dev;
1391         int                     vbus;
1392
1393         dev->stats.irqs++;
1394         switch (irq) {
1395         case LUBBOCK_USB_IRQ:
1396                 vbus = 1;
1397                 disable_irq(LUBBOCK_USB_IRQ);
1398                 enable_irq(LUBBOCK_USB_DISC_IRQ);
1399                 break;
1400         case LUBBOCK_USB_DISC_IRQ:
1401                 vbus = 0;
1402                 disable_irq(LUBBOCK_USB_DISC_IRQ);
1403                 enable_irq(LUBBOCK_USB_IRQ);
1404                 break;
1405         default:
1406                 return IRQ_NONE;
1407         }
1408
1409         pxa25x_udc_vbus_session(&dev->gadget, vbus);
1410         return IRQ_HANDLED;
1411 }
1412
1413 #endif
1414
1415
1416 /*-------------------------------------------------------------------------*/
1417
1418 static inline void clear_ep_state (struct pxa25x_udc *dev)
1419 {
1420         unsigned i;
1421
1422         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1423          * fifos, and pending transactions mustn't be continued in any case.
1424          */
1425         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1426                 nuke(&dev->ep[i], -ECONNABORTED);
1427 }
1428
1429 static void udc_watchdog(unsigned long _dev)
1430 {
1431         struct pxa25x_udc       *dev = (void *)_dev;
1432
1433         local_irq_disable();
1434         if (dev->ep0state == EP0_STALL
1435                         && (UDCCS0 & UDCCS0_FST) == 0
1436                         && (UDCCS0 & UDCCS0_SST) == 0) {
1437                 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1438                 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1439                 start_watchdog(dev);
1440         }
1441         local_irq_enable();
1442 }
1443
1444 static void handle_ep0 (struct pxa25x_udc *dev)
1445 {
1446         u32                     udccs0 = UDCCS0;
1447         struct pxa25x_ep        *ep = &dev->ep [0];
1448         struct pxa25x_request   *req;
1449         union {
1450                 struct usb_ctrlrequest  r;
1451                 u8                      raw [8];
1452                 u32                     word [2];
1453         } u;
1454
1455         if (list_empty(&ep->queue))
1456                 req = NULL;
1457         else
1458                 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1459
1460         /* clear stall status */
1461         if (udccs0 & UDCCS0_SST) {
1462                 nuke(ep, -EPIPE);
1463                 UDCCS0 = UDCCS0_SST;
1464                 del_timer(&dev->timer);
1465                 ep0_idle(dev);
1466         }
1467
1468         /* previous request unfinished?  non-error iff back-to-back ... */
1469         if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1470                 nuke(ep, 0);
1471                 del_timer(&dev->timer);
1472                 ep0_idle(dev);
1473         }
1474
1475         switch (dev->ep0state) {
1476         case EP0_IDLE:
1477                 /* late-breaking status? */
1478                 udccs0 = UDCCS0;
1479
1480                 /* start control request? */
1481                 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1482                                 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1483                         int i;
1484
1485                         nuke (ep, -EPROTO);
1486
1487                         /* read SETUP packet */
1488                         for (i = 0; i < 8; i++) {
1489                                 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1490 bad_setup:
1491                                         DMSG("SETUP %d!\n", i);
1492                                         goto stall;
1493                                 }
1494                                 u.raw [i] = (u8) UDDR0;
1495                         }
1496                         if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1497                                 goto bad_setup;
1498
1499 got_setup:
1500                         DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1501                                 u.r.bRequestType, u.r.bRequest,
1502                                 le16_to_cpu(u.r.wValue),
1503                                 le16_to_cpu(u.r.wIndex),
1504                                 le16_to_cpu(u.r.wLength));
1505
1506                         /* cope with automagic for some standard requests. */
1507                         dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1508                                                 == USB_TYPE_STANDARD;
1509                         dev->req_config = 0;
1510                         dev->req_pending = 1;
1511                         switch (u.r.bRequest) {
1512                         /* hardware restricts gadget drivers here! */
1513                         case USB_REQ_SET_CONFIGURATION:
1514                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1515                                         /* reflect hardware's automagic
1516                                          * up to the gadget driver.
1517                                          */
1518 config_change:
1519                                         dev->req_config = 1;
1520                                         clear_ep_state(dev);
1521                                         /* if !has_cfr, there's no synch
1522                                          * else use AREN (later) not SA|OPR
1523                                          * USIR0_IR0 acts edge sensitive
1524                                          */
1525                                 }
1526                                 break;
1527                         /* ... and here, even more ... */
1528                         case USB_REQ_SET_INTERFACE:
1529                                 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1530                                         /* udc hardware is broken by design:
1531                                          *  - altsetting may only be zero;
1532                                          *  - hw resets all interfaces' eps;
1533                                          *  - ep reset doesn't include halt(?).
1534                                          */
1535                                         DMSG("broken set_interface (%d/%d)\n",
1536                                                 le16_to_cpu(u.r.wIndex),
1537                                                 le16_to_cpu(u.r.wValue));
1538                                         goto config_change;
1539                                 }
1540                                 break;
1541                         /* hardware was supposed to hide this */
1542                         case USB_REQ_SET_ADDRESS:
1543                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1544                                         ep0start(dev, 0, "address");
1545                                         return;
1546                                 }
1547                                 break;
1548                         }
1549
1550                         if (u.r.bRequestType & USB_DIR_IN)
1551                                 dev->ep0state = EP0_IN_DATA_PHASE;
1552                         else
1553                                 dev->ep0state = EP0_OUT_DATA_PHASE;
1554
1555                         i = dev->driver->setup(&dev->gadget, &u.r);
1556                         if (i < 0) {
1557                                 /* hardware automagic preventing STALL... */
1558                                 if (dev->req_config) {
1559                                         /* hardware sometimes neglects to tell
1560                                          * tell us about config change events,
1561                                          * so later ones may fail...
1562                                          */
1563                                         WARNING("config change %02x fail %d?\n",
1564                                                 u.r.bRequest, i);
1565                                         return;
1566                                         /* TODO experiment:  if has_cfr,
1567                                          * hardware didn't ACK; maybe we
1568                                          * could actually STALL!
1569                                          */
1570                                 }
1571                                 DBG(DBG_VERBOSE, "protocol STALL, "
1572                                         "%02x err %d\n", UDCCS0, i);
1573 stall:
1574                                 /* the watchdog timer helps deal with cases
1575                                  * where udc seems to clear FST wrongly, and
1576                                  * then NAKs instead of STALLing.
1577                                  */
1578                                 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1579                                 start_watchdog(dev);
1580                                 dev->ep0state = EP0_STALL;
1581
1582                         /* deferred i/o == no response yet */
1583                         } else if (dev->req_pending) {
1584                                 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1585                                                 || dev->req_std || u.r.wLength))
1586                                         ep0start(dev, 0, "defer");
1587                                 else
1588                                         ep0start(dev, UDCCS0_IPR, "defer/IPR");
1589                         }
1590
1591                         /* expect at least one data or status stage irq */
1592                         return;
1593
1594                 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1595                                 == (UDCCS0_OPR|UDCCS0_SA))) {
1596                         unsigned i;
1597
1598                         /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1599                          * still observed on a pxa255 a0.
1600                          */
1601                         DBG(DBG_VERBOSE, "e131\n");
1602                         nuke(ep, -EPROTO);
1603
1604                         /* read SETUP data, but don't trust it too much */
1605                         for (i = 0; i < 8; i++)
1606                                 u.raw [i] = (u8) UDDR0;
1607                         if ((u.r.bRequestType & USB_RECIP_MASK)
1608                                         > USB_RECIP_OTHER)
1609                                 goto stall;
1610                         if (u.word [0] == 0 && u.word [1] == 0)
1611                                 goto stall;
1612                         goto got_setup;
1613                 } else {
1614                         /* some random early IRQ:
1615                          * - we acked FST
1616                          * - IPR cleared
1617                          * - OPR got set, without SA (likely status stage)
1618                          */
1619                         UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1620                 }
1621                 break;
1622         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
1623                 if (udccs0 & UDCCS0_OPR) {
1624                         UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1625                         DBG(DBG_VERBOSE, "ep0in premature status\n");
1626                         if (req)
1627                                 done(ep, req, 0);
1628                         ep0_idle(dev);
1629                 } else /* irq was IPR clearing */ {
1630                         if (req) {
1631                                 /* this IN packet might finish the request */
1632                                 (void) write_ep0_fifo(ep, req);
1633                         } /* else IN token before response was written */
1634                 }
1635                 break;
1636         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
1637                 if (udccs0 & UDCCS0_OPR) {
1638                         if (req) {
1639                                 /* this OUT packet might finish the request */
1640                                 if (read_ep0_fifo(ep, req))
1641                                         done(ep, req, 0);
1642                                 /* else more OUT packets expected */
1643                         } /* else OUT token before read was issued */
1644                 } else /* irq was IPR clearing */ {
1645                         DBG(DBG_VERBOSE, "ep0out premature status\n");
1646                         if (req)
1647                                 done(ep, req, 0);
1648                         ep0_idle(dev);
1649                 }
1650                 break;
1651         case EP0_END_XFER:
1652                 if (req)
1653                         done(ep, req, 0);
1654                 /* ack control-IN status (maybe in-zlp was skipped)
1655                  * also appears after some config change events.
1656                  */
1657                 if (udccs0 & UDCCS0_OPR)
1658                         UDCCS0 = UDCCS0_OPR;
1659                 ep0_idle(dev);
1660                 break;
1661         case EP0_STALL:
1662                 UDCCS0 = UDCCS0_FST;
1663                 break;
1664         }
1665         USIR0 = USIR0_IR0;
1666 }
1667
1668 static void handle_ep(struct pxa25x_ep *ep)
1669 {
1670         struct pxa25x_request   *req;
1671         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
1672         int                     completed;
1673         u32                     udccs, tmp;
1674
1675         do {
1676                 completed = 0;
1677                 if (likely (!list_empty(&ep->queue)))
1678                         req = list_entry(ep->queue.next,
1679                                         struct pxa25x_request, queue);
1680                 else
1681                         req = NULL;
1682
1683                 // TODO check FST handling
1684
1685                 udccs = *ep->reg_udccs;
1686                 if (unlikely(is_in)) {  /* irq from TPC, SST, or (ISO) TUR */
1687                         tmp = UDCCS_BI_TUR;
1688                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1689                                 tmp |= UDCCS_BI_SST;
1690                         tmp &= udccs;
1691                         if (likely (tmp))
1692                                 *ep->reg_udccs = tmp;
1693                         if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1694                                 completed = write_fifo(ep, req);
1695
1696                 } else {        /* irq from RPC (or for ISO, ROF) */
1697                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1698                                 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1699                         else
1700                                 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1701                         tmp &= udccs;
1702                         if (likely(tmp))
1703                                 *ep->reg_udccs = tmp;
1704
1705                         /* fifos can hold packets, ready for reading... */
1706                         if (likely(req)) {
1707                                 completed = read_fifo(ep, req);
1708                         } else
1709                                 pio_irq_disable (ep->bEndpointAddress);
1710                 }
1711                 ep->pio_irqs++;
1712         } while (completed);
1713 }
1714
1715 /*
1716  *      pxa25x_udc_irq - interrupt handler
1717  *
1718  * avoid delays in ep0 processing. the control handshaking isn't always
1719  * under software control (pxa250c0 and the pxa255 are better), and delays
1720  * could cause usb protocol errors.
1721  */
1722 static irqreturn_t
1723 pxa25x_udc_irq(int irq, void *_dev)
1724 {
1725         struct pxa25x_udc       *dev = _dev;
1726         int                     handled;
1727
1728         dev->stats.irqs++;
1729         do {
1730                 u32             udccr = UDCCR;
1731
1732                 handled = 0;
1733
1734                 /* SUSpend Interrupt Request */
1735                 if (unlikely(udccr & UDCCR_SUSIR)) {
1736                         udc_ack_int_UDCCR(UDCCR_SUSIR);
1737                         handled = 1;
1738                         DBG(DBG_VERBOSE, "USB suspend\n");
1739
1740                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1741                                         && dev->driver
1742                                         && dev->driver->suspend)
1743                                 dev->driver->suspend(&dev->gadget);
1744                         ep0_idle (dev);
1745                 }
1746
1747                 /* RESume Interrupt Request */
1748                 if (unlikely(udccr & UDCCR_RESIR)) {
1749                         udc_ack_int_UDCCR(UDCCR_RESIR);
1750                         handled = 1;
1751                         DBG(DBG_VERBOSE, "USB resume\n");
1752
1753                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1754                                         && dev->driver
1755                                         && dev->driver->resume)
1756                                 dev->driver->resume(&dev->gadget);
1757                 }
1758
1759                 /* ReSeT Interrupt Request - USB reset */
1760                 if (unlikely(udccr & UDCCR_RSTIR)) {
1761                         udc_ack_int_UDCCR(UDCCR_RSTIR);
1762                         handled = 1;
1763
1764                         if ((UDCCR & UDCCR_UDA) == 0) {
1765                                 DBG(DBG_VERBOSE, "USB reset start\n");
1766
1767                                 /* reset driver and endpoints,
1768                                  * in case that's not yet done
1769                                  */
1770                                 stop_activity (dev, dev->driver);
1771
1772                         } else {
1773                                 DBG(DBG_VERBOSE, "USB reset end\n");
1774                                 dev->gadget.speed = USB_SPEED_FULL;
1775                                 memset(&dev->stats, 0, sizeof dev->stats);
1776                                 /* driver and endpoints are still reset */
1777                         }
1778
1779                 } else {
1780                         u32     usir0 = USIR0 & ~UICR0;
1781                         u32     usir1 = USIR1 & ~UICR1;
1782                         int     i;
1783
1784                         if (unlikely (!usir0 && !usir1))
1785                                 continue;
1786
1787                         DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1788
1789                         /* control traffic */
1790                         if (usir0 & USIR0_IR0) {
1791                                 dev->ep[0].pio_irqs++;
1792                                 handle_ep0(dev);
1793                                 handled = 1;
1794                         }
1795
1796                         /* endpoint data transfers */
1797                         for (i = 0; i < 8; i++) {
1798                                 u32     tmp = 1 << i;
1799
1800                                 if (i && (usir0 & tmp)) {
1801                                         handle_ep(&dev->ep[i]);
1802                                         USIR0 |= tmp;
1803                                         handled = 1;
1804                                 }
1805 #ifndef CONFIG_USB_PXA25X_SMALL
1806                                 if (usir1 & tmp) {
1807                                         handle_ep(&dev->ep[i+8]);
1808                                         USIR1 |= tmp;
1809                                         handled = 1;
1810                                 }
1811 #endif
1812                         }
1813                 }
1814
1815                 /* we could also ask for 1 msec SOF (SIR) interrupts */
1816
1817         } while (handled);
1818         return IRQ_HANDLED;
1819 }
1820
1821 /*-------------------------------------------------------------------------*/
1822
1823 static void nop_release (struct device *dev)
1824 {
1825         DMSG("%s %s\n", __func__, dev_name(dev));
1826 }
1827
1828 /* this uses load-time allocation and initialization (instead of
1829  * doing it at run-time) to save code, eliminate fault paths, and
1830  * be more obviously correct.
1831  */
1832 static struct pxa25x_udc memory = {
1833         .gadget = {
1834                 .ops            = &pxa25x_udc_ops,
1835                 .ep0            = &memory.ep[0].ep,
1836                 .name           = driver_name,
1837                 .dev = {
1838                         .init_name      = "gadget",
1839                         .release        = nop_release,
1840                 },
1841         },
1842
1843         /* control endpoint */
1844         .ep[0] = {
1845                 .ep = {
1846                         .name           = ep0name,
1847                         .ops            = &pxa25x_ep_ops,
1848                         .maxpacket      = EP0_FIFO_SIZE,
1849                 },
1850                 .dev            = &memory,
1851                 .reg_udccs      = &UDCCS0,
1852                 .reg_uddr       = &UDDR0,
1853         },
1854
1855         /* first group of endpoints */
1856         .ep[1] = {
1857                 .ep = {
1858                         .name           = "ep1in-bulk",
1859                         .ops            = &pxa25x_ep_ops,
1860                         .maxpacket      = BULK_FIFO_SIZE,
1861                 },
1862                 .dev            = &memory,
1863                 .fifo_size      = BULK_FIFO_SIZE,
1864                 .bEndpointAddress = USB_DIR_IN | 1,
1865                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1866                 .reg_udccs      = &UDCCS1,
1867                 .reg_uddr       = &UDDR1,
1868         },
1869         .ep[2] = {
1870                 .ep = {
1871                         .name           = "ep2out-bulk",
1872                         .ops            = &pxa25x_ep_ops,
1873                         .maxpacket      = BULK_FIFO_SIZE,
1874                 },
1875                 .dev            = &memory,
1876                 .fifo_size      = BULK_FIFO_SIZE,
1877                 .bEndpointAddress = 2,
1878                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1879                 .reg_udccs      = &UDCCS2,
1880                 .reg_ubcr       = &UBCR2,
1881                 .reg_uddr       = &UDDR2,
1882         },
1883 #ifndef CONFIG_USB_PXA25X_SMALL
1884         .ep[3] = {
1885                 .ep = {
1886                         .name           = "ep3in-iso",
1887                         .ops            = &pxa25x_ep_ops,
1888                         .maxpacket      = ISO_FIFO_SIZE,
1889                 },
1890                 .dev            = &memory,
1891                 .fifo_size      = ISO_FIFO_SIZE,
1892                 .bEndpointAddress = USB_DIR_IN | 3,
1893                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1894                 .reg_udccs      = &UDCCS3,
1895                 .reg_uddr       = &UDDR3,
1896         },
1897         .ep[4] = {
1898                 .ep = {
1899                         .name           = "ep4out-iso",
1900                         .ops            = &pxa25x_ep_ops,
1901                         .maxpacket      = ISO_FIFO_SIZE,
1902                 },
1903                 .dev            = &memory,
1904                 .fifo_size      = ISO_FIFO_SIZE,
1905                 .bEndpointAddress = 4,
1906                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1907                 .reg_udccs      = &UDCCS4,
1908                 .reg_ubcr       = &UBCR4,
1909                 .reg_uddr       = &UDDR4,
1910         },
1911         .ep[5] = {
1912                 .ep = {
1913                         .name           = "ep5in-int",
1914                         .ops            = &pxa25x_ep_ops,
1915                         .maxpacket      = INT_FIFO_SIZE,
1916                 },
1917                 .dev            = &memory,
1918                 .fifo_size      = INT_FIFO_SIZE,
1919                 .bEndpointAddress = USB_DIR_IN | 5,
1920                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1921                 .reg_udccs      = &UDCCS5,
1922                 .reg_uddr       = &UDDR5,
1923         },
1924
1925         /* second group of endpoints */
1926         .ep[6] = {
1927                 .ep = {
1928                         .name           = "ep6in-bulk",
1929                         .ops            = &pxa25x_ep_ops,
1930                         .maxpacket      = BULK_FIFO_SIZE,
1931                 },
1932                 .dev            = &memory,
1933                 .fifo_size      = BULK_FIFO_SIZE,
1934                 .bEndpointAddress = USB_DIR_IN | 6,
1935                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1936                 .reg_udccs      = &UDCCS6,
1937                 .reg_uddr       = &UDDR6,
1938         },
1939         .ep[7] = {
1940                 .ep = {
1941                         .name           = "ep7out-bulk",
1942                         .ops            = &pxa25x_ep_ops,
1943                         .maxpacket      = BULK_FIFO_SIZE,
1944                 },
1945                 .dev            = &memory,
1946                 .fifo_size      = BULK_FIFO_SIZE,
1947                 .bEndpointAddress = 7,
1948                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1949                 .reg_udccs      = &UDCCS7,
1950                 .reg_ubcr       = &UBCR7,
1951                 .reg_uddr       = &UDDR7,
1952         },
1953         .ep[8] = {
1954                 .ep = {
1955                         .name           = "ep8in-iso",
1956                         .ops            = &pxa25x_ep_ops,
1957                         .maxpacket      = ISO_FIFO_SIZE,
1958                 },
1959                 .dev            = &memory,
1960                 .fifo_size      = ISO_FIFO_SIZE,
1961                 .bEndpointAddress = USB_DIR_IN | 8,
1962                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1963                 .reg_udccs      = &UDCCS8,
1964                 .reg_uddr       = &UDDR8,
1965         },
1966         .ep[9] = {
1967                 .ep = {
1968                         .name           = "ep9out-iso",
1969                         .ops            = &pxa25x_ep_ops,
1970                         .maxpacket      = ISO_FIFO_SIZE,
1971                 },
1972                 .dev            = &memory,
1973                 .fifo_size      = ISO_FIFO_SIZE,
1974                 .bEndpointAddress = 9,
1975                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1976                 .reg_udccs      = &UDCCS9,
1977                 .reg_ubcr       = &UBCR9,
1978                 .reg_uddr       = &UDDR9,
1979         },
1980         .ep[10] = {
1981                 .ep = {
1982                         .name           = "ep10in-int",
1983                         .ops            = &pxa25x_ep_ops,
1984                         .maxpacket      = INT_FIFO_SIZE,
1985                 },
1986                 .dev            = &memory,
1987                 .fifo_size      = INT_FIFO_SIZE,
1988                 .bEndpointAddress = USB_DIR_IN | 10,
1989                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1990                 .reg_udccs      = &UDCCS10,
1991                 .reg_uddr       = &UDDR10,
1992         },
1993
1994         /* third group of endpoints */
1995         .ep[11] = {
1996                 .ep = {
1997                         .name           = "ep11in-bulk",
1998                         .ops            = &pxa25x_ep_ops,
1999                         .maxpacket      = BULK_FIFO_SIZE,
2000                 },
2001                 .dev            = &memory,
2002                 .fifo_size      = BULK_FIFO_SIZE,
2003                 .bEndpointAddress = USB_DIR_IN | 11,
2004                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2005                 .reg_udccs      = &UDCCS11,
2006                 .reg_uddr       = &UDDR11,
2007         },
2008         .ep[12] = {
2009                 .ep = {
2010                         .name           = "ep12out-bulk",
2011                         .ops            = &pxa25x_ep_ops,
2012                         .maxpacket      = BULK_FIFO_SIZE,
2013                 },
2014                 .dev            = &memory,
2015                 .fifo_size      = BULK_FIFO_SIZE,
2016                 .bEndpointAddress = 12,
2017                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2018                 .reg_udccs      = &UDCCS12,
2019                 .reg_ubcr       = &UBCR12,
2020                 .reg_uddr       = &UDDR12,
2021         },
2022         .ep[13] = {
2023                 .ep = {
2024                         .name           = "ep13in-iso",
2025                         .ops            = &pxa25x_ep_ops,
2026                         .maxpacket      = ISO_FIFO_SIZE,
2027                 },
2028                 .dev            = &memory,
2029                 .fifo_size      = ISO_FIFO_SIZE,
2030                 .bEndpointAddress = USB_DIR_IN | 13,
2031                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2032                 .reg_udccs      = &UDCCS13,
2033                 .reg_uddr       = &UDDR13,
2034         },
2035         .ep[14] = {
2036                 .ep = {
2037                         .name           = "ep14out-iso",
2038                         .ops            = &pxa25x_ep_ops,
2039                         .maxpacket      = ISO_FIFO_SIZE,
2040                 },
2041                 .dev            = &memory,
2042                 .fifo_size      = ISO_FIFO_SIZE,
2043                 .bEndpointAddress = 14,
2044                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2045                 .reg_udccs      = &UDCCS14,
2046                 .reg_ubcr       = &UBCR14,
2047                 .reg_uddr       = &UDDR14,
2048         },
2049         .ep[15] = {
2050                 .ep = {
2051                         .name           = "ep15in-int",
2052                         .ops            = &pxa25x_ep_ops,
2053                         .maxpacket      = INT_FIFO_SIZE,
2054                 },
2055                 .dev            = &memory,
2056                 .fifo_size      = INT_FIFO_SIZE,
2057                 .bEndpointAddress = USB_DIR_IN | 15,
2058                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2059                 .reg_udccs      = &UDCCS15,
2060                 .reg_uddr       = &UDDR15,
2061         },
2062 #endif /* !CONFIG_USB_PXA25X_SMALL */
2063 };
2064
2065 #define CP15R0_VENDOR_MASK      0xffffe000
2066
2067 #if     defined(CONFIG_ARCH_PXA)
2068 #define CP15R0_XSCALE_VALUE     0x69052000      /* intel/arm/xscale */
2069
2070 #elif   defined(CONFIG_ARCH_IXP4XX)
2071 #define CP15R0_XSCALE_VALUE     0x69054000      /* intel/arm/ixp4xx */
2072
2073 #endif
2074
2075 #define CP15R0_PROD_MASK        0x000003f0
2076 #define PXA25x                  0x00000100      /* and PXA26x */
2077 #define PXA210                  0x00000120
2078
2079 #define CP15R0_REV_MASK         0x0000000f
2080
2081 #define CP15R0_PRODREV_MASK     (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2082
2083 #define PXA255_A0               0x00000106      /* or PXA260_B1 */
2084 #define PXA250_C0               0x00000105      /* or PXA26x_B0 */
2085 #define PXA250_B2               0x00000104
2086 #define PXA250_B1               0x00000103      /* or PXA260_A0 */
2087 #define PXA250_B0               0x00000102
2088 #define PXA250_A1               0x00000101
2089 #define PXA250_A0               0x00000100
2090
2091 #define PXA210_C0               0x00000125
2092 #define PXA210_B2               0x00000124
2093 #define PXA210_B1               0x00000123
2094 #define PXA210_B0               0x00000122
2095 #define IXP425_A0               0x000001c1
2096 #define IXP425_B0               0x000001f1
2097 #define IXP465_AD               0x00000200
2098
2099 /*
2100  *      probe - binds to the platform device
2101  */
2102 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2103 {
2104         struct pxa25x_udc *dev = &memory;
2105         int retval, irq;
2106         u32 chiprev;
2107
2108         /* insist on Intel/ARM/XScale */
2109         asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2110         if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2111                 pr_err("%s: not XScale!\n", driver_name);
2112                 return -ENODEV;
2113         }
2114
2115         /* trigger chiprev-specific logic */
2116         switch (chiprev & CP15R0_PRODREV_MASK) {
2117 #if     defined(CONFIG_ARCH_PXA)
2118         case PXA255_A0:
2119                 dev->has_cfr = 1;
2120                 break;
2121         case PXA250_A0:
2122         case PXA250_A1:
2123                 /* A0/A1 "not released"; ep 13, 15 unusable */
2124                 /* fall through */
2125         case PXA250_B2: case PXA210_B2:
2126         case PXA250_B1: case PXA210_B1:
2127         case PXA250_B0: case PXA210_B0:
2128                 /* OUT-DMA is broken ... */
2129                 /* fall through */
2130         case PXA250_C0: case PXA210_C0:
2131                 break;
2132 #elif   defined(CONFIG_ARCH_IXP4XX)
2133         case IXP425_A0:
2134         case IXP425_B0:
2135         case IXP465_AD:
2136                 dev->has_cfr = 1;
2137                 break;
2138 #endif
2139         default:
2140                 pr_err("%s: unrecognized processor: %08x\n",
2141                         driver_name, chiprev);
2142                 /* iop3xx, ixp4xx, ... */
2143                 return -ENODEV;
2144         }
2145
2146         irq = platform_get_irq(pdev, 0);
2147         if (irq < 0)
2148                 return -ENODEV;
2149
2150         dev->clk = clk_get(&pdev->dev, NULL);
2151         if (IS_ERR(dev->clk)) {
2152                 retval = PTR_ERR(dev->clk);
2153                 goto err_clk;
2154         }
2155
2156         pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2157                 dev->has_cfr ? "" : " (!cfr)",
2158                 SIZE_STR "(pio)"
2159                 );
2160
2161         /* other non-static parts of init */
2162         dev->dev = &pdev->dev;
2163         dev->mach = pdev->dev.platform_data;
2164
2165         dev->transceiver = usb_get_transceiver();
2166
2167         if (gpio_is_valid(dev->mach->gpio_pullup)) {
2168                 if ((retval = gpio_request(dev->mach->gpio_pullup,
2169                                 "pca25x_udc GPIO PULLUP"))) {
2170                         dev_dbg(&pdev->dev,
2171                                 "can't get pullup gpio %d, err: %d\n",
2172                                 dev->mach->gpio_pullup, retval);
2173                         goto err_gpio_pullup;
2174                 }
2175                 gpio_direction_output(dev->mach->gpio_pullup, 0);
2176         }
2177
2178         init_timer(&dev->timer);
2179         dev->timer.function = udc_watchdog;
2180         dev->timer.data = (unsigned long) dev;
2181
2182         device_initialize(&dev->gadget.dev);
2183         dev->gadget.dev.parent = &pdev->dev;
2184         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2185
2186         the_controller = dev;
2187         platform_set_drvdata(pdev, dev);
2188
2189         udc_disable(dev);
2190         udc_reinit(dev);
2191
2192         dev->vbus = 0;
2193
2194         /* irq setup after old hardware state is cleaned up */
2195         retval = request_irq(irq, pxa25x_udc_irq,
2196                         0, driver_name, dev);
2197         if (retval != 0) {
2198                 pr_err("%s: can't get irq %d, err %d\n",
2199                         driver_name, irq, retval);
2200                 goto err_irq1;
2201         }
2202         dev->got_irq = 1;
2203
2204 #ifdef CONFIG_ARCH_LUBBOCK
2205         if (machine_is_lubbock()) {
2206                 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2207                                 lubbock_vbus_irq,
2208                                 IRQF_SAMPLE_RANDOM,
2209                                 driver_name, dev);
2210                 if (retval != 0) {
2211                         pr_err("%s: can't get irq %i, err %d\n",
2212                                 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2213                         goto err_irq_lub;
2214                 }
2215                 retval = request_irq(LUBBOCK_USB_IRQ,
2216                                 lubbock_vbus_irq,
2217                                 IRQF_SAMPLE_RANDOM,
2218                                 driver_name, dev);
2219                 if (retval != 0) {
2220                         pr_err("%s: can't get irq %i, err %d\n",
2221                                 driver_name, LUBBOCK_USB_IRQ, retval);
2222                         goto lubbock_fail0;
2223                 }
2224         } else
2225 #endif
2226         create_debug_files(dev);
2227
2228         retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
2229         if (!retval)
2230                 return retval;
2231
2232         remove_debug_files(dev);
2233 #ifdef  CONFIG_ARCH_LUBBOCK
2234 lubbock_fail0:
2235         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2236  err_irq_lub:
2237         free_irq(irq, dev);
2238 #endif
2239  err_irq1:
2240         if (gpio_is_valid(dev->mach->gpio_pullup))
2241                 gpio_free(dev->mach->gpio_pullup);
2242  err_gpio_pullup:
2243         if (dev->transceiver) {
2244                 usb_put_transceiver(dev->transceiver);
2245                 dev->transceiver = NULL;
2246         }
2247         clk_put(dev->clk);
2248  err_clk:
2249         return retval;
2250 }
2251
2252 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2253 {
2254         pullup_off();
2255 }
2256
2257 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2258 {
2259         struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2260
2261         usb_del_gadget_udc(&dev->gadget);
2262         if (dev->driver)
2263                 return -EBUSY;
2264
2265         dev->pullup = 0;
2266         pullup(dev);
2267
2268         remove_debug_files(dev);
2269
2270         if (dev->got_irq) {
2271                 free_irq(platform_get_irq(pdev, 0), dev);
2272                 dev->got_irq = 0;
2273         }
2274 #ifdef CONFIG_ARCH_LUBBOCK
2275         if (machine_is_lubbock()) {
2276                 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2277                 free_irq(LUBBOCK_USB_IRQ, dev);
2278         }
2279 #endif
2280         if (gpio_is_valid(dev->mach->gpio_pullup))
2281                 gpio_free(dev->mach->gpio_pullup);
2282
2283         clk_put(dev->clk);
2284
2285         if (dev->transceiver) {
2286                 usb_put_transceiver(dev->transceiver);
2287                 dev->transceiver = NULL;
2288         }
2289
2290         platform_set_drvdata(pdev, NULL);
2291         the_controller = NULL;
2292         return 0;
2293 }
2294
2295 /*-------------------------------------------------------------------------*/
2296
2297 #ifdef  CONFIG_PM
2298
2299 /* USB suspend (controlled by the host) and system suspend (controlled
2300  * by the PXA) don't necessarily work well together.  If USB is active,
2301  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2302  * mode, or any deeper PM saving state.
2303  *
2304  * For now, we punt and forcibly disconnect from the USB host when PXA
2305  * enters any suspend state.  While we're disconnected, we always disable
2306  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2307  * Boards without software pullup control shouldn't use those states.
2308  * VBUS IRQs should probably be ignored so that the PXA device just acts
2309  * "dead" to USB hosts until system resume.
2310  */
2311 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2312 {
2313         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2314         unsigned long flags;
2315
2316         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2317                 WARNING("USB host won't detect disconnect!\n");
2318         udc->suspended = 1;
2319
2320         local_irq_save(flags);
2321         pullup(udc);
2322         local_irq_restore(flags);
2323
2324         return 0;
2325 }
2326
2327 static int pxa25x_udc_resume(struct platform_device *dev)
2328 {
2329         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2330         unsigned long flags;
2331
2332         udc->suspended = 0;
2333         local_irq_save(flags);
2334         pullup(udc);
2335         local_irq_restore(flags);
2336
2337         return 0;
2338 }
2339
2340 #else
2341 #define pxa25x_udc_suspend      NULL
2342 #define pxa25x_udc_resume       NULL
2343 #endif
2344
2345 /*-------------------------------------------------------------------------*/
2346
2347 static struct platform_driver udc_driver = {
2348         .shutdown       = pxa25x_udc_shutdown,
2349         .remove         = __exit_p(pxa25x_udc_remove),
2350         .suspend        = pxa25x_udc_suspend,
2351         .resume         = pxa25x_udc_resume,
2352         .driver         = {
2353                 .owner  = THIS_MODULE,
2354                 .name   = "pxa25x-udc",
2355         },
2356 };
2357
2358 static int __init udc_init(void)
2359 {
2360         pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2361         return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2362 }
2363 module_init(udc_init);
2364
2365 static void __exit udc_exit(void)
2366 {
2367         platform_driver_unregister(&udc_driver);
2368 }
2369 module_exit(udc_exit);
2370
2371 MODULE_DESCRIPTION(DRIVER_DESC);
2372 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2373 MODULE_LICENSE("GPL");
2374 MODULE_ALIAS("platform:pxa25x-udc");