Pileus Git - ~andy/linux/blob - drivers/usb/gadget/pxa25x_udc.c

   1 /*
   2  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
   3  *
   4  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
   5  * Copyright (C) 2003 Robert Schwebel, Pengutronix
   6  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
   7  * Copyright (C) 2003 David Brownell
   8  * Copyright (C) 2003 Joshua Wise
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  */
  15
  16 /* #define VERBOSE_DEBUG */
  17
  18 #include <linux/device.h>
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/ioport.h>
  22 #include <linux/types.h>
  23 #include <linux/errno.h>
  24 #include <linux/err.h>
  25 #include <linux/delay.h>
  26 #include <linux/slab.h>
  27 #include <linux/init.h>
  28 #include <linux/timer.h>
  29 #include <linux/list.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/mm.h>
  32 #include <linux/platform_data/pxa2xx_udc.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/irq.h>
  36 #include <linux/clk.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/debugfs.h>
  39 #include <linux/io.h>
  40 #include <linux/prefetch.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/dma.h>
  44 #include <asm/gpio.h>
  45 #include <asm/mach-types.h>
  46 #include <asm/unaligned.h>
  47
  48 #include <linux/usb/ch9.h>
  49 #include <linux/usb/gadget.h>
  50 #include <linux/usb/otg.h>
  51
  52 /*
  53  * This driver is PXA25x only.  Grab the right register definitions.
  54  */
  55 #ifdef CONFIG_ARCH_PXA
  56 #include <mach/pxa25x-udc.h>
  57 #endif
  58
  59 #ifdef CONFIG_ARCH_LUBBOCK
  60 #include <mach/lubbock.h>
  61 #endif
  62
  63 /*
  64  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
  65  * series processors.  The UDC for the IXP 4xx series is very similar.
  66  * There are fifteen endpoints, in addition to ep0.
  67  *
  68  * Such controller drivers work with a gadget driver.  The gadget driver
  69  * returns descriptors, implements configuration and data protocols used
  70  * by the host to interact with this device, and allocates endpoints to
  71  * the different protocol interfaces.  The controller driver virtualizes
  72  * usb hardware so that the gadget drivers will be more portable.
  73  *
  74  * This UDC hardware wants to implement a bit too much USB protocol, so
  75  * it constrains the sorts of USB configuration change events that work.
  76  * The errata for these chips are misleading; some "fixed" bugs from
  77  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
  78  *
  79  * Note that the UDC hardware supports DMA (except on IXP) but that's
  80  * not used here.  IN-DMA (to host) is simple enough, when the data is
  81  * suitably aligned (16 bytes) ... the network stack doesn't do that,
  82  * other software can.  OUT-DMA is buggy in most chip versions, as well
  83  * as poorly designed (data toggle not automatic).  So this driver won't
  84  * bother using DMA.  (Mostly-working IN-DMA support was available in
  85  * kernels before 2.6.23, but was never enabled or well tested.)
  86  */
  87
  88 #define DRIVER_VERSION  "30-June-2007"
  89 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
  90
  91
  92 static const char driver_name [] = "pxa25x_udc";
  93
  94 static const char ep0name [] = "ep0";
  95
  96
  97 #ifdef CONFIG_ARCH_IXP4XX
  98
  99 /* cpu-specific register addresses are compiled in to this code */
 100 #ifdef CONFIG_ARCH_PXA
 101 #error "Can't configure both IXP and PXA"
 102 #endif
 103
 104 /* IXP doesn't yet support <linux/clk.h> */
 105 #define clk_get(dev,name)       NULL
 106 #define clk_enable(clk)         do { } while (0)
 107 #define clk_disable(clk)        do { } while (0)
 108 #define clk_put(clk)            do { } while (0)
 109
 110 #endif
 111
 112 #include "pxa25x_udc.h"
 113
 114
 115 #ifdef  CONFIG_USB_PXA25X_SMALL
 116 #define SIZE_STR        " (small)"
 117 #else
 118 #define SIZE_STR        ""
 119 #endif
 120
 121 /* ---------------------------------------------------------------------------
 122  *      endpoint related parts of the api to the usb controller hardware,
 123  *      used by gadget driver; and the inner talker-to-hardware core.
 124  * ---------------------------------------------------------------------------
 125  */
 126
 127 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
 128 static void nuke (struct pxa25x_ep *, int status);
 129
 130 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
 131 static void pullup_off(void)
 132 {
 133         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 134         int off_level = mach->gpio_pullup_inverted;
 135
 136         if (gpio_is_valid(mach->gpio_pullup))
 137                 gpio_set_value(mach->gpio_pullup, off_level);
 138         else if (mach->udc_command)
 139                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
 140 }
 141
 142 static void pullup_on(void)
 143 {
 144         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 145         int on_level = !mach->gpio_pullup_inverted;
 146
 147         if (gpio_is_valid(mach->gpio_pullup))
 148                 gpio_set_value(mach->gpio_pullup, on_level);
 149         else if (mach->udc_command)
 150                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
 151 }
 152
 153 static void pio_irq_enable(int bEndpointAddress)
 154 {
 155         bEndpointAddress &= 0xf;
 156         if (bEndpointAddress < 8)
 157                 UICR0 &= ~(1 << bEndpointAddress);
 158         else {
 159                 bEndpointAddress -= 8;
 160                 UICR1 &= ~(1 << bEndpointAddress);
 161         }
 162 }
 163
 164 static void pio_irq_disable(int bEndpointAddress)
 165 {
 166         bEndpointAddress &= 0xf;
 167         if (bEndpointAddress < 8)
 168                 UICR0 |= 1 << bEndpointAddress;
 169         else {
 170                 bEndpointAddress -= 8;
 171                 UICR1 |= 1 << bEndpointAddress;
 172         }
 173 }
 174
 175 /* The UDCCR reg contains mask and interrupt status bits,
 176  * so using '|=' isn't safe as it may ack an interrupt.
 177  */
 178 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
 179
 180 static inline void udc_set_mask_UDCCR(int mask)
 181 {
 182         UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
 183 }
 184
 185 static inline void udc_clear_mask_UDCCR(int mask)
 186 {
 187         UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
 188 }
 189
 190 static inline void udc_ack_int_UDCCR(int mask)
 191 {
 192         /* udccr contains the bits we dont want to change */
 193         __u32 udccr = UDCCR & UDCCR_MASK_BITS;
 194
 195         UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
 196 }
 197
 198 /*
 199  * endpoint enable/disable
 200  *
 201  * we need to verify the descriptors used to enable endpoints.  since pxa25x
 202  * endpoint configurations are fixed, and are pretty much always enabled,
 203  * there's not a lot to manage here.
 204  *
 205  * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
 206  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
 207  * for a single interface (with only the default altsetting) and for gadget
 208  * drivers that don't halt endpoints (not reset by set_interface).  that also
 209  * means that if you use ISO, you must violate the USB spec rule that all
 210  * iso endpoints must be in non-default altsettings.
 211  */
 212 static int pxa25x_ep_enable (struct usb_ep *_ep,
 213                 const struct usb_endpoint_descriptor *desc)
 214 {
 215         struct pxa25x_ep        *ep;
 216         struct pxa25x_udc       *dev;
 217
 218         ep = container_of (_ep, struct pxa25x_ep, ep);
 219         if (!_ep || !desc || _ep->name == ep0name
 220                         || desc->bDescriptorType != USB_DT_ENDPOINT
 221                         || ep->bEndpointAddress != desc->bEndpointAddress
 222                         || ep->fifo_size < usb_endpoint_maxp (desc)) {
 223                 DMSG("%s, bad ep or descriptor\n", __func__);
 224                 return -EINVAL;
 225         }
 226
 227         /* xfer types must match, except that interrupt ~= bulk */
 228         if (ep->bmAttributes != desc->bmAttributes
 229                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 230                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 231                 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
 232                 return -EINVAL;
 233         }
 234
 235         /* hardware _could_ do smaller, but driver doesn't */
 236         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 237                                 && usb_endpoint_maxp (desc)
 238                                                 != BULK_FIFO_SIZE)
 239                         || !desc->wMaxPacketSize) {
 240                 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
 241                 return -ERANGE;
 242         }
 243
 244         dev = ep->dev;
 245         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
 246                 DMSG("%s, bogus device state\n", __func__);
 247                 return -ESHUTDOWN;
 248         }
 249
 250         ep->ep.desc = desc;
 251         ep->stopped = 0;
 252         ep->pio_irqs = 0;
 253         ep->ep.maxpacket = usb_endpoint_maxp (desc);
 254
 255         /* flush fifo (mostly for OUT buffers) */
 256         pxa25x_ep_fifo_flush (_ep);
 257
 258         /* ... reset halt state too, if we could ... */
 259
 260         DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
 261         return 0;
 262 }
 263
 264 static int pxa25x_ep_disable (struct usb_ep *_ep)
 265 {
 266         struct pxa25x_ep        *ep;
 267         unsigned long           flags;
 268
 269         ep = container_of (_ep, struct pxa25x_ep, ep);
 270         if (!_ep || !ep->ep.desc) {
 271                 DMSG("%s, %s not enabled\n", __func__,
 272                         _ep ? ep->ep.name : NULL);
 273                 return -EINVAL;
 274         }
 275         local_irq_save(flags);
 276
 277         nuke (ep, -ESHUTDOWN);
 278
 279         /* flush fifo (mostly for IN buffers) */
 280         pxa25x_ep_fifo_flush (_ep);
 281
 282         ep->ep.desc = NULL;
 283         ep->stopped = 1;
 284
 285         local_irq_restore(flags);
 286         DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
 287         return 0;
 288 }
 289
 290 /*-------------------------------------------------------------------------*/
 291
 292 /* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
 293  * must still pass correctly initialized endpoints, since other controller
 294  * drivers may care about how it's currently set up (dma issues etc).
 295  */
 296
 297 /*
 298  *      pxa25x_ep_alloc_request - allocate a request data structure
 299  */
 300 static struct usb_request *
 301 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
 302 {
 303         struct pxa25x_request *req;
 304
 305         req = kzalloc(sizeof(*req), gfp_flags);
 306         if (!req)
 307                 return NULL;
 308
 309         INIT_LIST_HEAD (&req->queue);
 310         return &req->req;
 311 }
 312
 313
 314 /*
 315  *      pxa25x_ep_free_request - deallocate a request data structure
 316  */
 317 static void
 318 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
 319 {
 320         struct pxa25x_request   *req;
 321
 322         req = container_of (_req, struct pxa25x_request, req);
 323         WARN_ON(!list_empty (&req->queue));
 324         kfree(req);
 325 }
 326
 327 /*-------------------------------------------------------------------------*/
 328
 329 /*
 330  *      done - retire a request; caller blocked irqs
 331  */
 332 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
 333 {
 334         unsigned                stopped = ep->stopped;
 335
 336         list_del_init(&req->queue);
 337
 338         if (likely (req->req.status == -EINPROGRESS))
 339                 req->req.status = status;
 340         else
 341                 status = req->req.status;
 342
 343         if (status && status != -ESHUTDOWN)
 344                 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
 345                         ep->ep.name, &req->req, status,
 346                         req->req.actual, req->req.length);
 347
 348         /* don't modify queue heads during completion callback */
 349         ep->stopped = 1;
 350         req->req.complete(&ep->ep, &req->req);
 351         ep->stopped = stopped;
 352 }
 353
 354
 355 static inline void ep0_idle (struct pxa25x_udc *dev)
 356 {
 357         dev->ep0state = EP0_IDLE;
 358 }
 359
 360 static int
 361 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
 362 {
 363         u8              *buf;
 364         unsigned        length, count;
 365
 366         buf = req->req.buf + req->req.actual;
 367         prefetch(buf);
 368
 369         /* how big will this packet be? */
 370         length = min(req->req.length - req->req.actual, max);
 371         req->req.actual += length;
 372
 373         count = length;
 374         while (likely(count--))
 375                 *uddr = *buf++;
 376
 377         return length;
 378 }
 379
 380 /*
 381  * write to an IN endpoint fifo, as many packets as possible.
 382  * irqs will use this to write the rest later.
 383  * caller guarantees at least one packet buffer is ready (or a zlp).
 384  */
 385 static int
 386 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 387 {
 388         unsigned                max;
 389
 390         max = usb_endpoint_maxp(ep->ep.desc);
 391         do {
 392                 unsigned        count;
 393                 int             is_last, is_short;
 394
 395                 count = write_packet(ep->reg_uddr, req, max);
 396
 397                 /* last packet is usually short (or a zlp) */
 398                 if (unlikely (count != max))
 399                         is_last = is_short = 1;
 400                 else {
 401                         if (likely(req->req.length != req->req.actual)
 402                                         || req->req.zero)
 403                                 is_last = 0;
 404                         else
 405                                 is_last = 1;
 406                         /* interrupt/iso maxpacket may not fill the fifo */
 407                         is_short = unlikely (max < ep->fifo_size);
 408                 }
 409
 410                 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
 411                         ep->ep.name, count,
 412                         is_last ? "/L" : "", is_short ? "/S" : "",
 413                         req->req.length - req->req.actual, req);
 414
 415                 /* let loose that packet. maybe try writing another one,
 416                  * double buffering might work.  TSP, TPC, and TFS
 417                  * bit values are the same for all normal IN endpoints.
 418                  */
 419                 *ep->reg_udccs = UDCCS_BI_TPC;
 420                 if (is_short)
 421                         *ep->reg_udccs = UDCCS_BI_TSP;
 422
 423                 /* requests complete when all IN data is in the FIFO */
 424                 if (is_last) {
 425                         done (ep, req, 0);
 426                         if (list_empty(&ep->queue))
 427                                 pio_irq_disable (ep->bEndpointAddress);
 428                         return 1;
 429                 }
 430
 431                 // TODO experiment: how robust can fifo mode tweaking be?
 432                 // double buffering is off in the default fifo mode, which
 433                 // prevents TFS from being set here.
 434
 435         } while (*ep->reg_udccs & UDCCS_BI_TFS);
 436         return 0;
 437 }
 438
 439 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
 440  * ep0 data stage.  these chips want very simple state transitions.
 441  */
 442 static inline
 443 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
 444 {
 445         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
 446         USIR0 = USIR0_IR0;
 447         dev->req_pending = 0;
 448         DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
 449                 __func__, tag, UDCCS0, flags);
 450 }
 451
 452 static int
 453 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 454 {
 455         unsigned        count;
 456         int             is_short;
 457
 458         count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
 459         ep->dev->stats.write.bytes += count;
 460
 461         /* last packet "must be" short (or a zlp) */
 462         is_short = (count != EP0_FIFO_SIZE);
 463
 464         DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
 465                 req->req.length - req->req.actual, req);
 466
 467         if (unlikely (is_short)) {
 468                 if (ep->dev->req_pending)
 469                         ep0start(ep->dev, UDCCS0_IPR, "short IN");
 470                 else
 471                         UDCCS0 = UDCCS0_IPR;
 472
 473                 count = req->req.length;
 474                 done (ep, req, 0);
 475                 ep0_idle(ep->dev);
 476 #ifndef CONFIG_ARCH_IXP4XX
 477 #if 1
 478                 /* This seems to get rid of lost status irqs in some cases:
 479                  * host responds quickly, or next request involves config
 480                  * change automagic, or should have been hidden, or ...
 481                  *
 482                  * FIXME get rid of all udelays possible...
 483                  */
 484                 if (count >= EP0_FIFO_SIZE) {
 485                         count = 100;
 486                         do {
 487                                 if ((UDCCS0 & UDCCS0_OPR) != 0) {
 488                                         /* clear OPR, generate ack */
 489                                         UDCCS0 = UDCCS0_OPR;
 490                                         break;
 491                                 }
 492                                 count--;
 493                                 udelay(1);
 494                         } while (count);
 495                 }
 496 #endif
 497 #endif
 498         } else if (ep->dev->req_pending)
 499                 ep0start(ep->dev, 0, "IN");
 500         return is_short;
 501 }
 502
 503
 504 /*
 505  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
 506  * transfers and put them into the request.  caller should have made
 507  * sure there's at least one packet ready.
 508  *
 509  * returns true if the request completed because of short packet or the
 510  * request buffer having filled (and maybe overran till end-of-packet).
 511  */
 512 static int
 513 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 514 {
 515         for (;;) {
 516                 u32             udccs;
 517                 u8              *buf;
 518                 unsigned        bufferspace, count, is_short;
 519
 520                 /* make sure there's a packet in the FIFO.
 521                  * UDCCS_{BO,IO}_RPC are all the same bit value.
 522                  * UDCCS_{BO,IO}_RNE are all the same bit value.
 523                  */
 524                 udccs = *ep->reg_udccs;
 525                 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
 526                         break;
 527                 buf = req->req.buf + req->req.actual;
 528                 prefetchw(buf);
 529                 bufferspace = req->req.length - req->req.actual;
 530
 531                 /* read all bytes from this packet */
 532                 if (likely (udccs & UDCCS_BO_RNE)) {
 533                         count = 1 + (0x0ff & *ep->reg_ubcr);
 534                         req->req.actual += min (count, bufferspace);
 535                 } else /* zlp */
 536                         count = 0;
 537                 is_short = (count < ep->ep.maxpacket);
 538                 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
 539                         ep->ep.name, udccs, count,
 540                         is_short ? "/S" : "",
 541                         req, req->req.actual, req->req.length);
 542                 while (likely (count-- != 0)) {
 543                         u8      byte = (u8) *ep->reg_uddr;
 544
 545                         if (unlikely (bufferspace == 0)) {
 546                                 /* this happens when the driver's buffer
 547                                  * is smaller than what the host sent.
 548                                  * discard the extra data.
 549                                  */
 550                                 if (req->req.status != -EOVERFLOW)
 551                                         DMSG("%s overflow %d\n",
 552                                                 ep->ep.name, count);
 553                                 req->req.status = -EOVERFLOW;
 554                         } else {
 555                                 *buf++ = byte;
 556                                 bufferspace--;
 557                         }
 558                 }
 559                 *ep->reg_udccs =  UDCCS_BO_RPC;
 560                 /* RPC/RSP/RNE could now reflect the other packet buffer */
 561
 562                 /* iso is one request per packet */
 563                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 564                         if (udccs & UDCCS_IO_ROF)
 565                                 req->req.status = -EHOSTUNREACH;
 566                         /* more like "is_done" */
 567                         is_short = 1;
 568                 }
 569
 570                 /* completion */
 571                 if (is_short || req->req.actual == req->req.length) {
 572                         done (ep, req, 0);
 573                         if (list_empty(&ep->queue))
 574                                 pio_irq_disable (ep->bEndpointAddress);
 575                         return 1;
 576                 }
 577
 578                 /* finished that packet.  the next one may be waiting... */
 579         }
 580         return 0;
 581 }
 582
 583 /*
 584  * special ep0 version of the above.  no UBCR0 or double buffering; status
 585  * handshaking is magic.  most device protocols don't need control-OUT.
 586  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
 587  * protocols do use them.
 588  */
 589 static int
 590 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 591 {
 592         u8              *buf, byte;
 593         unsigned        bufferspace;
 594
 595         buf = req->req.buf + req->req.actual;
 596         bufferspace = req->req.length - req->req.actual;
 597
 598         while (UDCCS0 & UDCCS0_RNE) {
 599                 byte = (u8) UDDR0;
 600
 601                 if (unlikely (bufferspace == 0)) {
 602                         /* this happens when the driver's buffer
 603                          * is smaller than what the host sent.
 604                          * discard the extra data.
 605                          */
 606                         if (req->req.status != -EOVERFLOW)
 607                                 DMSG("%s overflow\n", ep->ep.name);
 608                         req->req.status = -EOVERFLOW;
 609                 } else {
 610                         *buf++ = byte;
 611                         req->req.actual++;
 612                         bufferspace--;
 613                 }
 614         }
 615
 616         UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
 617
 618         /* completion */
 619         if (req->req.actual >= req->req.length)
 620                 return 1;
 621
 622         /* finished that packet.  the next one may be waiting... */
 623         return 0;
 624 }
 625
 626 /*-------------------------------------------------------------------------*/
 627
 628 static int
 629 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 630 {
 631         struct pxa25x_request   *req;
 632         struct pxa25x_ep        *ep;
 633         struct pxa25x_udc       *dev;
 634         unsigned long           flags;
 635
 636         req = container_of(_req, struct pxa25x_request, req);
 637         if (unlikely (!_req || !_req->complete || !_req->buf
 638                         || !list_empty(&req->queue))) {
 639                 DMSG("%s, bad params\n", __func__);
 640                 return -EINVAL;
 641         }
 642
 643         ep = container_of(_ep, struct pxa25x_ep, ep);
 644         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
 645                 DMSG("%s, bad ep\n", __func__);
 646                 return -EINVAL;
 647         }
 648
 649         dev = ep->dev;
 650         if (unlikely (!dev->driver
 651                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
 652                 DMSG("%s, bogus device state\n", __func__);
 653                 return -ESHUTDOWN;
 654         }
 655
 656         /* iso is always one packet per request, that's the only way
 657          * we can report per-packet status.  that also helps with dma.
 658          */
 659         if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 660                         && req->req.length > usb_endpoint_maxp(ep->ep.desc)))
 661                 return -EMSGSIZE;
 662
 663         DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
 664                 _ep->name, _req, _req->length, _req->buf);
 665
 666         local_irq_save(flags);
 667
 668         _req->status = -EINPROGRESS;
 669         _req->actual = 0;
 670
 671         /* kickstart this i/o queue? */
 672         if (list_empty(&ep->queue) && !ep->stopped) {
 673                 if (ep->ep.desc == NULL/* ep0 */) {
 674                         unsigned        length = _req->length;
 675
 676                         switch (dev->ep0state) {
 677                         case EP0_IN_DATA_PHASE:
 678                                 dev->stats.write.ops++;
 679                                 if (write_ep0_fifo(ep, req))
 680                                         req = NULL;
 681                                 break;
 682
 683                         case EP0_OUT_DATA_PHASE:
 684                                 dev->stats.read.ops++;
 685                                 /* messy ... */
 686                                 if (dev->req_config) {
 687                                         DBG(DBG_VERBOSE, "ep0 config ack%s\n",
 688                                                 dev->has_cfr ?  "" : " raced");
 689                                         if (dev->has_cfr)
 690                                                 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
 691                                                         |UDCCFR_MB1;
 692                                         done(ep, req, 0);
 693                                         dev->ep0state = EP0_END_XFER;
 694                                         local_irq_restore (flags);
 695                                         return 0;
 696                                 }
 697                                 if (dev->req_pending)
 698                                         ep0start(dev, UDCCS0_IPR, "OUT");
 699                                 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
 700                                                 && read_ep0_fifo(ep, req))) {
 701                                         ep0_idle(dev);
 702                                         done(ep, req, 0);
 703                                         req = NULL;
 704                                 }
 705                                 break;
 706
 707                         default:
 708                                 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
 709                                 local_irq_restore (flags);
 710                                 return -EL2HLT;
 711                         }
 712                 /* can the FIFO can satisfy the request immediately? */
 713                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
 714                         if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
 715                                         && write_fifo(ep, req))
 716                                 req = NULL;
 717                 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
 718                                 && read_fifo(ep, req)) {
 719                         req = NULL;
 720                 }
 721
 722                 if (likely(req && ep->ep.desc))
 723                         pio_irq_enable(ep->bEndpointAddress);
 724         }
 725
 726         /* pio or dma irq handler advances the queue. */
 727         if (likely(req != NULL))
 728                 list_add_tail(&req->queue, &ep->queue);
 729         local_irq_restore(flags);
 730
 731         return 0;
 732 }
 733
 734
 735 /*
 736  *      nuke - dequeue ALL requests
 737  */
 738 static void nuke(struct pxa25x_ep *ep, int status)
 739 {
 740         struct pxa25x_request *req;
 741
 742         /* called with irqs blocked */
 743         while (!list_empty(&ep->queue)) {
 744                 req = list_entry(ep->queue.next,
 745                                 struct pxa25x_request,
 746                                 queue);
 747                 done(ep, req, status);
 748         }
 749         if (ep->ep.desc)
 750                 pio_irq_disable (ep->bEndpointAddress);
 751 }
 752
 753
 754 /* dequeue JUST ONE request */
 755 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 756 {
 757         struct pxa25x_ep        *ep;
 758         struct pxa25x_request   *req;
 759         unsigned long           flags;
 760
 761         ep = container_of(_ep, struct pxa25x_ep, ep);
 762         if (!_ep || ep->ep.name == ep0name)
 763                 return -EINVAL;
 764
 765         local_irq_save(flags);
 766
 767         /* make sure it's actually queued on this endpoint */
 768         list_for_each_entry (req, &ep->queue, queue) {
 769                 if (&req->req == _req)
 770                         break;
 771         }
 772         if (&req->req != _req) {
 773                 local_irq_restore(flags);
 774                 return -EINVAL;
 775         }
 776
 777         done(ep, req, -ECONNRESET);
 778
 779         local_irq_restore(flags);
 780         return 0;
 781 }
 782
 783 /*-------------------------------------------------------------------------*/
 784
 785 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
 786 {
 787         struct pxa25x_ep        *ep;
 788         unsigned long           flags;
 789
 790         ep = container_of(_ep, struct pxa25x_ep, ep);
 791         if (unlikely (!_ep
 792                         || (!ep->ep.desc && ep->ep.name != ep0name))
 793                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 794                 DMSG("%s, bad ep\n", __func__);
 795                 return -EINVAL;
 796         }
 797         if (value == 0) {
 798                 /* this path (reset toggle+halt) is needed to implement
 799                  * SET_INTERFACE on normal hardware.  but it can't be
 800                  * done from software on the PXA UDC, and the hardware
 801                  * forgets to do it as part of SET_INTERFACE automagic.
 802                  */
 803                 DMSG("only host can clear %s halt\n", _ep->name);
 804                 return -EROFS;
 805         }
 806
 807         local_irq_save(flags);
 808
 809         if ((ep->bEndpointAddress & USB_DIR_IN) != 0
 810                         && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
 811                            || !list_empty(&ep->queue))) {
 812                 local_irq_restore(flags);
 813                 return -EAGAIN;
 814         }
 815
 816         /* FST bit is the same for control, bulk in, bulk out, interrupt in */
 817         *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
 818
 819         /* ep0 needs special care */
 820         if (!ep->ep.desc) {
 821                 start_watchdog(ep->dev);
 822                 ep->dev->req_pending = 0;
 823                 ep->dev->ep0state = EP0_STALL;
 824
 825         /* and bulk/intr endpoints like dropping stalls too */
 826         } else {
 827                 unsigned i;
 828                 for (i = 0; i < 1000; i += 20) {
 829                         if (*ep->reg_udccs & UDCCS_BI_SST)
 830                                 break;
 831                         udelay(20);
 832                 }
 833         }
 834         local_irq_restore(flags);
 835
 836         DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
 837         return 0;
 838 }
 839
 840 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
 841 {
 842         struct pxa25x_ep        *ep;
 843
 844         ep = container_of(_ep, struct pxa25x_ep, ep);
 845         if (!_ep) {
 846                 DMSG("%s, bad ep\n", __func__);
 847                 return -ENODEV;
 848         }
 849         /* pxa can't report unclaimed bytes from IN fifos */
 850         if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
 851                 return -EOPNOTSUPP;
 852         if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
 853                         || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
 854                 return 0;
 855         else
 856                 return (*ep->reg_ubcr & 0xfff) + 1;
 857 }
 858
 859 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
 860 {
 861         struct pxa25x_ep        *ep;
 862
 863         ep = container_of(_ep, struct pxa25x_ep, ep);
 864         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
 865                 DMSG("%s, bad ep\n", __func__);
 866                 return;
 867         }
 868
 869         /* toggle and halt bits stay unchanged */
 870
 871         /* for OUT, just read and discard the FIFO contents. */
 872         if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
 873                 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
 874                         (void) *ep->reg_uddr;
 875                 return;
 876         }
 877
 878         /* most IN status is the same, but ISO can't stall */
 879         *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
 880                 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 881                         ? 0 : UDCCS_BI_SST);
 882 }
 883
 884
 885 static struct usb_ep_ops pxa25x_ep_ops = {
 886         .enable         = pxa25x_ep_enable,
 887         .disable        = pxa25x_ep_disable,
 888
 889         .alloc_request  = pxa25x_ep_alloc_request,
 890         .free_request   = pxa25x_ep_free_request,
 891
 892         .queue          = pxa25x_ep_queue,
 893         .dequeue        = pxa25x_ep_dequeue,
 894
 895         .set_halt       = pxa25x_ep_set_halt,
 896         .fifo_status    = pxa25x_ep_fifo_status,
 897         .fifo_flush     = pxa25x_ep_fifo_flush,
 898 };
 899
 900
 901 /* ---------------------------------------------------------------------------
 902  *      device-scoped parts of the api to the usb controller hardware
 903  * ---------------------------------------------------------------------------
 904  */
 905
 906 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
 907 {
 908         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
 909 }
 910
 911 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
 912 {
 913         /* host may not have enabled remote wakeup */
 914         if ((UDCCS0 & UDCCS0_DRWF) == 0)
 915                 return -EHOSTUNREACH;
 916         udc_set_mask_UDCCR(UDCCR_RSM);
 917         return 0;
 918 }
 919
 920 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
 921 static void udc_enable (struct pxa25x_udc *);
 922 static void udc_disable(struct pxa25x_udc *);
 923
 924 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
 925  * in active use.
 926  */
 927 static int pullup(struct pxa25x_udc *udc)
 928 {
 929         int is_active = udc->vbus && udc->pullup && !udc->suspended;
 930         DMSG("%s\n", is_active ? "active" : "inactive");
 931         if (is_active) {
 932                 if (!udc->active) {
 933                         udc->active = 1;
 934                         /* Enable clock for USB device */
 935                         clk_enable(udc->clk);
 936                         udc_enable(udc);
 937                 }
 938         } else {
 939                 if (udc->active) {
 940                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
 941                                 DMSG("disconnect %s\n", udc->driver
 942                                         ? udc->driver->driver.name
 943                                         : "(no driver)");
 944                                 stop_activity(udc, udc->driver);
 945                         }
 946                         udc_disable(udc);
 947                         /* Disable clock for USB device */
 948                         clk_disable(udc->clk);
 949                         udc->active = 0;
 950                 }
 951
 952         }
 953         return 0;
 954 }
 955
 956 /* VBUS reporting logically comes from a transceiver */
 957 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 958 {
 959         struct pxa25x_udc       *udc;
 960
 961         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 962         udc->vbus = is_active;
 963         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
 964         pullup(udc);
 965         return 0;
 966 }
 967
 968 /* drivers may have software control over D+ pullup */
 969 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
 970 {
 971         struct pxa25x_udc       *udc;
 972
 973         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 974
 975         /* not all boards support pullup control */
 976         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
 977                 return -EOPNOTSUPP;
 978
 979         udc->pullup = (is_active != 0);
 980         pullup(udc);
 981         return 0;
 982 }
 983
 984 /* boards may consume current from VBUS, up to 100-500mA based on config.
 985  * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
 986  * violate USB specs.
 987  */
 988 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
 989 {
 990         struct pxa25x_udc       *udc;
 991
 992         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 993
 994         if (!IS_ERR_OR_NULL(udc->transceiver))
 995                 return usb_phy_set_power(udc->transceiver, mA);
 996         return -EOPNOTSUPP;
 997 }
 998
 999 static int pxa25x_udc_start(struct usb_gadget *g,
1000                 struct usb_gadget_driver *driver);
1001 static int pxa25x_udc_stop(struct usb_gadget *g,
1002                 struct usb_gadget_driver *driver);
1003
1004 static const struct usb_gadget_ops pxa25x_udc_ops = {
1005         .get_frame      = pxa25x_udc_get_frame,
1006         .wakeup         = pxa25x_udc_wakeup,
1007         .vbus_session   = pxa25x_udc_vbus_session,
1008         .pullup         = pxa25x_udc_pullup,
1009         .vbus_draw      = pxa25x_udc_vbus_draw,
1010         .udc_start      = pxa25x_udc_start,
1011         .udc_stop       = pxa25x_udc_stop,
1012 };
1013
1014 /*-------------------------------------------------------------------------*/
1015
1016 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1017
1018 static int
1019 udc_seq_show(struct seq_file *m, void *_d)
1020 {
1021         struct pxa25x_udc       *dev = m->private;
1022         unsigned long           flags;
1023         int                     i;
1024         u32                     tmp;
1025
1026         local_irq_save(flags);
1027
1028         /* basic device status */
1029         seq_printf(m, DRIVER_DESC "\n"
1030                 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1031                 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1032                 dev->driver ? dev->driver->driver.name : "(none)",
1033                 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
1034
1035         /* registers for device and ep0 */
1036         seq_printf(m,
1037                 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1038                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1039
1040         tmp = UDCCR;
1041         seq_printf(m,
1042                 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1043                 (tmp & UDCCR_REM) ? " rem" : "",
1044                 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1045                 (tmp & UDCCR_SRM) ? " srm" : "",
1046                 (tmp & UDCCR_SUSIR) ? " susir" : "",
1047                 (tmp & UDCCR_RESIR) ? " resir" : "",
1048                 (tmp & UDCCR_RSM) ? " rsm" : "",
1049                 (tmp & UDCCR_UDA) ? " uda" : "",
1050                 (tmp & UDCCR_UDE) ? " ude" : "");
1051
1052         tmp = UDCCS0;
1053         seq_printf(m,
1054                 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1055                 (tmp & UDCCS0_SA) ? " sa" : "",
1056                 (tmp & UDCCS0_RNE) ? " rne" : "",
1057                 (tmp & UDCCS0_FST) ? " fst" : "",
1058                 (tmp & UDCCS0_SST) ? " sst" : "",
1059                 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1060                 (tmp & UDCCS0_FTF) ? " ftf" : "",
1061                 (tmp & UDCCS0_IPR) ? " ipr" : "",
1062                 (tmp & UDCCS0_OPR) ? " opr" : "");
1063
1064         if (dev->has_cfr) {
1065                 tmp = UDCCFR;
1066                 seq_printf(m,
1067                         "udccfr %02X =%s%s\n", tmp,
1068                         (tmp & UDCCFR_AREN) ? " aren" : "",
1069                         (tmp & UDCCFR_ACM) ? " acm" : "");
1070         }
1071
1072         if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
1073                 goto done;
1074
1075         seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1076                 dev->stats.write.bytes, dev->stats.write.ops,
1077                 dev->stats.read.bytes, dev->stats.read.ops,
1078                 dev->stats.irqs);
1079
1080         /* dump endpoint queues */
1081         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1082                 struct pxa25x_ep        *ep = &dev->ep [i];
1083                 struct pxa25x_request   *req;
1084
1085                 if (i != 0) {
1086                         const struct usb_endpoint_descriptor    *desc;
1087
1088                         desc = ep->ep.desc;
1089                         if (!desc)
1090                                 continue;
1091                         tmp = *dev->ep [i].reg_udccs;
1092                         seq_printf(m,
1093                                 "%s max %d %s udccs %02x irqs %lu\n",
1094                                 ep->ep.name, usb_endpoint_maxp(desc),
1095                                 "pio", tmp, ep->pio_irqs);
1096                         /* TODO translate all five groups of udccs bits! */
1097
1098                 } else /* ep0 should only have one transfer queued */
1099                         seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1100                                 ep->pio_irqs);
1101
1102                 if (list_empty(&ep->queue)) {
1103                         seq_printf(m, "\t(nothing queued)\n");
1104                         continue;
1105                 }
1106                 list_for_each_entry(req, &ep->queue, queue) {
1107                         seq_printf(m,
1108                                         "\treq %p len %d/%d buf %p\n",
1109                                         &req->req, req->req.actual,
1110                                         req->req.length, req->req.buf);
1111                 }
1112         }
1113
1114 done:
1115         local_irq_restore(flags);
1116         return 0;
1117 }
1118
1119 static int
1120 udc_debugfs_open(struct inode *inode, struct file *file)
1121 {
1122         return single_open(file, udc_seq_show, inode->i_private);
1123 }
1124
1125 static const struct file_operations debug_fops = {
1126         .open           = udc_debugfs_open,
1127         .read           = seq_read,
1128         .llseek         = seq_lseek,
1129         .release        = single_release,
1130         .owner          = THIS_MODULE,
1131 };
1132
1133 #define create_debug_files(dev) \
1134         do { \
1135                 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1136                         S_IRUGO, NULL, dev, &debug_fops); \
1137         } while (0)
1138 #define remove_debug_files(dev) \
1139         do { \
1140                 if (dev->debugfs_udc) \
1141                         debugfs_remove(dev->debugfs_udc); \
1142         } while (0)
1143
1144 #else   /* !CONFIG_USB_GADGET_DEBUG_FILES */
1145
1146 #define create_debug_files(dev) do {} while (0)
1147 #define remove_debug_files(dev) do {} while (0)
1148
1149 #endif  /* CONFIG_USB_GADGET_DEBUG_FILES */
1150
1151 /*-------------------------------------------------------------------------*/
1152
1153 /*
1154  *      udc_disable - disable USB device controller
1155  */
1156 static void udc_disable(struct pxa25x_udc *dev)
1157 {
1158         /* block all irqs */
1159         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1160         UICR0 = UICR1 = 0xff;
1161         UFNRH = UFNRH_SIM;
1162
1163         /* if hardware supports it, disconnect from usb */
1164         pullup_off();
1165
1166         udc_clear_mask_UDCCR(UDCCR_UDE);
1167
1168         ep0_idle (dev);
1169         dev->gadget.speed = USB_SPEED_UNKNOWN;
1170 }
1171
1172
1173 /*
1174  *      udc_reinit - initialize software state
1175  */
1176 static void udc_reinit(struct pxa25x_udc *dev)
1177 {
1178         u32     i;
1179
1180         /* device/ep0 records init */
1181         INIT_LIST_HEAD (&dev->gadget.ep_list);
1182         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1183         dev->ep0state = EP0_IDLE;
1184
1185         /* basic endpoint records init */
1186         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1187                 struct pxa25x_ep *ep = &dev->ep[i];
1188
1189                 if (i != 0)
1190                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1191
1192                 ep->ep.desc = NULL;
1193                 ep->stopped = 0;
1194                 INIT_LIST_HEAD (&ep->queue);
1195                 ep->pio_irqs = 0;
1196         }
1197
1198         /* the rest was statically initialized, and is read-only */
1199 }
1200
1201 /* until it's enabled, this UDC should be completely invisible
1202  * to any USB host.
1203  */
1204 static void udc_enable (struct pxa25x_udc *dev)
1205 {
1206         udc_clear_mask_UDCCR(UDCCR_UDE);
1207
1208         /* try to clear these bits before we enable the udc */
1209         udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1210
1211         ep0_idle(dev);
1212         dev->gadget.speed = USB_SPEED_UNKNOWN;
1213         dev->stats.irqs = 0;
1214
1215         /*
1216          * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1217          * - enable UDC
1218          * - if RESET is already in progress, ack interrupt
1219          * - unmask reset interrupt
1220          */
1221         udc_set_mask_UDCCR(UDCCR_UDE);
1222         if (!(UDCCR & UDCCR_UDA))
1223                 udc_ack_int_UDCCR(UDCCR_RSTIR);
1224
1225         if (dev->has_cfr /* UDC_RES2 is defined */) {
1226                 /* pxa255 (a0+) can avoid a set_config race that could
1227                  * prevent gadget drivers from configuring correctly
1228                  */
1229                 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1230         } else {
1231                 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1232                  * which could result in missing packets and interrupts.
1233                  * supposedly one bit per endpoint, controlling whether it
1234                  * double buffers or not; ACM/AREN bits fit into the holes.
1235                  * zero bits (like USIR0_IRx) disable double buffering.
1236                  */
1237                 UDC_RES1 = 0x00;
1238                 UDC_RES2 = 0x00;
1239         }
1240
1241         /* enable suspend/resume and reset irqs */
1242         udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1243
1244         /* enable ep0 irqs */
1245         UICR0 &= ~UICR0_IM0;
1246
1247         /* if hardware supports it, pullup D+ and wait for reset */
1248         pullup_on();
1249 }
1250
1251
1252 /* when a driver is successfully registered, it will receive
1253  * control requests including set_configuration(), which enables
1254  * non-control requests.  then usb traffic follows until a
1255  * disconnect is reported.  then a host may connect again, or
1256  * the driver might get unbound.
1257  */
1258 static int pxa25x_udc_start(struct usb_gadget *g,
1259                 struct usb_gadget_driver *driver)
1260 {
1261         struct pxa25x_udc       *dev = to_pxa25x(g);
1262         int                     retval;
1263
1264         /* first hook up the driver ... */
1265         dev->driver = driver;
1266         dev->gadget.dev.driver = &driver->driver;
1267         dev->pullup = 1;
1268
1269         retval = device_add (&dev->gadget.dev);
1270         if (retval) {
1271                 dev->driver = NULL;
1272                 dev->gadget.dev.driver = NULL;
1273                 return retval;
1274         }
1275
1276         /* ... then enable host detection and ep0; and we're ready
1277          * for set_configuration as well as eventual disconnect.
1278          */
1279         /* connect to bus through transceiver */
1280         if (!IS_ERR_OR_NULL(dev->transceiver)) {
1281                 retval = otg_set_peripheral(dev->transceiver->otg,
1282                                                 &dev->gadget);
1283                 if (retval)
1284                         goto bind_fail;
1285         }
1286
1287         pullup(dev);
1288         dump_state(dev);
1289         return 0;
1290 bind_fail:
1291         return retval;
1292 }
1293
1294 static void
1295 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1296 {
1297         int i;
1298
1299         /* don't disconnect drivers more than once */
1300         if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1301                 driver = NULL;
1302         dev->gadget.speed = USB_SPEED_UNKNOWN;
1303
1304         /* prevent new request submissions, kill any outstanding requests  */
1305         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1306                 struct pxa25x_ep *ep = &dev->ep[i];
1307
1308                 ep->stopped = 1;
1309                 nuke(ep, -ESHUTDOWN);
1310         }
1311         del_timer_sync(&dev->timer);
1312
1313         /* re-init driver-visible data structures */
1314         udc_reinit(dev);
1315 }
1316
1317 static int pxa25x_udc_stop(struct usb_gadget*g,
1318                 struct usb_gadget_driver *driver)
1319 {
1320         struct pxa25x_udc       *dev = to_pxa25x(g);
1321
1322         local_irq_disable();
1323         dev->pullup = 0;
1324         pullup(dev);
1325         stop_activity(dev, driver);
1326         local_irq_enable();
1327
1328         if (!IS_ERR_OR_NULL(dev->transceiver))
1329                 (void) otg_set_peripheral(dev->transceiver->otg, NULL);
1330
1331         dev->gadget.dev.driver = NULL;
1332         dev->driver = NULL;
1333
1334         device_del (&dev->gadget.dev);
1335         dump_state(dev);
1336
1337         return 0;
1338 }
1339
1340 /*-------------------------------------------------------------------------*/
1341
1342 #ifdef CONFIG_ARCH_LUBBOCK
1343
1344 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1345  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1346  */
1347
1348 static irqreturn_t
1349 lubbock_vbus_irq(int irq, void *_dev)
1350 {
1351         struct pxa25x_udc       *dev = _dev;
1352         int                     vbus;
1353
1354         dev->stats.irqs++;
1355         switch (irq) {
1356         case LUBBOCK_USB_IRQ:
1357                 vbus = 1;
1358                 disable_irq(LUBBOCK_USB_IRQ);
1359                 enable_irq(LUBBOCK_USB_DISC_IRQ);
1360                 break;
1361         case LUBBOCK_USB_DISC_IRQ:
1362                 vbus = 0;
1363                 disable_irq(LUBBOCK_USB_DISC_IRQ);
1364                 enable_irq(LUBBOCK_USB_IRQ);
1365                 break;
1366         default:
1367                 return IRQ_NONE;
1368         }
1369
1370         pxa25x_udc_vbus_session(&dev->gadget, vbus);
1371         return IRQ_HANDLED;
1372 }
1373
1374 #endif
1375
1376
1377 /*-------------------------------------------------------------------------*/
1378
1379 static inline void clear_ep_state (struct pxa25x_udc *dev)
1380 {
1381         unsigned i;
1382
1383         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1384          * fifos, and pending transactions mustn't be continued in any case.
1385          */
1386         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1387                 nuke(&dev->ep[i], -ECONNABORTED);
1388 }
1389
1390 static void udc_watchdog(unsigned long _dev)
1391 {
1392         struct pxa25x_udc       *dev = (void *)_dev;
1393
1394         local_irq_disable();
1395         if (dev->ep0state == EP0_STALL
1396                         && (UDCCS0 & UDCCS0_FST) == 0
1397                         && (UDCCS0 & UDCCS0_SST) == 0) {
1398                 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1399                 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1400                 start_watchdog(dev);
1401         }
1402         local_irq_enable();
1403 }
1404
1405 static void handle_ep0 (struct pxa25x_udc *dev)
1406 {
1407         u32                     udccs0 = UDCCS0;
1408         struct pxa25x_ep        *ep = &dev->ep [0];
1409         struct pxa25x_request   *req;
1410         union {
1411                 struct usb_ctrlrequest  r;
1412                 u8                      raw [8];
1413                 u32                     word [2];
1414         } u;
1415
1416         if (list_empty(&ep->queue))
1417                 req = NULL;
1418         else
1419                 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1420
1421         /* clear stall status */
1422         if (udccs0 & UDCCS0_SST) {
1423                 nuke(ep, -EPIPE);
1424                 UDCCS0 = UDCCS0_SST;
1425                 del_timer(&dev->timer);
1426                 ep0_idle(dev);
1427         }
1428
1429         /* previous request unfinished?  non-error iff back-to-back ... */
1430         if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1431                 nuke(ep, 0);
1432                 del_timer(&dev->timer);
1433                 ep0_idle(dev);
1434         }
1435
1436         switch (dev->ep0state) {
1437         case EP0_IDLE:
1438                 /* late-breaking status? */
1439                 udccs0 = UDCCS0;
1440
1441                 /* start control request? */
1442                 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1443                                 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1444                         int i;
1445
1446                         nuke (ep, -EPROTO);
1447
1448                         /* read SETUP packet */
1449                         for (i = 0; i < 8; i++) {
1450                                 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1451 bad_setup:
1452                                         DMSG("SETUP %d!\n", i);
1453                                         goto stall;
1454                                 }
1455                                 u.raw [i] = (u8) UDDR0;
1456                         }
1457                         if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1458                                 goto bad_setup;
1459
1460 got_setup:
1461                         DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1462                                 u.r.bRequestType, u.r.bRequest,
1463                                 le16_to_cpu(u.r.wValue),
1464                                 le16_to_cpu(u.r.wIndex),
1465                                 le16_to_cpu(u.r.wLength));
1466
1467                         /* cope with automagic for some standard requests. */
1468                         dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1469                                                 == USB_TYPE_STANDARD;
1470                         dev->req_config = 0;
1471                         dev->req_pending = 1;
1472                         switch (u.r.bRequest) {
1473                         /* hardware restricts gadget drivers here! */
1474                         case USB_REQ_SET_CONFIGURATION:
1475                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1476                                         /* reflect hardware's automagic
1477                                          * up to the gadget driver.
1478                                          */
1479 config_change:
1480                                         dev->req_config = 1;
1481                                         clear_ep_state(dev);
1482                                         /* if !has_cfr, there's no synch
1483                                          * else use AREN (later) not SA|OPR
1484                                          * USIR0_IR0 acts edge sensitive
1485                                          */
1486                                 }
1487                                 break;
1488                         /* ... and here, even more ... */
1489                         case USB_REQ_SET_INTERFACE:
1490                                 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1491                                         /* udc hardware is broken by design:
1492                                          *  - altsetting may only be zero;
1493                                          *  - hw resets all interfaces' eps;
1494                                          *  - ep reset doesn't include halt(?).
1495                                          */
1496                                         DMSG("broken set_interface (%d/%d)\n",
1497                                                 le16_to_cpu(u.r.wIndex),
1498                                                 le16_to_cpu(u.r.wValue));
1499                                         goto config_change;
1500                                 }
1501                                 break;
1502                         /* hardware was supposed to hide this */
1503                         case USB_REQ_SET_ADDRESS:
1504                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1505                                         ep0start(dev, 0, "address");
1506                                         return;
1507                                 }
1508                                 break;
1509                         }
1510
1511                         if (u.r.bRequestType & USB_DIR_IN)
1512                                 dev->ep0state = EP0_IN_DATA_PHASE;
1513                         else
1514                                 dev->ep0state = EP0_OUT_DATA_PHASE;
1515
1516                         i = dev->driver->setup(&dev->gadget, &u.r);
1517                         if (i < 0) {
1518                                 /* hardware automagic preventing STALL... */
1519                                 if (dev->req_config) {
1520                                         /* hardware sometimes neglects to tell
1521                                          * tell us about config change events,
1522                                          * so later ones may fail...
1523                                          */
1524                                         WARNING("config change %02x fail %d?\n",
1525                                                 u.r.bRequest, i);
1526                                         return;
1527                                         /* TODO experiment:  if has_cfr,
1528                                          * hardware didn't ACK; maybe we
1529                                          * could actually STALL!
1530                                          */
1531                                 }
1532                                 DBG(DBG_VERBOSE, "protocol STALL, "
1533                                         "%02x err %d\n", UDCCS0, i);
1534 stall:
1535                                 /* the watchdog timer helps deal with cases
1536                                  * where udc seems to clear FST wrongly, and
1537                                  * then NAKs instead of STALLing.
1538                                  */
1539                                 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1540                                 start_watchdog(dev);
1541                                 dev->ep0state = EP0_STALL;
1542
1543                         /* deferred i/o == no response yet */
1544                         } else if (dev->req_pending) {
1545                                 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1546                                                 || dev->req_std || u.r.wLength))
1547                                         ep0start(dev, 0, "defer");
1548                                 else
1549                                         ep0start(dev, UDCCS0_IPR, "defer/IPR");
1550                         }
1551
1552                         /* expect at least one data or status stage irq */
1553                         return;
1554
1555                 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1556                                 == (UDCCS0_OPR|UDCCS0_SA))) {
1557                         unsigned i;
1558
1559                         /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1560                          * still observed on a pxa255 a0.
1561                          */
1562                         DBG(DBG_VERBOSE, "e131\n");
1563                         nuke(ep, -EPROTO);
1564
1565                         /* read SETUP data, but don't trust it too much */
1566                         for (i = 0; i < 8; i++)
1567                                 u.raw [i] = (u8) UDDR0;
1568                         if ((u.r.bRequestType & USB_RECIP_MASK)
1569                                         > USB_RECIP_OTHER)
1570                                 goto stall;
1571                         if (u.word [0] == 0 && u.word [1] == 0)
1572                                 goto stall;
1573                         goto got_setup;
1574                 } else {
1575                         /* some random early IRQ:
1576                          * - we acked FST
1577                          * - IPR cleared
1578                          * - OPR got set, without SA (likely status stage)
1579                          */
1580                         UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1581                 }
1582                 break;
1583         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
1584                 if (udccs0 & UDCCS0_OPR) {
1585                         UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1586                         DBG(DBG_VERBOSE, "ep0in premature status\n");
1587                         if (req)
1588                                 done(ep, req, 0);
1589                         ep0_idle(dev);
1590                 } else /* irq was IPR clearing */ {
1591                         if (req) {
1592                                 /* this IN packet might finish the request */
1593                                 (void) write_ep0_fifo(ep, req);
1594                         } /* else IN token before response was written */
1595                 }
1596                 break;
1597         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
1598                 if (udccs0 & UDCCS0_OPR) {
1599                         if (req) {
1600                                 /* this OUT packet might finish the request */
1601                                 if (read_ep0_fifo(ep, req))
1602                                         done(ep, req, 0);
1603                                 /* else more OUT packets expected */
1604                         } /* else OUT token before read was issued */
1605                 } else /* irq was IPR clearing */ {
1606                         DBG(DBG_VERBOSE, "ep0out premature status\n");
1607                         if (req)
1608                                 done(ep, req, 0);
1609                         ep0_idle(dev);
1610                 }
1611                 break;
1612         case EP0_END_XFER:
1613                 if (req)
1614                         done(ep, req, 0);
1615                 /* ack control-IN status (maybe in-zlp was skipped)
1616                  * also appears after some config change events.
1617                  */
1618                 if (udccs0 & UDCCS0_OPR)
1619                         UDCCS0 = UDCCS0_OPR;
1620                 ep0_idle(dev);
1621                 break;
1622         case EP0_STALL:
1623                 UDCCS0 = UDCCS0_FST;
1624                 break;
1625         }
1626         USIR0 = USIR0_IR0;
1627 }
1628
1629 static void handle_ep(struct pxa25x_ep *ep)
1630 {
1631         struct pxa25x_request   *req;
1632         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
1633         int                     completed;
1634         u32                     udccs, tmp;
1635
1636         do {
1637                 completed = 0;
1638                 if (likely (!list_empty(&ep->queue)))
1639                         req = list_entry(ep->queue.next,
1640                                         struct pxa25x_request, queue);
1641                 else
1642                         req = NULL;
1643
1644                 // TODO check FST handling
1645
1646                 udccs = *ep->reg_udccs;
1647                 if (unlikely(is_in)) {  /* irq from TPC, SST, or (ISO) TUR */
1648                         tmp = UDCCS_BI_TUR;
1649                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1650                                 tmp |= UDCCS_BI_SST;
1651                         tmp &= udccs;
1652                         if (likely (tmp))
1653                                 *ep->reg_udccs = tmp;
1654                         if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1655                                 completed = write_fifo(ep, req);
1656
1657                 } else {        /* irq from RPC (or for ISO, ROF) */
1658                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1659                                 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1660                         else
1661                                 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1662                         tmp &= udccs;
1663                         if (likely(tmp))
1664                                 *ep->reg_udccs = tmp;
1665
1666                         /* fifos can hold packets, ready for reading... */
1667                         if (likely(req)) {
1668                                 completed = read_fifo(ep, req);
1669                         } else
1670                                 pio_irq_disable (ep->bEndpointAddress);
1671                 }
1672                 ep->pio_irqs++;
1673         } while (completed);
1674 }
1675
1676 /*
1677  *      pxa25x_udc_irq - interrupt handler
1678  *
1679  * avoid delays in ep0 processing. the control handshaking isn't always
1680  * under software control (pxa250c0 and the pxa255 are better), and delays
1681  * could cause usb protocol errors.
1682  */
1683 static irqreturn_t
1684 pxa25x_udc_irq(int irq, void *_dev)
1685 {
1686         struct pxa25x_udc       *dev = _dev;
1687         int                     handled;
1688
1689         dev->stats.irqs++;
1690         do {
1691                 u32             udccr = UDCCR;
1692
1693                 handled = 0;
1694
1695                 /* SUSpend Interrupt Request */
1696                 if (unlikely(udccr & UDCCR_SUSIR)) {
1697                         udc_ack_int_UDCCR(UDCCR_SUSIR);
1698                         handled = 1;
1699                         DBG(DBG_VERBOSE, "USB suspend\n");
1700
1701                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1702                                         && dev->driver
1703                                         && dev->driver->suspend)
1704                                 dev->driver->suspend(&dev->gadget);
1705                         ep0_idle (dev);
1706                 }
1707
1708                 /* RESume Interrupt Request */
1709                 if (unlikely(udccr & UDCCR_RESIR)) {
1710                         udc_ack_int_UDCCR(UDCCR_RESIR);
1711                         handled = 1;
1712                         DBG(DBG_VERBOSE, "USB resume\n");
1713
1714                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1715                                         && dev->driver
1716                                         && dev->driver->resume)
1717                                 dev->driver->resume(&dev->gadget);
1718                 }
1719
1720                 /* ReSeT Interrupt Request - USB reset */
1721                 if (unlikely(udccr & UDCCR_RSTIR)) {
1722                         udc_ack_int_UDCCR(UDCCR_RSTIR);
1723                         handled = 1;
1724
1725                         if ((UDCCR & UDCCR_UDA) == 0) {
1726                                 DBG(DBG_VERBOSE, "USB reset start\n");
1727
1728                                 /* reset driver and endpoints,
1729                                  * in case that's not yet done
1730                                  */
1731                                 stop_activity (dev, dev->driver);
1732
1733                         } else {
1734                                 DBG(DBG_VERBOSE, "USB reset end\n");
1735                                 dev->gadget.speed = USB_SPEED_FULL;
1736                                 memset(&dev->stats, 0, sizeof dev->stats);
1737                                 /* driver and endpoints are still reset */
1738                         }
1739
1740                 } else {
1741                         u32     usir0 = USIR0 & ~UICR0;
1742                         u32     usir1 = USIR1 & ~UICR1;
1743                         int     i;
1744
1745                         if (unlikely (!usir0 && !usir1))
1746                                 continue;
1747
1748                         DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1749
1750                         /* control traffic */
1751                         if (usir0 & USIR0_IR0) {
1752                                 dev->ep[0].pio_irqs++;
1753                                 handle_ep0(dev);
1754                                 handled = 1;
1755                         }
1756
1757                         /* endpoint data transfers */
1758                         for (i = 0; i < 8; i++) {
1759                                 u32     tmp = 1 << i;
1760
1761                                 if (i && (usir0 & tmp)) {
1762                                         handle_ep(&dev->ep[i]);
1763                                         USIR0 |= tmp;
1764                                         handled = 1;
1765                                 }
1766 #ifndef CONFIG_USB_PXA25X_SMALL
1767                                 if (usir1 & tmp) {
1768                                         handle_ep(&dev->ep[i+8]);
1769                                         USIR1 |= tmp;
1770                                         handled = 1;
1771                                 }
1772 #endif
1773                         }
1774                 }
1775
1776                 /* we could also ask for 1 msec SOF (SIR) interrupts */
1777
1778         } while (handled);
1779         return IRQ_HANDLED;
1780 }
1781
1782 /*-------------------------------------------------------------------------*/
1783
1784 static void nop_release (struct device *dev)
1785 {
1786         DMSG("%s %s\n", __func__, dev_name(dev));
1787 }
1788
1789 /* this uses load-time allocation and initialization (instead of
1790  * doing it at run-time) to save code, eliminate fault paths, and
1791  * be more obviously correct.
1792  */
1793 static struct pxa25x_udc memory = {
1794         .gadget = {
1795                 .ops            = &pxa25x_udc_ops,
1796                 .ep0            = &memory.ep[0].ep,
1797                 .name           = driver_name,
1798                 .dev = {
1799                         .init_name      = "gadget",
1800                         .release        = nop_release,
1801                 },
1802         },
1803
1804         /* control endpoint */
1805         .ep[0] = {
1806                 .ep = {
1807                         .name           = ep0name,
1808                         .ops            = &pxa25x_ep_ops,
1809                         .maxpacket      = EP0_FIFO_SIZE,
1810                 },
1811                 .dev            = &memory,
1812                 .reg_udccs      = &UDCCS0,
1813                 .reg_uddr       = &UDDR0,
1814         },
1815
1816         /* first group of endpoints */
1817         .ep[1] = {
1818                 .ep = {
1819                         .name           = "ep1in-bulk",
1820                         .ops            = &pxa25x_ep_ops,
1821                         .maxpacket      = BULK_FIFO_SIZE,
1822                 },
1823                 .dev            = &memory,
1824                 .fifo_size      = BULK_FIFO_SIZE,
1825                 .bEndpointAddress = USB_DIR_IN | 1,
1826                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1827                 .reg_udccs      = &UDCCS1,
1828                 .reg_uddr       = &UDDR1,
1829         },
1830         .ep[2] = {
1831                 .ep = {
1832                         .name           = "ep2out-bulk",
1833                         .ops            = &pxa25x_ep_ops,
1834                         .maxpacket      = BULK_FIFO_SIZE,
1835                 },
1836                 .dev            = &memory,
1837                 .fifo_size      = BULK_FIFO_SIZE,
1838                 .bEndpointAddress = 2,
1839                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1840                 .reg_udccs      = &UDCCS2,
1841                 .reg_ubcr       = &UBCR2,
1842                 .reg_uddr       = &UDDR2,
1843         },
1844 #ifndef CONFIG_USB_PXA25X_SMALL
1845         .ep[3] = {
1846                 .ep = {
1847                         .name           = "ep3in-iso",
1848                         .ops            = &pxa25x_ep_ops,
1849                         .maxpacket      = ISO_FIFO_SIZE,
1850                 },
1851                 .dev            = &memory,
1852                 .fifo_size      = ISO_FIFO_SIZE,
1853                 .bEndpointAddress = USB_DIR_IN | 3,
1854                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1855                 .reg_udccs      = &UDCCS3,
1856                 .reg_uddr       = &UDDR3,
1857         },
1858         .ep[4] = {
1859                 .ep = {
1860                         .name           = "ep4out-iso",
1861                         .ops            = &pxa25x_ep_ops,
1862                         .maxpacket      = ISO_FIFO_SIZE,
1863                 },
1864                 .dev            = &memory,
1865                 .fifo_size      = ISO_FIFO_SIZE,
1866                 .bEndpointAddress = 4,
1867                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1868                 .reg_udccs      = &UDCCS4,
1869                 .reg_ubcr       = &UBCR4,
1870                 .reg_uddr       = &UDDR4,
1871         },
1872         .ep[5] = {
1873                 .ep = {
1874                         .name           = "ep5in-int",
1875                         .ops            = &pxa25x_ep_ops,
1876                         .maxpacket      = INT_FIFO_SIZE,
1877                 },
1878                 .dev            = &memory,
1879                 .fifo_size      = INT_FIFO_SIZE,
1880                 .bEndpointAddress = USB_DIR_IN | 5,
1881                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1882                 .reg_udccs      = &UDCCS5,
1883                 .reg_uddr       = &UDDR5,
1884         },
1885
1886         /* second group of endpoints */
1887         .ep[6] = {
1888                 .ep = {
1889                         .name           = "ep6in-bulk",
1890                         .ops            = &pxa25x_ep_ops,
1891                         .maxpacket      = BULK_FIFO_SIZE,
1892                 },
1893                 .dev            = &memory,
1894                 .fifo_size      = BULK_FIFO_SIZE,
1895                 .bEndpointAddress = USB_DIR_IN | 6,
1896                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1897                 .reg_udccs      = &UDCCS6,
1898                 .reg_uddr       = &UDDR6,
1899         },
1900         .ep[7] = {
1901                 .ep = {
1902                         .name           = "ep7out-bulk",
1903                         .ops            = &pxa25x_ep_ops,
1904                         .maxpacket      = BULK_FIFO_SIZE,
1905                 },
1906                 .dev            = &memory,
1907                 .fifo_size      = BULK_FIFO_SIZE,
1908                 .bEndpointAddress = 7,
1909                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1910                 .reg_udccs      = &UDCCS7,
1911                 .reg_ubcr       = &UBCR7,
1912                 .reg_uddr       = &UDDR7,
1913         },
1914         .ep[8] = {
1915                 .ep = {
1916                         .name           = "ep8in-iso",
1917                         .ops            = &pxa25x_ep_ops,
1918                         .maxpacket      = ISO_FIFO_SIZE,
1919                 },
1920                 .dev            = &memory,
1921                 .fifo_size      = ISO_FIFO_SIZE,
1922                 .bEndpointAddress = USB_DIR_IN | 8,
1923                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1924                 .reg_udccs      = &UDCCS8,
1925                 .reg_uddr       = &UDDR8,
1926         },
1927         .ep[9] = {
1928                 .ep = {
1929                         .name           = "ep9out-iso",
1930                         .ops            = &pxa25x_ep_ops,
1931                         .maxpacket      = ISO_FIFO_SIZE,
1932                 },
1933                 .dev            = &memory,
1934                 .fifo_size      = ISO_FIFO_SIZE,
1935                 .bEndpointAddress = 9,
1936                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1937                 .reg_udccs      = &UDCCS9,
1938                 .reg_ubcr       = &UBCR9,
1939                 .reg_uddr       = &UDDR9,
1940         },
1941         .ep[10] = {
1942                 .ep = {
1943                         .name           = "ep10in-int",
1944                         .ops            = &pxa25x_ep_ops,
1945                         .maxpacket      = INT_FIFO_SIZE,
1946                 },
1947                 .dev            = &memory,
1948                 .fifo_size      = INT_FIFO_SIZE,
1949                 .bEndpointAddress = USB_DIR_IN | 10,
1950                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1951                 .reg_udccs      = &UDCCS10,
1952                 .reg_uddr       = &UDDR10,
1953         },
1954
1955         /* third group of endpoints */
1956         .ep[11] = {
1957                 .ep = {
1958                         .name           = "ep11in-bulk",
1959                         .ops            = &pxa25x_ep_ops,
1960                         .maxpacket      = BULK_FIFO_SIZE,
1961                 },
1962                 .dev            = &memory,
1963                 .fifo_size      = BULK_FIFO_SIZE,
1964                 .bEndpointAddress = USB_DIR_IN | 11,
1965                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1966                 .reg_udccs      = &UDCCS11,
1967                 .reg_uddr       = &UDDR11,
1968         },
1969         .ep[12] = {
1970                 .ep = {
1971                         .name           = "ep12out-bulk",
1972                         .ops            = &pxa25x_ep_ops,
1973                         .maxpacket      = BULK_FIFO_SIZE,
1974                 },
1975                 .dev            = &memory,
1976                 .fifo_size      = BULK_FIFO_SIZE,
1977                 .bEndpointAddress = 12,
1978                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1979                 .reg_udccs      = &UDCCS12,
1980                 .reg_ubcr       = &UBCR12,
1981                 .reg_uddr       = &UDDR12,
1982         },
1983         .ep[13] = {
1984                 .ep = {
1985                         .name           = "ep13in-iso",
1986                         .ops            = &pxa25x_ep_ops,
1987                         .maxpacket      = ISO_FIFO_SIZE,
1988                 },
1989                 .dev            = &memory,
1990                 .fifo_size      = ISO_FIFO_SIZE,
1991                 .bEndpointAddress = USB_DIR_IN | 13,
1992                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1993                 .reg_udccs      = &UDCCS13,
1994                 .reg_uddr       = &UDDR13,
1995         },
1996         .ep[14] = {
1997                 .ep = {
1998                         .name           = "ep14out-iso",
1999                         .ops            = &pxa25x_ep_ops,
2000                         .maxpacket      = ISO_FIFO_SIZE,
2001                 },
2002                 .dev            = &memory,
2003                 .fifo_size      = ISO_FIFO_SIZE,
2004                 .bEndpointAddress = 14,
2005                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2006                 .reg_udccs      = &UDCCS14,
2007                 .reg_ubcr       = &UBCR14,
2008                 .reg_uddr       = &UDDR14,
2009         },
2010         .ep[15] = {
2011                 .ep = {
2012                         .name           = "ep15in-int",
2013                         .ops            = &pxa25x_ep_ops,
2014                         .maxpacket      = INT_FIFO_SIZE,
2015                 },
2016                 .dev            = &memory,
2017                 .fifo_size      = INT_FIFO_SIZE,
2018                 .bEndpointAddress = USB_DIR_IN | 15,
2019                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2020                 .reg_udccs      = &UDCCS15,
2021                 .reg_uddr       = &UDDR15,
2022         },
2023 #endif /* !CONFIG_USB_PXA25X_SMALL */
2024 };
2025
2026 #define CP15R0_VENDOR_MASK      0xffffe000
2027
2028 #if     defined(CONFIG_ARCH_PXA)
2029 #define CP15R0_XSCALE_VALUE     0x69052000      /* intel/arm/xscale */
2030
2031 #elif   defined(CONFIG_ARCH_IXP4XX)
2032 #define CP15R0_XSCALE_VALUE     0x69054000      /* intel/arm/ixp4xx */
2033
2034 #endif
2035
2036 #define CP15R0_PROD_MASK        0x000003f0
2037 #define PXA25x                  0x00000100      /* and PXA26x */
2038 #define PXA210                  0x00000120
2039
2040 #define CP15R0_REV_MASK         0x0000000f
2041
2042 #define CP15R0_PRODREV_MASK     (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2043
2044 #define PXA255_A0               0x00000106      /* or PXA260_B1 */
2045 #define PXA250_C0               0x00000105      /* or PXA26x_B0 */
2046 #define PXA250_B2               0x00000104
2047 #define PXA250_B1               0x00000103      /* or PXA260_A0 */
2048 #define PXA250_B0               0x00000102
2049 #define PXA250_A1               0x00000101
2050 #define PXA250_A0               0x00000100
2051
2052 #define PXA210_C0               0x00000125
2053 #define PXA210_B2               0x00000124
2054 #define PXA210_B1               0x00000123
2055 #define PXA210_B0               0x00000122
2056 #define IXP425_A0               0x000001c1
2057 #define IXP425_B0               0x000001f1
2058 #define IXP465_AD               0x00000200
2059
2060 /*
2061  *      probe - binds to the platform device
2062  */
2063 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2064 {
2065         struct pxa25x_udc *dev = &memory;
2066         int retval, irq;
2067         u32 chiprev;
2068
2069         pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2070
2071         /* insist on Intel/ARM/XScale */
2072         asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2073         if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2074                 pr_err("%s: not XScale!\n", driver_name);
2075                 return -ENODEV;
2076         }
2077
2078         /* trigger chiprev-specific logic */
2079         switch (chiprev & CP15R0_PRODREV_MASK) {
2080 #if     defined(CONFIG_ARCH_PXA)
2081         case PXA255_A0:
2082                 dev->has_cfr = 1;
2083                 break;
2084         case PXA250_A0:
2085         case PXA250_A1:
2086                 /* A0/A1 "not released"; ep 13, 15 unusable */
2087                 /* fall through */
2088         case PXA250_B2: case PXA210_B2:
2089         case PXA250_B1: case PXA210_B1:
2090         case PXA250_B0: case PXA210_B0:
2091                 /* OUT-DMA is broken ... */
2092                 /* fall through */
2093         case PXA250_C0: case PXA210_C0:
2094                 break;
2095 #elif   defined(CONFIG_ARCH_IXP4XX)
2096         case IXP425_A0:
2097         case IXP425_B0:
2098         case IXP465_AD:
2099                 dev->has_cfr = 1;
2100                 break;
2101 #endif
2102         default:
2103                 pr_err("%s: unrecognized processor: %08x\n",
2104                         driver_name, chiprev);
2105                 /* iop3xx, ixp4xx, ... */
2106                 return -ENODEV;
2107         }
2108
2109         irq = platform_get_irq(pdev, 0);
2110         if (irq < 0)
2111                 return -ENODEV;
2112
2113         dev->clk = clk_get(&pdev->dev, NULL);
2114         if (IS_ERR(dev->clk)) {
2115                 retval = PTR_ERR(dev->clk);
2116                 goto err_clk;
2117         }
2118
2119         pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2120                 dev->has_cfr ? "" : " (!cfr)",
2121                 SIZE_STR "(pio)"
2122                 );
2123
2124         /* other non-static parts of init */
2125         dev->dev = &pdev->dev;
2126         dev->mach = pdev->dev.platform_data;
2127
2128         dev->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
2129
2130         if (gpio_is_valid(dev->mach->gpio_pullup)) {
2131                 if ((retval = gpio_request(dev->mach->gpio_pullup,
2132                                 "pca25x_udc GPIO PULLUP"))) {
2133                         dev_dbg(&pdev->dev,
2134                                 "can't get pullup gpio %d, err: %d\n",
2135                                 dev->mach->gpio_pullup, retval);
2136                         goto err_gpio_pullup;
2137                 }
2138                 gpio_direction_output(dev->mach->gpio_pullup, 0);
2139         }
2140
2141         init_timer(&dev->timer);
2142         dev->timer.function = udc_watchdog;
2143         dev->timer.data = (unsigned long) dev;
2144
2145         device_initialize(&dev->gadget.dev);
2146         dev->gadget.dev.parent = &pdev->dev;
2147         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2148
2149         the_controller = dev;
2150         platform_set_drvdata(pdev, dev);
2151
2152         udc_disable(dev);
2153         udc_reinit(dev);
2154
2155         dev->vbus = 0;
2156
2157         /* irq setup after old hardware state is cleaned up */
2158         retval = request_irq(irq, pxa25x_udc_irq,
2159                         0, driver_name, dev);
2160         if (retval != 0) {
2161                 pr_err("%s: can't get irq %d, err %d\n",
2162                         driver_name, irq, retval);
2163                 goto err_irq1;
2164         }
2165         dev->got_irq = 1;
2166
2167 #ifdef CONFIG_ARCH_LUBBOCK
2168         if (machine_is_lubbock()) {
2169                 retval = request_irq(LUBBOCK_USB_DISC_IRQ, lubbock_vbus_irq,
2170                                      0, driver_name, dev);
2171                 if (retval != 0) {
2172                         pr_err("%s: can't get irq %i, err %d\n",
2173                                 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2174                         goto err_irq_lub;
2175                 }
2176                 retval = request_irq(LUBBOCK_USB_IRQ, lubbock_vbus_irq,
2177                                      0, driver_name, dev);
2178                 if (retval != 0) {
2179                         pr_err("%s: can't get irq %i, err %d\n",
2180                                 driver_name, LUBBOCK_USB_IRQ, retval);
2181                         goto lubbock_fail0;
2182                 }
2183         } else
2184 #endif
2185         create_debug_files(dev);
2186
2187         retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
2188         if (!retval)
2189                 return retval;
2190
2191         remove_debug_files(dev);
2192 #ifdef  CONFIG_ARCH_LUBBOCK
2193 lubbock_fail0:
2194         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2195  err_irq_lub:
2196         free_irq(irq, dev);
2197 #endif
2198  err_irq1:
2199         if (gpio_is_valid(dev->mach->gpio_pullup))
2200                 gpio_free(dev->mach->gpio_pullup);
2201  err_gpio_pullup:
2202         if (!IS_ERR_OR_NULL(dev->transceiver)) {
2203                 usb_put_phy(dev->transceiver);
2204                 dev->transceiver = NULL;
2205         }
2206         clk_put(dev->clk);
2207  err_clk:
2208         return retval;
2209 }
2210
2211 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2212 {
2213         pullup_off();
2214 }
2215
2216 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2217 {
2218         struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2219
2220         usb_del_gadget_udc(&dev->gadget);
2221         if (dev->driver)
2222                 return -EBUSY;
2223
2224         dev->pullup = 0;
2225         pullup(dev);
2226
2227         remove_debug_files(dev);
2228
2229         if (dev->got_irq) {
2230                 free_irq(platform_get_irq(pdev, 0), dev);
2231                 dev->got_irq = 0;
2232         }
2233 #ifdef CONFIG_ARCH_LUBBOCK
2234         if (machine_is_lubbock()) {
2235                 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2236                 free_irq(LUBBOCK_USB_IRQ, dev);
2237         }
2238 #endif
2239         if (gpio_is_valid(dev->mach->gpio_pullup))
2240                 gpio_free(dev->mach->gpio_pullup);
2241
2242         clk_put(dev->clk);
2243
2244         if (!IS_ERR_OR_NULL(dev->transceiver)) {
2245                 usb_put_phy(dev->transceiver);
2246                 dev->transceiver = NULL;
2247         }
2248
2249         platform_set_drvdata(pdev, NULL);
2250         the_controller = NULL;
2251         return 0;
2252 }
2253
2254 /*-------------------------------------------------------------------------*/
2255
2256 #ifdef  CONFIG_PM
2257
2258 /* USB suspend (controlled by the host) and system suspend (controlled
2259  * by the PXA) don't necessarily work well together.  If USB is active,
2260  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2261  * mode, or any deeper PM saving state.
2262  *
2263  * For now, we punt and forcibly disconnect from the USB host when PXA
2264  * enters any suspend state.  While we're disconnected, we always disable
2265  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2266  * Boards without software pullup control shouldn't use those states.
2267  * VBUS IRQs should probably be ignored so that the PXA device just acts
2268  * "dead" to USB hosts until system resume.
2269  */
2270 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2271 {
2272         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2273         unsigned long flags;
2274
2275         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2276                 WARNING("USB host won't detect disconnect!\n");
2277         udc->suspended = 1;
2278
2279         local_irq_save(flags);
2280         pullup(udc);
2281         local_irq_restore(flags);
2282
2283         return 0;
2284 }
2285
2286 static int pxa25x_udc_resume(struct platform_device *dev)
2287 {
2288         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2289         unsigned long flags;
2290
2291         udc->suspended = 0;
2292         local_irq_save(flags);
2293         pullup(udc);
2294         local_irq_restore(flags);
2295
2296         return 0;
2297 }
2298
2299 #else
2300 #define pxa25x_udc_suspend      NULL
2301 #define pxa25x_udc_resume       NULL
2302 #endif
2303
2304 /*-------------------------------------------------------------------------*/
2305
2306 static struct platform_driver udc_driver = {
2307         .shutdown       = pxa25x_udc_shutdown,
2308         .remove         = __exit_p(pxa25x_udc_remove),
2309         .suspend        = pxa25x_udc_suspend,
2310         .resume         = pxa25x_udc_resume,
2311         .driver         = {
2312                 .owner  = THIS_MODULE,
2313                 .name   = "pxa25x-udc",
2314         },
2315 };
2316
2317 module_platform_driver_probe(udc_driver, pxa25x_udc_probe);
2318
2319 MODULE_DESCRIPTION(DRIVER_DESC);
2320 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2321 MODULE_LICENSE("GPL");
2322 MODULE_ALIAS("platform:pxa25x-udc");