Pileus Git - ~andy/linux/blob - drivers/tty/serial/cpm_uart/cpm_uart_core.c

   1 /*
   2  *  Driver for CPM (SCC/SMC) serial ports; core driver
   3  *
   4  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
   5  *  Based on ppc8xx.c by Thomas Gleixner
   6  *  Based on drivers/serial/amba.c by Russell King
   7  *
   8  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
   9  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
  10  *
  11  *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  12  *            (C) 2004 Intracom, S.A.
  13  *            (C) 2005-2006 MontaVista Software, Inc.
  14  *              Vitaly Bordug <vbordug@ru.mvista.com>
  15  *
  16  * This program is free software; you can redistribute it and/or modify
  17  * it under the terms of the GNU General Public License as published by
  18  * the Free Software Foundation; either version 2 of the License, or
  19  * (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  29  *
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/tty.h>
  34 #include <linux/ioport.h>
  35 #include <linux/init.h>
  36 #include <linux/serial.h>
  37 #include <linux/console.h>
  38 #include <linux/sysrq.h>
  39 #include <linux/device.h>
  40 #include <linux/bootmem.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/fs_uart_pd.h>
  43 #include <linux/of_platform.h>
  44 #include <linux/gpio.h>
  45 #include <linux/of_gpio.h>
  46 #include <linux/clk.h>
  47
  48 #include <asm/io.h>
  49 #include <asm/irq.h>
  50 #include <asm/delay.h>
  51 #include <asm/fs_pd.h>
  52 #include <asm/udbg.h>
  53
  54 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  55 #define SUPPORT_SYSRQ
  56 #endif
  57
  58 #include <linux/serial_core.h>
  59 #include <linux/kernel.h>
  60
  61 #include "cpm_uart.h"
  62
  63
  64 /**************************************************************/
  65
  66 static int  cpm_uart_tx_pump(struct uart_port *port);
  67 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
  68 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
  69 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
  70
  71 /**************************************************************/
  72
  73 #define HW_BUF_SPD_THRESHOLD    9600
  74
  75 /*
  76  * Check, if transmit buffers are processed
  77 */
  78 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
  79 {
  80         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
  81         cbd_t __iomem *bdp = pinfo->tx_bd_base;
  82         int ret = 0;
  83
  84         while (1) {
  85                 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
  86                         break;
  87
  88                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
  89                         ret = TIOCSER_TEMT;
  90                         break;
  91                 }
  92                 bdp++;
  93         }
  94
  95         pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
  96
  97         return ret;
  98 }
  99
 100 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 101 {
 102         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 103
 104         if (pinfo->gpios[GPIO_RTS] >= 0)
 105                 gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
 106
 107         if (pinfo->gpios[GPIO_DTR] >= 0)
 108                 gpio_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
 109 }
 110
 111 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
 112 {
 113         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 114         unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 115
 116         if (pinfo->gpios[GPIO_CTS] >= 0) {
 117                 if (gpio_get_value(pinfo->gpios[GPIO_CTS]))
 118                         mctrl &= ~TIOCM_CTS;
 119         }
 120
 121         if (pinfo->gpios[GPIO_DSR] >= 0) {
 122                 if (gpio_get_value(pinfo->gpios[GPIO_DSR]))
 123                         mctrl &= ~TIOCM_DSR;
 124         }
 125
 126         if (pinfo->gpios[GPIO_DCD] >= 0) {
 127                 if (gpio_get_value(pinfo->gpios[GPIO_DCD]))
 128                         mctrl &= ~TIOCM_CAR;
 129         }
 130
 131         if (pinfo->gpios[GPIO_RI] >= 0) {
 132                 if (!gpio_get_value(pinfo->gpios[GPIO_RI]))
 133                         mctrl |= TIOCM_RNG;
 134         }
 135
 136         return mctrl;
 137 }
 138
 139 /*
 140  * Stop transmitter
 141  */
 142 static void cpm_uart_stop_tx(struct uart_port *port)
 143 {
 144         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 145         smc_t __iomem *smcp = pinfo->smcp;
 146         scc_t __iomem *sccp = pinfo->sccp;
 147
 148         pr_debug("CPM uart[%d]:stop tx\n", port->line);
 149
 150         if (IS_SMC(pinfo))
 151                 clrbits8(&smcp->smc_smcm, SMCM_TX);
 152         else
 153                 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
 154 }
 155
 156 /*
 157  * Start transmitter
 158  */
 159 static void cpm_uart_start_tx(struct uart_port *port)
 160 {
 161         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 162         smc_t __iomem *smcp = pinfo->smcp;
 163         scc_t __iomem *sccp = pinfo->sccp;
 164
 165         pr_debug("CPM uart[%d]:start tx\n", port->line);
 166
 167         if (IS_SMC(pinfo)) {
 168                 if (in_8(&smcp->smc_smcm) & SMCM_TX)
 169                         return;
 170         } else {
 171                 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
 172                         return;
 173         }
 174
 175         if (cpm_uart_tx_pump(port) != 0) {
 176                 if (IS_SMC(pinfo)) {
 177                         setbits8(&smcp->smc_smcm, SMCM_TX);
 178                 } else {
 179                         setbits16(&sccp->scc_sccm, UART_SCCM_TX);
 180                 }
 181         }
 182 }
 183
 184 /*
 185  * Stop receiver
 186  */
 187 static void cpm_uart_stop_rx(struct uart_port *port)
 188 {
 189         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 190         smc_t __iomem *smcp = pinfo->smcp;
 191         scc_t __iomem *sccp = pinfo->sccp;
 192
 193         pr_debug("CPM uart[%d]:stop rx\n", port->line);
 194
 195         if (IS_SMC(pinfo))
 196                 clrbits8(&smcp->smc_smcm, SMCM_RX);
 197         else
 198                 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
 199 }
 200
 201 /*
 202  * Enable Modem status interrupts
 203  */
 204 static void cpm_uart_enable_ms(struct uart_port *port)
 205 {
 206         pr_debug("CPM uart[%d]:enable ms\n", port->line);
 207 }
 208
 209 /*
 210  * Generate a break.
 211  */
 212 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 213 {
 214         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 215
 216         pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 217                 break_state);
 218
 219         if (break_state)
 220                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 221         else
 222                 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 223 }
 224
 225 /*
 226  * Transmit characters, refill buffer descriptor, if possible
 227  */
 228 static void cpm_uart_int_tx(struct uart_port *port)
 229 {
 230         pr_debug("CPM uart[%d]:TX INT\n", port->line);
 231
 232         cpm_uart_tx_pump(port);
 233 }
 234
 235 #ifdef CONFIG_CONSOLE_POLL
 236 static int serial_polled;
 237 #endif
 238
 239 /*
 240  * Receive characters
 241  */
 242 static void cpm_uart_int_rx(struct uart_port *port)
 243 {
 244         int i;
 245         unsigned char ch;
 246         u8 *cp;
 247         struct tty_struct *tty = port->state->port.tty;
 248         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 249         cbd_t __iomem *bdp;
 250         u16 status;
 251         unsigned int flg;
 252
 253         pr_debug("CPM uart[%d]:RX INT\n", port->line);
 254
 255         /* Just loop through the closed BDs and copy the characters into
 256          * the buffer.
 257          */
 258         bdp = pinfo->rx_cur;
 259         for (;;) {
 260 #ifdef CONFIG_CONSOLE_POLL
 261                 if (unlikely(serial_polled)) {
 262                         serial_polled = 0;
 263                         return;
 264                 }
 265 #endif
 266                 /* get status */
 267                 status = in_be16(&bdp->cbd_sc);
 268                 /* If this one is empty, return happy */
 269                 if (status & BD_SC_EMPTY)
 270                         break;
 271
 272                 /* get number of characters, and check spce in flip-buffer */
 273                 i = in_be16(&bdp->cbd_datlen);
 274
 275                 /* If we have not enough room in tty flip buffer, then we try
 276                  * later, which will be the next rx-interrupt or a timeout
 277                  */
 278                 if(tty_buffer_request_room(tty, i) < i) {
 279                         printk(KERN_WARNING "No room in flip buffer\n");
 280                         return;
 281                 }
 282
 283                 /* get pointer */
 284                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 285
 286                 /* loop through the buffer */
 287                 while (i-- > 0) {
 288                         ch = *cp++;
 289                         port->icount.rx++;
 290                         flg = TTY_NORMAL;
 291
 292                         if (status &
 293                             (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
 294                                 goto handle_error;
 295                         if (uart_handle_sysrq_char(port, ch))
 296                                 continue;
 297 #ifdef CONFIG_CONSOLE_POLL
 298                         if (unlikely(serial_polled)) {
 299                                 serial_polled = 0;
 300                                 return;
 301                         }
 302 #endif
 303                       error_return:
 304                         tty_insert_flip_char(tty, ch, flg);
 305
 306                 }               /* End while (i--) */
 307
 308                 /* This BD is ready to be used again. Clear status. get next */
 309                 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
 310                                         BD_SC_OV | BD_SC_ID);
 311                 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
 312
 313                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 314                         bdp = pinfo->rx_bd_base;
 315                 else
 316                         bdp++;
 317
 318         } /* End for (;;) */
 319
 320         /* Write back buffer pointer */
 321         pinfo->rx_cur = bdp;
 322
 323         /* activate BH processing */
 324         tty_flip_buffer_push(tty);
 325
 326         return;
 327
 328         /* Error processing */
 329
 330       handle_error:
 331         /* Statistics */
 332         if (status & BD_SC_BR)
 333                 port->icount.brk++;
 334         if (status & BD_SC_PR)
 335                 port->icount.parity++;
 336         if (status & BD_SC_FR)
 337                 port->icount.frame++;
 338         if (status & BD_SC_OV)
 339                 port->icount.overrun++;
 340
 341         /* Mask out ignored conditions */
 342         status &= port->read_status_mask;
 343
 344         /* Handle the remaining ones */
 345         if (status & BD_SC_BR)
 346                 flg = TTY_BREAK;
 347         else if (status & BD_SC_PR)
 348                 flg = TTY_PARITY;
 349         else if (status & BD_SC_FR)
 350                 flg = TTY_FRAME;
 351
 352         /* overrun does not affect the current character ! */
 353         if (status & BD_SC_OV) {
 354                 ch = 0;
 355                 flg = TTY_OVERRUN;
 356                 /* We skip this buffer */
 357                 /* CHECK: Is really nothing senseful there */
 358                 /* ASSUMPTION: it contains nothing valid */
 359                 i = 0;
 360         }
 361 #ifdef SUPPORT_SYSRQ
 362         port->sysrq = 0;
 363 #endif
 364         goto error_return;
 365 }
 366
 367 /*
 368  * Asynchron mode interrupt handler
 369  */
 370 static irqreturn_t cpm_uart_int(int irq, void *data)
 371 {
 372         u8 events;
 373         struct uart_port *port = data;
 374         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 375         smc_t __iomem *smcp = pinfo->smcp;
 376         scc_t __iomem *sccp = pinfo->sccp;
 377
 378         pr_debug("CPM uart[%d]:IRQ\n", port->line);
 379
 380         if (IS_SMC(pinfo)) {
 381                 events = in_8(&smcp->smc_smce);
 382                 out_8(&smcp->smc_smce, events);
 383                 if (events & SMCM_BRKE)
 384                         uart_handle_break(port);
 385                 if (events & SMCM_RX)
 386                         cpm_uart_int_rx(port);
 387                 if (events & SMCM_TX)
 388                         cpm_uart_int_tx(port);
 389         } else {
 390                 events = in_be16(&sccp->scc_scce);
 391                 out_be16(&sccp->scc_scce, events);
 392                 if (events & UART_SCCM_BRKE)
 393                         uart_handle_break(port);
 394                 if (events & UART_SCCM_RX)
 395                         cpm_uart_int_rx(port);
 396                 if (events & UART_SCCM_TX)
 397                         cpm_uart_int_tx(port);
 398         }
 399         return (events) ? IRQ_HANDLED : IRQ_NONE;
 400 }
 401
 402 static int cpm_uart_startup(struct uart_port *port)
 403 {
 404         int retval;
 405         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 406
 407         pr_debug("CPM uart[%d]:startup\n", port->line);
 408
 409         /* If the port is not the console, make sure rx is disabled. */
 410         if (!(pinfo->flags & FLAG_CONSOLE)) {
 411                 /* Disable UART rx */
 412                 if (IS_SMC(pinfo)) {
 413                         clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
 414                         clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 415                 } else {
 416                         clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
 417                         clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 418                 }
 419                 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 420         }
 421         /* Install interrupt handler. */
 422         retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
 423         if (retval)
 424                 return retval;
 425
 426         /* Startup rx-int */
 427         if (IS_SMC(pinfo)) {
 428                 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 429                 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
 430         } else {
 431                 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 432                 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
 433         }
 434
 435         return 0;
 436 }
 437
 438 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 439 {
 440         set_current_state(TASK_UNINTERRUPTIBLE);
 441         schedule_timeout(pinfo->wait_closing);
 442 }
 443
 444 /*
 445  * Shutdown the uart
 446  */
 447 static void cpm_uart_shutdown(struct uart_port *port)
 448 {
 449         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 450
 451         pr_debug("CPM uart[%d]:shutdown\n", port->line);
 452
 453         /* free interrupt handler */
 454         free_irq(port->irq, port);
 455
 456         /* If the port is not the console, disable Rx and Tx. */
 457         if (!(pinfo->flags & FLAG_CONSOLE)) {
 458                 /* Wait for all the BDs marked sent */
 459                 while(!cpm_uart_tx_empty(port)) {
 460                         set_current_state(TASK_UNINTERRUPTIBLE);
 461                         schedule_timeout(2);
 462                 }
 463
 464                 if (pinfo->wait_closing)
 465                         cpm_uart_wait_until_send(pinfo);
 466
 467                 /* Stop uarts */
 468                 if (IS_SMC(pinfo)) {
 469                         smc_t __iomem *smcp = pinfo->smcp;
 470                         clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 471                         clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
 472                 } else {
 473                         scc_t __iomem *sccp = pinfo->sccp;
 474                         clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 475                         clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 476                 }
 477
 478                 /* Shut them really down and reinit buffer descriptors */
 479                 if (IS_SMC(pinfo)) {
 480                         out_be16(&pinfo->smcup->smc_brkcr, 0);
 481                         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 482                 } else {
 483                         out_be16(&pinfo->sccup->scc_brkcr, 0);
 484                         cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
 485                 }
 486
 487                 cpm_uart_initbd(pinfo);
 488         }
 489 }
 490
 491 static void cpm_uart_set_termios(struct uart_port *port,
 492                                  struct ktermios *termios,
 493                                  struct ktermios *old)
 494 {
 495         int baud;
 496         unsigned long flags;
 497         u16 cval, scval, prev_mode;
 498         int bits, sbits;
 499         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 500         smc_t __iomem *smcp = pinfo->smcp;
 501         scc_t __iomem *sccp = pinfo->sccp;
 502
 503         pr_debug("CPM uart[%d]:set_termios\n", port->line);
 504
 505         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 506         if (baud <= HW_BUF_SPD_THRESHOLD ||
 507             (pinfo->port.state && pinfo->port.state->port.tty->low_latency))
 508                 pinfo->rx_fifosize = 1;
 509         else
 510                 pinfo->rx_fifosize = RX_BUF_SIZE;
 511
 512         /* Character length programmed into the mode register is the
 513          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
 514          * 1 or 2 stop bits, minus 1.
 515          * The value 'bits' counts this for us.
 516          */
 517         cval = 0;
 518         scval = 0;
 519
 520         /* byte size */
 521         switch (termios->c_cflag & CSIZE) {
 522         case CS5:
 523                 bits = 5;
 524                 break;
 525         case CS6:
 526                 bits = 6;
 527                 break;
 528         case CS7:
 529                 bits = 7;
 530                 break;
 531         case CS8:
 532                 bits = 8;
 533                 break;
 534                 /* Never happens, but GCC is too dumb to figure it out */
 535         default:
 536                 bits = 8;
 537                 break;
 538         }
 539         sbits = bits - 5;
 540
 541         if (termios->c_cflag & CSTOPB) {
 542                 cval |= SMCMR_SL;       /* Two stops */
 543                 scval |= SCU_PSMR_SL;
 544                 bits++;
 545         }
 546
 547         if (termios->c_cflag & PARENB) {
 548                 cval |= SMCMR_PEN;
 549                 scval |= SCU_PSMR_PEN;
 550                 bits++;
 551                 if (!(termios->c_cflag & PARODD)) {
 552                         cval |= SMCMR_PM_EVEN;
 553                         scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
 554                 }
 555         }
 556
 557         /*
 558          * Update the timeout
 559          */
 560         uart_update_timeout(port, termios->c_cflag, baud);
 561
 562         /*
 563          * Set up parity check flag
 564          */
 565 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 566
 567         port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
 568         if (termios->c_iflag & INPCK)
 569                 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
 570         if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
 571                 port->read_status_mask |= BD_SC_BR;
 572
 573         /*
 574          * Characters to ignore
 575          */
 576         port->ignore_status_mask = 0;
 577         if (termios->c_iflag & IGNPAR)
 578                 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
 579         if (termios->c_iflag & IGNBRK) {
 580                 port->ignore_status_mask |= BD_SC_BR;
 581                 /*
 582                  * If we're ignore parity and break indicators, ignore
 583                  * overruns too.  (For real raw support).
 584                  */
 585                 if (termios->c_iflag & IGNPAR)
 586                         port->ignore_status_mask |= BD_SC_OV;
 587         }
 588         /*
 589          * !!! ignore all characters if CREAD is not set
 590          */
 591         if ((termios->c_cflag & CREAD) == 0)
 592                 port->read_status_mask &= ~BD_SC_EMPTY;
 593
 594         spin_lock_irqsave(&port->lock, flags);
 595
 596         /* Start bit has not been added (so don't, because we would just
 597          * subtract it later), and we need to add one for the number of
 598          * stops bits (there is always at least one).
 599          */
 600         bits++;
 601         if (IS_SMC(pinfo)) {
 602                 /*
 603                  * MRBLR can be changed while an SMC/SCC is operating only
 604                  * if it is done in a single bus cycle with one 16-bit move
 605                  * (not two 8-bit bus cycles back-to-back). This occurs when
 606                  * the cp shifts control to the next RxBD, so the change does
 607                  * not take effect immediately. To guarantee the exact RxBD
 608                  * on which the change occurs, change MRBLR only while the
 609                  * SMC/SCC receiver is disabled.
 610                  */
 611                 out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
 612
 613                 /* Set the mode register.  We want to keep a copy of the
 614                  * enables, because we want to put them back if they were
 615                  * present.
 616                  */
 617                 prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
 618                 /* Output in *one* operation, so we don't interrupt RX/TX if they
 619                  * were already enabled. */
 620                 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
 621                     SMCMR_SM_UART | prev_mode);
 622         } else {
 623                 out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 624                 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
 625         }
 626
 627         if (pinfo->clk)
 628                 clk_set_rate(pinfo->clk, baud);
 629         else
 630                 cpm_set_brg(pinfo->brg - 1, baud);
 631         spin_unlock_irqrestore(&port->lock, flags);
 632 }
 633
 634 static const char *cpm_uart_type(struct uart_port *port)
 635 {
 636         pr_debug("CPM uart[%d]:uart_type\n", port->line);
 637
 638         return port->type == PORT_CPM ? "CPM UART" : NULL;
 639 }
 640
 641 /*
 642  * verify the new serial_struct (for TIOCSSERIAL).
 643  */
 644 static int cpm_uart_verify_port(struct uart_port *port,
 645                                 struct serial_struct *ser)
 646 {
 647         int ret = 0;
 648
 649         pr_debug("CPM uart[%d]:verify_port\n", port->line);
 650
 651         if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
 652                 ret = -EINVAL;
 653         if (ser->irq < 0 || ser->irq >= nr_irqs)
 654                 ret = -EINVAL;
 655         if (ser->baud_base < 9600)
 656                 ret = -EINVAL;
 657         return ret;
 658 }
 659
 660 /*
 661  * Transmit characters, refill buffer descriptor, if possible
 662  */
 663 static int cpm_uart_tx_pump(struct uart_port *port)
 664 {
 665         cbd_t __iomem *bdp;
 666         u8 *p;
 667         int count;
 668         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 669         struct circ_buf *xmit = &port->state->xmit;
 670
 671         /* Handle xon/xoff */
 672         if (port->x_char) {
 673                 /* Pick next descriptor and fill from buffer */
 674                 bdp = pinfo->tx_cur;
 675
 676                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 677
 678                 *p++ = port->x_char;
 679
 680                 out_be16(&bdp->cbd_datlen, 1);
 681                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 682                 /* Get next BD. */
 683                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 684                         bdp = pinfo->tx_bd_base;
 685                 else
 686                         bdp++;
 687                 pinfo->tx_cur = bdp;
 688
 689                 port->icount.tx++;
 690                 port->x_char = 0;
 691                 return 1;
 692         }
 693
 694         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 695                 cpm_uart_stop_tx(port);
 696                 return 0;
 697         }
 698
 699         /* Pick next descriptor and fill from buffer */
 700         bdp = pinfo->tx_cur;
 701
 702         while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
 703                xmit->tail != xmit->head) {
 704                 count = 0;
 705                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 706                 while (count < pinfo->tx_fifosize) {
 707                         *p++ = xmit->buf[xmit->tail];
 708                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 709                         port->icount.tx++;
 710                         count++;
 711                         if (xmit->head == xmit->tail)
 712                                 break;
 713                 }
 714                 out_be16(&bdp->cbd_datlen, count);
 715                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 716                 /* Get next BD. */
 717                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 718                         bdp = pinfo->tx_bd_base;
 719                 else
 720                         bdp++;
 721         }
 722         pinfo->tx_cur = bdp;
 723
 724         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 725                 uart_write_wakeup(port);
 726
 727         if (uart_circ_empty(xmit)) {
 728                 cpm_uart_stop_tx(port);
 729                 return 0;
 730         }
 731
 732         return 1;
 733 }
 734
 735 /*
 736  * init buffer descriptors
 737  */
 738 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 739 {
 740         int i;
 741         u8 *mem_addr;
 742         cbd_t __iomem *bdp;
 743
 744         pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
 745
 746         /* Set the physical address of the host memory
 747          * buffers in the buffer descriptors, and the
 748          * virtual address for us to work with.
 749          */
 750         mem_addr = pinfo->mem_addr;
 751         bdp = pinfo->rx_cur = pinfo->rx_bd_base;
 752         for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
 753                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 754                 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
 755                 mem_addr += pinfo->rx_fifosize;
 756         }
 757
 758         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 759         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
 760
 761         /* Set the physical address of the host memory
 762          * buffers in the buffer descriptors, and the
 763          * virtual address for us to work with.
 764          */
 765         mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
 766         bdp = pinfo->tx_cur = pinfo->tx_bd_base;
 767         for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
 768                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 769                 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
 770                 mem_addr += pinfo->tx_fifosize;
 771         }
 772
 773         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 774         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
 775 }
 776
 777 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 778 {
 779         scc_t __iomem *scp;
 780         scc_uart_t __iomem *sup;
 781
 782         pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
 783
 784         scp = pinfo->sccp;
 785         sup = pinfo->sccup;
 786
 787         /* Store address */
 788         out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
 789                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 790         out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
 791                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 792
 793         /* Set up the uart parameters in the
 794          * parameter ram.
 795          */
 796
 797         cpm_set_scc_fcr(sup);
 798
 799         out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 800         out_be16(&sup->scc_maxidl, pinfo->rx_fifosize);
 801         out_be16(&sup->scc_brkcr, 1);
 802         out_be16(&sup->scc_parec, 0);
 803         out_be16(&sup->scc_frmec, 0);
 804         out_be16(&sup->scc_nosec, 0);
 805         out_be16(&sup->scc_brkec, 0);
 806         out_be16(&sup->scc_uaddr1, 0);
 807         out_be16(&sup->scc_uaddr2, 0);
 808         out_be16(&sup->scc_toseq, 0);
 809         out_be16(&sup->scc_char1, 0x8000);
 810         out_be16(&sup->scc_char2, 0x8000);
 811         out_be16(&sup->scc_char3, 0x8000);
 812         out_be16(&sup->scc_char4, 0x8000);
 813         out_be16(&sup->scc_char5, 0x8000);
 814         out_be16(&sup->scc_char6, 0x8000);
 815         out_be16(&sup->scc_char7, 0x8000);
 816         out_be16(&sup->scc_char8, 0x8000);
 817         out_be16(&sup->scc_rccm, 0xc0ff);
 818
 819         /* Send the CPM an initialize command.
 820          */
 821         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 822
 823         /* Set UART mode, 8 bit, no parity, one stop.
 824          * Enable receive and transmit.
 825          */
 826         out_be32(&scp->scc_gsmrh, 0);
 827         out_be32(&scp->scc_gsmrl,
 828                  SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
 829
 830         /* Enable rx interrupts  and clear all pending events.  */
 831         out_be16(&scp->scc_sccm, 0);
 832         out_be16(&scp->scc_scce, 0xffff);
 833         out_be16(&scp->scc_dsr, 0x7e7e);
 834         out_be16(&scp->scc_psmr, 0x3000);
 835
 836         setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 837 }
 838
 839 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 840 {
 841         smc_t __iomem *sp;
 842         smc_uart_t __iomem *up;
 843
 844         pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
 845
 846         sp = pinfo->smcp;
 847         up = pinfo->smcup;
 848
 849         /* Store address */
 850         out_be16(&pinfo->smcup->smc_rbase,
 851                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 852         out_be16(&pinfo->smcup->smc_tbase,
 853                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 854
 855 /*
 856  *  In case SMC1 is being relocated...
 857  */
 858 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
 859         out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
 860         out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
 861         out_be32(&up->smc_rstate, 0);
 862         out_be32(&up->smc_tstate, 0);
 863         out_be16(&up->smc_brkcr, 1);              /* number of break chars */
 864         out_be16(&up->smc_brkec, 0);
 865 #endif
 866
 867         /* Set up the uart parameters in the
 868          * parameter ram.
 869          */
 870         cpm_set_smc_fcr(up);
 871
 872         /* Using idle character time requires some additional tuning.  */
 873         out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
 874         out_be16(&up->smc_maxidl, pinfo->rx_fifosize);
 875         out_be16(&up->smc_brklen, 0);
 876         out_be16(&up->smc_brkec, 0);
 877         out_be16(&up->smc_brkcr, 1);
 878
 879         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 880
 881         /* Set UART mode, 8 bit, no parity, one stop.
 882          * Enable receive and transmit.
 883          */
 884         out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
 885
 886         /* Enable only rx interrupts clear all pending events. */
 887         out_8(&sp->smc_smcm, 0);
 888         out_8(&sp->smc_smce, 0xff);
 889
 890         setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 891 }
 892
 893 /*
 894  * Initialize port. This is called from early_console stuff
 895  * so we have to be careful here !
 896  */
 897 static int cpm_uart_request_port(struct uart_port *port)
 898 {
 899         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 900         int ret;
 901
 902         pr_debug("CPM uart[%d]:request port\n", port->line);
 903
 904         if (pinfo->flags & FLAG_CONSOLE)
 905                 return 0;
 906
 907         if (IS_SMC(pinfo)) {
 908                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
 909                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 910         } else {
 911                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 912                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 913         }
 914
 915         ret = cpm_uart_allocbuf(pinfo, 0);
 916
 917         if (ret)
 918                 return ret;
 919
 920         cpm_uart_initbd(pinfo);
 921         if (IS_SMC(pinfo))
 922                 cpm_uart_init_smc(pinfo);
 923         else
 924                 cpm_uart_init_scc(pinfo);
 925
 926         return 0;
 927 }
 928
 929 static void cpm_uart_release_port(struct uart_port *port)
 930 {
 931         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 932
 933         if (!(pinfo->flags & FLAG_CONSOLE))
 934                 cpm_uart_freebuf(pinfo);
 935 }
 936
 937 /*
 938  * Configure/autoconfigure the port.
 939  */
 940 static void cpm_uart_config_port(struct uart_port *port, int flags)
 941 {
 942         pr_debug("CPM uart[%d]:config_port\n", port->line);
 943
 944         if (flags & UART_CONFIG_TYPE) {
 945                 port->type = PORT_CPM;
 946                 cpm_uart_request_port(port);
 947         }
 948 }
 949
 950 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_CPM_CONSOLE)
 951 /*
 952  * Write a string to the serial port
 953  * Note that this is called with interrupts already disabled
 954  */
 955 static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
 956                 const char *string, u_int count)
 957 {
 958         unsigned int i;
 959         cbd_t __iomem *bdp, *bdbase;
 960         unsigned char *cpm_outp_addr;
 961
 962         /* Get the address of the host memory buffer.
 963          */
 964         bdp = pinfo->tx_cur;
 965         bdbase = pinfo->tx_bd_base;
 966
 967         /*
 968          * Now, do each character.  This is not as bad as it looks
 969          * since this is a holding FIFO and not a transmitting FIFO.
 970          * We could add the complexity of filling the entire transmit
 971          * buffer, but we would just wait longer between accesses......
 972          */
 973         for (i = 0; i < count; i++, string++) {
 974                 /* Wait for transmitter fifo to empty.
 975                  * Ready indicates output is ready, and xmt is doing
 976                  * that, not that it is ready for us to send.
 977                  */
 978                 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
 979                         ;
 980
 981                 /* Send the character out.
 982                  * If the buffer address is in the CPM DPRAM, don't
 983                  * convert it.
 984                  */
 985                 cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
 986                                         pinfo);
 987                 *cpm_outp_addr = *string;
 988
 989                 out_be16(&bdp->cbd_datlen, 1);
 990                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 991
 992                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 993                         bdp = bdbase;
 994                 else
 995                         bdp++;
 996
 997                 /* if a LF, also do CR... */
 998                 if (*string == 10) {
 999                         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1000                                 ;
1001
1002                         cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1003                                                 pinfo);
1004                         *cpm_outp_addr = 13;
1005
1006                         out_be16(&bdp->cbd_datlen, 1);
1007                         setbits16(&bdp->cbd_sc, BD_SC_READY);
1008
1009                         if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1010                                 bdp = bdbase;
1011                         else
1012                                 bdp++;
1013                 }
1014         }
1015
1016         /*
1017          * Finally, Wait for transmitter & holding register to empty
1018          *  and restore the IER
1019          */
1020         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1021                 ;
1022
1023         pinfo->tx_cur = bdp;
1024 }
1025 #endif
1026
1027 #ifdef CONFIG_CONSOLE_POLL
1028 /* Serial polling routines for writing and reading from the uart while
1029  * in an interrupt or debug context.
1030  */
1031
1032 #define GDB_BUF_SIZE    512     /* power of 2, please */
1033
1034 static char poll_buf[GDB_BUF_SIZE];
1035 static char *pollp;
1036 static int poll_chars;
1037
1038 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
1039 {
1040         u_char          c, *cp;
1041         volatile cbd_t  *bdp;
1042         int             i;
1043
1044         /* Get the address of the host memory buffer.
1045          */
1046         bdp = pinfo->rx_cur;
1047         while (bdp->cbd_sc & BD_SC_EMPTY)
1048                 ;
1049
1050         /* If the buffer address is in the CPM DPRAM, don't
1051          * convert it.
1052          */
1053         cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1054
1055         if (obuf) {
1056                 i = c = bdp->cbd_datlen;
1057                 while (i-- > 0)
1058                         *obuf++ = *cp++;
1059         } else
1060                 c = *cp;
1061         bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
1062         bdp->cbd_sc |= BD_SC_EMPTY;
1063
1064         if (bdp->cbd_sc & BD_SC_WRAP)
1065                 bdp = pinfo->rx_bd_base;
1066         else
1067                 bdp++;
1068         pinfo->rx_cur = (cbd_t *)bdp;
1069
1070         return (int)c;
1071 }
1072
1073 static int cpm_get_poll_char(struct uart_port *port)
1074 {
1075         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
1076
1077         if (!serial_polled) {
1078                 serial_polled = 1;
1079                 poll_chars = 0;
1080         }
1081         if (poll_chars <= 0) {
1082                 poll_chars = poll_wait_key(poll_buf, pinfo);
1083                 pollp = poll_buf;
1084         }
1085         poll_chars--;
1086         return *pollp++;
1087 }
1088
1089 static void cpm_put_poll_char(struct uart_port *port,
1090                          unsigned char c)
1091 {
1092         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
1093         static char ch[2];
1094
1095         ch[0] = (char)c;
1096         cpm_uart_early_write(pinfo, ch, 1);
1097 }
1098 #endif /* CONFIG_CONSOLE_POLL */
1099
1100 static struct uart_ops cpm_uart_pops = {
1101         .tx_empty       = cpm_uart_tx_empty,
1102         .set_mctrl      = cpm_uart_set_mctrl,
1103         .get_mctrl      = cpm_uart_get_mctrl,
1104         .stop_tx        = cpm_uart_stop_tx,
1105         .start_tx       = cpm_uart_start_tx,
1106         .stop_rx        = cpm_uart_stop_rx,
1107         .enable_ms      = cpm_uart_enable_ms,
1108         .break_ctl      = cpm_uart_break_ctl,
1109         .startup        = cpm_uart_startup,
1110         .shutdown       = cpm_uart_shutdown,
1111         .set_termios    = cpm_uart_set_termios,
1112         .type           = cpm_uart_type,
1113         .release_port   = cpm_uart_release_port,
1114         .request_port   = cpm_uart_request_port,
1115         .config_port    = cpm_uart_config_port,
1116         .verify_port    = cpm_uart_verify_port,
1117 #ifdef CONFIG_CONSOLE_POLL
1118         .poll_get_char = cpm_get_poll_char,
1119         .poll_put_char = cpm_put_poll_char,
1120 #endif
1121 };
1122
1123 struct uart_cpm_port cpm_uart_ports[UART_NR];
1124
1125 static int cpm_uart_init_port(struct device_node *np,
1126                               struct uart_cpm_port *pinfo)
1127 {
1128         const u32 *data;
1129         void __iomem *mem, *pram;
1130         int len;
1131         int ret;
1132         int i;
1133
1134         data = of_get_property(np, "clock", NULL);
1135         if (data) {
1136                 struct clk *clk = clk_get(NULL, (const char*)data);
1137                 if (!IS_ERR(clk))
1138                         pinfo->clk = clk;
1139         }
1140         if (!pinfo->clk) {
1141                 data = of_get_property(np, "fsl,cpm-brg", &len);
1142                 if (!data || len != 4) {
1143                         printk(KERN_ERR "CPM UART %s has no/invalid "
1144                                         "fsl,cpm-brg property.\n", np->name);
1145                         return -EINVAL;
1146                 }
1147                 pinfo->brg = *data;
1148         }
1149
1150         data = of_get_property(np, "fsl,cpm-command", &len);
1151         if (!data || len != 4) {
1152                 printk(KERN_ERR "CPM UART %s has no/invalid "
1153                                 "fsl,cpm-command property.\n", np->name);
1154                 return -EINVAL;
1155         }
1156         pinfo->command = *data;
1157
1158         mem = of_iomap(np, 0);
1159         if (!mem)
1160                 return -ENOMEM;
1161
1162         if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1163             of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1164                 pinfo->sccp = mem;
1165                 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1166         } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1167                    of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1168                 pinfo->flags |= FLAG_SMC;
1169                 pinfo->smcp = mem;
1170                 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1171         } else {
1172                 ret = -ENODEV;
1173                 goto out_mem;
1174         }
1175
1176         if (!pram) {
1177                 ret = -ENOMEM;
1178                 goto out_mem;
1179         }
1180
1181         pinfo->tx_nrfifos = TX_NUM_FIFO;
1182         pinfo->tx_fifosize = TX_BUF_SIZE;
1183         pinfo->rx_nrfifos = RX_NUM_FIFO;
1184         pinfo->rx_fifosize = RX_BUF_SIZE;
1185
1186         pinfo->port.uartclk = ppc_proc_freq;
1187         pinfo->port.mapbase = (unsigned long)mem;
1188         pinfo->port.type = PORT_CPM;
1189         pinfo->port.ops = &cpm_uart_pops,
1190         pinfo->port.iotype = UPIO_MEM;
1191         pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1192         spin_lock_init(&pinfo->port.lock);
1193
1194         pinfo->port.irq = of_irq_to_resource(np, 0, NULL);
1195         if (pinfo->port.irq == NO_IRQ) {
1196                 ret = -EINVAL;
1197                 goto out_pram;
1198         }
1199
1200         for (i = 0; i < NUM_GPIOS; i++)
1201                 pinfo->gpios[i] = of_get_gpio(np, i);
1202
1203 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1204         udbg_putc = NULL;
1205 #endif
1206
1207         return cpm_uart_request_port(&pinfo->port);
1208
1209 out_pram:
1210         cpm_uart_unmap_pram(pinfo, pram);
1211 out_mem:
1212         iounmap(mem);
1213         return ret;
1214 }
1215
1216 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1217 /*
1218  *      Print a string to the serial port trying not to disturb
1219  *      any possible real use of the port...
1220  *
1221  *      Note that this is called with interrupts already disabled
1222  */
1223 static void cpm_uart_console_write(struct console *co, const char *s,
1224                                    u_int count)
1225 {
1226         struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1227         unsigned long flags;
1228         int nolock = oops_in_progress;
1229
1230         if (unlikely(nolock)) {
1231                 local_irq_save(flags);
1232         } else {
1233                 spin_lock_irqsave(&pinfo->port.lock, flags);
1234         }
1235
1236         cpm_uart_early_write(pinfo, s, count);
1237
1238         if (unlikely(nolock)) {
1239                 local_irq_restore(flags);
1240         } else {
1241                 spin_unlock_irqrestore(&pinfo->port.lock, flags);
1242         }
1243 }
1244
1245
1246 static int __init cpm_uart_console_setup(struct console *co, char *options)
1247 {
1248         int baud = 38400;
1249         int bits = 8;
1250         int parity = 'n';
1251         int flow = 'n';
1252         int ret;
1253         struct uart_cpm_port *pinfo;
1254         struct uart_port *port;
1255
1256         struct device_node *np = NULL;
1257         int i = 0;
1258
1259         if (co->index >= UART_NR) {
1260                 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1261                        co->index);
1262                 return -ENODEV;
1263         }
1264
1265         do {
1266                 np = of_find_node_by_type(np, "serial");
1267                 if (!np)
1268                         return -ENODEV;
1269
1270                 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1271                     !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1272                     !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1273                     !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1274                         i--;
1275         } while (i++ != co->index);
1276
1277         pinfo = &cpm_uart_ports[co->index];
1278
1279         pinfo->flags |= FLAG_CONSOLE;
1280         port = &pinfo->port;
1281
1282         ret = cpm_uart_init_port(np, pinfo);
1283         of_node_put(np);
1284         if (ret)
1285                 return ret;
1286
1287         if (options) {
1288                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1289         } else {
1290                 if ((baud = uart_baudrate()) == -1)
1291                         baud = 9600;
1292         }
1293
1294         if (IS_SMC(pinfo)) {
1295                 out_be16(&pinfo->smcup->smc_brkcr, 0);
1296                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1297                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1298                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1299         } else {
1300                 out_be16(&pinfo->sccup->scc_brkcr, 0);
1301                 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1302                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1303                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1304         }
1305
1306         ret = cpm_uart_allocbuf(pinfo, 1);
1307
1308         if (ret)
1309                 return ret;
1310
1311         cpm_uart_initbd(pinfo);
1312
1313         if (IS_SMC(pinfo))
1314                 cpm_uart_init_smc(pinfo);
1315         else
1316                 cpm_uart_init_scc(pinfo);
1317
1318         uart_set_options(port, co, baud, parity, bits, flow);
1319         cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1320
1321         return 0;
1322 }
1323
1324 static struct uart_driver cpm_reg;
1325 static struct console cpm_scc_uart_console = {
1326         .name           = "ttyCPM",
1327         .write          = cpm_uart_console_write,
1328         .device         = uart_console_device,
1329         .setup          = cpm_uart_console_setup,
1330         .flags          = CON_PRINTBUFFER,
1331         .index          = -1,
1332         .data           = &cpm_reg,
1333 };
1334
1335 static int __init cpm_uart_console_init(void)
1336 {
1337         register_console(&cpm_scc_uart_console);
1338         return 0;
1339 }
1340
1341 console_initcall(cpm_uart_console_init);
1342
1343 #define CPM_UART_CONSOLE        &cpm_scc_uart_console
1344 #else
1345 #define CPM_UART_CONSOLE        NULL
1346 #endif
1347
1348 static struct uart_driver cpm_reg = {
1349         .owner          = THIS_MODULE,
1350         .driver_name    = "ttyCPM",
1351         .dev_name       = "ttyCPM",
1352         .major          = SERIAL_CPM_MAJOR,
1353         .minor          = SERIAL_CPM_MINOR,
1354         .cons           = CPM_UART_CONSOLE,
1355         .nr             = UART_NR,
1356 };
1357
1358 static int probe_index;
1359
1360 static int __devinit cpm_uart_probe(struct platform_device *ofdev)
1361 {
1362         int index = probe_index++;
1363         struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1364         int ret;
1365
1366         pinfo->port.line = index;
1367
1368         if (index >= UART_NR)
1369                 return -ENODEV;
1370
1371         dev_set_drvdata(&ofdev->dev, pinfo);
1372
1373         /* initialize the device pointer for the port */
1374         pinfo->port.dev = &ofdev->dev;
1375
1376         ret = cpm_uart_init_port(ofdev->dev.of_node, pinfo);
1377         if (ret)
1378                 return ret;
1379
1380         return uart_add_one_port(&cpm_reg, &pinfo->port);
1381 }
1382
1383 static int __devexit cpm_uart_remove(struct platform_device *ofdev)
1384 {
1385         struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev);
1386         return uart_remove_one_port(&cpm_reg, &pinfo->port);
1387 }
1388
1389 static struct of_device_id cpm_uart_match[] = {
1390         {
1391                 .compatible = "fsl,cpm1-smc-uart",
1392         },
1393         {
1394                 .compatible = "fsl,cpm1-scc-uart",
1395         },
1396         {
1397                 .compatible = "fsl,cpm2-smc-uart",
1398         },
1399         {
1400                 .compatible = "fsl,cpm2-scc-uart",
1401         },
1402         {}
1403 };
1404
1405 static struct platform_driver cpm_uart_driver = {
1406         .driver = {
1407                 .name = "cpm_uart",
1408                 .owner = THIS_MODULE,
1409                 .of_match_table = cpm_uart_match,
1410         },
1411         .probe = cpm_uart_probe,
1412         .remove = cpm_uart_remove,
1413  };
1414
1415 static int __init cpm_uart_init(void)
1416 {
1417         int ret = uart_register_driver(&cpm_reg);
1418         if (ret)
1419                 return ret;
1420
1421         ret = platform_driver_register(&cpm_uart_driver);
1422         if (ret)
1423                 uart_unregister_driver(&cpm_reg);
1424
1425         return ret;
1426 }
1427
1428 static void __exit cpm_uart_exit(void)
1429 {
1430         platform_driver_unregister(&cpm_uart_driver);
1431         uart_unregister_driver(&cpm_reg);
1432 }
1433
1434 module_init(cpm_uart_init);
1435 module_exit(cpm_uart_exit);
1436
1437 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1438 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1439 MODULE_LICENSE("GPL");
1440 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);