5 /* ------------------- Constant Definitions ------------------------- */
12 //#define LINUXBIOS /* turn this on when compiling for LINUXBIOS */
13 #define AGPOFF /* default is turn off AGP */
15 #define XGIFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
21 #define DRIVER_DESC "XGI Volari Frame Buffer Module Version 0.8.1"
23 #ifndef PCI_VENDOR_ID_XG
24 #define PCI_VENDOR_ID_XG 0x18CA
27 #ifndef PCI_DEVICE_ID_XG_40
28 #define PCI_DEVICE_ID_XG_40 0x040
30 #ifndef PCI_DEVICE_ID_XG_41
31 #define PCI_DEVICE_ID_XG_41 0x041
33 #ifndef PCI_DEVICE_ID_XG_42
34 #define PCI_DEVICE_ID_XG_42 0x042
36 #ifndef PCI_DEVICE_ID_XG_20
37 #define PCI_DEVICE_ID_XG_20 0x020
39 #ifndef PCI_DEVICE_ID_XG_27
40 #define PCI_DEVICE_ID_XG_27 0x027
45 #define XGI_IOTYPE1 void __iomem
46 #define XGI_IOTYPE2 __iomem
47 #define XGIINITSTATIC static
49 static DEFINE_PCI_DEVICE_TABLE(xgifb_pci_table) = {
50 { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
51 { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_27, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
52 { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_40, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
53 { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
57 MODULE_DEVICE_TABLE(pci, xgifb_pci_table);
59 /* To be included in fb.h */
60 #ifndef FB_ACCEL_XGI_GLAMOUR_2
61 #define FB_ACCEL_XGI_GLAMOUR_2 40 /* XGI 315, 650, 740 */
63 #ifndef FB_ACCEL_XGI_XABRE
64 #define FB_ACCEL_XGI_XABRE 41 /* XGI 330 ("Xabre") */
67 #define MAX_ROM_SCAN 0x10000
69 #define HW_CURSOR_CAP 0x80
70 #define TURBO_QUEUE_CAP 0x40
71 #define AGP_CMD_QUEUE_CAP 0x20
72 #define VM_CMD_QUEUE_CAP 0x10
73 #define MMIO_CMD_QUEUE_CAP 0x08
79 #define COMMAND_QUEUE_AREA_SIZE 0x80000 /* 512K */
80 #define COMMAND_QUEUE_THRESHOLD 0x1F
84 #define HW_CURSOR_AREA_SIZE_315 0x4000 /* 16K */
85 #define HW_CURSOR_AREA_SIZE_300 0x1000 /* 4K */
87 #define OH_ALLOC_SIZE 4000
88 #define SENTINEL 0x7fffffff
95 #define CRTC_DATA 0x25
96 #define DAC2_ADR (0x16-0x30)
97 #define DAC2_DATA (0x17-0x30)
98 #define VB_PART1_ADR (0x04-0x30)
99 #define VB_PART1_DATA (0x05-0x30)
100 #define VB_PART2_ADR (0x10-0x30)
101 #define VB_PART2_DATA (0x11-0x30)
102 #define VB_PART3_ADR (0x12-0x30)
103 #define VB_PART3_DATA (0x13-0x30)
104 #define VB_PART4_ADR (0x14-0x30)
105 #define VB_PART4_DATA (0x15-0x30)
107 #define XGISR XGI_Pr.P3c4
108 #define XGICR XGI_Pr.P3d4
109 #define XGIDACA XGI_Pr.P3c8
110 #define XGIDACD XGI_Pr.P3c9
111 #define XGIPART1 XGI_Pr.Part1Port
112 #define XGIPART2 XGI_Pr.Part2Port
113 #define XGIPART3 XGI_Pr.Part3Port
114 #define XGIPART4 XGI_Pr.Part4Port
115 #define XGIPART5 XGI_Pr.Part5Port
116 #define XGIDAC2A XGIPART5
117 #define XGIDAC2D (XGIPART5 + 1)
118 #define XGIMISCR (XGI_Pr.RelIO + 0x1c)
119 #define XGIINPSTAT (XGI_Pr.RelIO + 0x2a)
121 #define IND_XGI_PASSWORD 0x05 /* SRs */
122 #define IND_XGI_COLOR_MODE 0x06
123 #define IND_XGI_RAMDAC_CONTROL 0x07
124 #define IND_XGI_DRAM_SIZE 0x14
125 #define IND_XGI_SCRATCH_REG_16 0x16
126 #define IND_XGI_SCRATCH_REG_17 0x17
127 #define IND_XGI_SCRATCH_REG_1A 0x1A
128 #define IND_XGI_MODULE_ENABLE 0x1E
129 #define IND_XGI_PCI_ADDRESS_SET 0x20
130 #define IND_XGI_TURBOQUEUE_ADR 0x26
131 #define IND_XGI_TURBOQUEUE_SET 0x27
132 #define IND_XGI_POWER_ON_TRAP 0x38
133 #define IND_XGI_POWER_ON_TRAP2 0x39
134 #define IND_XGI_CMDQUEUE_SET 0x26
135 #define IND_XGI_CMDQUEUE_THRESHOLD 0x27
137 #define IND_XGI_SCRATCH_REG_CR30 0x30 /* CRs */
138 #define IND_XGI_SCRATCH_REG_CR31 0x31
139 #define IND_XGI_SCRATCH_REG_CR32 0x32
140 #define IND_XGI_SCRATCH_REG_CR33 0x33
141 #define IND_XGI_LCD_PANEL 0x36
142 #define IND_XGI_SCRATCH_REG_CR37 0x37
143 #define IND_XGI_AGP_IO_PAD 0x48
145 #define IND_BRI_DRAM_STATUS 0x63 /* PCI config memory size offset */
147 #define MMIO_QUEUE_PHYBASE 0x85C0
148 #define MMIO_QUEUE_WRITEPORT 0x85C4
149 #define MMIO_QUEUE_READPORT 0x85C8
151 #define IND_XGI_CRT2_WRITE_ENABLE_300 0x24
152 #define IND_XGI_CRT2_WRITE_ENABLE_315 0x2F
154 #define XGI_PASSWORD 0x86 /* SR05 */
155 #define XGI_INTERLACED_MODE 0x20 /* SR06 */
156 #define XGI_8BPP_COLOR_MODE 0x0
157 #define XGI_15BPP_COLOR_MODE 0x1
158 #define XGI_16BPP_COLOR_MODE 0x2
159 #define XGI_32BPP_COLOR_MODE 0x4
161 #define XGI_DRAM_SIZE_MASK 0xF0 /*SR14 */
162 #define XGI_DRAM_SIZE_1MB 0x00
163 #define XGI_DRAM_SIZE_2MB 0x01
164 #define XGI_DRAM_SIZE_4MB 0x02
165 #define XGI_DRAM_SIZE_8MB 0x03
166 #define XGI_DRAM_SIZE_16MB 0x04
167 #define XGI_DRAM_SIZE_32MB 0x05
168 #define XGI_DRAM_SIZE_64MB 0x06
169 #define XGI_DRAM_SIZE_128MB 0x07
170 #define XGI_DRAM_SIZE_256MB 0x08
171 #define XGI_DATA_BUS_MASK 0x02
172 #define XGI_DATA_BUS_64 0x00
173 #define XGI_DATA_BUS_128 0x01
174 #define XGI_DUAL_CHANNEL_MASK 0x0C
175 #define XGI_SINGLE_CHANNEL_1_RANK 0x0
176 #define XGI_SINGLE_CHANNEL_2_RANK 0x1
177 #define XGI_ASYM_DDR 0x02
178 #define XGI_DUAL_CHANNEL_1_RANK 0x3
180 #define XGI550_DRAM_SIZE_MASK 0x3F /* 550/650/740 SR14 */
181 #define XGI550_DRAM_SIZE_4MB 0x00
182 #define XGI550_DRAM_SIZE_8MB 0x01
183 #define XGI550_DRAM_SIZE_16MB 0x03
184 #define XGI550_DRAM_SIZE_24MB 0x05
185 #define XGI550_DRAM_SIZE_32MB 0x07
186 #define XGI550_DRAM_SIZE_64MB 0x0F
187 #define XGI550_DRAM_SIZE_96MB 0x17
188 #define XGI550_DRAM_SIZE_128MB 0x1F
189 #define XGI550_DRAM_SIZE_256MB 0x3F
191 #define XGI_SCRATCH_REG_1A_MASK 0x10
193 #define XGI_ENABLE_2D 0x40 /* SR1E */
195 #define XGI_MEM_MAP_IO_ENABLE 0x01 /* SR20 */
196 #define XGI_PCI_ADDR_ENABLE 0x80
198 #define XGI_AGP_CMDQUEUE_ENABLE 0x80 /* 315/650/740 SR26 */
199 #define XGI_VRAM_CMDQUEUE_ENABLE 0x40
200 #define XGI_MMIO_CMD_ENABLE 0x20
201 #define XGI_CMD_QUEUE_SIZE_512k 0x00
202 #define XGI_CMD_QUEUE_SIZE_1M 0x04
203 #define XGI_CMD_QUEUE_SIZE_2M 0x08
204 #define XGI_CMD_QUEUE_SIZE_4M 0x0C
205 #define XGI_CMD_QUEUE_RESET 0x01
206 #define XGI_CMD_AUTO_CORR 0x02
208 #define XGI_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */
209 #define XGI_MODE_SELECT_CRT2 0x02
210 #define XGI_VB_OUTPUT_COMPOSITE 0x04
211 #define XGI_VB_OUTPUT_SVIDEO 0x08
212 #define XGI_VB_OUTPUT_SCART 0x10
213 #define XGI_VB_OUTPUT_LCD 0x20
214 #define XGI_VB_OUTPUT_CRT2 0x40
215 #define XGI_VB_OUTPUT_HIVISION 0x80
217 #define XGI_VB_OUTPUT_DISABLE 0x20 /* CR31 */
218 #define XGI_DRIVER_MODE 0x40
220 #define XGI_VB_COMPOSITE 0x01 /* CR32 */
221 #define XGI_VB_SVIDEO 0x02
222 #define XGI_VB_SCART 0x04
223 #define XGI_VB_LCD 0x08
224 #define XGI_VB_CRT2 0x10
225 #define XGI_CRT1 0x20
226 #define XGI_VB_HIVISION 0x40
227 #define XGI_VB_YPBPR 0x80
228 #define XGI_VB_TV (XGI_VB_COMPOSITE | XGI_VB_SVIDEO | \
229 XGI_VB_SCART | XGI_VB_HIVISION|XGI_VB_YPBPR)
231 #define XGI_EXTERNAL_CHIP_MASK 0x0E /* CR37 */
232 #define XGI_EXTERNAL_CHIP_XGI301 0x01 /* in CR37 << 1 ! */
233 #define XGI_EXTERNAL_CHIP_LVDS 0x02 /* in CR37 << 1 ! */
234 #define XGI_EXTERNAL_CHIP_TRUMPION 0x03 /* in CR37 << 1 ! */
235 #define XGI_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04 /* in CR37 << 1 ! */
236 #define XGI_EXTERNAL_CHIP_CHRONTEL 0x05 /* in CR37 << 1 ! */
237 #define XGI310_EXTERNAL_CHIP_LVDS 0x02 /* in CR37 << 1 ! */
238 #define XGI310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03 /* in CR37 << 1 ! */
240 #define XGI_AGP_2X 0x20 /* CR48 */
242 #define BRI_DRAM_SIZE_MASK 0x70 /* PCI bridge config data */
243 #define BRI_DRAM_SIZE_2MB 0x00
244 #define BRI_DRAM_SIZE_4MB 0x01
245 #define BRI_DRAM_SIZE_8MB 0x02
246 #define BRI_DRAM_SIZE_16MB 0x03
247 #define BRI_DRAM_SIZE_32MB 0x04
248 #define BRI_DRAM_SIZE_64MB 0x05
250 #define SR_BUFFER_SIZE 5
251 #define CR_BUFFER_SIZE 5
254 #define inXGIREG(base) inb(base)
255 #define outXGIREG(base,val) outb(val,base)
256 #define orXGIREG(base,val) do { \
257 unsigned char __Temp = inb(base); \
258 outXGIREG(base, __Temp | (val)); \
260 #define andXGIREG(base,val) do { \
261 unsigned char __Temp = inb(base); \
262 outXGIREG(base, __Temp & (val)); \
264 #define inXGIIDXREG(base,idx,var) do { \
265 outb(idx,base); var=inb((base)+1); \
267 #define outXGIIDXREG(base,idx,val) do { \
268 outb(idx,base); outb((val),(base)+1); \
270 #define orXGIIDXREG(base,idx,val) do { \
271 unsigned char __Temp; \
273 __Temp = inb((base)+1)|(val); \
274 outXGIIDXREG(base,idx,__Temp); \
276 #define andXGIIDXREG(base,idx,and) do { \
277 unsigned char __Temp; \
279 __Temp = inb((base)+1)&(and); \
280 outXGIIDXREG(base,idx,__Temp); \
282 #define setXGIIDXREG(base,idx,and,or) do { \
283 unsigned char __Temp; \
285 __Temp = (inb((base)+1)&(and))|(or); \
286 outXGIIDXREG(base,idx,__Temp); \
289 /* ------------------- Global Variables ----------------------------- */
291 /* Fbcon variables */
292 static struct fb_info* fb_info;
295 static int video_type = FB_TYPE_PACKED_PIXELS;
297 static struct fb_var_screeninfo default_var = {
311 .activate = FB_ACTIVATE_NOW,
323 .vmode = FB_VMODE_NONINTERLACED,
326 static struct fb_fix_screeninfo XGIfb_fix = {
328 .type = FB_TYPE_PACKED_PIXELS,
332 static char myid[20];
333 static u32 pseudo_palette[17];
337 static int XGIfb_off = 0;
338 static int XGIfb_crt1off = 0;
339 static int XGIfb_forcecrt1 = -1;
340 static int XGIvga_enabled = 0;
341 static int XGIfb_userom = 0;
342 //static int XGIfb_useoem = -1;
345 static int XGIfb_registered;
346 static int XGIfb_tvmode = 0;
347 static int XGIfb_mem = 0;
348 static int XGIfb_pdc = 0;
349 static int enable_dstn = 0;
350 static int XGIfb_ypan = -1;
353 static int XGIfb_hwcursor_size = 0;
354 static int XGIfb_CRT2_write_enable = 0;
356 static int XGIfb_crt2type = -1; /* TW: CRT2 type (for overriding autodetection) */
357 static int XGIfb_tvplug = -1; /* PR: Tv plug type (for overriding autodetection) */
359 static int XGIfb_queuemode = -1; /* TW: Use MMIO queue mode by default (310/325 series only) */
361 static unsigned char XGIfb_detectedpdc = 0;
363 static unsigned char XGIfb_detectedlcda = 0xff;
368 /* TW: For ioctl XGIFB_GET_INFO */
369 /* XGIfb_info XGIfbinfo; */
371 /* TW: Hardware extension; contains data on hardware */
372 static struct xgi_hw_device_info XGIhw_ext;
374 /* TW: XGI private structure */
375 static struct vb_device_info XGI_Pr;
377 /* card parameters */
378 static u8 XGIfb_caps = 0;
380 typedef enum _XGI_CMDTYPE {
390 /* NOT const - will be patched for 1280x960 mode number chaos reasons */
391 static struct _XGIbios_mode {
394 u16 vesa_mode_no_1; /* "XGI defined" VESA mode number */
395 u16 vesa_mode_no_2; /* Real VESA mode numbers */
404 #define MODE_INDEX_NONE 0 /* TW: index for mode=none */
405 {"none", 0xFF, 0x0000, 0x0000, 0, 0, 0, 0, 0, 0, MD_XGI300|MD_XGI315}, /* TW: for mode "none" */
406 {"320x240x16", 0x56, 0x0000, 0x0000, 320, 240, 16, 1, 40, 15, MD_XGI315},
407 {"320x480x8", 0x5A, 0x0000, 0x0000, 320, 480, 8, 1, 40, 30, MD_XGI315}, /* TW: FSTN */
408 {"320x480x16", 0x5B, 0x0000, 0x0000, 320, 480, 16, 1, 40, 30, MD_XGI315}, /* TW: FSTN */
409 {"640x480x8", 0x2E, 0x0101, 0x0101, 640, 480, 8, 1, 80, 30, MD_XGI300|MD_XGI315},
410 {"640x480x16", 0x44, 0x0111, 0x0111, 640, 480, 16, 1, 80, 30, MD_XGI300|MD_XGI315},
411 {"640x480x24", 0x62, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_XGI300|MD_XGI315}, /* TW: That's for people who mix up color- and fb depth */
412 {"640x480x32", 0x62, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_XGI300|MD_XGI315},
413 {"720x480x8", 0x31, 0x0000, 0x0000, 720, 480, 8, 1, 90, 30, MD_XGI300|MD_XGI315},
414 {"720x480x16", 0x33, 0x0000, 0x0000, 720, 480, 16, 1, 90, 30, MD_XGI300|MD_XGI315},
415 {"720x480x24", 0x35, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_XGI300|MD_XGI315},
416 {"720x480x32", 0x35, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_XGI300|MD_XGI315},
417 {"720x576x8", 0x32, 0x0000, 0x0000, 720, 576, 8, 1, 90, 36, MD_XGI300|MD_XGI315},
418 {"720x576x16", 0x34, 0x0000, 0x0000, 720, 576, 16, 1, 90, 36, MD_XGI300|MD_XGI315},
419 {"720x576x24", 0x36, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_XGI300|MD_XGI315},
420 {"720x576x32", 0x36, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_XGI300|MD_XGI315},
421 {"800x480x8", 0x70, 0x0000, 0x0000, 800, 480, 8, 1, 100, 30, MD_XGI300|MD_XGI315},
422 {"800x480x16", 0x7a, 0x0000, 0x0000, 800, 480, 16, 1, 100, 30, MD_XGI300|MD_XGI315},
423 {"800x480x24", 0x76, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_XGI300|MD_XGI315},
424 {"800x480x32", 0x76, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_XGI300|MD_XGI315},
425 #define DEFAULT_MODE 21 /* TW: index for 800x600x8 */
426 #define DEFAULT_LCDMODE 21 /* TW: index for 800x600x8 */
427 #define DEFAULT_TVMODE 21 /* TW: index for 800x600x8 */
428 {"800x600x8", 0x30, 0x0103, 0x0103, 800, 600, 8, 1, 100, 37, MD_XGI300|MD_XGI315},
429 {"800x600x16", 0x47, 0x0114, 0x0114, 800, 600, 16, 1, 100, 37, MD_XGI300|MD_XGI315},
430 {"800x600x24", 0x63, 0x013b, 0x0115, 800, 600, 32, 1, 100, 37, MD_XGI300|MD_XGI315},
431 {"800x600x32", 0x63, 0x013b, 0x0115, 800, 600, 32, 1, 100, 37, MD_XGI300|MD_XGI315},
432 {"1024x576x8", 0x71, 0x0000, 0x0000, 1024, 576, 8, 1, 128, 36, MD_XGI300|MD_XGI315},
433 {"1024x576x16", 0x74, 0x0000, 0x0000, 1024, 576, 16, 1, 128, 36, MD_XGI300|MD_XGI315},
434 {"1024x576x24", 0x77, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_XGI300|MD_XGI315},
435 {"1024x576x32", 0x77, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_XGI300|MD_XGI315},
436 {"1024x600x8", 0x20, 0x0000, 0x0000, 1024, 600, 8, 1, 128, 37, MD_XGI300 }, /* TW: 300 series only */
437 {"1024x600x16", 0x21, 0x0000, 0x0000, 1024, 600, 16, 1, 128, 37, MD_XGI300 },
438 {"1024x600x24", 0x22, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_XGI300 },
439 {"1024x600x32", 0x22, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_XGI300 },
440 {"1024x768x8", 0x38, 0x0105, 0x0105, 1024, 768, 8, 1, 128, 48, MD_XGI300|MD_XGI315},
441 {"1024x768x16", 0x4A, 0x0117, 0x0117, 1024, 768, 16, 1, 128, 48, MD_XGI300|MD_XGI315},
442 {"1024x768x24", 0x64, 0x013c, 0x0118, 1024, 768, 32, 1, 128, 48, MD_XGI300|MD_XGI315},
443 {"1024x768x32", 0x64, 0x013c, 0x0118, 1024, 768, 32, 1, 128, 48, MD_XGI300|MD_XGI315},
444 {"1152x768x8", 0x23, 0x0000, 0x0000, 1152, 768, 8, 1, 144, 48, MD_XGI300 }, /* TW: 300 series only */
445 {"1152x768x16", 0x24, 0x0000, 0x0000, 1152, 768, 16, 1, 144, 48, MD_XGI300 },
446 {"1152x768x24", 0x25, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_XGI300 },
447 {"1152x768x32", 0x25, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_XGI300 },
448 {"1280x720x8", 0x79, 0x0000, 0x0000, 1280, 720, 8, 1, 160, 45, MD_XGI300|MD_XGI315},
449 {"1280x720x16", 0x75, 0x0000, 0x0000, 1280, 720, 16, 1, 160, 45, MD_XGI300|MD_XGI315},
450 {"1280x720x24", 0x78, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_XGI300|MD_XGI315},
451 {"1280x720x32", 0x78, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_XGI300|MD_XGI315},
452 {"1280x768x8", 0x23, 0x0000, 0x0000, 1280, 768, 8, 1, 160, 48, MD_XGI315}, /* TW: 310/325 series only */
453 {"1280x768x16", 0x24, 0x0000, 0x0000, 1280, 768, 16, 1, 160, 48, MD_XGI315},
454 {"1280x768x24", 0x25, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_XGI315},
455 {"1280x768x32", 0x25, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_XGI315},
456 #define MODEINDEX_1280x960 48
457 {"1280x960x8", 0x7C, 0x0000, 0x0000, 1280, 960, 8, 1, 160, 60, MD_XGI300|MD_XGI315}, /* TW: Modenumbers being patched */
458 {"1280x960x16", 0x7D, 0x0000, 0x0000, 1280, 960, 16, 1, 160, 60, MD_XGI300|MD_XGI315},
459 {"1280x960x24", 0x7E, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_XGI300|MD_XGI315},
460 {"1280x960x32", 0x7E, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_XGI300|MD_XGI315},
461 {"1280x1024x8", 0x3A, 0x0107, 0x0107, 1280, 1024, 8, 1, 160, 64, MD_XGI300|MD_XGI315},
462 {"1280x1024x16", 0x4D, 0x011a, 0x011a, 1280, 1024, 16, 1, 160, 64, MD_XGI300|MD_XGI315},
463 {"1280x1024x24", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 1, 160, 64, MD_XGI300|MD_XGI315},
464 {"1280x1024x32", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 1, 160, 64, MD_XGI300|MD_XGI315},
465 {"1400x1050x8", 0x26, 0x0000, 0x0000, 1400, 1050, 8, 1, 175, 65, MD_XGI315}, /* TW: 310/325 series only */
466 {"1400x1050x16", 0x27, 0x0000, 0x0000, 1400, 1050, 16, 1, 175, 65, MD_XGI315},
467 {"1400x1050x24", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_XGI315},
468 {"1400x1050x32", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_XGI315},
469 {"1600x1200x8", 0x3C, 0x0130, 0x011c, 1600, 1200, 8, 1, 200, 75, MD_XGI300|MD_XGI315},
470 {"1600x1200x16", 0x3D, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_XGI300|MD_XGI315},
471 {"1600x1200x24", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_XGI300|MD_XGI315},
472 {"1600x1200x32", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_XGI300|MD_XGI315},
473 {"1920x1440x8", 0x68, 0x013f, 0x0000, 1920, 1440, 8, 1, 240, 75, MD_XGI300|MD_XGI315},
474 {"1920x1440x16", 0x69, 0x0140, 0x0000, 1920, 1440, 16, 1, 240, 75, MD_XGI300|MD_XGI315},
475 {"1920x1440x24", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_XGI300|MD_XGI315},
476 {"1920x1440x32", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_XGI300|MD_XGI315},
477 {"2048x1536x8", 0x6c, 0x0000, 0x0000, 2048, 1536, 8, 1, 256, 96, MD_XGI315}, /* TW: 310/325 series only */
478 {"2048x1536x16", 0x6d, 0x0000, 0x0000, 2048, 1536, 16, 1, 256, 96, MD_XGI315},
479 {"2048x1536x24", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_XGI315},
480 {"2048x1536x32", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_XGI315},
481 {"\0", 0x00, 0, 0, 0, 0, 0, 0, 0}
484 /* mode-related variables */
486 static int xgifb_mode_idx = 1;
488 static int xgifb_mode_idx = -1; /* Use a default mode if we are inside the kernel */
490 static u8 XGIfb_mode_no = 0;
491 static u8 XGIfb_rate_idx = 0;
493 /* TW: CR36 evaluation */
494 static const unsigned short XGI300paneltype[] =
495 { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
496 LCD_1280x960, LCD_640x480, LCD_1024x600, LCD_1152x768,
497 LCD_1024x768, LCD_1024x768, LCD_1024x768,
498 LCD_1024x768, LCD_1024x768, LCD_1024x768, LCD_1024x768 };
500 static const unsigned short XGI310paneltype[] =
501 { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
502 LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
503 LCD_1152x768, LCD_1400x1050,LCD_1280x768, LCD_1600x1200,
504 LCD_1024x768, LCD_1024x768, LCD_1024x768 };
506 static const struct _XGI_crt2type {
512 {"LCD", DISPTYPE_LCD, -1},
513 {"TV", DISPTYPE_TV, -1},
514 {"VGA", DISPTYPE_CRT2, -1},
515 {"SVIDEO", DISPTYPE_TV, TVPLUG_SVIDEO},
516 {"COMPOSITE", DISPTYPE_TV, TVPLUG_COMPOSITE},
517 {"SCART", DISPTYPE_TV, TVPLUG_SCART},
519 {"lcd", DISPTYPE_LCD, -1},
520 {"tv", DISPTYPE_TV, -1},
521 {"vga", DISPTYPE_CRT2, -1},
522 {"svideo", DISPTYPE_TV, TVPLUG_SVIDEO},
523 {"composite", DISPTYPE_TV, TVPLUG_COMPOSITE},
524 {"scart", DISPTYPE_TV, TVPLUG_SCART},
528 /* Queue mode selection for 310 series */
529 static const struct _XGI_queuemode {
532 } XGI_queuemode[] = {
533 {"AGP", AGP_CMD_QUEUE},
534 {"VRAM", VM_CMD_QUEUE},
536 {"agp", AGP_CMD_QUEUE},
537 {"vram", VM_CMD_QUEUE},
543 static const struct _XGI_tvtype {
554 static const struct _XGI_vrate {
560 {1, 640, 480, 60}, {2, 640, 480, 72}, {3, 640, 480, 75}, {4, 640, 480, 85},
561 {5, 640, 480,100}, {6, 640, 480, 120}, {7, 640, 480, 160}, {8, 640, 480, 200},
564 {1, 800, 480, 60}, {2, 800, 480, 75}, {3, 800, 480, 85},
565 {1, 800, 600, 60}, {2, 800, 600, 72}, {3, 800, 600, 75},
566 {4, 800, 600, 85}, {5, 800, 600, 100}, {6, 800, 600, 120}, {7, 800, 600, 160},
567 {1, 1024, 768, 60}, {2, 1024, 768, 70}, {3, 1024, 768, 75},
568 {4, 1024, 768, 85}, {5, 1024, 768, 100}, {6, 1024, 768, 120},
569 {1, 1024, 576, 60}, {2, 1024, 576, 75}, {3, 1024, 576, 85},
572 {1, 1280, 720, 60}, {2, 1280, 720, 75}, {3, 1280, 720, 85},
574 {1, 1280, 1024, 60}, {2, 1280, 1024, 75}, {3, 1280, 1024, 85},
577 {1, 1600, 1200, 60}, {2, 1600, 1200, 65}, {3, 1600, 1200, 70}, {4, 1600, 1200, 75},
578 {5, 1600, 1200, 85}, {6, 1600, 1200, 100}, {7, 1600, 1200, 120},
579 {1, 1920, 1440, 60}, {2, 1920, 1440, 65}, {3, 1920, 1440, 70}, {4, 1920, 1440, 75},
580 {5, 1920, 1440, 85}, {6, 1920, 1440, 100},
581 {1, 2048, 1536, 60}, {2, 2048, 1536, 65}, {3, 2048, 1536, 70}, {4, 2048, 1536, 75},
586 static const struct _chswtable {
592 { 0x1631, 0x1002, "Mitachi", "0x1002" },
596 typedef struct _XGI_OH {
597 struct _XGI_OH *poh_next;
598 struct _XGI_OH *poh_prev;
599 unsigned long offset;
603 typedef struct _XGI_OHALLOC {
604 struct _XGI_OHALLOC *poha_next;
608 typedef struct _XGI_HEAP {
611 XGI_OH *poh_freelist;
612 XGI_OHALLOC *poha_chain;
613 unsigned long max_freesize;
616 static unsigned long XGIfb_hwcursor_vbase;
618 static unsigned long XGIfb_heap_start;
619 static unsigned long XGIfb_heap_end;
620 static unsigned long XGIfb_heap_size;
621 static XGI_HEAP XGIfb_heap;
624 static const struct _XGI_TV_filter {
626 } XGI_TV_filter[] = {
627 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_0 */
628 {0x00,0xE0,0x10,0x60},
629 {0x00,0xEE,0x10,0x44},
630 {0x00,0xF4,0x10,0x38},
631 {0xF8,0xF4,0x18,0x38},
632 {0xFC,0xFB,0x14,0x2A},
633 {0x00,0x00,0x10,0x20},
634 {0x00,0x04,0x10,0x18},
635 {0xFF,0xFF,0xFF,0xFF} }},
636 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_1 */
637 {0x00,0xE0,0x10,0x60},
638 {0x00,0xEE,0x10,0x44},
639 {0x00,0xF4,0x10,0x38},
640 {0xF8,0xF4,0x18,0x38},
641 {0xFC,0xFB,0x14,0x2A},
642 {0x00,0x00,0x10,0x20},
643 {0x00,0x04,0x10,0x18},
644 {0xFF,0xFF,0xFF,0xFF} }},
645 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_2 */
646 {0xF5,0xEE,0x1B,0x44},
647 {0xF8,0xF4,0x18,0x38},
648 {0xEB,0x04,0x25,0x18},
649 {0xF1,0x05,0x1F,0x16},
650 {0xF6,0x06,0x1A,0x14},
651 {0xFA,0x06,0x16,0x14},
652 {0x00,0x04,0x10,0x18},
653 {0xFF,0xFF,0xFF,0xFF} }},
654 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_3 */
655 {0xF1,0x04,0x1F,0x18},
656 {0xEE,0x0D,0x22,0x06},
657 {0xF7,0x06,0x19,0x14},
658 {0xF4,0x0B,0x1C,0x0A},
659 {0xFA,0x07,0x16,0x12},
660 {0xF9,0x0A,0x17,0x0C},
661 {0x00,0x07,0x10,0x12},
662 {0xFF,0xFF,0xFF,0xFF} }},
663 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_4 */
664 {0x00,0xE0,0x10,0x60},
665 {0x00,0xEE,0x10,0x44},
666 {0x00,0xF4,0x10,0x38},
667 {0xF8,0xF4,0x18,0x38},
668 {0xFC,0xFB,0x14,0x2A},
669 {0x00,0x00,0x10,0x20},
670 {0x00,0x04,0x10,0x18},
671 {0xFF,0xFF,0xFF,0xFF} }},
672 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_5 */
673 {0xF5,0xEE,0x1B,0x44},
674 {0xF8,0xF4,0x18,0x38},
675 {0xEB,0x04,0x25,0x18},
676 {0xF1,0x05,0x1F,0x16},
677 {0xF6,0x06,0x1A,0x14},
678 {0xFA,0x06,0x16,0x14},
679 {0x00,0x04,0x10,0x18},
680 {0xFF,0xFF,0xFF,0xFF} }},
681 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_6 */
682 {0xEB,0x04,0x25,0x18},
683 {0xE7,0x0E,0x29,0x04},
684 {0xEE,0x0C,0x22,0x08},
685 {0xF6,0x0B,0x1A,0x0A},
686 {0xF9,0x0A,0x17,0x0C},
687 {0xFC,0x0A,0x14,0x0C},
688 {0x00,0x08,0x10,0x10},
689 {0xFF,0xFF,0xFF,0xFF} }},
690 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_7 */
691 {0xEC,0x02,0x24,0x1C},
692 {0xF2,0x04,0x1E,0x18},
693 {0xEB,0x15,0x25,0xF6},
694 {0xF4,0x10,0x1C,0x00},
695 {0xF8,0x0F,0x18,0x02},
696 {0x00,0x04,0x10,0x18},
697 {0x01,0x06,0x0F,0x14},
698 {0xFF,0xFF,0xFF,0xFF} }},
699 { {{0x00,0x00,0x00,0x40}, /* PALFilter_0 */
700 {0x00,0xE0,0x10,0x60},
701 {0x00,0xEE,0x10,0x44},
702 {0x00,0xF4,0x10,0x38},
703 {0xF8,0xF4,0x18,0x38},
704 {0xFC,0xFB,0x14,0x2A},
705 {0x00,0x00,0x10,0x20},
706 {0x00,0x04,0x10,0x18},
707 {0xFF,0xFF,0xFF,0xFF} }},
708 { {{0x00,0x00,0x00,0x40}, /* PALFilter_1 */
709 {0x00,0xE0,0x10,0x60},
710 {0x00,0xEE,0x10,0x44},
711 {0x00,0xF4,0x10,0x38},
712 {0xF8,0xF4,0x18,0x38},
713 {0xFC,0xFB,0x14,0x2A},
714 {0x00,0x00,0x10,0x20},
715 {0x00,0x04,0x10,0x18},
716 {0xFF,0xFF,0xFF,0xFF} }},
717 { {{0x00,0x00,0x00,0x40}, /* PALFilter_2 */
718 {0xF5,0xEE,0x1B,0x44},
719 {0xF8,0xF4,0x18,0x38},
720 {0xF1,0xF7,0x01,0x32},
721 {0xF5,0xFB,0x1B,0x2A},
722 {0xF9,0xFF,0x17,0x22},
723 {0xFB,0x01,0x15,0x1E},
724 {0x00,0x04,0x10,0x18},
725 {0xFF,0xFF,0xFF,0xFF} }},
726 { {{0x00,0x00,0x00,0x40}, /* PALFilter_3 */
727 {0xF5,0xFB,0x1B,0x2A},
728 {0xEE,0xFE,0x22,0x24},
729 {0xF3,0x00,0x1D,0x20},
730 {0xF9,0x03,0x17,0x1A},
731 {0xFB,0x02,0x14,0x1E},
732 {0xFB,0x04,0x15,0x18},
733 {0x00,0x06,0x10,0x14},
734 {0xFF,0xFF,0xFF,0xFF} }},
735 { {{0x00,0x00,0x00,0x40}, /* PALFilter_4 */
736 {0x00,0xE0,0x10,0x60},
737 {0x00,0xEE,0x10,0x44},
738 {0x00,0xF4,0x10,0x38},
739 {0xF8,0xF4,0x18,0x38},
740 {0xFC,0xFB,0x14,0x2A},
741 {0x00,0x00,0x10,0x20},
742 {0x00,0x04,0x10,0x18},
743 {0xFF,0xFF,0xFF,0xFF} }},
744 { {{0x00,0x00,0x00,0x40}, /* PALFilter_5 */
745 {0xF5,0xEE,0x1B,0x44},
746 {0xF8,0xF4,0x18,0x38},
747 {0xF1,0xF7,0x1F,0x32},
748 {0xF5,0xFB,0x1B,0x2A},
749 {0xF9,0xFF,0x17,0x22},
750 {0xFB,0x01,0x15,0x1E},
751 {0x00,0x04,0x10,0x18},
752 {0xFF,0xFF,0xFF,0xFF} }},
753 { {{0x00,0x00,0x00,0x40}, /* PALFilter_6 */
754 {0xF5,0xEE,0x1B,0x2A},
755 {0xEE,0xFE,0x22,0x24},
756 {0xF3,0x00,0x1D,0x20},
757 {0xF9,0x03,0x17,0x1A},
758 {0xFB,0x02,0x14,0x1E},
759 {0xFB,0x04,0x15,0x18},
760 {0x00,0x06,0x10,0x14},
761 {0xFF,0xFF,0xFF,0xFF} }},
762 { {{0x00,0x00,0x00,0x40}, /* PALFilter_7 */
763 {0xF5,0xEE,0x1B,0x44},
764 {0xF8,0xF4,0x18,0x38},
765 {0xFC,0xFB,0x14,0x2A},
766 {0xEB,0x05,0x25,0x16},
767 {0xF1,0x05,0x1F,0x16},
768 {0xFA,0x07,0x16,0x12},
769 {0x00,0x07,0x10,0x12},
770 {0xFF,0xFF,0xFF,0xFF} }}
773 static int filter = -1;
774 static unsigned char filter_tb;
777 /* ---------------------- Routine prototypes ------------------------- */
779 /* Interface used by the world */
781 XGIINITSTATIC int __init XGIfb_setup(char *options);
784 /* Interface to the low level console driver */
789 XGIINITSTATIC int __init xgifb_init(void);
790 static int XGIfb_set_par(struct fb_info *info);
791 static int XGIfb_blank(int blank,
792 struct fb_info *info);
793 /*static int XGIfb_mmap(struct fb_info *info, struct file *file,
794 struct vm_area_struct *vma);
797 static int XGIfb_ioctl(struct fb_info *info, unsigned int cmd,
801 extern int XGIfb_mode_rate_to_dclock(VB_DEVICE_INFO *XGI_Pr,
802 struct xgi_hw_device_info *HwDeviceExtension,
803 unsigned char modeno, unsigned char rateindex);
804 extern int XGIfb_mode_rate_to_ddata(VB_DEVICE_INFO *XGI_Pr, struct xgi_hw_device_info *HwDeviceExtension,
805 unsigned char modeno, unsigned char rateindex,
806 unsigned int *left_margin, unsigned int *right_margin,
807 unsigned int *upper_margin, unsigned int *lower_margin,
808 unsigned int *hsync_len, unsigned int *vsync_len,
809 unsigned int *sync, unsigned int *vmode);
811 extern unsigned char XGI_SearchModeID(unsigned short ModeNo,
812 unsigned short *ModeIdIndex,
813 struct vb_device_info *);
814 static int XGIfb_get_fix(struct fb_fix_screeninfo *fix, int con,
815 struct fb_info *info);
817 /* Internal 2D accelerator functions */
818 extern int XGIfb_initaccel(void);
819 extern void XGIfb_syncaccel(void);
821 /* Internal general routines */
822 static void XGIfb_search_mode(const char *name);
823 static int XGIfb_validate_mode(int modeindex);
824 static u8 XGIfb_search_refresh_rate(unsigned int rate);
825 static int XGIfb_setcolreg(unsigned regno, unsigned red, unsigned green,
826 unsigned blue, unsigned transp,
827 struct fb_info *fb_info);
828 static int XGIfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
829 struct fb_info *info);
830 static void XGIfb_pre_setmode(void);
831 static void XGIfb_post_setmode(void);
833 static unsigned char XGIfb_CheckVBRetrace(void);
834 static unsigned char XGIfbcheckvretracecrt2(void);
835 static unsigned char XGIfbcheckvretracecrt1(void);
836 static unsigned char XGIfb_bridgeisslave(void);
839 unsigned long offset;
843 /* XGI-specific Export functions */
844 void XGI_dispinfo(struct ap_data *rec);
845 void XGI_malloc(struct XGI_memreq *req);
846 void XGI_free(unsigned long base);
848 /* Internal hardware access routines */
849 void XGIfb_set_reg4(u16 port, unsigned long data);
850 u32 XGIfb_get_reg3(u16 port);
852 /* Chipset-dependent internal routines */
855 static int XGIfb_get_dram_size(void);
856 static void XGIfb_detect_VB(void);
857 static void XGIfb_get_VB_type(void);
858 static int XGIfb_has_VB(void);
861 /* Internal heap routines */
862 static int XGIfb_heap_init(void);
863 static XGI_OH *XGIfb_poh_new_node(void);
864 static XGI_OH *XGIfb_poh_allocate(unsigned long size);
865 static void XGIfb_delete_node(XGI_OH *poh);
866 static void XGIfb_insert_node(XGI_OH *pohList, XGI_OH *poh);
867 static XGI_OH *XGIfb_poh_free(unsigned long base);
868 static void XGIfb_free_node(XGI_OH *poh);
870 /* Internal routines to access PCI configuration space */
871 unsigned char XGIfb_query_VGA_config_space(struct xgi_hw_device_info *pXGIhw_ext,
872 unsigned long offset,
874 unsigned long *value);
875 //BOOLEAN XGIfb_query_north_bridge_space(PXGI_HW_DEVICE_INFO pXGIhw_ext,
876 // unsigned long offset, unsigned long set, unsigned long *value);
879 /* Routines from init.c/init301.c */
880 extern void InitTo330Pointer(unsigned char, struct vb_device_info *pVBInfo);
881 extern unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension);
882 extern unsigned char XGISetModeNew(struct xgi_hw_device_info *HwDeviceExtension,
883 unsigned short ModeNo);
884 //extern void XGI_SetEnableDstn(VB_DEVICE_INFO *XGI_Pr);
885 extern void XGI_LongWait(struct vb_device_info *XGI_Pr);
886 extern unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
887 unsigned short ModeNo,
888 unsigned short ModeIdIndex,
889 struct vb_device_info *pVBInfo);
890 /* TW: Chrontel TV functions */
891 extern unsigned short XGI_GetCH700x(struct vb_device_info *XGI_Pr,
892 unsigned short tempbx);
893 extern void XGI_SetCH700x(struct vb_device_info *XGI_Pr, unsigned short tempbx);
894 extern unsigned short XGI_GetCH701x(struct vb_device_info *XGI_Pr,
895 unsigned short tempbx);
896 extern void XGI_SetCH701x(struct vb_device_info *XGI_Pr, unsigned short tempbx);
897 extern void XGI_SetCH70xxANDOR(struct vb_device_info *XGI_Pr,
898 unsigned short tempax,
899 unsigned short tempbh);
900 extern void XGI_DDC2Delay(struct vb_device_info *XGI_Pr, unsigned short delaytime);
902 /* TW: Sensing routines */
903 void XGI_Sense30x(void);
904 int XGIDoSense(int tempbl, int tempbh, int tempcl, int tempch);
906 extern struct XGI21_LVDSCapStruct XGI21_LCDCapList[13];