Pileus Git - ~andy/linux/blob - drivers/staging/winbond/wb35reg.c

   1 #include "wb35reg_f.h"
   2
   3 #include <linux/usb.h>
   4 #include <linux/slab.h>
   5
   6 extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
   7
   8 /*
   9  * true  : read command process successfully
  10  * false : register not support
  11  * RegisterNo : start base
  12  * pRegisterData : data point
  13  * NumberOfData : number of register data
  14  * Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
  15  *        NO_INCREMENT - Function will write data into the same register
  16  */
  17 unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterData, u8 NumberOfData, u8 Flag)
  18 {
  19         struct wb35_reg         *reg = &pHwData->reg;
  20         struct urb              *urb = NULL;
  21         struct wb35_reg_queue   *reg_queue = NULL;
  22         u16                     UrbSize;
  23         struct usb_ctrlrequest  *dr;
  24         u16                     i, DataSize = NumberOfData * 4;
  25
  26         /* Module shutdown */
  27         if (pHwData->SurpriseRemove)
  28                 return false;
  29
  30         /* Trying to use burst write function if use new hardware */
  31         UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
  32         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
  33         if (reg_queue == NULL)
  34                 return false;
  35
  36         urb = usb_alloc_urb(0, GFP_ATOMIC);
  37         if (urb == NULL) {
  38                 kfree(reg_queue);
  39                 return false;
  40         }
  41
  42         reg_queue->DIRECT = 2; /* burst write register */
  43         reg_queue->INDEX = RegisterNo;
  44         reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
  45         memcpy(reg_queue->pBuffer, pRegisterData, DataSize);
  46         /* the function for reversing register data from little endian to big endian */
  47         for (i = 0; i < NumberOfData ; i++)
  48                 reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]);
  49
  50         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
  51         dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
  52         dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */
  53         dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */
  54         dr->wIndex = cpu_to_le16(RegisterNo);
  55         dr->wLength = cpu_to_le16(DataSize);
  56         reg_queue->Next = NULL;
  57         reg_queue->pUsbReq = dr;
  58         reg_queue->urb = urb;
  59
  60         spin_lock_irq(&reg->EP0VM_spin_lock);
  61         if (reg->reg_first == NULL)
  62                 reg->reg_first = reg_queue;
  63         else
  64                 reg->reg_last->Next = reg_queue;
  65         reg->reg_last = reg_queue;
  66
  67         spin_unlock_irq(&reg->EP0VM_spin_lock);
  68
  69         /* Start EP0VM */
  70         Wb35Reg_EP0VM_start(pHwData);
  71
  72         return true;
  73 }
  74
  75 void Wb35Reg_Update(struct hw_data *pHwData,  u16 RegisterNo,  u32 RegisterValue)
  76 {
  77         struct wb35_reg *reg = &pHwData->reg;
  78         switch (RegisterNo) {
  79         case 0x3b0: reg->U1B0 = RegisterValue; break;
  80         case 0x3bc: reg->U1BC_LEDConfigure = RegisterValue; break;
  81         case 0x400: reg->D00_DmaControl = RegisterValue; break;
  82         case 0x800: reg->M00_MacControl = RegisterValue; break;
  83         case 0x804: reg->M04_MulticastAddress1 = RegisterValue; break;
  84         case 0x808: reg->M08_MulticastAddress2 = RegisterValue; break;
  85         case 0x824: reg->M24_MacControl = RegisterValue; break;
  86         case 0x828: reg->M28_MacControl = RegisterValue; break;
  87         case 0x82c: reg->M2C_MacControl = RegisterValue; break;
  88         case 0x838: reg->M38_MacControl = RegisterValue; break;
  89         case 0x840: reg->M40_MacControl = RegisterValue; break;
  90         case 0x844: reg->M44_MacControl = RegisterValue; break;
  91         case 0x848: reg->M48_MacControl = RegisterValue; break;
  92         case 0x84c: reg->M4C_MacStatus = RegisterValue; break;
  93         case 0x860: reg->M60_MacControl = RegisterValue; break;
  94         case 0x868: reg->M68_MacControl = RegisterValue; break;
  95         case 0x870: reg->M70_MacControl = RegisterValue; break;
  96         case 0x874: reg->M74_MacControl = RegisterValue; break;
  97         case 0x878: reg->M78_ERPInformation = RegisterValue; break;
  98         case 0x87C: reg->M7C_MacControl = RegisterValue; break;
  99         case 0x880: reg->M80_MacControl = RegisterValue; break;
 100         case 0x884: reg->M84_MacControl = RegisterValue; break;
 101         case 0x888: reg->M88_MacControl = RegisterValue; break;
 102         case 0x898: reg->M98_MacControl = RegisterValue; break;
 103         case 0x100c: reg->BB0C = RegisterValue; break;
 104         case 0x102c: reg->BB2C = RegisterValue; break;
 105         case 0x1030: reg->BB30 = RegisterValue; break;
 106         case 0x103c: reg->BB3C = RegisterValue; break;
 107         case 0x1048: reg->BB48 = RegisterValue; break;
 108         case 0x104c: reg->BB4C = RegisterValue; break;
 109         case 0x1050: reg->BB50 = RegisterValue; break;
 110         case 0x1054: reg->BB54 = RegisterValue; break;
 111         case 0x1058: reg->BB58 = RegisterValue; break;
 112         case 0x105c: reg->BB5C = RegisterValue; break;
 113         case 0x1060: reg->BB60 = RegisterValue; break;
 114         }
 115 }
 116
 117 /*
 118  * true  : read command process successfully
 119  * false : register not support
 120  */
 121 unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
 122 {
 123         struct wb35_reg *reg = &pHwData->reg;
 124         int ret = -1;
 125
 126         /* Module shutdown */
 127         if (pHwData->SurpriseRemove)
 128                 return false;
 129
 130         RegisterValue = cpu_to_le32(RegisterValue);
 131
 132         /* update the register by send usb message */
 133         reg->SyncIoPause = 1;
 134
 135         /* Wait until EP0VM stop */
 136         while (reg->EP0vm_state != VM_STOP)
 137                 msleep(10);
 138
 139         /* Sync IoCallDriver */
 140         reg->EP0vm_state = VM_RUNNING;
 141         ret = usb_control_msg(pHwData->udev,
 142                                usb_sndctrlpipe(pHwData->udev, 0),
 143                                0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
 144                                0x0, RegisterNo, &RegisterValue, 4, HZ * 100);
 145         reg->EP0vm_state = VM_STOP;
 146         reg->SyncIoPause = 0;
 147
 148         Wb35Reg_EP0VM_start(pHwData);
 149
 150         if (ret < 0) {
 151                 pr_debug("EP0 Write register usb message sending error\n");
 152                 pHwData->SurpriseRemove = 1;
 153                 return false;
 154         }
 155         return true;
 156 }
 157
 158 /*
 159  * true  : read command process successfully
 160  * false : register not support
 161  */
 162 unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
 163 {
 164         struct wb35_reg         *reg = &pHwData->reg;
 165         struct usb_ctrlrequest  *dr;
 166         struct urb              *urb = NULL;
 167         struct wb35_reg_queue   *reg_queue = NULL;
 168         u16                     UrbSize;
 169
 170         /* Module shutdown */
 171         if (pHwData->SurpriseRemove)
 172                 return false;
 173
 174         /* update the register by send urb request */
 175         UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
 176         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
 177         if (reg_queue == NULL)
 178                 return false;
 179
 180         urb = usb_alloc_urb(0, GFP_ATOMIC);
 181         if (urb == NULL) {
 182                 kfree(reg_queue);
 183                 return false;
 184         }
 185
 186         reg_queue->DIRECT = 1; /* burst write register */
 187         reg_queue->INDEX = RegisterNo;
 188         reg_queue->VALUE = cpu_to_le32(RegisterValue);
 189         reg_queue->RESERVED_VALID = false;
 190         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
 191         dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
 192         dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
 193         dr->wValue = cpu_to_le16(0x0);
 194         dr->wIndex = cpu_to_le16(RegisterNo);
 195         dr->wLength = cpu_to_le16(4);
 196
 197         /* Enter the sending queue */
 198         reg_queue->Next = NULL;
 199         reg_queue->pUsbReq = dr;
 200         reg_queue->urb = urb;
 201
 202         spin_lock_irq(&reg->EP0VM_spin_lock);
 203         if (reg->reg_first == NULL)
 204                 reg->reg_first = reg_queue;
 205         else
 206                 reg->reg_last->Next = reg_queue;
 207         reg->reg_last = reg_queue;
 208
 209         spin_unlock_irq(&reg->EP0VM_spin_lock);
 210
 211         /* Start EP0VM */
 212         Wb35Reg_EP0VM_start(pHwData);
 213
 214         return true;
 215 }
 216
 217 /*
 218  * This command will be executed with a user defined value. When it completes,
 219  * this value is useful. For example, hal_set_current_channel will use it.
 220  * true  : read command process successfully
 221  * false : register not supported
 222  */
 223 unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
 224                                                 u16 RegisterNo,
 225                                                 u32 RegisterValue,
 226                                                 s8 *pValue,
 227                                                 s8 Len)
 228 {
 229         struct wb35_reg         *reg = &pHwData->reg;
 230         struct usb_ctrlrequest  *dr;
 231         struct urb              *urb = NULL;
 232         struct wb35_reg_queue   *reg_queue = NULL;
 233         u16                     UrbSize;
 234
 235         /* Module shutdown */
 236         if (pHwData->SurpriseRemove)
 237                 return false;
 238
 239         /* update the register by send urb request */
 240         UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
 241         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
 242         if (reg_queue == NULL)
 243                 return false;
 244
 245         urb = usb_alloc_urb(0, GFP_ATOMIC);
 246         if (urb == NULL) {
 247                 kfree(reg_queue);
 248                 return false;
 249         }
 250
 251         reg_queue->DIRECT = 1; /* burst write register */
 252         reg_queue->INDEX = RegisterNo;
 253         reg_queue->VALUE = cpu_to_le32(RegisterValue);
 254         /* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
 255         memcpy(reg_queue->RESERVED, pValue, Len);
 256         reg_queue->RESERVED_VALID = true;
 257         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
 258         dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
 259         dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
 260         dr->wValue = cpu_to_le16(0x0);
 261         dr->wIndex = cpu_to_le16(RegisterNo);
 262         dr->wLength = cpu_to_le16(4);
 263
 264         /* Enter the sending queue */
 265         reg_queue->Next = NULL;
 266         reg_queue->pUsbReq = dr;
 267         reg_queue->urb = urb;
 268         spin_lock_irq(&reg->EP0VM_spin_lock);
 269         if (reg->reg_first == NULL)
 270                 reg->reg_first = reg_queue;
 271         else
 272                 reg->reg_last->Next = reg_queue;
 273         reg->reg_last = reg_queue;
 274
 275         spin_unlock_irq(&reg->EP0VM_spin_lock);
 276
 277         /* Start EP0VM */
 278         Wb35Reg_EP0VM_start(pHwData);
 279
 280         return true;
 281 }
 282
 283 /*
 284  * true  : read command process successfully
 285  * false : register not support
 286  * pRegisterValue : It must be a resident buffer due to
 287  *                  asynchronous read register.
 288  */
 289 unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
 290 {
 291         struct wb35_reg *reg = &pHwData->reg;
 292         u32             *pltmp = pRegisterValue;
 293         int             ret = -1;
 294
 295         /* Module shutdown */
 296         if (pHwData->SurpriseRemove)
 297                 return false;
 298
 299         /* Read the register by send usb message */
 300         reg->SyncIoPause = 1;
 301
 302         /* Wait until EP0VM stop */
 303         while (reg->EP0vm_state != VM_STOP)
 304                 msleep(10);
 305
 306         reg->EP0vm_state = VM_RUNNING;
 307         ret = usb_control_msg(pHwData->udev,
 308                                usb_rcvctrlpipe(pHwData->udev, 0),
 309                                0x01, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
 310                                0x0, RegisterNo, pltmp, 4, HZ * 100);
 311
 312         *pRegisterValue = cpu_to_le32(*pltmp);
 313
 314         reg->EP0vm_state = VM_STOP;
 315
 316         Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
 317         reg->SyncIoPause = 0;
 318
 319         Wb35Reg_EP0VM_start(pHwData);
 320
 321         if (ret < 0) {
 322                 pr_debug("EP0 Read register usb message sending error\n");
 323                 pHwData->SurpriseRemove = 1;
 324                 return false;
 325         }
 326         return true;
 327 }
 328
 329 /*
 330  * true  : read command process successfully
 331  * false : register not support
 332  * pRegisterValue : It must be a resident buffer due to
 333  *                  asynchronous read register.
 334  */
 335 unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
 336 {
 337         struct wb35_reg         *reg = &pHwData->reg;
 338         struct usb_ctrlrequest  *dr;
 339         struct urb              *urb;
 340         struct wb35_reg_queue   *reg_queue;
 341         u16                     UrbSize;
 342
 343         /* Module shutdown */
 344         if (pHwData->SurpriseRemove)
 345                 return false;
 346
 347         /* update the variable by send Urb to read register */
 348         UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
 349         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
 350         if (reg_queue == NULL)
 351                 return false;
 352
 353         urb = usb_alloc_urb(0, GFP_ATOMIC);
 354         if (urb == NULL) {
 355                 kfree(reg_queue);
 356                 return false;
 357         }
 358         reg_queue->DIRECT = 0; /* read register */
 359         reg_queue->INDEX = RegisterNo;
 360         reg_queue->pBuffer = pRegisterValue;
 361         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
 362         dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN;
 363         dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */
 364         dr->wValue = cpu_to_le16(0x0);
 365         dr->wIndex = cpu_to_le16(RegisterNo);
 366         dr->wLength = cpu_to_le16(4);
 367
 368         /* Enter the sending queue */
 369         reg_queue->Next = NULL;
 370         reg_queue->pUsbReq = dr;
 371         reg_queue->urb = urb;
 372         spin_lock_irq(&reg->EP0VM_spin_lock);
 373         if (reg->reg_first == NULL)
 374                 reg->reg_first = reg_queue;
 375         else
 376                 reg->reg_last->Next = reg_queue;
 377         reg->reg_last = reg_queue;
 378
 379         spin_unlock_irq(&reg->EP0VM_spin_lock);
 380
 381         /* Start EP0VM */
 382         Wb35Reg_EP0VM_start(pHwData);
 383
 384         return true;
 385 }
 386
 387
 388 void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
 389 {
 390         struct wb35_reg *reg = &pHwData->reg;
 391
 392         if (atomic_inc_return(&reg->RegFireCount) == 1) {
 393                 reg->EP0vm_state = VM_RUNNING;
 394                 Wb35Reg_EP0VM(pHwData);
 395         } else
 396                 atomic_dec(&reg->RegFireCount);
 397 }
 398
 399 void Wb35Reg_EP0VM(struct hw_data *pHwData)
 400 {
 401         struct wb35_reg         *reg = &pHwData->reg;
 402         struct urb              *urb;
 403         struct usb_ctrlrequest  *dr;
 404         u32                     *pBuffer;
 405         int                     ret = -1;
 406         struct wb35_reg_queue   *reg_queue;
 407
 408
 409         if (reg->SyncIoPause)
 410                 goto cleanup;
 411
 412         if (pHwData->SurpriseRemove)
 413                 goto cleanup;
 414
 415         /* Get the register data and send to USB through Irp */
 416         spin_lock_irq(&reg->EP0VM_spin_lock);
 417         reg_queue = reg->reg_first;
 418         spin_unlock_irq(&reg->EP0VM_spin_lock);
 419
 420         if (!reg_queue)
 421                 goto cleanup;
 422
 423         /* Get an Urb, send it */
 424         urb = (struct urb *)reg_queue->urb;
 425
 426         dr = reg_queue->pUsbReq;
 427         urb = reg_queue->urb;
 428         pBuffer = reg_queue->pBuffer;
 429         if (reg_queue->DIRECT == 1) /* output */
 430                 pBuffer = &reg_queue->VALUE;
 431
 432         usb_fill_control_urb(urb, pHwData->udev,
 433                               REG_DIRECTION(pHwData->udev, reg_queue),
 434                               (u8 *)dr, pBuffer, cpu_to_le16(dr->wLength),
 435                               Wb35Reg_EP0VM_complete, (void *)pHwData);
 436
 437         reg->EP0vm_state = VM_RUNNING;
 438
 439         ret = usb_submit_urb(urb, GFP_ATOMIC);
 440
 441         if (ret < 0) {
 442                 pr_debug("EP0 Irp sending error\n");
 443                 goto cleanup;
 444         }
 445         return;
 446
 447  cleanup:
 448         reg->EP0vm_state = VM_STOP;
 449         atomic_dec(&reg->RegFireCount);
 450 }
 451
 452
 453 void Wb35Reg_EP0VM_complete(struct urb *urb)
 454 {
 455         struct hw_data          *pHwData = (struct hw_data *)urb->context;
 456         struct wb35_reg         *reg = &pHwData->reg;
 457         struct wb35_reg_queue   *reg_queue;
 458
 459
 460         /* Variable setting */
 461         reg->EP0vm_state = VM_COMPLETED;
 462         reg->EP0VM_status = urb->status;
 463
 464         if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
 465                 reg->EP0vm_state = VM_STOP;
 466                 atomic_dec(&reg->RegFireCount);
 467         } else {
 468                 /* Complete to send, remove the URB from the first */
 469                 spin_lock_irq(&reg->EP0VM_spin_lock);
 470                 reg_queue = reg->reg_first;
 471                 if (reg_queue == reg->reg_last)
 472                         reg->reg_last = NULL;
 473                 reg->reg_first = reg->reg_first->Next;
 474                 spin_unlock_irq(&reg->EP0VM_spin_lock);
 475
 476                 if (reg->EP0VM_status) {
 477                         pr_debug("EP0 IoCompleteRoutine return error\n");
 478                         reg->EP0vm_state = VM_STOP;
 479                         pHwData->SurpriseRemove = 1;
 480                 } else {
 481                         /* Success. Update the result */
 482
 483                         /* Start the next send */
 484                         Wb35Reg_EP0VM(pHwData);
 485                 }
 486
 487                 kfree(reg_queue);
 488         }
 489
 490         usb_free_urb(urb);
 491 }
 492
 493
 494 void Wb35Reg_destroy(struct hw_data *pHwData)
 495 {
 496         struct wb35_reg         *reg = &pHwData->reg;
 497         struct urb              *urb;
 498         struct wb35_reg_queue   *reg_queue;
 499
 500         Uxx_power_off_procedure(pHwData);
 501
 502         /* Wait for Reg operation completed */
 503         do {
 504                 msleep(10); /* Delay for waiting function enter */
 505         } while (reg->EP0vm_state != VM_STOP);
 506         msleep(10);  /* Delay for waiting function enter */
 507
 508         /* Release all the data in RegQueue */
 509         spin_lock_irq(&reg->EP0VM_spin_lock);
 510         reg_queue = reg->reg_first;
 511         while (reg_queue) {
 512                 if (reg_queue == reg->reg_last)
 513                         reg->reg_last = NULL;
 514                 reg->reg_first = reg->reg_first->Next;
 515
 516                 urb = reg_queue->urb;
 517                 spin_unlock_irq(&reg->EP0VM_spin_lock);
 518                 if (urb) {
 519                         usb_free_urb(urb);
 520                         kfree(reg_queue);
 521                 } else {
 522                         pr_debug("EP0 queue release error\n");
 523                 }
 524                 spin_lock_irq(&reg->EP0VM_spin_lock);
 525
 526                 reg_queue = reg->reg_first;
 527         }
 528         spin_unlock_irq(&reg->EP0VM_spin_lock);
 529 }
 530
 531 /*
 532  * =======================================================================
 533  * The function can be run in passive-level only.
 534  * =========================================================================
 535  */
 536 unsigned char Wb35Reg_initial(struct hw_data *pHwData)
 537 {
 538         struct wb35_reg *reg = &pHwData->reg;
 539         u32 ltmp;
 540         u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
 541
 542         /* Spin lock is acquired for read and write IRP command */
 543         spin_lock_init(&reg->EP0VM_spin_lock);
 544
 545         /* Getting RF module type from EEPROM */
 546         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
 547         Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
 548
 549         /* Update RF module type and determine the PHY type by inf or EEPROM */
 550         reg->EEPROMPhyType = (u8)(ltmp & 0xff);
 551         /*
 552          * 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
 553          * 16V AL2230, 17 - AL7230, 18 - AL2230S
 554          * 32 Reserved
 555          * 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
 556          */
 557         if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
 558                 if ((reg->EEPROMPhyType == RF_MAXIM_2825)       ||
 559                         (reg->EEPROMPhyType == RF_MAXIM_2827)   ||
 560                         (reg->EEPROMPhyType == RF_MAXIM_2828)   ||
 561                         (reg->EEPROMPhyType == RF_MAXIM_2829)   ||
 562                         (reg->EEPROMPhyType == RF_MAXIM_V1)     ||
 563                         (reg->EEPROMPhyType == RF_AIROHA_2230)  ||
 564                         (reg->EEPROMPhyType == RF_AIROHA_2230S) ||
 565                         (reg->EEPROMPhyType == RF_AIROHA_7230)  ||
 566                         (reg->EEPROMPhyType == RF_WB_242)       ||
 567                         (reg->EEPROMPhyType == RF_WB_242_1))
 568                         pHwData->phy_type = reg->EEPROMPhyType;
 569         }
 570
 571         /* Power On procedure running. The relative parameter will be set according to phy_type */
 572         Uxx_power_on_procedure(pHwData);
 573
 574         /* Reading MAC address */
 575         Uxx_ReadEthernetAddress(pHwData);
 576
 577         /* Read VCO trim for RF parameter */
 578         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
 579         Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
 580
 581         /* Read Antenna On/Off of software flag */
 582         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
 583         Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
 584
 585         /* Read TXVGA */
 586         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
 587         Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
 588
 589         /* Get Scan interval setting from EEPROM offset 0x1c */
 590         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
 591         Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
 592
 593         /* Update Ethernet address */
 594         memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
 595
 596         /* Update software variable */
 597         pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
 598         TxVga &= 0x000000ff;
 599         pHwData->PowerIndexFromEEPROM = (u8)TxVga;
 600         pHwData->VCO_trim = (u8)VCO_trim & 0xff;
 601         if (pHwData->VCO_trim == 0xff)
 602                 pHwData->VCO_trim = 0x28;
 603
 604         reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8);
 605         if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6)
 606                 reg->EEPROMRegion = REGION_AUTO;
 607
 608         /* For Get Tx VGA from EEPROM */
 609         GetTxVgaFromEEPROM(pHwData);
 610
 611         /* Set Scan Interval */
 612         pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
 613         if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
 614                 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
 615
 616         /* Initial register */
 617         RFSynthesizer_initial(pHwData);
 618
 619         BBProcessor_initial(pHwData); /* Async write, must wait until complete */
 620
 621         Wb35Reg_phy_calibration(pHwData);
 622
 623         Mxx_initial(pHwData);
 624         Dxx_initial(pHwData);
 625
 626         if (pHwData->SurpriseRemove)
 627                 return false;
 628         else
 629                 return true; /* Initial fail */
 630 }
 631
 632 /*
 633  * ================================================================
 634  *  CardComputeCrc --
 635  *
 636  *  Description:
 637  *    Runs the AUTODIN II CRC algorithm on the buffers Buffer length.
 638  *
 639  *  Arguments:
 640  *    Buffer - the input buffer
 641  *    Length - the length of Buffer
 642  *
 643  *  Return Value:
 644  *    The 32-bit CRC value.
 645  * ===================================================================
 646  */
 647 u32 CardComputeCrc(u8 *Buffer, u32 Length)
 648 {
 649         u32     Crc, Carry;
 650         u32     i, j;
 651         u8      CurByte;
 652
 653         Crc = 0xffffffff;
 654
 655         for (i = 0; i < Length; i++) {
 656                 CurByte = Buffer[i];
 657                 for (j = 0; j < 8; j++) {
 658                         Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
 659                         Crc <<= 1;
 660                         CurByte >>= 1;
 661                         if (Carry)
 662                                 Crc = (Crc ^ 0x04c11db6) | Carry;
 663                 }
 664         }
 665         return Crc;
 666 }
 667
 668
 669 /*
 670  * ==================================================================
 671  * BitReverse --
 672  *   Reverse the bits in the input argument, dwData, which is
 673  *   regarded as a string of bits with the length, DataLength.
 674  *
 675  * Arguments:
 676  *   dwData     :
 677  *   DataLength :
 678  *
 679  * Return:
 680  *   The converted value.
 681  * ==================================================================
 682  */
 683 u32 BitReverse(u32 dwData, u32 DataLength)
 684 {
 685         u32     HalfLength, i, j;
 686         u32     BitA, BitB;
 687
 688         if (DataLength <= 0)
 689                 return 0;       /* No conversion is done. */
 690         dwData = dwData & (0xffffffff >> (32 - DataLength));
 691
 692         HalfLength = DataLength / 2;
 693         for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) {
 694                 BitA = GetBit(dwData, i);
 695                 BitB = GetBit(dwData, j);
 696                 if (BitA && !BitB) {
 697                         dwData = ClearBit(dwData, i);
 698                         dwData = SetBit(dwData, j);
 699                 } else if (!BitA && BitB) {
 700                         dwData = SetBit(dwData, i);
 701                         dwData = ClearBit(dwData, j);
 702                 } else {
 703                         /* Do nothing since these two bits are of the save values. */
 704                 }
 705         }
 706         return dwData;
 707 }
 708
 709 void Wb35Reg_phy_calibration(struct hw_data *pHwData)
 710 {
 711         u32     BB3c, BB54;
 712
 713         if ((pHwData->phy_type == RF_WB_242) ||
 714                 (pHwData->phy_type == RF_WB_242_1)) {
 715                 phy_calibration_winbond(pHwData, 2412); /* Sync operation */
 716                 Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
 717                 Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
 718
 719                 pHwData->BB3c_cal = BB3c;
 720                 pHwData->BB54_cal = BB54;
 721
 722                 RFSynthesizer_initial(pHwData);
 723                 BBProcessor_initial(pHwData); /* Async operation */
 724
 725                 Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
 726                 Wb35Reg_WriteSync(pHwData, 0x1054, BB54);
 727         }
 728 }
 729
 730