4 #include <linux/slab.h>
6 extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
9 * true : read command process successfully
10 * false : register not support
11 * RegisterNo : start base
12 * pRegisterData : data point
13 * NumberOfData : number of register data
14 * Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
15 * NO_INCREMENT - Function will write data into the same register
17 unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterData, u8 NumberOfData, u8 Flag)
19 struct wb35_reg *reg = &pHwData->reg;
20 struct urb *urb = NULL;
21 struct wb35_reg_queue *reg_queue = NULL;
23 struct usb_ctrlrequest *dr;
24 u16 i, DataSize = NumberOfData * 4;
27 if (pHwData->SurpriseRemove)
30 /* Trying to use burst write function if use new hardware */
31 UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
32 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
33 if (reg_queue == NULL)
36 urb = usb_alloc_urb(0, GFP_ATOMIC);
42 reg_queue->DIRECT = 2; /* burst write register */
43 reg_queue->INDEX = RegisterNo;
44 reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
45 memcpy(reg_queue->pBuffer, pRegisterData, DataSize);
46 /* the function for reversing register data from little endian to big endian */
47 for (i = 0; i < NumberOfData ; i++)
48 reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]);
50 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
51 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
52 dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */
53 dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */
54 dr->wIndex = cpu_to_le16(RegisterNo);
55 dr->wLength = cpu_to_le16(DataSize);
56 reg_queue->Next = NULL;
57 reg_queue->pUsbReq = dr;
60 spin_lock_irq(®->EP0VM_spin_lock);
61 if (reg->reg_first == NULL)
62 reg->reg_first = reg_queue;
64 reg->reg_last->Next = reg_queue;
65 reg->reg_last = reg_queue;
67 spin_unlock_irq(®->EP0VM_spin_lock);
70 Wb35Reg_EP0VM_start(pHwData);
75 void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
77 struct wb35_reg *reg = &pHwData->reg;
79 case 0x3b0: reg->U1B0 = RegisterValue; break;
80 case 0x3bc: reg->U1BC_LEDConfigure = RegisterValue; break;
81 case 0x400: reg->D00_DmaControl = RegisterValue; break;
82 case 0x800: reg->M00_MacControl = RegisterValue; break;
83 case 0x804: reg->M04_MulticastAddress1 = RegisterValue; break;
84 case 0x808: reg->M08_MulticastAddress2 = RegisterValue; break;
85 case 0x824: reg->M24_MacControl = RegisterValue; break;
86 case 0x828: reg->M28_MacControl = RegisterValue; break;
87 case 0x82c: reg->M2C_MacControl = RegisterValue; break;
88 case 0x838: reg->M38_MacControl = RegisterValue; break;
89 case 0x840: reg->M40_MacControl = RegisterValue; break;
90 case 0x844: reg->M44_MacControl = RegisterValue; break;
91 case 0x848: reg->M48_MacControl = RegisterValue; break;
92 case 0x84c: reg->M4C_MacStatus = RegisterValue; break;
93 case 0x860: reg->M60_MacControl = RegisterValue; break;
94 case 0x868: reg->M68_MacControl = RegisterValue; break;
95 case 0x870: reg->M70_MacControl = RegisterValue; break;
96 case 0x874: reg->M74_MacControl = RegisterValue; break;
97 case 0x878: reg->M78_ERPInformation = RegisterValue; break;
98 case 0x87C: reg->M7C_MacControl = RegisterValue; break;
99 case 0x880: reg->M80_MacControl = RegisterValue; break;
100 case 0x884: reg->M84_MacControl = RegisterValue; break;
101 case 0x888: reg->M88_MacControl = RegisterValue; break;
102 case 0x898: reg->M98_MacControl = RegisterValue; break;
103 case 0x100c: reg->BB0C = RegisterValue; break;
104 case 0x102c: reg->BB2C = RegisterValue; break;
105 case 0x1030: reg->BB30 = RegisterValue; break;
106 case 0x103c: reg->BB3C = RegisterValue; break;
107 case 0x1048: reg->BB48 = RegisterValue; break;
108 case 0x104c: reg->BB4C = RegisterValue; break;
109 case 0x1050: reg->BB50 = RegisterValue; break;
110 case 0x1054: reg->BB54 = RegisterValue; break;
111 case 0x1058: reg->BB58 = RegisterValue; break;
112 case 0x105c: reg->BB5C = RegisterValue; break;
113 case 0x1060: reg->BB60 = RegisterValue; break;
118 * true : read command process successfully
119 * false : register not support
121 unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
123 struct wb35_reg *reg = &pHwData->reg;
126 /* Module shutdown */
127 if (pHwData->SurpriseRemove)
130 RegisterValue = cpu_to_le32(RegisterValue);
132 /* update the register by send usb message */
133 reg->SyncIoPause = 1;
135 /* Wait until EP0VM stop */
136 while (reg->EP0vm_state != VM_STOP)
139 /* Sync IoCallDriver */
140 reg->EP0vm_state = VM_RUNNING;
141 ret = usb_control_msg(pHwData->udev,
142 usb_sndctrlpipe(pHwData->udev, 0),
143 0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
144 0x0, RegisterNo, &RegisterValue, 4, HZ * 100);
145 reg->EP0vm_state = VM_STOP;
146 reg->SyncIoPause = 0;
148 Wb35Reg_EP0VM_start(pHwData);
151 pr_debug("EP0 Write register usb message sending error\n");
152 pHwData->SurpriseRemove = 1;
159 * true : read command process successfully
160 * false : register not support
162 unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
164 struct wb35_reg *reg = &pHwData->reg;
165 struct usb_ctrlrequest *dr;
166 struct urb *urb = NULL;
167 struct wb35_reg_queue *reg_queue = NULL;
170 /* Module shutdown */
171 if (pHwData->SurpriseRemove)
174 /* update the register by send urb request */
175 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
176 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
177 if (reg_queue == NULL)
180 urb = usb_alloc_urb(0, GFP_ATOMIC);
186 reg_queue->DIRECT = 1; /* burst write register */
187 reg_queue->INDEX = RegisterNo;
188 reg_queue->VALUE = cpu_to_le32(RegisterValue);
189 reg_queue->RESERVED_VALID = false;
190 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
191 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
192 dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
193 dr->wValue = cpu_to_le16(0x0);
194 dr->wIndex = cpu_to_le16(RegisterNo);
195 dr->wLength = cpu_to_le16(4);
197 /* Enter the sending queue */
198 reg_queue->Next = NULL;
199 reg_queue->pUsbReq = dr;
200 reg_queue->urb = urb;
202 spin_lock_irq(®->EP0VM_spin_lock);
203 if (reg->reg_first == NULL)
204 reg->reg_first = reg_queue;
206 reg->reg_last->Next = reg_queue;
207 reg->reg_last = reg_queue;
209 spin_unlock_irq(®->EP0VM_spin_lock);
212 Wb35Reg_EP0VM_start(pHwData);
218 * This command will be executed with a user defined value. When it completes,
219 * this value is useful. For example, hal_set_current_channel will use it.
220 * true : read command process successfully
221 * false : register not supported
223 unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
229 struct wb35_reg *reg = &pHwData->reg;
230 struct usb_ctrlrequest *dr;
231 struct urb *urb = NULL;
232 struct wb35_reg_queue *reg_queue = NULL;
235 /* Module shutdown */
236 if (pHwData->SurpriseRemove)
239 /* update the register by send urb request */
240 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
241 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
242 if (reg_queue == NULL)
245 urb = usb_alloc_urb(0, GFP_ATOMIC);
251 reg_queue->DIRECT = 1; /* burst write register */
252 reg_queue->INDEX = RegisterNo;
253 reg_queue->VALUE = cpu_to_le32(RegisterValue);
254 /* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
255 memcpy(reg_queue->RESERVED, pValue, Len);
256 reg_queue->RESERVED_VALID = true;
257 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
258 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
259 dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
260 dr->wValue = cpu_to_le16(0x0);
261 dr->wIndex = cpu_to_le16(RegisterNo);
262 dr->wLength = cpu_to_le16(4);
264 /* Enter the sending queue */
265 reg_queue->Next = NULL;
266 reg_queue->pUsbReq = dr;
267 reg_queue->urb = urb;
268 spin_lock_irq(®->EP0VM_spin_lock);
269 if (reg->reg_first == NULL)
270 reg->reg_first = reg_queue;
272 reg->reg_last->Next = reg_queue;
273 reg->reg_last = reg_queue;
275 spin_unlock_irq(®->EP0VM_spin_lock);
278 Wb35Reg_EP0VM_start(pHwData);
284 * true : read command process successfully
285 * false : register not support
286 * pRegisterValue : It must be a resident buffer due to
287 * asynchronous read register.
289 unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
291 struct wb35_reg *reg = &pHwData->reg;
292 u32 *pltmp = pRegisterValue;
295 /* Module shutdown */
296 if (pHwData->SurpriseRemove)
299 /* Read the register by send usb message */
300 reg->SyncIoPause = 1;
302 /* Wait until EP0VM stop */
303 while (reg->EP0vm_state != VM_STOP)
306 reg->EP0vm_state = VM_RUNNING;
307 ret = usb_control_msg(pHwData->udev,
308 usb_rcvctrlpipe(pHwData->udev, 0),
309 0x01, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
310 0x0, RegisterNo, pltmp, 4, HZ * 100);
312 *pRegisterValue = cpu_to_le32(*pltmp);
314 reg->EP0vm_state = VM_STOP;
316 Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
317 reg->SyncIoPause = 0;
319 Wb35Reg_EP0VM_start(pHwData);
322 pr_debug("EP0 Read register usb message sending error\n");
323 pHwData->SurpriseRemove = 1;
330 * true : read command process successfully
331 * false : register not support
332 * pRegisterValue : It must be a resident buffer due to
333 * asynchronous read register.
335 unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
337 struct wb35_reg *reg = &pHwData->reg;
338 struct usb_ctrlrequest *dr;
340 struct wb35_reg_queue *reg_queue;
343 /* Module shutdown */
344 if (pHwData->SurpriseRemove)
347 /* update the variable by send Urb to read register */
348 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
349 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
350 if (reg_queue == NULL)
353 urb = usb_alloc_urb(0, GFP_ATOMIC);
358 reg_queue->DIRECT = 0; /* read register */
359 reg_queue->INDEX = RegisterNo;
360 reg_queue->pBuffer = pRegisterValue;
361 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
362 dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN;
363 dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */
364 dr->wValue = cpu_to_le16(0x0);
365 dr->wIndex = cpu_to_le16(RegisterNo);
366 dr->wLength = cpu_to_le16(4);
368 /* Enter the sending queue */
369 reg_queue->Next = NULL;
370 reg_queue->pUsbReq = dr;
371 reg_queue->urb = urb;
372 spin_lock_irq(®->EP0VM_spin_lock);
373 if (reg->reg_first == NULL)
374 reg->reg_first = reg_queue;
376 reg->reg_last->Next = reg_queue;
377 reg->reg_last = reg_queue;
379 spin_unlock_irq(®->EP0VM_spin_lock);
382 Wb35Reg_EP0VM_start(pHwData);
388 void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
390 struct wb35_reg *reg = &pHwData->reg;
392 if (atomic_inc_return(®->RegFireCount) == 1) {
393 reg->EP0vm_state = VM_RUNNING;
394 Wb35Reg_EP0VM(pHwData);
396 atomic_dec(®->RegFireCount);
399 void Wb35Reg_EP0VM(struct hw_data *pHwData)
401 struct wb35_reg *reg = &pHwData->reg;
403 struct usb_ctrlrequest *dr;
406 struct wb35_reg_queue *reg_queue;
409 if (reg->SyncIoPause)
412 if (pHwData->SurpriseRemove)
415 /* Get the register data and send to USB through Irp */
416 spin_lock_irq(®->EP0VM_spin_lock);
417 reg_queue = reg->reg_first;
418 spin_unlock_irq(®->EP0VM_spin_lock);
423 /* Get an Urb, send it */
424 urb = (struct urb *)reg_queue->urb;
426 dr = reg_queue->pUsbReq;
427 urb = reg_queue->urb;
428 pBuffer = reg_queue->pBuffer;
429 if (reg_queue->DIRECT == 1) /* output */
430 pBuffer = ®_queue->VALUE;
432 usb_fill_control_urb(urb, pHwData->udev,
433 REG_DIRECTION(pHwData->udev, reg_queue),
434 (u8 *)dr, pBuffer, cpu_to_le16(dr->wLength),
435 Wb35Reg_EP0VM_complete, (void *)pHwData);
437 reg->EP0vm_state = VM_RUNNING;
439 ret = usb_submit_urb(urb, GFP_ATOMIC);
442 pr_debug("EP0 Irp sending error\n");
448 reg->EP0vm_state = VM_STOP;
449 atomic_dec(®->RegFireCount);
453 void Wb35Reg_EP0VM_complete(struct urb *urb)
455 struct hw_data *pHwData = (struct hw_data *)urb->context;
456 struct wb35_reg *reg = &pHwData->reg;
457 struct wb35_reg_queue *reg_queue;
460 /* Variable setting */
461 reg->EP0vm_state = VM_COMPLETED;
462 reg->EP0VM_status = urb->status;
464 if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
465 reg->EP0vm_state = VM_STOP;
466 atomic_dec(®->RegFireCount);
468 /* Complete to send, remove the URB from the first */
469 spin_lock_irq(®->EP0VM_spin_lock);
470 reg_queue = reg->reg_first;
471 if (reg_queue == reg->reg_last)
472 reg->reg_last = NULL;
473 reg->reg_first = reg->reg_first->Next;
474 spin_unlock_irq(®->EP0VM_spin_lock);
476 if (reg->EP0VM_status) {
477 pr_debug("EP0 IoCompleteRoutine return error\n");
478 reg->EP0vm_state = VM_STOP;
479 pHwData->SurpriseRemove = 1;
481 /* Success. Update the result */
483 /* Start the next send */
484 Wb35Reg_EP0VM(pHwData);
494 void Wb35Reg_destroy(struct hw_data *pHwData)
496 struct wb35_reg *reg = &pHwData->reg;
498 struct wb35_reg_queue *reg_queue;
500 Uxx_power_off_procedure(pHwData);
502 /* Wait for Reg operation completed */
504 msleep(10); /* Delay for waiting function enter */
505 } while (reg->EP0vm_state != VM_STOP);
506 msleep(10); /* Delay for waiting function enter */
508 /* Release all the data in RegQueue */
509 spin_lock_irq(®->EP0VM_spin_lock);
510 reg_queue = reg->reg_first;
512 if (reg_queue == reg->reg_last)
513 reg->reg_last = NULL;
514 reg->reg_first = reg->reg_first->Next;
516 urb = reg_queue->urb;
517 spin_unlock_irq(®->EP0VM_spin_lock);
522 pr_debug("EP0 queue release error\n");
524 spin_lock_irq(®->EP0VM_spin_lock);
526 reg_queue = reg->reg_first;
528 spin_unlock_irq(®->EP0VM_spin_lock);
532 * =======================================================================
533 * The function can be run in passive-level only.
534 * =========================================================================
536 unsigned char Wb35Reg_initial(struct hw_data *pHwData)
538 struct wb35_reg *reg = &pHwData->reg;
540 u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
542 /* Spin lock is acquired for read and write IRP command */
543 spin_lock_init(®->EP0VM_spin_lock);
545 /* Getting RF module type from EEPROM */
546 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
547 Wb35Reg_ReadSync(pHwData, 0x03b4, <mp);
549 /* Update RF module type and determine the PHY type by inf or EEPROM */
550 reg->EEPROMPhyType = (u8)(ltmp & 0xff);
552 * 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
553 * 16V AL2230, 17 - AL7230, 18 - AL2230S
555 * 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
557 if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
558 if ((reg->EEPROMPhyType == RF_MAXIM_2825) ||
559 (reg->EEPROMPhyType == RF_MAXIM_2827) ||
560 (reg->EEPROMPhyType == RF_MAXIM_2828) ||
561 (reg->EEPROMPhyType == RF_MAXIM_2829) ||
562 (reg->EEPROMPhyType == RF_MAXIM_V1) ||
563 (reg->EEPROMPhyType == RF_AIROHA_2230) ||
564 (reg->EEPROMPhyType == RF_AIROHA_2230S) ||
565 (reg->EEPROMPhyType == RF_AIROHA_7230) ||
566 (reg->EEPROMPhyType == RF_WB_242) ||
567 (reg->EEPROMPhyType == RF_WB_242_1))
568 pHwData->phy_type = reg->EEPROMPhyType;
571 /* Power On procedure running. The relative parameter will be set according to phy_type */
572 Uxx_power_on_procedure(pHwData);
574 /* Reading MAC address */
575 Uxx_ReadEthernetAddress(pHwData);
577 /* Read VCO trim for RF parameter */
578 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
579 Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
581 /* Read Antenna On/Off of software flag */
582 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
583 Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
586 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
587 Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
589 /* Get Scan interval setting from EEPROM offset 0x1c */
590 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
591 Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
593 /* Update Ethernet address */
594 memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
596 /* Update software variable */
597 pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
599 pHwData->PowerIndexFromEEPROM = (u8)TxVga;
600 pHwData->VCO_trim = (u8)VCO_trim & 0xff;
601 if (pHwData->VCO_trim == 0xff)
602 pHwData->VCO_trim = 0x28;
604 reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8);
605 if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6)
606 reg->EEPROMRegion = REGION_AUTO;
608 /* For Get Tx VGA from EEPROM */
609 GetTxVgaFromEEPROM(pHwData);
611 /* Set Scan Interval */
612 pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
613 if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
614 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
616 /* Initial register */
617 RFSynthesizer_initial(pHwData);
619 BBProcessor_initial(pHwData); /* Async write, must wait until complete */
621 Wb35Reg_phy_calibration(pHwData);
623 Mxx_initial(pHwData);
624 Dxx_initial(pHwData);
626 if (pHwData->SurpriseRemove)
629 return true; /* Initial fail */
633 * ================================================================
637 * Runs the AUTODIN II CRC algorithm on the buffers Buffer length.
640 * Buffer - the input buffer
641 * Length - the length of Buffer
644 * The 32-bit CRC value.
645 * ===================================================================
647 u32 CardComputeCrc(u8 *Buffer, u32 Length)
655 for (i = 0; i < Length; i++) {
657 for (j = 0; j < 8; j++) {
658 Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
662 Crc = (Crc ^ 0x04c11db6) | Carry;
670 * ==================================================================
672 * Reverse the bits in the input argument, dwData, which is
673 * regarded as a string of bits with the length, DataLength.
680 * The converted value.
681 * ==================================================================
683 u32 BitReverse(u32 dwData, u32 DataLength)
685 u32 HalfLength, i, j;
689 return 0; /* No conversion is done. */
690 dwData = dwData & (0xffffffff >> (32 - DataLength));
692 HalfLength = DataLength / 2;
693 for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) {
694 BitA = GetBit(dwData, i);
695 BitB = GetBit(dwData, j);
697 dwData = ClearBit(dwData, i);
698 dwData = SetBit(dwData, j);
699 } else if (!BitA && BitB) {
700 dwData = SetBit(dwData, i);
701 dwData = ClearBit(dwData, j);
703 /* Do nothing since these two bits are of the save values. */
709 void Wb35Reg_phy_calibration(struct hw_data *pHwData)
713 if ((pHwData->phy_type == RF_WB_242) ||
714 (pHwData->phy_type == RF_WB_242_1)) {
715 phy_calibration_winbond(pHwData, 2412); /* Sync operation */
716 Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
717 Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
719 pHwData->BB3c_cal = BB3c;
720 pHwData->BB54_cal = BB54;
722 RFSynthesizer_initial(pHwData);
723 BBProcessor_initial(pHwData); /* Async operation */
725 Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
726 Wb35Reg_WriteSync(pHwData, 0x1054, BB54);