2 * Silicon Motion SM7XX frame buffer device
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
18 * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
23 #include <linux/pci.h>
24 #include <linux/init.h>
25 #include <linux/slab.h>
26 #include <linux/uaccess.h>
27 #include <linux/module.h>
28 #include <linux/console.h>
29 #include <linux/screen_info.h>
37 struct screen_info smtc_screen_info;
47 unsigned char __iomem *m_pMMIO;
60 struct vesa_mode_table {
67 static struct vesa_mode_table vesa_mode[] = {
68 {"0x301", 640, 480, 8},
69 {"0x303", 800, 600, 8},
70 {"0x305", 1024, 768, 8},
71 {"0x307", 1280, 1024, 8},
73 {"0x311", 640, 480, 16},
74 {"0x314", 800, 600, 16},
75 {"0x317", 1024, 768, 16},
76 {"0x31A", 1280, 1024, 16},
78 {"0x312", 640, 480, 24},
79 {"0x315", 800, 600, 24},
80 {"0x318", 1024, 768, 24},
81 {"0x31B", 1280, 1024, 24},
84 char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
85 char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */
87 static u32 colreg[17];
89 static struct fb_var_screeninfo smtcfb_var = {
98 .activate = FB_ACTIVATE_NOW,
101 .vmode = FB_VMODE_NONINTERLACED,
104 static struct fb_fix_screeninfo smtcfb_fix = {
106 .type = FB_TYPE_PACKED_PIXELS,
107 .visual = FB_VISUAL_TRUECOLOR,
108 .line_length = 800 * 3,
109 .accel = FB_ACCEL_SMI_LYNX,
112 static void sm712_set_timing(struct smtcfb_info *sfb)
117 dev_dbg(&sfb->pdev->dev,
118 "sfb->width=%d sfb->height=%d "
119 "sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
120 sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
122 for (j = 0; j < numVGAModes; j++) {
123 if (VGAMode[j].mmSizeX == sfb->width &&
124 VGAMode[j].mmSizeY == sfb->height &&
125 VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
126 VGAMode[j].hz == sfb->hz) {
128 dev_dbg(&sfb->pdev->dev,
129 "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d "
130 "VGAMode[j].bpp=%d VGAMode[j].hz=%d\n",
131 VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
132 VGAMode[j].bpp, VGAMode[j].hz);
134 dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j);
136 smtc_mmiowb(0x0, 0x3c6);
140 smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
142 /* init SEQ register SR00 - SR04 */
143 for (i = 0; i < SIZE_SR00_SR04; i++)
144 smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
146 /* init SEQ register SR10 - SR24 */
147 for (i = 0; i < SIZE_SR10_SR24; i++)
149 VGAMode[j].Init_SR10_SR24[i]);
151 /* init SEQ register SR30 - SR75 */
152 for (i = 0; i < SIZE_SR30_SR75; i++)
153 if (((i + 0x30) != 0x62) \
154 && ((i + 0x30) != 0x6a) \
155 && ((i + 0x30) != 0x6b))
157 VGAMode[j].Init_SR30_SR75[i]);
159 /* init SEQ register SR80 - SR93 */
160 for (i = 0; i < SIZE_SR80_SR93; i++)
162 VGAMode[j].Init_SR80_SR93[i]);
164 /* init SEQ register SRA0 - SRAF */
165 for (i = 0; i < SIZE_SRA0_SRAF; i++)
167 VGAMode[j].Init_SRA0_SRAF[i]);
169 /* init Graphic register GR00 - GR08 */
170 for (i = 0; i < SIZE_GR00_GR08; i++)
171 smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
173 /* init Attribute register AR00 - AR14 */
174 for (i = 0; i < SIZE_AR00_AR14; i++)
175 smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
177 /* init CRTC register CR00 - CR18 */
178 for (i = 0; i < SIZE_CR00_CR18; i++)
179 smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
181 /* init CRTC register CR30 - CR4D */
182 for (i = 0; i < SIZE_CR30_CR4D; i++)
184 VGAMode[j].Init_CR30_CR4D[i]);
186 /* init CRTC register CR90 - CRA7 */
187 for (i = 0; i < SIZE_CR90_CRA7; i++)
189 VGAMode[j].Init_CR90_CRA7[i]);
192 smtc_mmiowb(0x67, 0x3c2);
194 /* set VPR registers */
195 writel(0x0, sfb->m_pVPR + 0x0C);
196 writel(0x0, sfb->m_pVPR + 0x40);
200 (sfb->width * sfb->fb.var.bits_per_pixel) / 64;
201 switch (sfb->fb.var.bits_per_pixel) {
203 writel(0x0, sfb->m_pVPR + 0x0);
206 writel(0x00020000, sfb->m_pVPR + 0x0);
209 writel(0x00040000, sfb->m_pVPR + 0x0);
212 writel(0x00030000, sfb->m_pVPR + 0x0);
215 writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
220 static void sm712_setpalette(int regno, unsigned red, unsigned green,
221 unsigned blue, struct fb_info *info)
223 /* set bit 5:4 = 01 (write LCD RAM only) */
224 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
226 smtc_mmiowb(regno, dac_reg);
227 smtc_mmiowb(red >> 10, dac_val);
228 smtc_mmiowb(green >> 10, dac_val);
229 smtc_mmiowb(blue >> 10, dac_val);
232 static void smtc_set_timing(struct smtcfb_info *sfb)
234 switch (sfb->chipID) {
238 sm712_set_timing(sfb);
245 * convert a colour value into a field position
250 static inline unsigned int chan_to_field(unsigned int chan,
251 struct fb_bitfield *bf)
254 chan >>= 16 - bf->length;
255 return chan << bf->offset;
258 static int smtc_blank(int blank_mode, struct fb_info *info)
260 /* clear DPMS setting */
261 switch (blank_mode) {
262 case FB_BLANK_UNBLANK:
263 /* Screen On: HSync: On, VSync : On */
264 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
265 smtc_seqw(0x6a, 0x16);
266 smtc_seqw(0x6b, 0x02);
267 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
268 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
269 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
270 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
271 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
273 case FB_BLANK_NORMAL:
274 /* Screen Off: HSync: On, VSync : On Soft blank */
275 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
276 smtc_seqw(0x6a, 0x16);
277 smtc_seqw(0x6b, 0x02);
278 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
279 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
280 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
281 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
283 case FB_BLANK_VSYNC_SUSPEND:
284 /* Screen On: HSync: On, VSync : Off */
285 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
286 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
287 smtc_seqw(0x6a, 0x0c);
288 smtc_seqw(0x6b, 0x02);
289 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
290 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
291 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
292 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
293 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
294 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
296 case FB_BLANK_HSYNC_SUSPEND:
297 /* Screen On: HSync: Off, VSync : On */
298 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
299 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
300 smtc_seqw(0x6a, 0x0c);
301 smtc_seqw(0x6b, 0x02);
302 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
303 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
304 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
305 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
306 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
307 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
309 case FB_BLANK_POWERDOWN:
310 /* Screen On: HSync: Off, VSync : Off */
311 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
312 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
313 smtc_seqw(0x6a, 0x0c);
314 smtc_seqw(0x6b, 0x02);
315 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
316 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
317 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
318 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
319 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
320 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
329 static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
330 unsigned blue, unsigned trans, struct fb_info *info)
332 struct smtcfb_info *sfb = (struct smtcfb_info *)info;
338 switch (sfb->fb.fix.visual) {
339 case FB_VISUAL_DIRECTCOLOR:
340 case FB_VISUAL_TRUECOLOR:
342 * 16/32 bit true-colour, use pseudo-palette for 16 base color
345 if (sfb->fb.var.bits_per_pixel == 16) {
346 u32 *pal = sfb->fb.pseudo_palette;
347 val = chan_to_field(red, &sfb->fb.var.red);
348 val |= chan_to_field(green, \
350 val |= chan_to_field(blue, &sfb->fb.var.blue);
353 ((red & 0xf800) >> 8) |
354 ((green & 0xe000) >> 13) |
355 ((green & 0x1c00) << 3) |
356 ((blue & 0xf800) >> 3);
361 u32 *pal = sfb->fb.pseudo_palette;
362 val = chan_to_field(red, &sfb->fb.var.red);
363 val |= chan_to_field(green, \
365 val |= chan_to_field(blue, &sfb->fb.var.blue);
368 (val & 0xff00ff00 >> 8) |
369 (val & 0x00ff00ff << 8);
376 case FB_VISUAL_PSEUDOCOLOR:
377 /* color depth 8 bit */
378 sm712_setpalette(regno, red, green, blue, info);
382 return 1; /* unknown type */
390 static ssize_t smtcfb_read(struct fb_info *info, char __user *buf, size_t
393 unsigned long p = *ppos;
397 int c, i, cnt = 0, err = 0;
398 unsigned long total_size;
400 if (!info || !info->screen_base)
403 if (info->state != FBINFO_STATE_RUNNING)
406 total_size = info->screen_size;
409 total_size = info->fix.smem_len;
414 if (count >= total_size)
417 if (count + p > total_size)
418 count = total_size - p;
420 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
424 src = (u32 __iomem *) (info->screen_base + p);
426 if (info->fbops->fb_sync)
427 info->fbops->fb_sync(info);
430 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
432 for (i = c >> 2; i--;) {
433 *dst = fb_readl(src++);
435 (*dst & 0xff00ff00 >> 8) |
436 (*dst & 0x00ff00ff << 8);
440 u8 *dst8 = (u8 *) dst;
441 u8 __iomem *src8 = (u8 __iomem *) src;
443 for (i = c & 3; i--;) {
445 *dst8++ = fb_readb(++src8);
447 *dst8++ = fb_readb(--src8);
451 src = (u32 __iomem *) src8;
454 if (copy_to_user(buf, buffer, c)) {
466 return (err) ? err : cnt;
470 smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
473 unsigned long p = *ppos;
477 int c, i, cnt = 0, err = 0;
478 unsigned long total_size;
480 if (!info || !info->screen_base)
483 if (info->state != FBINFO_STATE_RUNNING)
486 total_size = info->screen_size;
489 total_size = info->fix.smem_len;
494 if (count > total_size) {
499 if (count + p > total_size) {
503 count = total_size - p;
506 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
510 dst = (u32 __iomem *) (info->screen_base + p);
512 if (info->fbops->fb_sync)
513 info->fbops->fb_sync(info);
516 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
519 if (copy_from_user(src, buf, c)) {
524 for (i = c >> 2; i--;) {
525 fb_writel((*src & 0xff00ff00 >> 8) |
526 (*src & 0x00ff00ff << 8), dst++);
530 u8 *src8 = (u8 *) src;
531 u8 __iomem *dst8 = (u8 __iomem *) dst;
533 for (i = c & 3; i--;) {
535 fb_writeb(*src8++, ++dst8);
537 fb_writeb(*src8++, --dst8);
541 dst = (u32 __iomem *) dst8;
552 return (cnt) ? cnt : err;
554 #endif /* ! __BIG_ENDIAN */
556 void smtcfb_setmode(struct smtcfb_info *sfb)
558 switch (sfb->fb.var.bits_per_pixel) {
560 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
561 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
562 sfb->fb.var.red.length = 8;
563 sfb->fb.var.green.length = 8;
564 sfb->fb.var.blue.length = 8;
565 sfb->fb.var.red.offset = 16;
566 sfb->fb.var.green.offset = 8;
567 sfb->fb.var.blue.offset = 0;
571 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
572 sfb->fb.fix.line_length = sfb->fb.var.xres;
573 sfb->fb.var.red.offset = 5;
574 sfb->fb.var.red.length = 3;
575 sfb->fb.var.green.offset = 2;
576 sfb->fb.var.green.length = 3;
577 sfb->fb.var.blue.offset = 0;
578 sfb->fb.var.blue.length = 2;
581 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
582 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
583 sfb->fb.var.red.length = 8;
584 sfb->fb.var.green.length = 8;
585 sfb->fb.var.blue.length = 8;
587 sfb->fb.var.red.offset = 16;
588 sfb->fb.var.green.offset = 8;
589 sfb->fb.var.blue.offset = 0;
594 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
595 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
597 sfb->fb.var.red.length = 5;
598 sfb->fb.var.green.length = 6;
599 sfb->fb.var.blue.length = 5;
601 sfb->fb.var.red.offset = 11;
602 sfb->fb.var.green.offset = 5;
603 sfb->fb.var.blue.offset = 0;
608 sfb->width = sfb->fb.var.xres;
609 sfb->height = sfb->fb.var.yres;
611 smtc_set_timing(sfb);
614 static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
617 if (var->xres_virtual < var->xres)
618 var->xres_virtual = var->xres;
620 if (var->yres_virtual < var->yres)
621 var->yres_virtual = var->yres;
623 /* set valid default bpp */
624 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
625 (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
626 var->bits_per_pixel = 16;
631 static int smtc_set_par(struct fb_info *info)
633 struct smtcfb_info *sfb = (struct smtcfb_info *)info;
640 static struct fb_ops smtcfb_ops = {
641 .owner = THIS_MODULE,
642 .fb_check_var = smtc_check_var,
643 .fb_set_par = smtc_set_par,
644 .fb_setcolreg = smtc_setcolreg,
645 .fb_blank = smtc_blank,
646 .fb_fillrect = cfb_fillrect,
647 .fb_imageblit = cfb_imageblit,
648 .fb_copyarea = cfb_copyarea,
650 .fb_read = smtcfb_read,
651 .fb_write = smtcfb_write,
656 * Alloc struct smtcfb_info and assign the default value
658 static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev, char *name)
660 struct smtcfb_info *sfb;
662 sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
669 /*** Init sfb->fb with default value ***/
670 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
671 sfb->fb.fbops = &smtcfb_ops;
672 sfb->fb.var = smtcfb_var;
673 sfb->fb.fix = smtcfb_fix;
675 strcpy(sfb->fb.fix.id, name);
677 sfb->fb.fix.type = FB_TYPE_PACKED_PIXELS;
678 sfb->fb.fix.type_aux = 0;
679 sfb->fb.fix.xpanstep = 0;
680 sfb->fb.fix.ypanstep = 0;
681 sfb->fb.fix.ywrapstep = 0;
682 sfb->fb.fix.accel = FB_ACCEL_SMI_LYNX;
684 sfb->fb.var.nonstd = 0;
685 sfb->fb.var.activate = FB_ACTIVATE_NOW;
686 sfb->fb.var.height = -1;
687 sfb->fb.var.width = -1;
688 /* text mode acceleration */
689 sfb->fb.var.accel_flags = FB_ACCELF_TEXT;
690 sfb->fb.var.vmode = FB_VMODE_NONINTERLACED;
694 sfb->fb.pseudo_palette = colreg;
700 * Unmap in the memory mapped IO registers
703 static void smtc_unmap_mmio(struct smtcfb_info *sfb)
705 if (sfb && smtc_RegBaseAddress)
706 smtc_RegBaseAddress = NULL;
710 * Map in the screen memory
713 static int smtc_map_smem(struct smtcfb_info *sfb,
714 struct pci_dev *pdev, u_long smem_len)
717 sfb->fb.fix.smem_start = pci_resource_start(pdev, 0);
720 if (sfb->fb.var.bits_per_pixel == 32)
721 sfb->fb.fix.smem_start += 0x800000;
724 sfb->fb.fix.smem_len = smem_len;
726 sfb->fb.screen_base = smtc_VRAMBaseAddress;
728 if (!sfb->fb.screen_base) {
730 "%s: unable to map screen memory\n", sfb->fb.fix.id);
738 * Unmap in the screen memory
741 static void smtc_unmap_smem(struct smtcfb_info *sfb)
743 if (sfb && sfb->fb.screen_base) {
744 iounmap(sfb->fb.screen_base);
745 sfb->fb.screen_base = NULL;
750 * We need to wake up the device and make sure its in linear memory mode.
752 static inline void sm7xx_init_hw(void)
758 static void smtc_free_fb_info(struct smtcfb_info *sfb)
761 fb_alloc_cmap(&sfb->fb.cmap, 0, 0);
767 * sm712vga_setup - process command line options, get vga parameter
768 * @options: string of options
772 static int __init sm712vga_setup(char *options)
776 if (!options || !*options)
779 smtc_screen_info.lfb_width = 0;
780 smtc_screen_info.lfb_height = 0;
781 smtc_screen_info.lfb_depth = 0;
783 pr_debug("sm712vga_setup = %s\n", options);
786 index < ARRAY_SIZE(vesa_mode);
788 if (strstr(options, vesa_mode[index].mode_index)) {
789 smtc_screen_info.lfb_width = vesa_mode[index].lfb_width;
790 smtc_screen_info.lfb_height =
791 vesa_mode[index].lfb_height;
792 smtc_screen_info.lfb_depth = vesa_mode[index].lfb_depth;
799 __setup("vga=", sm712vga_setup);
801 static int __devinit smtcfb_pci_probe(struct pci_dev *pdev,
802 const struct pci_device_id *ent)
804 struct smtcfb_info *sfb;
805 u_long smem_size = 0x00800000; /* default 8MB */
808 unsigned long pFramebufferPhysical;
810 dev_info(&pdev->dev, "Silicon Motion display driver.");
812 err = pci_enable_device(pdev); /* enable SMTC chip */
816 sfb = smtc_alloc_fb_info(pdev, name);
821 sfb->chipID = ent->device;
822 sprintf(name, "sm%Xfb", sfb->chipID);
824 pci_set_drvdata(pdev, sfb);
828 /*get mode parameter from smtc_screen_info */
829 if (smtc_screen_info.lfb_width != 0) {
830 sfb->fb.var.xres = smtc_screen_info.lfb_width;
831 sfb->fb.var.yres = smtc_screen_info.lfb_height;
832 sfb->fb.var.bits_per_pixel = smtc_screen_info.lfb_depth;
834 /* default resolution 1024x600 16bit mode */
835 sfb->fb.var.xres = SCREEN_X_RES;
836 sfb->fb.var.yres = SCREEN_Y_RES;
837 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
841 if (sfb->fb.var.bits_per_pixel == 24)
842 sfb->fb.var.bits_per_pixel = (smtc_screen_info.lfb_depth = 32);
844 /* Map address and memory detection */
845 pFramebufferPhysical = pci_resource_start(pdev, 0);
846 pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chipRevID);
848 switch (sfb->chipID) {
851 sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
852 sfb->fb.fix.mmio_len = 0x00400000;
853 smem_size = SM712_VIDEOMEMORYSIZE;
855 sfb->m_pLFB = (smtc_VRAMBaseAddress =
856 ioremap(pFramebufferPhysical, 0x00c00000));
858 sfb->m_pLFB = (smtc_VRAMBaseAddress =
859 ioremap(pFramebufferPhysical, 0x00800000));
861 sfb->m_pMMIO = (smtc_RegBaseAddress =
862 smtc_VRAMBaseAddress + 0x00700000);
863 sfb->m_pDPR = smtc_VRAMBaseAddress + 0x00408000;
864 sfb->m_pVPR = sfb->m_pLFB + 0x0040c000;
866 if (sfb->fb.var.bits_per_pixel == 32) {
867 smtc_VRAMBaseAddress += 0x800000;
868 sfb->m_pLFB += 0x800000;
870 "smtc_VRAMBaseAddress=%p sfb->m_pLFB=%p",
871 smtc_VRAMBaseAddress, sfb->m_pLFB);
874 if (!smtc_RegBaseAddress) {
876 "%s: unable to map memory mapped IO!",
882 /* set MCLK = 14.31818 * (0x16 / 0x2) */
883 smtc_seqw(0x6a, 0x16);
884 smtc_seqw(0x6b, 0x02);
885 smtc_seqw(0x62, 0x3e);
886 /* enable PCI burst */
887 smtc_seqw(0x17, 0x20);
888 /* enable word swap */
890 if (sfb->fb.var.bits_per_pixel == 32)
891 smtc_seqw(0x17, 0x30);
895 sfb->fb.fix.mmio_start = pFramebufferPhysical;
896 sfb->fb.fix.mmio_len = 0x00200000;
897 smem_size = SM722_VIDEOMEMORYSIZE;
898 sfb->m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000);
899 sfb->m_pLFB = (smtc_VRAMBaseAddress =
900 sfb->m_pDPR + 0x00200000);
901 sfb->m_pMMIO = (smtc_RegBaseAddress =
902 sfb->m_pDPR + 0x000c0000);
903 sfb->m_pVPR = sfb->m_pDPR + 0x800;
905 smtc_seqw(0x62, 0xff);
906 smtc_seqw(0x6a, 0x0d);
907 smtc_seqw(0x6b, 0x02);
911 "No valid Silicon Motion display chip was detected!");
916 /* can support 32 bpp */
917 if (15 == sfb->fb.var.bits_per_pixel)
918 sfb->fb.var.bits_per_pixel = 16;
920 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
921 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
922 err = smtc_map_smem(sfb, pdev, smem_size);
928 err = register_framebuffer(&sfb->fb);
933 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
934 sfb->chipID, sfb->chipRevID, sfb->fb.var.xres,
935 sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
940 dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.");
942 smtc_unmap_smem(sfb);
943 smtc_unmap_mmio(sfb);
945 smtc_free_fb_info(sfb);
948 pci_disable_device(pdev);
956 * 0x720 (Lynx3DM, Lynx3DM+)
958 static DEFINE_PCI_DEVICE_TABLE(smtcfb_pci_table) = {
959 { PCI_DEVICE(0x126f, 0x710), },
960 { PCI_DEVICE(0x126f, 0x712), },
961 { PCI_DEVICE(0x126f, 0x720), },
965 static void __devexit smtcfb_pci_remove(struct pci_dev *pdev)
967 struct smtcfb_info *sfb;
969 sfb = pci_get_drvdata(pdev);
970 pci_set_drvdata(pdev, NULL);
971 smtc_unmap_smem(sfb);
972 smtc_unmap_mmio(sfb);
973 unregister_framebuffer(&sfb->fb);
974 smtc_free_fb_info(sfb);
978 static int smtcfb_pci_suspend(struct device *device)
980 struct pci_dev *pdev = to_pci_dev(device);
981 struct smtcfb_info *sfb;
983 sfb = pci_get_drvdata(pdev);
985 /* set the hw in sleep mode use external clock and self memory refresh
986 * so that we can turn off internal PLLs later on
988 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
989 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
992 fb_set_suspend(&sfb->fb, 1);
995 /* additionally turn off all function blocks including internal PLLs */
996 smtc_seqw(0x21, 0xff);
1001 static int smtcfb_pci_resume(struct device *device)
1003 struct pci_dev *pdev = to_pci_dev(device);
1004 struct smtcfb_info *sfb;
1006 sfb = pci_get_drvdata(pdev);
1008 /* reinit hardware */
1010 switch (sfb->chipID) {
1013 /* set MCLK = 14.31818 * (0x16 / 0x2) */
1014 smtc_seqw(0x6a, 0x16);
1015 smtc_seqw(0x6b, 0x02);
1016 smtc_seqw(0x62, 0x3e);
1017 /* enable PCI burst */
1018 smtc_seqw(0x17, 0x20);
1020 if (sfb->fb.var.bits_per_pixel == 32)
1021 smtc_seqw(0x17, 0x30);
1025 smtc_seqw(0x62, 0xff);
1026 smtc_seqw(0x6a, 0x0d);
1027 smtc_seqw(0x6b, 0x02);
1031 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
1032 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
1034 smtcfb_setmode(sfb);
1037 fb_set_suspend(&sfb->fb, 0);
1043 static const struct dev_pm_ops sm7xx_pm_ops = {
1044 .suspend = smtcfb_pci_suspend,
1045 .resume = smtcfb_pci_resume,
1046 .freeze = smtcfb_pci_suspend,
1047 .thaw = smtcfb_pci_resume,
1048 .poweroff = smtcfb_pci_suspend,
1049 .restore = smtcfb_pci_resume,
1052 #define SM7XX_PM_OPS (&sm7xx_pm_ops)
1054 #else /* !CONFIG_PM */
1056 #define SM7XX_PM_OPS NULL
1058 #endif /* !CONFIG_PM */
1060 static struct pci_driver smtcfb_driver = {
1062 .id_table = smtcfb_pci_table,
1063 .probe = smtcfb_pci_probe,
1064 .remove = __devexit_p(smtcfb_pci_remove),
1065 .driver.pm = SM7XX_PM_OPS,
1068 static int __init smtcfb_init(void)
1070 return pci_register_driver(&smtcfb_driver);
1073 static void __exit smtcfb_exit(void)
1075 pci_unregister_driver(&smtcfb_driver);
1078 module_init(smtcfb_init);
1079 module_exit(smtcfb_exit);
1081 MODULE_AUTHOR("Siliconmotion ");
1082 MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1083 MODULE_LICENSE("GPL");