Pileus Git - ~andy/linux/blob - drivers/staging/rts5208/rtsx_card.c

   1 /* Driver for Realtek PCI-Express card reader
   2  *
   3  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2, or (at your option) any
   8  * later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author:
  19  *   Wei WANG (wei_wang@realsil.com.cn)
  20  *   Micky Ching (micky_ching@realsil.com.cn)
  21  */
  22
  23 #include <linux/blkdev.h>
  24 #include <linux/kthread.h>
  25 #include <linux/sched.h>
  26 #include <linux/workqueue.h>
  27 #include <linux/kernel.h>
  28
  29 #include "rtsx.h"
  30 #include "rtsx_transport.h"
  31 #include "rtsx_scsi.h"
  32 #include "rtsx_card.h"
  33
  34 #include "rtsx_sys.h"
  35 #include "general.h"
  36
  37 #include "sd.h"
  38 #include "xd.h"
  39 #include "ms.h"
  40
  41 void do_remaining_work(struct rtsx_chip *chip)
  42 {
  43         struct sd_info *sd_card = &(chip->sd_card);
  44 #ifdef XD_DELAY_WRITE
  45         struct xd_info *xd_card = &(chip->xd_card);
  46 #endif
  47         struct ms_info *ms_card = &(chip->ms_card);
  48
  49         if (chip->card_ready & SD_CARD) {
  50                 if (sd_card->seq_mode) {
  51                         rtsx_set_stat(chip, RTSX_STAT_RUN);
  52                         sd_card->cleanup_counter++;
  53                 } else {
  54                         sd_card->cleanup_counter = 0;
  55                 }
  56         }
  57
  58 #ifdef XD_DELAY_WRITE
  59         if (chip->card_ready & XD_CARD) {
  60                 if (xd_card->delay_write.delay_write_flag) {
  61                         rtsx_set_stat(chip, RTSX_STAT_RUN);
  62                         xd_card->cleanup_counter++;
  63                 } else {
  64                         xd_card->cleanup_counter = 0;
  65                 }
  66         }
  67 #endif
  68
  69         if (chip->card_ready & MS_CARD) {
  70                 if (CHK_MSPRO(ms_card)) {
  71                         if (ms_card->seq_mode) {
  72                                 rtsx_set_stat(chip, RTSX_STAT_RUN);
  73                                 ms_card->cleanup_counter++;
  74                         } else {
  75                                 ms_card->cleanup_counter = 0;
  76                         }
  77                 } else {
  78 #ifdef MS_DELAY_WRITE
  79                         if (ms_card->delay_write.delay_write_flag) {
  80                                 rtsx_set_stat(chip, RTSX_STAT_RUN);
  81                                 ms_card->cleanup_counter++;
  82                         } else {
  83                                 ms_card->cleanup_counter = 0;
  84                         }
  85 #endif
  86                 }
  87         }
  88
  89         if (sd_card->cleanup_counter > POLLING_WAIT_CNT)
  90                 sd_cleanup_work(chip);
  91
  92         if (xd_card->cleanup_counter > POLLING_WAIT_CNT)
  93                 xd_cleanup_work(chip);
  94
  95         if (ms_card->cleanup_counter > POLLING_WAIT_CNT)
  96                 ms_cleanup_work(chip);
  97 }
  98
  99 void try_to_switch_sdio_ctrl(struct rtsx_chip *chip)
 100 {
 101         u8 reg1 = 0, reg2 = 0;
 102
 103         rtsx_read_register(chip, 0xFF34, &reg1);
 104         rtsx_read_register(chip, 0xFF38, &reg2);
 105         RTSX_DEBUGP("reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n", reg1, reg2);
 106         if ((reg1 & 0xC0) && (reg2 & 0xC0)) {
 107                 chip->sd_int = 1;
 108                 rtsx_write_register(chip, SDIO_CTRL, 0xFF, SDIO_BUS_CTRL | SDIO_CD_CTRL);
 109                 rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_ON);
 110         }
 111 }
 112
 113 #ifdef SUPPORT_SDIO_ASPM
 114 void dynamic_configure_sdio_aspm(struct rtsx_chip *chip)
 115 {
 116         u8 buf[12], reg;
 117         int i;
 118
 119         for (i = 0; i < 12; i++)
 120                 rtsx_read_register(chip, 0xFF08 + i, &buf[i]);
 121         rtsx_read_register(chip, 0xFF25, &reg);
 122         if ((memcmp(buf, chip->sdio_raw_data, 12) != 0) || (reg & 0x03)) {
 123                 chip->sdio_counter = 0;
 124                 chip->sdio_idle = 0;
 125         } else {
 126                 if (!chip->sdio_idle) {
 127                         chip->sdio_counter++;
 128                         if (chip->sdio_counter >= SDIO_IDLE_COUNT) {
 129                                 chip->sdio_counter = 0;
 130                                 chip->sdio_idle = 1;
 131                         }
 132                 }
 133         }
 134         memcpy(chip->sdio_raw_data, buf, 12);
 135
 136         if (chip->sdio_idle) {
 137                 if (!chip->sdio_aspm) {
 138                         RTSX_DEBUGP("SDIO enter ASPM!\n");
 139                         rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC,
 140                                         0x30 | (chip->aspm_level[1] << 2));
 141                         chip->sdio_aspm = 1;
 142                 }
 143         } else {
 144                 if (chip->sdio_aspm) {
 145                         RTSX_DEBUGP("SDIO exit ASPM!\n");
 146                         rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC, 0x30);
 147                         chip->sdio_aspm = 0;
 148                 }
 149         }
 150 }
 151 #endif
 152
 153 void do_reset_sd_card(struct rtsx_chip *chip)
 154 {
 155         int retval;
 156
 157         RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
 158                      chip->sd_reset_counter, chip->card2lun[SD_CARD]);
 159
 160         if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT) {
 161                 clear_bit(SD_NR, &(chip->need_reset));
 162                 chip->sd_reset_counter = 0;
 163                 chip->sd_show_cnt = 0;
 164                 return;
 165         }
 166
 167         chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
 168
 169         rtsx_set_stat(chip, RTSX_STAT_RUN);
 170         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 171
 172         retval = reset_sd_card(chip);
 173         if (chip->need_release & SD_CARD)
 174                 return;
 175         if (retval == STATUS_SUCCESS) {
 176                 clear_bit(SD_NR, &(chip->need_reset));
 177                 chip->sd_reset_counter = 0;
 178                 chip->sd_show_cnt = 0;
 179                 chip->card_ready |= SD_CARD;
 180                 chip->card_fail &= ~SD_CARD;
 181                 chip->rw_card[chip->card2lun[SD_CARD]] = sd_rw;
 182         } else {
 183                 if (chip->sd_io || (chip->sd_reset_counter >= MAX_RESET_CNT)) {
 184                         clear_bit(SD_NR, &(chip->need_reset));
 185                         chip->sd_reset_counter = 0;
 186                         chip->sd_show_cnt = 0;
 187                 } else {
 188                         chip->sd_reset_counter++;
 189                 }
 190                 chip->card_ready &= ~SD_CARD;
 191                 chip->card_fail |= SD_CARD;
 192                 chip->capacity[chip->card2lun[SD_CARD]] = 0;
 193                 chip->rw_card[chip->card2lun[SD_CARD]] = NULL;
 194
 195                 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
 196                 if (!chip->ft2_fast_mode)
 197                         card_power_off(chip, SD_CARD);
 198                 if (chip->sd_io) {
 199                         chip->sd_int = 0;
 200                         try_to_switch_sdio_ctrl(chip);
 201                 } else {
 202                         disable_card_clock(chip, SD_CARD);
 203                 }
 204         }
 205 }
 206
 207 void do_reset_xd_card(struct rtsx_chip *chip)
 208 {
 209         int retval;
 210
 211         RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
 212                      chip->xd_reset_counter, chip->card2lun[XD_CARD]);
 213
 214         if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT) {
 215                 clear_bit(XD_NR, &(chip->need_reset));
 216                 chip->xd_reset_counter = 0;
 217                 chip->xd_show_cnt = 0;
 218                 return;
 219         }
 220
 221         chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
 222
 223         rtsx_set_stat(chip, RTSX_STAT_RUN);
 224         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 225
 226         retval = reset_xd_card(chip);
 227         if (chip->need_release & XD_CARD)
 228                 return;
 229         if (retval == STATUS_SUCCESS) {
 230                 clear_bit(XD_NR, &(chip->need_reset));
 231                 chip->xd_reset_counter = 0;
 232                 chip->card_ready |= XD_CARD;
 233                 chip->card_fail &= ~XD_CARD;
 234                 chip->rw_card[chip->card2lun[XD_CARD]] = xd_rw;
 235         } else {
 236                 if (chip->xd_reset_counter >= MAX_RESET_CNT) {
 237                         clear_bit(XD_NR, &(chip->need_reset));
 238                         chip->xd_reset_counter = 0;
 239                         chip->xd_show_cnt = 0;
 240                 } else {
 241                         chip->xd_reset_counter++;
 242                 }
 243                 chip->card_ready &= ~XD_CARD;
 244                 chip->card_fail |= XD_CARD;
 245                 chip->capacity[chip->card2lun[XD_CARD]] = 0;
 246                 chip->rw_card[chip->card2lun[XD_CARD]] = NULL;
 247
 248                 rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0);
 249                 if (!chip->ft2_fast_mode)
 250                         card_power_off(chip, XD_CARD);
 251                 disable_card_clock(chip, XD_CARD);
 252         }
 253 }
 254
 255 void do_reset_ms_card(struct rtsx_chip *chip)
 256 {
 257         int retval;
 258
 259         RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
 260                      chip->ms_reset_counter, chip->card2lun[MS_CARD]);
 261
 262         if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT) {
 263                 clear_bit(MS_NR, &(chip->need_reset));
 264                 chip->ms_reset_counter = 0;
 265                 chip->ms_show_cnt = 0;
 266                 return;
 267         }
 268
 269         chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
 270
 271         rtsx_set_stat(chip, RTSX_STAT_RUN);
 272         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 273
 274         retval = reset_ms_card(chip);
 275         if (chip->need_release & MS_CARD)
 276                 return;
 277         if (retval == STATUS_SUCCESS) {
 278                 clear_bit(MS_NR, &(chip->need_reset));
 279                 chip->ms_reset_counter = 0;
 280                 chip->card_ready |= MS_CARD;
 281                 chip->card_fail &= ~MS_CARD;
 282                 chip->rw_card[chip->card2lun[MS_CARD]] = ms_rw;
 283         } else {
 284                 if (chip->ms_reset_counter >= MAX_RESET_CNT) {
 285                         clear_bit(MS_NR, &(chip->need_reset));
 286                         chip->ms_reset_counter = 0;
 287                         chip->ms_show_cnt = 0;
 288                 } else {
 289                         chip->ms_reset_counter++;
 290                 }
 291                 chip->card_ready &= ~MS_CARD;
 292                 chip->card_fail |= MS_CARD;
 293                 chip->capacity[chip->card2lun[MS_CARD]] = 0;
 294                 chip->rw_card[chip->card2lun[MS_CARD]] = NULL;
 295
 296                 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
 297                 if (!chip->ft2_fast_mode)
 298                         card_power_off(chip, MS_CARD);
 299                 disable_card_clock(chip, MS_CARD);
 300         }
 301 }
 302
 303 static void release_sdio(struct rtsx_chip *chip)
 304 {
 305         if (chip->sd_io) {
 306                 rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
 307                                 SD_STOP | SD_CLR_ERR);
 308
 309                 if (chip->chip_insert_with_sdio) {
 310                         chip->chip_insert_with_sdio = 0;
 311
 312                         if (CHECK_PID(chip, 0x5288))
 313                                 rtsx_write_register(chip, 0xFE5A, 0x08, 0x00);
 314                         else
 315                                 rtsx_write_register(chip, 0xFE70, 0x80, 0x00);
 316                 }
 317
 318                 rtsx_write_register(chip, SDIO_CTRL, SDIO_CD_CTRL, 0);
 319                 chip->sd_io = 0;
 320         }
 321 }
 322
 323 void rtsx_power_off_card(struct rtsx_chip *chip)
 324 {
 325         if ((chip->card_ready & SD_CARD) || chip->sd_io) {
 326                 sd_cleanup_work(chip);
 327                 sd_power_off_card3v3(chip);
 328         }
 329
 330         if (chip->card_ready & XD_CARD) {
 331                 xd_cleanup_work(chip);
 332                 xd_power_off_card3v3(chip);
 333         }
 334
 335         if (chip->card_ready & MS_CARD) {
 336                 ms_cleanup_work(chip);
 337                 ms_power_off_card3v3(chip);
 338         }
 339 }
 340
 341 void rtsx_release_cards(struct rtsx_chip *chip)
 342 {
 343         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 344
 345         if ((chip->card_ready & SD_CARD) || chip->sd_io) {
 346                 if (chip->int_reg & SD_EXIST)
 347                         sd_cleanup_work(chip);
 348                 release_sd_card(chip);
 349         }
 350
 351         if (chip->card_ready & XD_CARD) {
 352                 if (chip->int_reg & XD_EXIST)
 353                         xd_cleanup_work(chip);
 354                 release_xd_card(chip);
 355         }
 356
 357         if (chip->card_ready & MS_CARD) {
 358                 if (chip->int_reg & MS_EXIST)
 359                         ms_cleanup_work(chip);
 360                 release_ms_card(chip);
 361         }
 362 }
 363
 364 void rtsx_reset_cards(struct rtsx_chip *chip)
 365 {
 366         if (!chip->need_reset)
 367                 return;
 368
 369         rtsx_set_stat(chip, RTSX_STAT_RUN);
 370
 371         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 372
 373         rtsx_disable_aspm(chip);
 374
 375         if ((chip->need_reset & SD_CARD) && chip->chip_insert_with_sdio)
 376                 clear_bit(SD_NR, &(chip->need_reset));
 377
 378         if (chip->need_reset & XD_CARD) {
 379                 chip->card_exist |= XD_CARD;
 380
 381                 if (chip->xd_show_cnt >= MAX_SHOW_CNT)
 382                         do_reset_xd_card(chip);
 383                 else
 384                         chip->xd_show_cnt++;
 385         }
 386         if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
 387                 if (chip->card_exist & XD_CARD) {
 388                         clear_bit(SD_NR, &(chip->need_reset));
 389                         clear_bit(MS_NR, &(chip->need_reset));
 390                 }
 391         }
 392         if (chip->need_reset & SD_CARD) {
 393                 chip->card_exist |= SD_CARD;
 394
 395                 if (chip->sd_show_cnt >= MAX_SHOW_CNT) {
 396                         rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
 397                         do_reset_sd_card(chip);
 398                 } else {
 399                         chip->sd_show_cnt++;
 400                 }
 401         }
 402         if (chip->need_reset & MS_CARD) {
 403                 chip->card_exist |= MS_CARD;
 404
 405                 if (chip->ms_show_cnt >= MAX_SHOW_CNT)
 406                         do_reset_ms_card(chip);
 407                 else
 408                         chip->ms_show_cnt++;
 409         }
 410 }
 411
 412 void rtsx_reinit_cards(struct rtsx_chip *chip, int reset_chip)
 413 {
 414         rtsx_set_stat(chip, RTSX_STAT_RUN);
 415
 416         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 417
 418         if (reset_chip)
 419                 rtsx_reset_chip(chip);
 420
 421         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 422
 423         if ((chip->int_reg & SD_EXIST) && (chip->need_reinit & SD_CARD)) {
 424                 release_sdio(chip);
 425                 release_sd_card(chip);
 426
 427                 wait_timeout(100);
 428
 429                 chip->card_exist |= SD_CARD;
 430                 do_reset_sd_card(chip);
 431         }
 432
 433         if ((chip->int_reg & XD_EXIST) && (chip->need_reinit & XD_CARD)) {
 434                 release_xd_card(chip);
 435
 436                 wait_timeout(100);
 437
 438                 chip->card_exist |= XD_CARD;
 439                 do_reset_xd_card(chip);
 440         }
 441
 442         if ((chip->int_reg & MS_EXIST) && (chip->need_reinit & MS_CARD)) {
 443                 release_ms_card(chip);
 444
 445                 wait_timeout(100);
 446
 447                 chip->card_exist |= MS_CARD;
 448                 do_reset_ms_card(chip);
 449         }
 450
 451         chip->need_reinit = 0;
 452 }
 453
 454 #ifdef DISABLE_CARD_INT
 455 void card_cd_debounce(struct rtsx_chip *chip, unsigned long *need_reset, unsigned long *need_release)
 456 {
 457         u8 release_map = 0, reset_map = 0;
 458
 459         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 460
 461         if (chip->card_exist) {
 462                 if (chip->card_exist & XD_CARD) {
 463                         if (!(chip->int_reg & XD_EXIST))
 464                                 release_map |= XD_CARD;
 465                 } else if (chip->card_exist & SD_CARD) {
 466                         if (!(chip->int_reg & SD_EXIST))
 467                                 release_map |= SD_CARD;
 468                 } else if (chip->card_exist & MS_CARD) {
 469                         if (!(chip->int_reg & MS_EXIST))
 470                                 release_map |= MS_CARD;
 471                 }
 472         } else {
 473                 if (chip->int_reg & XD_EXIST)
 474                         reset_map |= XD_CARD;
 475                 else if (chip->int_reg & SD_EXIST)
 476                         reset_map |= SD_CARD;
 477                 else if (chip->int_reg & MS_EXIST)
 478                         reset_map |= MS_CARD;
 479         }
 480
 481         if (reset_map) {
 482                 int xd_cnt = 0, sd_cnt = 0, ms_cnt = 0;
 483                 int i;
 484
 485                 for (i = 0; i < (DEBOUNCE_CNT); i++) {
 486                         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 487
 488                         if (chip->int_reg & XD_EXIST)
 489                                 xd_cnt++;
 490                         else
 491                                 xd_cnt = 0;
 492
 493                         if (chip->int_reg & SD_EXIST)
 494                                 sd_cnt++;
 495                         else
 496                                 sd_cnt = 0;
 497
 498                         if (chip->int_reg & MS_EXIST)
 499                                 ms_cnt++;
 500                         else
 501                                 ms_cnt = 0;
 502
 503                         wait_timeout(30);
 504                 }
 505
 506                 reset_map = 0;
 507                 if (!(chip->card_exist & XD_CARD) && (xd_cnt > (DEBOUNCE_CNT-1)))
 508                         reset_map |= XD_CARD;
 509                 if (!(chip->card_exist & SD_CARD) && (sd_cnt > (DEBOUNCE_CNT-1)))
 510                         reset_map |= SD_CARD;
 511                 if (!(chip->card_exist & MS_CARD) && (ms_cnt > (DEBOUNCE_CNT-1)))
 512                         reset_map |= MS_CARD;
 513         }
 514
 515         if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN))
 516                 rtsx_write_register(chip, HOST_SLEEP_STATE, 0xC0, 0x00);
 517
 518         if (need_reset)
 519                 *need_reset = reset_map;
 520         if (need_release)
 521                 *need_release = release_map;
 522 }
 523 #endif
 524
 525 void rtsx_init_cards(struct rtsx_chip *chip)
 526 {
 527         if (RTSX_TST_DELINK(chip) && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
 528                 RTSX_DEBUGP("Reset chip in polling thread!\n");
 529                 rtsx_reset_chip(chip);
 530                 RTSX_CLR_DELINK(chip);
 531         }
 532
 533 #ifdef DISABLE_CARD_INT
 534         card_cd_debounce(chip, &(chip->need_reset), &(chip->need_release));
 535 #endif
 536
 537         if (chip->need_release) {
 538                 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
 539                         if (chip->int_reg & XD_EXIST) {
 540                                 clear_bit(SD_NR, &(chip->need_release));
 541                                 clear_bit(MS_NR, &(chip->need_release));
 542                         }
 543                 }
 544
 545                 if (!(chip->card_exist & SD_CARD) && !chip->sd_io)
 546                         clear_bit(SD_NR, &(chip->need_release));
 547                 if (!(chip->card_exist & XD_CARD))
 548                         clear_bit(XD_NR, &(chip->need_release));
 549                 if (!(chip->card_exist & MS_CARD))
 550                         clear_bit(MS_NR, &(chip->need_release));
 551
 552                 RTSX_DEBUGP("chip->need_release = 0x%x\n", (unsigned int)(chip->need_release));
 553
 554 #ifdef SUPPORT_OCP
 555                 if (chip->need_release) {
 556                         if (chip->ocp_stat & (CARD_OC_NOW | CARD_OC_EVER))
 557                                 rtsx_write_register(chip, OCPCLR,
 558                                                 CARD_OC_INT_CLR | CARD_OC_CLR,
 559                                                 CARD_OC_INT_CLR | CARD_OC_CLR);
 560                         chip->ocp_stat = 0;
 561                 }
 562 #endif
 563                 if (chip->need_release) {
 564                         rtsx_set_stat(chip, RTSX_STAT_RUN);
 565                         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 566                 }
 567
 568                 if (chip->need_release & SD_CARD) {
 569                         clear_bit(SD_NR, &(chip->need_release));
 570                         chip->card_exist &= ~SD_CARD;
 571                         chip->card_ejected &= ~SD_CARD;
 572                         chip->card_fail &= ~SD_CARD;
 573                         CLR_BIT(chip->lun_mc, chip->card2lun[SD_CARD]);
 574                         chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
 575                         rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
 576
 577                         release_sdio(chip);
 578                         release_sd_card(chip);
 579                 }
 580
 581                 if (chip->need_release & XD_CARD) {
 582                         clear_bit(XD_NR, &(chip->need_release));
 583                         chip->card_exist &= ~XD_CARD;
 584                         chip->card_ejected &= ~XD_CARD;
 585                         chip->card_fail &= ~XD_CARD;
 586                         CLR_BIT(chip->lun_mc, chip->card2lun[XD_CARD]);
 587                         chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
 588
 589                         release_xd_card(chip);
 590
 591                         if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN))
 592                                 rtsx_write_register(chip, HOST_SLEEP_STATE, 0xC0, 0xC0);
 593                 }
 594
 595                 if (chip->need_release & MS_CARD) {
 596                         clear_bit(MS_NR, &(chip->need_release));
 597                         chip->card_exist &= ~MS_CARD;
 598                         chip->card_ejected &= ~MS_CARD;
 599                         chip->card_fail &= ~MS_CARD;
 600                         CLR_BIT(chip->lun_mc, chip->card2lun[MS_CARD]);
 601                         chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
 602
 603                         release_ms_card(chip);
 604                 }
 605
 606                 RTSX_DEBUGP("chip->card_exist = 0x%x\n", chip->card_exist);
 607
 608                 if (!chip->card_exist)
 609                         turn_off_led(chip, LED_GPIO);
 610         }
 611
 612         if (chip->need_reset) {
 613                 RTSX_DEBUGP("chip->need_reset = 0x%x\n", (unsigned int)(chip->need_reset));
 614
 615                 rtsx_reset_cards(chip);
 616         }
 617
 618         if (chip->need_reinit) {
 619                 RTSX_DEBUGP("chip->need_reinit = 0x%x\n", (unsigned int)(chip->need_reinit));
 620
 621                 rtsx_reinit_cards(chip, 0);
 622         }
 623 }
 624
 625 static inline u8 double_depth(u8 depth)
 626 {
 627         return ((depth > 1) ? (depth - 1) : depth);
 628 }
 629
 630 int switch_ssc_clock(struct rtsx_chip *chip, int clk)
 631 {
 632         int retval;
 633         u8 N = (u8)(clk - 2), min_N, max_N;
 634         u8 mcu_cnt, div, max_div, ssc_depth, ssc_depth_mask;
 635         int sd_vpclk_phase_reset = 0;
 636
 637         if (chip->cur_clk == clk)
 638                 return STATUS_SUCCESS;
 639
 640         min_N = 60;
 641         max_N = 120;
 642         max_div = CLK_DIV_4;
 643
 644         RTSX_DEBUGP("Switch SSC clock to %dMHz (cur_clk = %d)\n", clk, chip->cur_clk);
 645
 646         if ((clk <= 2) || (N > max_N))
 647                 TRACE_RET(chip, STATUS_FAIL);
 648
 649         mcu_cnt = (u8)(125/clk + 3);
 650         if (mcu_cnt > 7)
 651                 mcu_cnt = 7;
 652
 653         div = CLK_DIV_1;
 654         while ((N < min_N) && (div < max_div)) {
 655                 N = (N + 2) * 2 - 2;
 656                 div++;
 657         }
 658         RTSX_DEBUGP("N = %d, div = %d\n", N, div);
 659
 660         if (chip->ssc_en) {
 661                 ssc_depth = 0x01;
 662                 N -= 2;
 663         } else {
 664                 ssc_depth = 0;
 665         }
 666
 667         ssc_depth_mask = 0x03;
 668
 669         RTSX_DEBUGP("ssc_depth = %d\n", ssc_depth);
 670
 671         rtsx_init_cmd(chip);
 672         rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
 673         rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
 674         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0);
 675         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL2, ssc_depth_mask, ssc_depth);
 676         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, N);
 677         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB);
 678         if (sd_vpclk_phase_reset) {
 679                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
 680                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET);
 681         }
 682
 683         retval = rtsx_send_cmd(chip, 0, WAIT_TIME);
 684         if (retval < 0)
 685                 TRACE_RET(chip, STATUS_ERROR);
 686
 687         udelay(10);
 688         RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, 0);
 689
 690         chip->cur_clk = clk;
 691
 692         return STATUS_SUCCESS;
 693 }
 694
 695 int switch_normal_clock(struct rtsx_chip *chip, int clk)
 696 {
 697         u8 sel, div, mcu_cnt;
 698         int sd_vpclk_phase_reset = 0;
 699
 700         if (chip->cur_clk == clk)
 701                 return STATUS_SUCCESS;
 702
 703         switch (clk) {
 704         case CLK_20:
 705                 RTSX_DEBUGP("Switch clock to 20MHz\n");
 706                 sel = SSC_80;
 707                 div = CLK_DIV_4;
 708                 mcu_cnt = 7;
 709                 break;
 710
 711         case CLK_30:
 712                 RTSX_DEBUGP("Switch clock to 30MHz\n");
 713                 sel = SSC_120;
 714                 div = CLK_DIV_4;
 715                 mcu_cnt = 7;
 716                 break;
 717
 718         case CLK_40:
 719                 RTSX_DEBUGP("Switch clock to 40MHz\n");
 720                 sel = SSC_80;
 721                 div = CLK_DIV_2;
 722                 mcu_cnt = 7;
 723                 break;
 724
 725         case CLK_50:
 726                 RTSX_DEBUGP("Switch clock to 50MHz\n");
 727                 sel = SSC_100;
 728                 div = CLK_DIV_2;
 729                 mcu_cnt = 6;
 730                 break;
 731
 732         case CLK_60:
 733                 RTSX_DEBUGP("Switch clock to 60MHz\n");
 734                 sel = SSC_120;
 735                 div = CLK_DIV_2;
 736                 mcu_cnt = 6;
 737                 break;
 738
 739         case CLK_80:
 740                 RTSX_DEBUGP("Switch clock to 80MHz\n");
 741                 sel = SSC_80;
 742                 div = CLK_DIV_1;
 743                 mcu_cnt = 5;
 744                 break;
 745
 746         case CLK_100:
 747                 RTSX_DEBUGP("Switch clock to 100MHz\n");
 748                 sel = SSC_100;
 749                 div = CLK_DIV_1;
 750                 mcu_cnt = 5;
 751                 break;
 752
 753         case CLK_120:
 754                 RTSX_DEBUGP("Switch clock to 120MHz\n");
 755                 sel = SSC_120;
 756                 div = CLK_DIV_1;
 757                 mcu_cnt = 5;
 758                 break;
 759
 760         case CLK_150:
 761                 RTSX_DEBUGP("Switch clock to 150MHz\n");
 762                 sel = SSC_150;
 763                 div = CLK_DIV_1;
 764                 mcu_cnt = 4;
 765                 break;
 766
 767         case CLK_200:
 768                 RTSX_DEBUGP("Switch clock to 200MHz\n");
 769                 sel = SSC_200;
 770                 div = CLK_DIV_1;
 771                 mcu_cnt = 4;
 772                 break;
 773
 774         default:
 775                 RTSX_DEBUGP("Try to switch to an illegal clock (%d)\n", clk);
 776                 TRACE_RET(chip, STATUS_FAIL);
 777         }
 778
 779         RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ);
 780         if (sd_vpclk_phase_reset) {
 781                 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
 782                 RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET, 0);
 783         }
 784         RTSX_WRITE_REG(chip, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
 785         RTSX_WRITE_REG(chip, CLK_SEL, 0xFF, sel);
 786
 787         if (sd_vpclk_phase_reset) {
 788                 udelay(200);
 789                 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET);
 790                 RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET);
 791                 udelay(200);
 792         }
 793         RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, 0);
 794
 795         chip->cur_clk = clk;
 796
 797         return STATUS_SUCCESS;
 798 }
 799
 800 void trans_dma_enable(enum dma_data_direction dir, struct rtsx_chip *chip, u32 byte_cnt, u8 pack_size)
 801 {
 802         if (pack_size > DMA_1024)
 803                 pack_size = DMA_512;
 804
 805         rtsx_add_cmd(chip, WRITE_REG_CMD, IRQSTAT0, DMA_DONE_INT, DMA_DONE_INT);
 806
 807         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(byte_cnt >> 24));
 808         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(byte_cnt >> 16));
 809         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(byte_cnt >> 8));
 810         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC0, 0xFF, (u8)byte_cnt);
 811
 812         if (dir == DMA_FROM_DEVICE) {
 813                 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL, 0x03 | DMA_PACK_SIZE_MASK,
 814                              DMA_DIR_FROM_CARD | DMA_EN | pack_size);
 815         } else {
 816                 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL, 0x03 | DMA_PACK_SIZE_MASK,
 817                              DMA_DIR_TO_CARD | DMA_EN | pack_size);
 818         }
 819
 820         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
 821 }
 822
 823 int enable_card_clock(struct rtsx_chip *chip, u8 card)
 824 {
 825         u8 clk_en = 0;
 826
 827         if (card & XD_CARD)
 828                 clk_en |= XD_CLK_EN;
 829         if (card & SD_CARD)
 830                 clk_en |= SD_CLK_EN;
 831         if (card & MS_CARD)
 832                 clk_en |= MS_CLK_EN;
 833
 834         RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, clk_en);
 835
 836         return STATUS_SUCCESS;
 837 }
 838
 839 int disable_card_clock(struct rtsx_chip *chip, u8 card)
 840 {
 841         u8 clk_en = 0;
 842
 843         if (card & XD_CARD)
 844                 clk_en |= XD_CLK_EN;
 845         if (card & SD_CARD)
 846                 clk_en |= SD_CLK_EN;
 847         if (card & MS_CARD)
 848                 clk_en |= MS_CLK_EN;
 849
 850         RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, 0);
 851
 852         return STATUS_SUCCESS;
 853 }
 854
 855 int card_power_on(struct rtsx_chip *chip, u8 card)
 856 {
 857         int retval;
 858         u8 mask, val1, val2;
 859
 860         if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
 861                 mask = MS_POWER_MASK;
 862                 val1 = MS_PARTIAL_POWER_ON;
 863                 val2 = MS_POWER_ON;
 864         } else {
 865                 mask = SD_POWER_MASK;
 866                 val1 = SD_PARTIAL_POWER_ON;
 867                 val2 = SD_POWER_ON;
 868         }
 869
 870         rtsx_init_cmd(chip);
 871         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1);
 872
 873         retval = rtsx_send_cmd(chip, 0, 100);
 874         if (retval != STATUS_SUCCESS)
 875                 TRACE_RET(chip, STATUS_FAIL);
 876
 877         udelay(chip->pmos_pwr_on_interval);
 878
 879         rtsx_init_cmd(chip);
 880         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2);
 881
 882         retval = rtsx_send_cmd(chip, 0, 100);
 883         if (retval != STATUS_SUCCESS)
 884                 TRACE_RET(chip, STATUS_FAIL);
 885
 886         return STATUS_SUCCESS;
 887 }
 888
 889 int card_power_off(struct rtsx_chip *chip, u8 card)
 890 {
 891         u8 mask, val;
 892
 893         if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
 894                 mask = MS_POWER_MASK;
 895                 val = MS_POWER_OFF;
 896         } else {
 897                 mask = SD_POWER_MASK;
 898                 val = SD_POWER_OFF;
 899         }
 900
 901         RTSX_WRITE_REG(chip, CARD_PWR_CTL, mask, val);
 902
 903         return STATUS_SUCCESS;
 904 }
 905
 906 int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 sec_addr, u16 sec_cnt)
 907 {
 908         int retval;
 909         unsigned int lun = SCSI_LUN(srb);
 910         int i;
 911
 912         if (chip->rw_card[lun] == NULL)
 913                 TRACE_RET(chip, STATUS_FAIL);
 914
 915         for (i = 0; i < 3; i++) {
 916                 chip->rw_need_retry = 0;
 917
 918                 retval = chip->rw_card[lun](srb, chip, sec_addr, sec_cnt);
 919                 if (retval != STATUS_SUCCESS) {
 920                         if (rtsx_check_chip_exist(chip) != STATUS_SUCCESS) {
 921                                 rtsx_release_chip(chip);
 922                                 TRACE_RET(chip, STATUS_FAIL);
 923                         }
 924                         if (detect_card_cd(chip, chip->cur_card) != STATUS_SUCCESS)
 925                                 TRACE_RET(chip, STATUS_FAIL);
 926
 927                         if (!chip->rw_need_retry) {
 928                                 RTSX_DEBUGP("RW fail, but no need to retry\n");
 929                                 break;
 930                         }
 931                 } else {
 932                         chip->rw_need_retry = 0;
 933                         break;
 934                 }
 935
 936                 RTSX_DEBUGP("Retry RW, (i = %d)\n", i);
 937         }
 938
 939         return retval;
 940 }
 941
 942 int card_share_mode(struct rtsx_chip *chip, int card)
 943 {
 944         u8 mask, value;
 945
 946         if (CHECK_PID(chip, 0x5208)) {
 947                 mask = CARD_SHARE_MASK;
 948                 if (card == SD_CARD)
 949                         value = CARD_SHARE_48_SD;
 950                 else if (card == MS_CARD)
 951                         value = CARD_SHARE_48_MS;
 952                 else if (card == XD_CARD)
 953                         value = CARD_SHARE_48_XD;
 954                 else
 955                         TRACE_RET(chip, STATUS_FAIL);
 956
 957         } else if (CHECK_PID(chip, 0x5288)) {
 958                 mask = 0x03;
 959                 if (card == SD_CARD)
 960                         value = CARD_SHARE_BAROSSA_SD;
 961                 else if (card == MS_CARD)
 962                         value = CARD_SHARE_BAROSSA_MS;
 963                 else if (card == XD_CARD)
 964                         value = CARD_SHARE_BAROSSA_XD;
 965                 else
 966                         TRACE_RET(chip, STATUS_FAIL);
 967
 968         } else {
 969                 TRACE_RET(chip, STATUS_FAIL);
 970         }
 971
 972         RTSX_WRITE_REG(chip, CARD_SHARE_MODE, mask, value);
 973
 974         return STATUS_SUCCESS;
 975 }
 976
 977
 978 int select_card(struct rtsx_chip *chip, int card)
 979 {
 980         int retval;
 981
 982         if (chip->cur_card != card) {
 983                 u8 mod;
 984
 985                 if (card == SD_CARD)
 986                         mod = SD_MOD_SEL;
 987                 else if (card == MS_CARD)
 988                         mod = MS_MOD_SEL;
 989                 else if (card == XD_CARD)
 990                         mod = XD_MOD_SEL;
 991                 else if (card == SPI_CARD)
 992                         mod = SPI_MOD_SEL;
 993                 else
 994                         TRACE_RET(chip, STATUS_FAIL);
 995
 996                 RTSX_WRITE_REG(chip, CARD_SELECT, 0x07, mod);
 997                 chip->cur_card = card;
 998
 999                 retval =  card_share_mode(chip, card);
1000                 if (retval != STATUS_SUCCESS)
1001                         TRACE_RET(chip, STATUS_FAIL);
1002         }
1003
1004         return STATUS_SUCCESS;
1005 }
1006
1007 void toggle_gpio(struct rtsx_chip *chip, u8 gpio)
1008 {
1009         u8 temp_reg;
1010
1011         rtsx_read_register(chip, CARD_GPIO, &temp_reg);
1012         temp_reg ^= (0x01 << gpio);
1013         rtsx_write_register(chip, CARD_GPIO, 0xFF, temp_reg);
1014 }
1015
1016 void turn_on_led(struct rtsx_chip *chip, u8 gpio)
1017 {
1018         if (CHECK_PID(chip, 0x5288))
1019                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), (u8)(1 << gpio));
1020         else
1021                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1022 }
1023
1024 void turn_off_led(struct rtsx_chip *chip, u8 gpio)
1025 {
1026         if (CHECK_PID(chip, 0x5288))
1027                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1028         else
1029                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), (u8)(1 << gpio));
1030 }
1031
1032 int detect_card_cd(struct rtsx_chip *chip, int card)
1033 {
1034         u32 card_cd, status;
1035
1036         if (card == SD_CARD) {
1037                 card_cd = SD_EXIST;
1038         } else if (card == MS_CARD) {
1039                 card_cd = MS_EXIST;
1040         } else if (card == XD_CARD) {
1041                 card_cd = XD_EXIST;
1042         } else {
1043                 RTSX_DEBUGP("Wrong card type: 0x%x\n", card);
1044                 TRACE_RET(chip, STATUS_FAIL);
1045         }
1046
1047         status = rtsx_readl(chip, RTSX_BIPR);
1048         if (!(status & card_cd))
1049                 TRACE_RET(chip, STATUS_FAIL);
1050
1051         return STATUS_SUCCESS;
1052 }
1053
1054 int check_card_exist(struct rtsx_chip *chip, unsigned int lun)
1055 {
1056         if (chip->card_exist & chip->lun2card[lun])
1057                 return 1;
1058
1059         return 0;
1060 }
1061
1062 int check_card_ready(struct rtsx_chip *chip, unsigned int lun)
1063 {
1064         if (chip->card_ready & chip->lun2card[lun])
1065                 return 1;
1066
1067         return 0;
1068 }
1069
1070 int check_card_wp(struct rtsx_chip *chip, unsigned int lun)
1071 {
1072         if (chip->card_wp & chip->lun2card[lun])
1073                 return 1;
1074
1075         return 0;
1076 }
1077
1078 int check_card_fail(struct rtsx_chip *chip, unsigned int lun)
1079 {
1080         if (chip->card_fail & chip->lun2card[lun])
1081                 return 1;
1082
1083         return 0;
1084 }
1085
1086 int check_card_ejected(struct rtsx_chip *chip, unsigned int lun)
1087 {
1088         if (chip->card_ejected & chip->lun2card[lun])
1089                 return 1;
1090
1091         return 0;
1092 }
1093
1094 u8 get_lun_card(struct rtsx_chip *chip, unsigned int lun)
1095 {
1096         if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD)
1097                 return (u8)XD_CARD;
1098         else if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD)
1099                 return (u8)SD_CARD;
1100         else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD)
1101                 return (u8)MS_CARD;
1102
1103         return 0;
1104 }
1105
1106 void eject_card(struct rtsx_chip *chip, unsigned int lun)
1107 {
1108         do_remaining_work(chip);
1109
1110         if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) {
1111                 release_sd_card(chip);
1112                 chip->card_ejected |= SD_CARD;
1113                 chip->card_ready &= ~SD_CARD;
1114                 chip->capacity[lun] = 0;
1115         } else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) {
1116                 release_xd_card(chip);
1117                 chip->card_ejected |= XD_CARD;
1118                 chip->card_ready &= ~XD_CARD;
1119                 chip->capacity[lun] = 0;
1120         } else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) {
1121                 release_ms_card(chip);
1122                 chip->card_ejected |= MS_CARD;
1123                 chip->card_ready &= ~MS_CARD;
1124                 chip->capacity[lun] = 0;
1125         }
1126 }