Pileus Git - ~andy/linux/blob - drivers/staging/rts5139/rts51x_chip.c

   1 /* Driver for Realtek RTS51xx USB card reader
   2  *
   3  * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2, or (at your option) any
   8  * later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author:
  19  *   wwang (wei_wang@realsil.com.cn)
  20  *   No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
  21  * Maintainer:
  22  *   Edwin Rong (edwin_rong@realsil.com.cn)
  23  *   No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
  24  */
  25
  26 #include <linux/blkdev.h>
  27 #include <linux/kthread.h>
  28 #include <linux/sched.h>
  29 #include <linux/workqueue.h>
  30
  31 #include "debug.h"
  32 #include "trace.h"
  33 #include "rts51x.h"
  34 #include "rts51x_chip.h"
  35 #include "rts51x_card.h"
  36 #include "rts51x_transport.h"
  37 #include "xd.h"
  38 #include "ms.h"
  39 #include "sd.h"
  40
  41 static int check_sd_speed_prior(u32 sd_speed_prior)
  42 {
  43         int i, fake_para = 0;
  44
  45         /* Check the legality of sd_speed_prior */
  46         for (i = 0; i < 4; i++) {
  47                 u8 tmp = (u8) (sd_speed_prior >> (i * 8));
  48                 if ((tmp < 0x01) || (tmp > 0x04)) {
  49                         fake_para = 1;
  50                         break;
  51                 }
  52         }
  53
  54         return !fake_para;
  55 }
  56
  57 int rts51x_reset_chip(struct rts51x_chip *chip)
  58 {
  59         int retval;
  60
  61         if (CHECK_PKG(chip, LQFP48)) {
  62                 RTS51X_WRITE_REG(chip, CARD_PWR_CTL, LDO3318_PWR_MASK,
  63                                  LDO_SUSPEND);
  64                 RTS51X_WRITE_REG(chip, CARD_PWR_CTL, FORCE_LDO_POWERB,
  65                                  FORCE_LDO_POWERB);
  66                 RTS51X_WRITE_REG(chip, CARD_PULL_CTL1, 0x30, 0x10);
  67                 RTS51X_WRITE_REG(chip, CARD_PULL_CTL5, 0x03, 0x01);
  68                 RTS51X_WRITE_REG(chip, CARD_PULL_CTL6, 0x0C, 0x04);
  69         }
  70         if (chip->asic_code) {
  71                 RTS51X_WRITE_REG(chip, SYS_DUMMY0, NYET_MSAK, NYET_EN);
  72                 RTS51X_WRITE_REG(chip, CD_DEGLITCH_WIDTH, 0xFF, 0x08);
  73                 rts51x_write_register(chip, CD_DEGLITCH_EN, XD_CD_DEGLITCH_EN,
  74                                       0x00);
  75                 rts51x_write_register(chip, SD30_DRIVE_SEL, SD30_DRIVE_MASK,
  76                                       chip->option.sd30_pad_drive);
  77                 rts51x_write_register(chip, CARD_DRIVE_SEL, SD20_DRIVE_MASK,
  78                                       chip->option.sd20_pad_drive);
  79                 if (chip->rts5179)
  80                         rts51x_write_register(chip, CARD_PULL_CTL5, 0x03, 0x01);
  81                 if (CHECK_PKG(chip, LQFP48)) {
  82                         rts51x_write_register(chip, CARD_PULL_CTL3,
  83                                               0x80, 0x80);
  84                         rts51x_write_register(chip, CARD_PULL_CTL6,
  85                                               0xf0, 0xA0);
  86                 } else {
  87                         rts51x_write_register(chip, CARD_PULL_CTL1,
  88                                               0x30, 0x20);
  89                         rts51x_write_register(chip, CARD_PULL_CTL3,
  90                                               0x80, 0x80);
  91                         rts51x_write_register(chip, CARD_PULL_CTL6,
  92                                               0x0c, 0x08);
  93                 }
  94         }
  95         if (chip->option.sd_ctl & SUPPORT_UHS50_MMC44) {
  96                 SET_UHS50(chip);
  97                 RTS51X_DEBUGP("option enable UHS50&MMC44,sd_ctl:0x%x\n",
  98                         chip->option.sd_ctl);
  99         } else {
 100                 /* if(CHECK_PID(chip, 0x0139)&&CHECK_PKG(chip, LQFP48)) */
 101                 if ((CHECK_PID(chip, 0x0139) && CHECK_PKG(chip, LQFP48))
 102                     || chip->rts5179) {
 103                         SET_UHS50(chip);
 104                         RTS51X_DEBUGP("PID enable UHS50&MMC44\n");
 105                 } else {
 106                         CLEAR_UHS50(chip);
 107                         RTS51X_DEBUGP("PID disable UHS50&MMC44\n");
 108                 }
 109         }
 110
 111         if (chip->option.ms_errreg_fix && (chip->ic_version > 1))
 112                 rts51x_write_register(chip, 0xFD4D, 0x01, 0x01);
 113         retval = rts51x_write_phy_register(chip, 0xC2, 0x7C);
 114         if (retval != STATUS_SUCCESS)
 115                 TRACE_RET(chip, retval);
 116
 117         rts51x_init_cmd(chip);
 118
 119         /* GPIO OE */
 120         rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO, GPIO_OE, GPIO_OE);
 121         rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DMA1_CTL,
 122                        EXTEND_DMA1_ASYNC_SIGNAL, EXTEND_DMA1_ASYNC_SIGNAL);
 123
 124         retval = rts51x_send_cmd(chip, MODE_C, 100);
 125         if (retval != STATUS_SUCCESS)
 126                 TRACE_RET(chip, retval);
 127 #ifdef SUPPORT_OCP
 128         if (chip->asic_code) {
 129                 rts51x_write_register(chip, OCPCTL, MS_OCP_DETECT_EN,
 130                                       MS_OCP_DETECT_EN);
 131                 RTS51X_DEBUGP("Enable OCP detect!\n");
 132         }
 133 #endif
 134         if (chip->option.FT2_fast_mode) {
 135                 card_power_on(chip, SD_CARD | MS_CARD | XD_CARD);
 136                 wait_timeout(10);
 137         }
 138
 139         return STATUS_SUCCESS;
 140 }
 141
 142 int rts51x_init_chip(struct rts51x_chip *chip)
 143 {
 144         int retval;
 145         u8 val;
 146
 147         chip->max_lun = 0;
 148         chip->cur_clk = 0;
 149         chip->cur_card = 0;
 150
 151         chip->card2lun[XD_CARD] = 0;
 152         chip->card2lun[SD_CARD] = 0;
 153         chip->card2lun[MS_CARD] = 0;
 154         chip->card_ejected = 0;
 155
 156         chip->lun2card[0] = XD_CARD | SD_CARD | MS_CARD;
 157 #ifdef CLOSE_SSC_POWER
 158         rts51x_write_register(chip, FPDCTL, SSC_POWER_MASK, SSC_POWER_ON);
 159         udelay(100);
 160         rts51x_write_register(chip, CLK_DIV, CLK_CHANGE, 0x00);
 161 #endif
 162         RTS51X_SET_STAT(chip, STAT_RUN);
 163
 164         RTS51X_READ_REG(chip, HW_VERSION, &val);
 165         RTS51X_DEBUGP("HW_VERSION: 0x%x\n", val);
 166         if (val & FPGA_VER) {
 167                 chip->asic_code = 0;
 168                 RTS51X_DEBUGP("FPGA!\n");
 169         } else {
 170                 chip->asic_code = 1;
 171                 RTS51X_DEBUGP("ASIC!\n");
 172         }
 173         chip->ic_version = val & HW_VER_MASK;
 174
 175         if (!check_sd_speed_prior(chip->option.sd_speed_prior))
 176                 chip->option.sd_speed_prior = 0x01020403;
 177         RTS51X_DEBUGP("sd_speed_prior = 0x%08x\n",
 178                        chip->option.sd_speed_prior);
 179
 180         RTS51X_READ_REG(chip, CARD_SHARE_MODE, &val);
 181         if (val & CARD_SHARE_LQFP_SEL) {
 182                 chip->package = LQFP48;
 183                 RTS51X_DEBUGP("Package: LQFP48\n");
 184         } else {
 185                 chip->package = QFN24;
 186                 RTS51X_DEBUGP("Package: QFN24\n");
 187         }
 188
 189         RTS51X_READ_REG(chip, HS_USB_STAT, &val);
 190         if (val & USB_HI_SPEED) {
 191                 chip->usb_speed = USB_20;
 192                 RTS51X_DEBUGP("USB High Speed\n");
 193         } else {
 194                 chip->usb_speed = USB_11;
 195                 RTS51X_DEBUGP("USB Full Speed\n");
 196         }
 197
 198         RTS51X_READ_REG(chip, CFG_MODE_1, &val);
 199         if (val & RTS5179) {
 200                 chip->rts5179 = 1;
 201                 RTS51X_DEBUGP("device is rts5179\n");
 202         } else {
 203                 chip->rts5179 = 0;
 204         }
 205
 206         retval = rts51x_reset_chip(chip);
 207         if (retval != STATUS_SUCCESS)
 208                 TRACE_RET(chip, STATUS_FAIL);
 209
 210         return STATUS_SUCCESS;
 211 }
 212
 213 int rts51x_release_chip(struct rts51x_chip *chip)
 214 {
 215         xd_free_l2p_tbl(chip);
 216         ms_free_l2p_tbl(chip);
 217         chip->card_ready = 0;
 218         return STATUS_SUCCESS;
 219 }
 220
 221 static inline void rts51x_blink_led(struct rts51x_chip *chip)
 222 {
 223         /* Read/Write */
 224         if (chip->card_ready) {
 225                 if (chip->led_toggle_counter <
 226                                 chip->option.led_toggle_interval) {
 227                         chip->led_toggle_counter++;
 228                 } else {
 229                         chip->led_toggle_counter = 0;
 230                         toggle_gpio(chip, LED_GPIO);
 231                 }
 232         }
 233 }
 234
 235 static void rts51x_auto_delink_cmd(struct rts51x_chip *chip)
 236 {
 237         rts51x_write_register(chip, AUTO_DELINK_EN,
 238                         AUTO_DELINK, AUTO_DELINK);
 239 }
 240
 241 static void rts51x_auto_delink_force_cmd(struct rts51x_chip *chip)
 242 {
 243         rts51x_write_register(chip, AUTO_DELINK_EN,
 244                         AUTO_DELINK | FORCE_DELINK,
 245                         AUTO_DELINK | FORCE_DELINK);
 246 }
 247
 248 #ifdef USING_POLLING_CYCLE_DELINK
 249 /* using polling cycle as delink time */
 250 static void rts51x_auto_delink_polling_cycle(struct rts51x_chip *chip)
 251 {
 252         if (chip->auto_delink_counter <=
 253                         chip->option.delink_delay * 2) {
 254                 if (chip->auto_delink_counter ==
 255                     chip->option.delink_delay) {
 256                         if (chip->card_exist) {
 257                                 /* False card */
 258                                 if (!chip->card_ejected) {
 259                                         /* if card is not ejected or safely
 260                                          * remove,then do force delink */
 261                                         RTS51X_DEBUGP("False card inserted,"
 262                                                         "do force delink\n");
 263                                         rts51x_auto_delink_force_cmd(chip);
 264                                         chip->auto_delink_counter =
 265                                             chip->option.delink_delay * 2 + 1;
 266                                 }
 267                         } else {
 268                                 RTS51X_DEBUGP("No card inserted, do delink\n");
 269                                 /* rts51x_write_register(chip, CARD_PWR_CTL,
 270                                                 DV3318_AUTO_PWR_OFF, 0); */
 271                                 rts51x_auto_delink_cmd(chip);
 272                         }
 273                 }
 274                 if (chip->auto_delink_counter ==
 275                     chip->option.delink_delay * 2) {
 276                         RTS51X_DEBUGP("Try to do force delink\n");
 277                         rts51x_auto_delink_force_cmd(chip);
 278                 }
 279                 chip->auto_delink_counter++;
 280         }
 281 }
 282
 283 static void rts51x_auto_delink(struct rts51x_chip *chip)
 284 {
 285         rts51x_auto_delink_polling_cycle(chip);
 286 }
 287 #else
 288 /* some of called funcs are not implemented, so comment it out */
 289 static void rts51x_auto_delink(struct rts51x_chip *chip)
 290 {
 291 }
 292 #endif
 293
 294 void rts51x_polling_func(struct rts51x_chip *chip)
 295 {
 296
 297         rts51x_init_cards(chip);
 298
 299 #ifdef SUPPORT_OCP
 300         /* if OCP happen and card exist, then close card OE */
 301         if ((chip->ocp_stat & (MS_OCP_NOW | MS_OCP_EVER)) &&
 302                         (chip->card_exist)) {
 303
 304                 rts51x_prepare_run(chip);
 305
 306                 if (chip->card_exist & SD_CARD)
 307                         rts51x_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
 308                 else if (chip->card_exist & MS_CARD)
 309                         rts51x_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
 310                 else if (chip->card_exist & XD_CARD)
 311                         rts51x_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0);
 312         }
 313 #endif
 314
 315         if (chip->idle_counter < IDLE_MAX_COUNT) {
 316                 chip->idle_counter++;
 317         } else {
 318                 if (!RTS51X_CHK_STAT(chip, STAT_IDLE)) {
 319                         RTS51X_DEBUGP("Idle state!\n");
 320                         RTS51X_SET_STAT(chip, STAT_IDLE);
 321                         chip->led_toggle_counter = 0;
 322                         /* Idle state, turn off LED
 323                          * to reduce power consumption */
 324                         if (chip->option.led_always_on
 325                             && (chip->card_exist &
 326                                 (SD_CARD | MS_CARD | XD_CARD))
 327                             && (!chip->card_ejected)) {
 328                                 turn_on_led(chip, LED_GPIO);
 329                         } else {
 330                                 if (chip->rts5179) {
 331                                         rts51x_ep0_write_register(chip,
 332                                                                   CARD_GPIO,
 333                                                                   0x03, 0x00);
 334                                 } else {
 335                                         turn_off_led(chip, LED_GPIO);
 336                                 }
 337
 338                         }
 339
 340 #ifdef CLOSE_SSC_POWER
 341                         if (!chip->card_ready) {
 342                                 rts51x_write_register(chip, CLK_DIV, CLK_CHANGE,
 343                                                       CLK_CHANGE);
 344                                 rts51x_write_register(chip, FPDCTL,
 345                                                       SSC_POWER_MASK,
 346                                                       SSC_POWER_DOWN);
 347                                 RTS51X_DEBUGP("Close SSC clock power!\n");
 348                         }
 349 #endif
 350                 }
 351         }
 352
 353         switch (RTS51X_GET_STAT(chip)) {
 354         case STAT_RUN:
 355                 rts51x_blink_led(chip);
 356                 do_remaining_work(chip);
 357                 break;
 358
 359         case STAT_IDLE:
 360                 break;
 361
 362         default:
 363                 break;
 364         }
 365
 366         if (chip->option.auto_delink_en && !chip->card_ready) {
 367                 rts51x_auto_delink(chip);
 368         } else {
 369                 chip->auto_delink_counter = 0;
 370         }
 371 }
 372
 373 void rts51x_add_cmd(struct rts51x_chip *chip,
 374                     u8 cmd_type, u16 reg_addr, u8 mask, u8 data)
 375 {
 376         int i;
 377
 378         if (chip->cmd_idx < ((CMD_BUF_LEN - CMD_OFFSET) / 4)) {
 379                 i = CMD_OFFSET + chip->cmd_idx * 4;
 380                 chip->cmd_buf[i++] =
 381                     ((cmd_type & 0x03) << 6) | (u8) ((reg_addr >> 8) & 0x3F);
 382                 chip->cmd_buf[i++] = (u8) reg_addr;
 383                 chip->cmd_buf[i++] = mask;
 384                 chip->cmd_buf[i++] = data;
 385                 chip->cmd_idx++;
 386         }
 387 }
 388
 389 int rts51x_send_cmd(struct rts51x_chip *chip, u8 flag, int timeout)
 390 {
 391         int result;
 392
 393         chip->cmd_buf[CNT_H] = (u8) (chip->cmd_idx >> 8);
 394         chip->cmd_buf[CNT_L] = (u8) (chip->cmd_idx);
 395         chip->cmd_buf[STAGE_FLAG] = flag;
 396
 397         result = rts51x_transfer_data_rcc(chip, SND_BULK_PIPE(chip),
 398                                           (void *)(chip->cmd_buf),
 399                                           chip->cmd_idx * 4 + CMD_OFFSET,
 400                                           0, NULL, timeout, MODE_C);
 401         if (result != STATUS_SUCCESS)
 402                 TRACE_RET(chip, result);
 403
 404         return STATUS_SUCCESS;
 405 }
 406
 407 int rts51x_get_rsp(struct rts51x_chip *chip, int rsp_len, int timeout)
 408 {
 409         int result;
 410
 411         if (rsp_len <= 0)
 412                 TRACE_RET(chip, STATUS_ERROR);
 413         /* rsp_len must aligned to dword */
 414         if (rsp_len % 4)
 415                 rsp_len += (4 - rsp_len % 4);
 416
 417         result = rts51x_transfer_data_rcc(chip, RCV_BULK_PIPE(chip),
 418                                           (void *)chip->rsp_buf, rsp_len,
 419                                           0, NULL, timeout, STAGE_R);
 420         if (result != STATUS_SUCCESS)
 421                 TRACE_RET(chip, result);
 422
 423         return STATUS_SUCCESS;
 424 }
 425
 426 int rts51x_get_card_status(struct rts51x_chip *chip, u16 *status)
 427 {
 428         int retval;
 429         u16 val;
 430
 431 #ifdef GET_CARD_STATUS_USING_EPC
 432         retval = rts51x_get_epc_status(chip, &val);
 433
 434         if (retval != STATUS_SUCCESS)
 435                 TRACE_RET(chip, retval);
 436 #else
 437         retval = rts51x_ctrl_transfer(chip, RCV_CTRL_PIPE(chip), 0x02, 0xC0,
 438                                       0, 0, &val, 2, 100);
 439         if (retval != STATUS_SUCCESS)
 440                 TRACE_RET(chip, retval);
 441 #endif
 442
 443         if (status)
 444                 *status = val;
 445
 446         return STATUS_SUCCESS;
 447 }
 448
 449 int rts51x_write_register(struct rts51x_chip *chip, u16 addr, u8 mask, u8 data)
 450 {
 451         int retval;
 452
 453         rts51x_init_cmd(chip);
 454         rts51x_add_cmd(chip, WRITE_REG_CMD, addr, mask, data);
 455         retval = rts51x_send_cmd(chip, MODE_C, 100);
 456         if (retval != STATUS_SUCCESS)
 457                 TRACE_RET(chip, STATUS_FAIL);
 458
 459         return STATUS_SUCCESS;
 460 }
 461
 462 int rts51x_read_register(struct rts51x_chip *chip, u16 addr, u8 *data)
 463 {
 464         int retval;
 465
 466         if (data)
 467                 *data = 0;
 468         rts51x_init_cmd(chip);
 469         rts51x_add_cmd(chip, READ_REG_CMD, addr, 0, 0);
 470         retval = rts51x_send_cmd(chip, MODE_CR, 100);
 471         if (retval != STATUS_SUCCESS)
 472                 TRACE_RET(chip, STATUS_FAIL);
 473
 474         retval = rts51x_get_rsp(chip, 1, 100);
 475
 476         if (retval != STATUS_SUCCESS)
 477                 TRACE_RET(chip, STATUS_FAIL);
 478
 479         if (data)
 480                 *data = chip->rsp_buf[0];
 481
 482         return STATUS_SUCCESS;
 483 }
 484
 485 int rts51x_ep0_write_register(struct rts51x_chip *chip, u16 addr, u8 mask,
 486                               u8 data)
 487 {
 488         int retval;
 489         u16 value = 0, index = 0;
 490
 491         value |= (u16) (3 & 0x03) << 14;
 492         value |= (u16) (addr & 0x3FFF);
 493         index |= (u16) mask << 8;
 494         index |= (u16) data;
 495
 496         retval = rts51x_ctrl_transfer(chip, SND_CTRL_PIPE(chip), 0x00, 0x40,
 497                                       cpu_to_be16(value), cpu_to_be16(index),
 498                                       NULL, 0, 100);
 499         if (retval != STATUS_SUCCESS)
 500                 TRACE_RET(chip, retval);
 501
 502         return STATUS_SUCCESS;
 503 }
 504
 505 int rts51x_ep0_read_register(struct rts51x_chip *chip, u16 addr, u8 *data)
 506 {
 507         int retval;
 508         u16 value = 0;
 509         u8 val;
 510
 511         if (data)
 512                 *data = 0;
 513
 514         value |= (u16) (2 & 0x03) << 14;
 515         value |= (u16) (addr & 0x3FFF);
 516
 517         retval = rts51x_ctrl_transfer(chip, RCV_CTRL_PIPE(chip), 0x00, 0xC0,
 518                                       cpu_to_be16(value), 0, &val, 1, 100);
 519         if (retval != STATUS_SUCCESS)
 520                 TRACE_RET(chip, retval);
 521
 522         if (data)
 523                 *data = val;
 524
 525         return STATUS_SUCCESS;
 526 }
 527
 528 int rts51x_seq_write_register(struct rts51x_chip *chip, u16 addr, u16 len,
 529                               u8 *data)
 530 {
 531         int result;
 532         u16 cmd_len = len + 12;
 533
 534         if (!data)
 535                 TRACE_RET(chip, STATUS_ERROR);
 536
 537         cmd_len = (cmd_len <= CMD_BUF_LEN) ? cmd_len : CMD_BUF_LEN;
 538
 539         /* cmd_len must aligned to dword */
 540         if (cmd_len % 4)
 541                 cmd_len += (4 - cmd_len % 4);
 542
 543         chip->cmd_buf[0] = 'R';
 544         chip->cmd_buf[1] = 'T';
 545         chip->cmd_buf[2] = 'C';
 546         chip->cmd_buf[3] = 'R';
 547         chip->cmd_buf[PACKET_TYPE] = SEQ_WRITE;
 548         chip->cmd_buf[5] = (u8) (len >> 8);
 549         chip->cmd_buf[6] = (u8) len;
 550         chip->cmd_buf[STAGE_FLAG] = 0;
 551         chip->cmd_buf[8] = (u8) (addr >> 8);
 552         chip->cmd_buf[9] = (u8) addr;
 553
 554         memcpy(chip->cmd_buf + 12, data, len);
 555
 556         result = rts51x_transfer_data_rcc(chip, SND_BULK_PIPE(chip),
 557                                           (void *)(chip->cmd_buf), cmd_len, 0,
 558                                           NULL, 100, MODE_C);
 559         if (result != STATUS_SUCCESS)
 560                 TRACE_RET(chip, result);
 561
 562         return STATUS_SUCCESS;
 563 }
 564
 565 int rts51x_seq_read_register(struct rts51x_chip *chip, u16 addr, u16 len,
 566                              u8 *data)
 567 {
 568         int result;
 569         u16 rsp_len;
 570
 571         if (!data)
 572                 TRACE_RET(chip, STATUS_ERROR);
 573         /* rsp_len must aligned to dword */
 574         if (len % 4)
 575                 rsp_len = len + (4 - len % 4);
 576         else
 577                 rsp_len = len;
 578
 579         chip->cmd_buf[0] = 'R';
 580         chip->cmd_buf[1] = 'T';
 581         chip->cmd_buf[2] = 'C';
 582         chip->cmd_buf[3] = 'R';
 583         chip->cmd_buf[PACKET_TYPE] = SEQ_READ;
 584         chip->cmd_buf[5] = (u8) (rsp_len >> 8);
 585         chip->cmd_buf[6] = (u8) rsp_len;
 586         chip->cmd_buf[STAGE_FLAG] = STAGE_R;
 587         chip->cmd_buf[8] = (u8) (addr >> 8);
 588         chip->cmd_buf[9] = (u8) addr;
 589
 590         result = rts51x_transfer_data_rcc(chip, SND_BULK_PIPE(chip),
 591                                           (void *)(chip->cmd_buf), 12, 0, NULL,
 592                                           100, MODE_C);
 593         if (result != STATUS_SUCCESS)
 594                 TRACE_RET(chip, result);
 595
 596         result = rts51x_transfer_data_rcc(chip, RCV_BULK_PIPE(chip),
 597                                           (void *)data, rsp_len, 0, NULL, 100,
 598                                           STAGE_DI);
 599         if (result != STATUS_SUCCESS)
 600                 TRACE_RET(chip, result);
 601
 602         return STATUS_SUCCESS;
 603 }
 604
 605 int rts51x_read_ppbuf(struct rts51x_chip *chip, u8 *buf, int buf_len)
 606 {
 607         int retval;
 608
 609         if (!buf)
 610                 TRACE_RET(chip, STATUS_ERROR);
 611
 612         retval =
 613             rts51x_seq_read_register(chip, PPBUF_BASE2, (u16) buf_len, buf);
 614         if (retval != STATUS_SUCCESS)
 615                 TRACE_RET(chip, retval);
 616
 617         return STATUS_SUCCESS;
 618 }
 619
 620 int rts51x_write_ppbuf(struct rts51x_chip *chip, u8 *buf, int buf_len)
 621 {
 622         int retval;
 623
 624         if (!buf)
 625                 TRACE_RET(chip, STATUS_ERROR);
 626
 627         retval =
 628             rts51x_seq_write_register(chip, PPBUF_BASE2, (u16) buf_len, buf);
 629         if (retval != STATUS_SUCCESS)
 630                 TRACE_RET(chip, retval);
 631
 632         return STATUS_SUCCESS;
 633 }
 634
 635 int rts51x_write_phy_register(struct rts51x_chip *chip, u8 addr, u8 val)
 636 {
 637         int retval;
 638
 639         RTS51X_DEBUGP("Write 0x%x to phy register 0x%x\n", val, addr);
 640
 641         rts51x_init_cmd(chip);
 642
 643         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VSTAIN, 0xFF, val);
 644         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VCONTROL, 0xFF, addr & 0x0F);
 645         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 646         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 647         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x01);
 648         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VCONTROL, 0xFF,
 649                        (addr >> 4) & 0x0F);
 650         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 651         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 652         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x01);
 653
 654         retval = rts51x_send_cmd(chip, MODE_C, 100);
 655         if (retval != STATUS_SUCCESS)
 656                 TRACE_RET(chip, retval);
 657
 658         return STATUS_SUCCESS;
 659 }
 660
 661 int rts51x_read_phy_register(struct rts51x_chip *chip, u8 addr, u8 *val)
 662 {
 663         int retval;
 664
 665         RTS51X_DEBUGP("Read from phy register 0x%x\n", addr);
 666
 667         rts51x_init_cmd(chip);
 668
 669         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VCONTROL, 0xFF, 0x07);
 670         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 671         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 672         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x01);
 673         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VCONTROL, 0xFF,
 674                        (addr >> 4) & 0x0F);
 675         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 676         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 677         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x01);
 678         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VCONTROL, 0xFF, addr & 0x0F);
 679         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 680         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
 681         rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x01);
 682         rts51x_add_cmd(chip, READ_REG_CMD, HS_VSTAOUT, 0, 0);
 683
 684         retval = rts51x_send_cmd(chip, MODE_CR, 100);
 685         if (retval != STATUS_SUCCESS)
 686                 TRACE_RET(chip, retval);
 687
 688         retval = rts51x_get_rsp(chip, 1, 100);
 689
 690         if (retval != STATUS_SUCCESS)
 691                 TRACE_RET(chip, retval);
 692
 693         if (val)
 694                 *val = chip->rsp_buf[0];
 695
 696         RTS51X_DEBUGP("Return value: 0x%x\n", chip->rsp_buf[0]);
 697
 698         return STATUS_SUCCESS;
 699 }
 700
 701 void rts51x_do_before_power_down(struct rts51x_chip *chip)
 702 {
 703         RTS51X_DEBUGP("rts51x_do_before_power_down\n");
 704
 705         rts51x_prepare_run(chip);
 706
 707         rts51x_release_cards(chip);
 708         if (chip->rts5179)
 709                 rts51x_ep0_write_register(chip, CARD_GPIO, 0x03, 0x00);
 710         else
 711                 turn_off_led(chip, LED_GPIO);
 712
 713         chip->cur_clk = 0;
 714         chip->card_exist = 0;
 715         chip->cur_card = 0;
 716         if (chip->asic_code) {
 717                 if (CHECK_PKG(chip, LQFP48)) {
 718                         rts51x_write_register(chip, CARD_PULL_CTL3, 0x80, 0x00);
 719                         rts51x_write_register(chip, CARD_PULL_CTL6, 0xf0, 0x50);
 720                 } else {
 721                         rts51x_write_register(chip, CARD_PULL_CTL1, 0x30, 0x10);
 722                         rts51x_write_register(chip, CARD_PULL_CTL3, 0x80, 0x00);
 723                         rts51x_write_register(chip, CARD_PULL_CTL6, 0x0c, 0x04);
 724                 }
 725         }
 726         if (CHECK_PKG(chip, LQFP48))
 727                 rts51x_write_register(chip, CARD_PWR_CTL, LDO3318_PWR_MASK,
 728                                       LDO_OFF);
 729 }
 730
 731 void rts51x_clear_hw_error(struct rts51x_chip *chip)
 732 {
 733         rts51x_ep0_write_register(chip, SFSM_ED, 0xf8, 0xf8);
 734 }
 735
 736 void rts51x_prepare_run(struct rts51x_chip *chip)
 737 {
 738 #ifdef CLOSE_SSC_POWER
 739         if (RTS51X_CHK_STAT(chip, STAT_IDLE) && (!chip->card_ready)) {
 740                 rts51x_write_register(chip, FPDCTL, SSC_POWER_MASK,
 741                                       SSC_POWER_ON);
 742                 udelay(100);
 743                 RTS51X_DEBUGP("Open SSC clock power.\n");
 744
 745                 rts51x_write_register(chip, CLK_DIV, CLK_CHANGE, 0x00);
 746         }
 747 #endif
 748 }
 749
 750 #ifdef _MSG_TRACE
 751 void rts51x_trace_msg(struct rts51x_chip *chip, unsigned char *buf, int clear)
 752 {
 753         unsigned char *ptr;
 754         int i, msg_cnt;
 755
 756         if (!buf)
 757                 return;
 758
 759         ptr = buf;
 760
 761         if (chip->trace_msg[chip->msg_idx].valid)
 762                 msg_cnt = TRACE_ITEM_CNT;
 763         else
 764                 msg_cnt = chip->msg_idx;
 765         *(ptr++) = (u8) (msg_cnt >> 24);
 766         *(ptr++) = (u8) (msg_cnt >> 16);
 767         *(ptr++) = (u8) (msg_cnt >> 8);
 768         *(ptr++) = (u8) msg_cnt;
 769         RTS51X_DEBUGP("Trace message count is %d\n", msg_cnt);
 770
 771         for (i = 1; i <= msg_cnt; i++) {
 772                 int j, idx;
 773
 774                 idx = chip->msg_idx - i;
 775                 if (idx < 0)
 776                         idx += TRACE_ITEM_CNT;
 777
 778                 *(ptr++) = (u8) (chip->trace_msg[idx].line >> 8);
 779                 *(ptr++) = (u8) (chip->trace_msg[idx].line);
 780                 for (j = 0; j < MSG_FUNC_LEN; j++)
 781                         *(ptr++) = chip->trace_msg[idx].func[j];
 782                 for (j = 0; j < MSG_FILE_LEN; j++)
 783                         *(ptr++) = chip->trace_msg[idx].file[j];
 784                 for (j = 0; j < TIME_VAL_LEN; j++)
 785                         *(ptr++) = chip->trace_msg[idx].timeval_buf[j];
 786         }
 787
 788         if (clear) {
 789                 chip->msg_idx = 0;
 790                 for (i = 0; i < TRACE_ITEM_CNT; i++)
 791                         chip->trace_msg[i].valid = 0;
 792         }
 793 }
 794 #endif
 795
 796 void rts51x_pp_status(struct rts51x_chip *chip, unsigned int lun, u8 *status,
 797                       u8 status_len)
 798 {
 799         struct sd_info *sd_card = &(chip->sd_card);
 800         struct ms_info *ms_card = &(chip->ms_card);
 801         u8 card = get_lun_card(chip, lun);
 802 #ifdef SUPPORT_OC
 803         u8 oc_now_mask = 0, oc_ever_mask = 0;
 804 #endif
 805
 806         if (!status || (status_len < 32))
 807                 return;
 808         /* IC Version */
 809         status[0] = (u8) RTS51X_GET_PID(chip);
 810         status[1] = (u8) (chip->ic_version);
 811
 812         /* Auto delink mode */
 813         if (chip->option.auto_delink_en)
 814                 status[2] = 0x10;
 815         else
 816                 status[2] = 0x00;
 817
 818         /* Spec version */
 819         status[3] = 20;
 820         status[4] = 10;
 821         status[5] = 05;
 822         status[6] = 21;
 823
 824         /* Card WP */
 825         if (chip->card_wp)
 826                 status[7] = 0x20;
 827         else
 828                 status[7] = 0x00;
 829
 830 #ifdef SUPPORT_OC
 831         /* Over current status */
 832         status[8] = 0;
 833         oc_now_mask = MS_OCP_NOW;
 834         oc_ever_mask = MS_OCP_EVER;
 835
 836         if (chip->ocp_stat & oc_now_mask)
 837                 status[8] |= 0x02;
 838         if (chip->ocp_stat & oc_ever_mask)
 839                 status[8] |= 0x01;
 840 #endif
 841
 842         if (card == SD_CARD) {
 843                 if (CHK_SD(sd_card)) {
 844                         if (CHK_SD_HCXC(sd_card)) {
 845                                 if (sd_card->capacity > 0x4000000)
 846                                         /* SDXC */
 847                                         status[0x0E] = 0x02;
 848                                 else /* SDHC */
 849                                         status[0x0E] = 0x01;
 850                         } else { /* SDSC */
 851                                 status[0x0E] = 0x00;
 852                         }
 853
 854                         if (CHK_SD_SDR104(sd_card))
 855                                 status[0x0F] = 0x03;
 856                         else if (CHK_SD_DDR50(sd_card))
 857                                 status[0x0F] = 0x04;
 858                         else if (CHK_SD_SDR50(sd_card))
 859                                 status[0x0F] = 0x02;
 860                         else if (CHK_SD_HS(sd_card))
 861                                 status[0x0F] = 0x01;
 862                         else
 863                                 status[0x0F] = 0x00; /* Normal speed */
 864                 } else {
 865                         if (CHK_MMC_SECTOR_MODE(sd_card))
 866                                 status[0x0E] = 0x01; /* High capacity */
 867                         else
 868                                 status[0x0E] = 0x00; /* Normal capacity */
 869
 870                         if (CHK_MMC_DDR52(sd_card))
 871                                 status[0x0F] = 0x03; /* DDR 52M */
 872                         else if (CHK_MMC_52M(sd_card))
 873                                 status[0x0F] = 0x02; /* SDR 52M */
 874                         else if (CHK_MMC_26M(sd_card))
 875                                 status[0x0F] = 0x01; /* SDR 26M */
 876                         else
 877                                 status[0x0F] = 0x00; /* Normal speed */
 878                 }
 879         } else if (card == MS_CARD) {
 880                 if (CHK_MSPRO(ms_card)) {
 881                         if (CHK_MSXC(ms_card))
 882                                 status[0x0E] = 0x01; /* XC */
 883                         else
 884                                 status[0x0E] = 0x00;
 885
 886                         if (CHK_HG8BIT(ms_card))
 887                                 status[0x0F] = 0x01;
 888                         else
 889                                 status[0x0F] = 0x00;
 890                 }
 891         }
 892
 893         /* Function 0
 894          * Support Magic Gate, CPRM and PhyRegister R/W */
 895         status[0x18] = 0x8A;
 896
 897         /* Function 2
 898          * Support OC LUN status & WP LUN status */
 899         status[0x1A] = 0x28;
 900
 901         /* Function 2
 902          * Support OC LUN status & WP LUN status */
 903         status[0x1A] = 0x28;
 904 }
 905
 906 void rts51x_read_status(struct rts51x_chip *chip, unsigned int lun,
 907                         u8 *rts51x_status, u8 status_len)
 908 {
 909         if (!rts51x_status || (status_len < 16))
 910                 return;
 911         /* VID */
 912         rts51x_status[0] = (u8) (RTS51X_GET_VID(chip) >> 8);
 913         rts51x_status[1] = (u8) RTS51X_GET_VID(chip);
 914
 915         /* PID */
 916         rts51x_status[2] = (u8) (RTS51X_GET_PID(chip) >> 8);
 917         rts51x_status[3] = (u8) RTS51X_GET_PID(chip);
 918
 919         /* gbLUN */
 920         rts51x_status[4] = (u8) lun;
 921
 922         /* Lun Card Number */
 923         if (chip->card_exist) {
 924                 if (chip->card_exist & XD_CARD)
 925                         rts51x_status[5] = 4; /* xD Card */
 926                 else if (chip->card_exist & SD_CARD)
 927                         rts51x_status[5] = 2; /* SD Card */
 928                 else if (chip->card_exist & MS_CARD)
 929                         rts51x_status[5] = 3; /* MS Card */
 930                 else
 931                         rts51x_status[5] = 7; /* Multi */
 932         } else {
 933                 rts51x_status[5] = 7;   /* Multi */
 934         }
 935
 936         /* Total LUNs */
 937         rts51x_status[6] = 1;
 938
 939         /* IC Version */
 940         rts51x_status[7] = (u8) RTS51X_GET_PID(chip);
 941         rts51x_status[8] = chip->ic_version;
 942
 943         /* Physical Exist */
 944         if (check_card_exist(chip, lun))
 945                 rts51x_status[9] = 1;
 946         else
 947                 rts51x_status[9] = 0;
 948
 949         /* Multi Flag */
 950         rts51x_status[10] = 1;
 951
 952         /* LUN Valid Map */
 953         rts51x_status[11] = XD_CARD | SD_CARD | MS_CARD;
 954
 955         /* Logical Exist */
 956         if (check_card_ready(chip, lun))
 957                 rts51x_status[12] = 1;
 958         else
 959                 rts51x_status[12] = 0;
 960
 961         /* Detailed Type */
 962         if (get_lun_card(chip, lun) == XD_CARD) {
 963                 rts51x_status[13] = 0x40;
 964         } else if (get_lun_card(chip, lun) == SD_CARD) {
 965                 struct sd_info *sd_card = &(chip->sd_card);
 966
 967                 rts51x_status[13] = 0x20;
 968                 if (CHK_SD(sd_card)) {
 969                         if (CHK_SD_HCXC(sd_card))
 970                                 rts51x_status[13] |= 0x04; /* Hi capacity SD */
 971                         if (CHK_SD_HS(sd_card))
 972                                 rts51x_status[13] |= 0x02; /* Hi speed SD */
 973                 } else {
 974                         rts51x_status[13] |= 0x08; /* MMC card */
 975                         if (CHK_MMC_52M(sd_card))
 976                                 rts51x_status[13] |= 0x02; /* Hi speed */
 977                         if (CHK_MMC_SECTOR_MODE(sd_card))
 978                                 rts51x_status[13] |= 0x04; /* Hi capacity */
 979                 }
 980         } else if (get_lun_card(chip, lun) == MS_CARD) {
 981                 struct ms_info *ms_card = &(chip->ms_card);
 982
 983                 if (CHK_MSPRO(ms_card)) {
 984                         rts51x_status[13] = 0x38; /* MS Pro */
 985                         if (CHK_HG8BIT(ms_card))
 986                                 rts51x_status[13] |= 0x04; /* HG */
 987 #ifdef SUPPORT_MSXC
 988                         if (CHK_MSXC(ms_card))
 989                                 rts51x_status[13] |= 0x01; /* MSXC */
 990 #endif
 991                 } else {
 992                         rts51x_status[13] = 0x30;
 993                 }
 994         } else {
 995                 rts51x_status[13] = 0x70;
 996         }
 997 /* Support OC, auto delink, vendor r/w, get bus width */
 998         rts51x_status[14] = 0x78;
 999
1000         rts51x_status[15] = 0x82;
1001 }
1002
1003 int rts51x_transfer_data_rcc(struct rts51x_chip *chip, unsigned int pipe,
1004                              void *buf, unsigned int len, int use_sg,
1005                              unsigned int *act_len, int timeout, u8 stage_flag)
1006 {
1007         int retval;
1008
1009         retval =
1010             rts51x_transfer_data(chip, pipe, buf, len, use_sg, act_len,
1011                                  timeout);
1012
1013         return retval;
1014
1015 }