Pileus Git - ~andy/linux/blob - drivers/staging/rts5139/rts51x_card.c

   1 /* Driver for Realtek RTS51xx USB card reader
   2  *
   3  * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2, or (at your option) any
   8  * later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author:
  19  *   wwang (wei_wang@realsil.com.cn)
  20  *   No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
  21  * Maintainer:
  22  *   Edwin Rong (edwin_rong@realsil.com.cn)
  23  *   No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
  24  */
  25
  26 #include <linux/blkdev.h>
  27 #include <linux/kthread.h>
  28 #include <linux/sched.h>
  29 #include <linux/workqueue.h>
  30
  31 #include <scsi/scsi.h>
  32 #include <scsi/scsi_eh.h>
  33 #include <scsi/scsi_device.h>
  34
  35 #include "debug.h"
  36 #include "rts51x.h"
  37 #include "rts51x_chip.h"
  38 #include "rts51x_card.h"
  39 #include "rts51x_transport.h"
  40 #include "xd.h"
  41 #include "sd.h"
  42 #include "ms.h"
  43
  44 void do_remaining_work(struct rts51x_chip *chip)
  45 {
  46         struct sd_info *sd_card = &(chip->sd_card);
  47         struct xd_info *xd_card = &(chip->xd_card);
  48         struct ms_info *ms_card = &(chip->ms_card);
  49
  50         if (chip->card_ready & SD_CARD) {
  51                 if (sd_card->seq_mode) {
  52                         RTS51X_SET_STAT(chip, STAT_RUN);
  53                         sd_card->counter++;
  54                 } else {
  55                         sd_card->counter = 0;
  56                 }
  57         }
  58
  59         if (chip->card_ready & XD_CARD) {
  60                 if (xd_card->delay_write.delay_write_flag) {
  61                         RTS51X_SET_STAT(chip, STAT_RUN);
  62                         xd_card->counter++;
  63                 } else {
  64                         xd_card->counter = 0;
  65                 }
  66         }
  67
  68         if (chip->card_ready & MS_CARD) {
  69                 if (CHK_MSPRO(ms_card)) {
  70                         if (ms_card->seq_mode) {
  71                                 RTS51X_SET_STAT(chip, STAT_RUN);
  72                                 ms_card->counter++;
  73                         } else {
  74                                 ms_card->counter = 0;
  75                         }
  76                 } else {
  77                         if (ms_card->delay_write.delay_write_flag) {
  78                                 RTS51X_SET_STAT(chip, STAT_RUN);
  79                                 ms_card->counter++;
  80                         } else {
  81                                 ms_card->counter = 0;
  82                         }
  83                 }
  84         }
  85
  86         if (sd_card->counter > POLLING_WAIT_CNT)
  87                 sd_cleanup_work(chip);
  88
  89         if (xd_card->counter > POLLING_WAIT_CNT)
  90                 xd_cleanup_work(chip);
  91
  92         if (ms_card->counter > POLLING_WAIT_CNT)
  93                 ms_cleanup_work(chip);
  94 }
  95
  96 static void do_reset_xd_card(struct rts51x_chip *chip)
  97 {
  98         int retval;
  99
 100         if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT)
 101                 return;
 102
 103         retval = reset_xd_card(chip);
 104         if (retval == STATUS_SUCCESS) {
 105                 chip->card_ready |= XD_CARD;
 106                 chip->card_fail &= ~XD_CARD;
 107                 chip->rw_card[chip->card2lun[XD_CARD]] = xd_rw;
 108         } else {
 109                 chip->card_ready &= ~XD_CARD;
 110                 chip->card_fail |= XD_CARD;
 111                 chip->capacity[chip->card2lun[XD_CARD]] = 0;
 112                 chip->rw_card[chip->card2lun[XD_CARD]] = NULL;
 113
 114                 rts51x_init_cmd(chip);
 115                 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_OE, XD_OUTPUT_EN, 0);
 116                 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, POWER_MASK,
 117                                POWER_OFF);
 118                 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_CLK_EN, XD_CLK_EN, 0);
 119                 rts51x_send_cmd(chip, MODE_C, 100);
 120         }
 121 }
 122
 123 void do_reset_sd_card(struct rts51x_chip *chip)
 124 {
 125         int retval;
 126
 127         if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT)
 128                 return;
 129
 130         retval = reset_sd_card(chip);
 131         if (retval == STATUS_SUCCESS) {
 132                 chip->card_ready |= SD_CARD;
 133                 chip->card_fail &= ~SD_CARD;
 134                 chip->rw_card[chip->card2lun[SD_CARD]] = sd_rw;
 135         } else {
 136                 chip->card_ready &= ~SD_CARD;
 137                 chip->card_fail |= SD_CARD;
 138                 chip->capacity[chip->card2lun[SD_CARD]] = 0;
 139                 chip->rw_card[chip->card2lun[SD_CARD]] = NULL;
 140
 141                 rts51x_init_cmd(chip);
 142                 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
 143                 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, POWER_MASK,
 144                                POWER_OFF);
 145                 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
 146                 rts51x_send_cmd(chip, MODE_C, 100);
 147         }
 148 }
 149
 150 static void do_reset_ms_card(struct rts51x_chip *chip)
 151 {
 152         int retval;
 153
 154         if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT)
 155                 return;
 156
 157         retval = reset_ms_card(chip);
 158         if (retval == STATUS_SUCCESS) {
 159                 chip->card_ready |= MS_CARD;
 160                 chip->card_fail &= ~MS_CARD;
 161                 chip->rw_card[chip->card2lun[MS_CARD]] = ms_rw;
 162         } else {
 163                 chip->card_ready &= ~MS_CARD;
 164                 chip->card_fail |= MS_CARD;
 165                 chip->capacity[chip->card2lun[MS_CARD]] = 0;
 166                 chip->rw_card[chip->card2lun[MS_CARD]] = NULL;
 167
 168                 rts51x_init_cmd(chip);
 169                 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_OE, MS_OUTPUT_EN, 0);
 170                 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, POWER_MASK,
 171                                POWER_OFF);
 172                 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_CLK_EN, MS_CLK_EN, 0);
 173                 rts51x_send_cmd(chip, MODE_C, 100);
 174         }
 175 }
 176
 177 static void card_cd_debounce(struct rts51x_chip *chip, u8 *need_reset,
 178                       u8 *need_release)
 179 {
 180         int retval;
 181         u8 release_map = 0, reset_map = 0;
 182         u8 value;
 183
 184         retval = rts51x_get_card_status(chip, &(chip->card_status));
 185 #ifdef SUPPORT_OCP
 186         chip->ocp_stat = (chip->card_status >> 4) & 0x03;
 187 #endif
 188
 189         if (retval != STATUS_SUCCESS)
 190                 goto Exit_Debounce;
 191
 192         if (chip->card_exist) {
 193                 retval = rts51x_read_register(chip, CARD_INT_PEND, &value);
 194                 if (retval != STATUS_SUCCESS) {
 195                         rts51x_ep0_write_register(chip, MC_FIFO_CTL, FIFO_FLUSH,
 196                                                   FIFO_FLUSH);
 197                         rts51x_ep0_write_register(chip, SFSM_ED, 0xf8, 0xf8);
 198                         value = 0;
 199                 }
 200
 201                 if (chip->card_exist & XD_CARD) {
 202                         if (!(chip->card_status & XD_CD))
 203                                 release_map |= XD_CARD;
 204                 } else if (chip->card_exist & SD_CARD) {
 205                         /* if (!(chip->card_status & SD_CD)) { */
 206                         if (!(chip->card_status & SD_CD) || (value & SD_INT))
 207                                 release_map |= SD_CARD;
 208                 } else if (chip->card_exist & MS_CARD) {
 209                         /* if (!(chip->card_status & MS_CD)) { */
 210                         if (!(chip->card_status & MS_CD) || (value & MS_INT))
 211                                 release_map |= MS_CARD;
 212                 }
 213         } else {
 214                 if (chip->card_status & XD_CD) {
 215                         reset_map |= XD_CARD;
 216                 } else if (chip->card_status & SD_CD) {
 217                         reset_map |= SD_CARD;
 218                 } else if (chip->card_status & MS_CD) {
 219                         reset_map |= MS_CARD;
 220                 }
 221         }
 222
 223         if (CHECK_PKG(chip, QFN24) && reset_map) {
 224                 if (chip->card_exist & XD_CARD) {
 225                         reset_map = 0;
 226                         goto Exit_Debounce;
 227                 }
 228         }
 229
 230         if (reset_map) {
 231                 int xd_cnt = 0, sd_cnt = 0, ms_cnt = 0;
 232                 int i;
 233
 234                 for (i = 0; i < (chip->option.debounce_num); i++) {
 235                         retval =
 236                             rts51x_get_card_status(chip, &(chip->card_status));
 237                         if (retval != STATUS_SUCCESS) {
 238                                 reset_map = release_map = 0;
 239                                 goto Exit_Debounce;
 240                         }
 241                         if (chip->card_status & XD_CD)
 242                                 xd_cnt++;
 243                         else
 244                                 xd_cnt = 0;
 245                         if (chip->card_status & SD_CD)
 246                                 sd_cnt++;
 247                         else
 248                                 sd_cnt = 0;
 249                         if (chip->card_status & MS_CD)
 250                                 ms_cnt++;
 251                         else
 252                                 ms_cnt = 0;
 253                         wait_timeout(30);
 254                 }
 255
 256                 reset_map = 0;
 257                 if (!(chip->card_exist & XD_CARD)
 258                     && (xd_cnt > (chip->option.debounce_num - 1))) {
 259                         reset_map |= XD_CARD;
 260                 }
 261                 if (!(chip->card_exist & SD_CARD)
 262                     && (sd_cnt > (chip->option.debounce_num - 1))) {
 263                         reset_map |= SD_CARD;
 264                 }
 265                 if (!(chip->card_exist & MS_CARD)
 266                     && (ms_cnt > (chip->option.debounce_num - 1))) {
 267                         reset_map |= MS_CARD;
 268                 }
 269         }
 270         rts51x_write_register(chip, CARD_INT_PEND, XD_INT | MS_INT | SD_INT,
 271                               XD_INT | MS_INT | SD_INT);
 272
 273 Exit_Debounce:
 274         if (need_reset)
 275                 *need_reset = reset_map;
 276         if (need_release)
 277                 *need_release = release_map;
 278 }
 279
 280 void rts51x_init_cards(struct rts51x_chip *chip)
 281 {
 282         u8 need_reset = 0, need_release = 0;
 283
 284         card_cd_debounce(chip, &need_reset, &need_release);
 285
 286         if (need_release) {
 287                 RTS51X_DEBUGP("need_release = 0x%x\n", need_release);
 288
 289                 rts51x_prepare_run(chip);
 290                 RTS51X_SET_STAT(chip, STAT_RUN);
 291
 292 #ifdef SUPPORT_OCP
 293                 if (chip->ocp_stat & (MS_OCP_NOW | MS_OCP_EVER)) {
 294                         rts51x_write_register(chip, OCPCTL, MS_OCP_CLEAR,
 295                                               MS_OCP_CLEAR);
 296                         chip->ocp_stat = 0;
 297                         RTS51X_DEBUGP("Clear OCP status.\n");
 298                 }
 299 #endif
 300
 301                 if (need_release & XD_CARD) {
 302                         chip->card_exist &= ~XD_CARD;
 303                         chip->card_ejected = 0;
 304                         if (chip->card_ready & XD_CARD) {
 305                                 release_xd_card(chip);
 306                                 chip->rw_card[chip->card2lun[XD_CARD]] = NULL;
 307                                 clear_bit(chip->card2lun[XD_CARD],
 308                                           &(chip->lun_mc));
 309                         }
 310                 }
 311
 312                 if (need_release & SD_CARD) {
 313                         chip->card_exist &= ~SD_CARD;
 314                         chip->card_ejected = 0;
 315                         if (chip->card_ready & SD_CARD) {
 316                                 release_sd_card(chip);
 317                                 chip->rw_card[chip->card2lun[SD_CARD]] = NULL;
 318                                 clear_bit(chip->card2lun[SD_CARD],
 319                                           &(chip->lun_mc));
 320                         }
 321                 }
 322
 323                 if (need_release & MS_CARD) {
 324                         chip->card_exist &= ~MS_CARD;
 325                         chip->card_ejected = 0;
 326                         if (chip->card_ready & MS_CARD) {
 327                                 release_ms_card(chip);
 328                                 chip->rw_card[chip->card2lun[MS_CARD]] = NULL;
 329                                 clear_bit(chip->card2lun[MS_CARD],
 330                                           &(chip->lun_mc));
 331                         }
 332                 }
 333         }
 334
 335         if (need_reset && !chip->card_ready) {
 336                 RTS51X_DEBUGP("need_reset = 0x%x\n", need_reset);
 337
 338                 rts51x_prepare_run(chip);
 339                 RTS51X_SET_STAT(chip, STAT_RUN);
 340
 341                 if (need_reset & XD_CARD) {
 342                         chip->card_exist |= XD_CARD;
 343                         do_reset_xd_card(chip);
 344                 } else if (need_reset & SD_CARD) {
 345                         chip->card_exist |= SD_CARD;
 346                         do_reset_sd_card(chip);
 347                 } else if (need_reset & MS_CARD) {
 348                         chip->card_exist |= MS_CARD;
 349                         do_reset_ms_card(chip);
 350                 }
 351         }
 352 }
 353
 354 void rts51x_release_cards(struct rts51x_chip *chip)
 355 {
 356         if (chip->card_ready & SD_CARD) {
 357                 sd_cleanup_work(chip);
 358                 release_sd_card(chip);
 359                 chip->card_ready &= ~SD_CARD;
 360         }
 361
 362         if (chip->card_ready & XD_CARD) {
 363                 xd_cleanup_work(chip);
 364                 release_xd_card(chip);
 365                 chip->card_ready &= ~XD_CARD;
 366         }
 367
 368         if (chip->card_ready & MS_CARD) {
 369                 ms_cleanup_work(chip);
 370                 release_ms_card(chip);
 371                 chip->card_ready &= ~MS_CARD;
 372         }
 373 }
 374
 375 static inline u8 double_depth(u8 depth)
 376 {
 377         return ((depth > 1) ? (depth - 1) : depth);
 378 }
 379
 380 int switch_ssc_clock(struct rts51x_chip *chip, int clk)
 381 {
 382         struct sd_info *sd_card = &(chip->sd_card);
 383         struct ms_info *ms_card = &(chip->ms_card);
 384         int retval;
 385         u8 N = (u8) (clk - 2), min_N, max_N;
 386         u8 mcu_cnt, div, max_div, ssc_depth;
 387         int sd_vpclk_phase_reset = 0;
 388
 389         if (chip->cur_clk == clk)
 390                 return STATUS_SUCCESS;
 391
 392         min_N = 60;
 393         max_N = 120;
 394         max_div = CLK_DIV_4;
 395
 396         RTS51X_DEBUGP("Switch SSC clock to %dMHz\n", clk);
 397
 398         if ((clk <= 2) || (N > max_N))
 399                 TRACE_RET(chip, STATUS_FAIL);
 400
 401         mcu_cnt = (u8) (60 / clk + 3);
 402         if (mcu_cnt > 15)
 403                 mcu_cnt = 15;
 404         /* To make sure that the SSC clock div_n is
 405          * equal or greater than min_N */
 406         div = CLK_DIV_1;
 407         while ((N < min_N) && (div < max_div)) {
 408                 N = (N + 2) * 2 - 2;
 409                 div++;
 410         }
 411         RTS51X_DEBUGP("N = %d, div = %d\n", N, div);
 412
 413         if (chip->option.ssc_en) {
 414                 if (chip->cur_card == SD_CARD) {
 415                         if (CHK_SD_SDR104(sd_card)) {
 416                                 ssc_depth = chip->option.ssc_depth_sd_sdr104;
 417                         } else if (CHK_SD_SDR50(sd_card)) {
 418                                 ssc_depth = chip->option.ssc_depth_sd_sdr50;
 419                         } else if (CHK_SD_DDR50(sd_card)) {
 420                                 ssc_depth =
 421                                     double_depth(chip->option.
 422                                                  ssc_depth_sd_ddr50);
 423                         } else if (CHK_SD_HS(sd_card)) {
 424                                 ssc_depth =
 425                                     double_depth(chip->option.ssc_depth_sd_hs);
 426                         } else if (CHK_MMC_52M(sd_card)
 427                                    || CHK_MMC_DDR52(sd_card)) {
 428                                 ssc_depth =
 429                                     double_depth(chip->option.
 430                                                  ssc_depth_mmc_52m);
 431                         } else {
 432                                 ssc_depth =
 433                                     double_depth(chip->option.
 434                                                  ssc_depth_low_speed);
 435                         }
 436                 } else if (chip->cur_card == MS_CARD) {
 437                         if (CHK_MSPRO(ms_card)) {
 438                                 if (CHK_HG8BIT(ms_card)) {
 439                                         ssc_depth =
 440                                             double_depth(chip->option.
 441                                                          ssc_depth_ms_hg);
 442                                 } else {
 443                                         ssc_depth =
 444                                             double_depth(chip->option.
 445                                                          ssc_depth_ms_4bit);
 446                                 }
 447                         } else {
 448                                 if (CHK_MS4BIT(ms_card)) {
 449                                         ssc_depth =
 450                                             double_depth(chip->option.
 451                                                          ssc_depth_ms_4bit);
 452                                 } else {
 453                                         ssc_depth =
 454                                             double_depth(chip->option.
 455                                                          ssc_depth_low_speed);
 456                                 }
 457                         }
 458                 } else {
 459                         ssc_depth =
 460                             double_depth(chip->option.ssc_depth_low_speed);
 461                 }
 462
 463                 if (ssc_depth) {
 464                         if (div == CLK_DIV_2) {
 465                                 /* If clock divided by 2, ssc depth must
 466                                  * be multiplied by 2 */
 467                                 if (ssc_depth > 1)
 468                                         ssc_depth -= 1;
 469                                 else
 470                                         ssc_depth = SSC_DEPTH_2M;
 471                         } else if (div == CLK_DIV_4) {
 472                                 /* If clock divided by 4, ssc depth must
 473                                  * be multiplied by 4 */
 474                                 if (ssc_depth > 2)
 475                                         ssc_depth -= 2;
 476                                 else
 477                                         ssc_depth = SSC_DEPTH_2M;
 478                         }
 479                 }
 480         } else {
 481                 /* Disable SSC */
 482                 ssc_depth = 0;
 483         }
 484
 485         RTS51X_DEBUGP("ssc_depth = %d\n", ssc_depth);
 486
 487         rts51x_init_cmd(chip);
 488         rts51x_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
 489         rts51x_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0x3F,
 490                        (div << 4) | mcu_cnt);
 491         rts51x_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0);
 492         rts51x_add_cmd(chip, WRITE_REG_CMD, SSC_CTL2, SSC_DEPTH_MASK,
 493                        ssc_depth);
 494         rts51x_add_cmd(chip, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, N);
 495         if (sd_vpclk_phase_reset) {
 496                 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 497                                PHASE_NOT_RESET, 0);
 498                 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 499                                PHASE_NOT_RESET, PHASE_NOT_RESET);
 500         }
 501
 502         retval = rts51x_send_cmd(chip, MODE_C, 2000);
 503         if (retval != STATUS_SUCCESS)
 504                 TRACE_RET(chip, retval);
 505         if (chip->option.ssc_en && ssc_depth)
 506                 rts51x_write_register(chip, SSC_CTL1, 0xff, 0xD0);
 507         else
 508                 rts51x_write_register(chip, SSC_CTL1, 0xff, 0x50);
 509         udelay(100);
 510         RTS51X_WRITE_REG(chip, CLK_DIV, CLK_CHANGE, 0);
 511
 512         chip->cur_clk = clk;
 513
 514         return STATUS_SUCCESS;
 515 }
 516
 517 int switch_normal_clock(struct rts51x_chip *chip, int clk)
 518 {
 519         int retval;
 520         u8 sel, div, mcu_cnt;
 521         int sd_vpclk_phase_reset = 0;
 522
 523         if (chip->cur_clk == clk)
 524                 return STATUS_SUCCESS;
 525
 526         if (chip->cur_card == SD_CARD) {
 527                 struct sd_info *sd_card = &(chip->sd_card);
 528                 if (CHK_SD30_SPEED(sd_card) || CHK_MMC_DDR52(sd_card))
 529                         sd_vpclk_phase_reset = 1;
 530         }
 531
 532         switch (clk) {
 533         case CLK_20:
 534                 RTS51X_DEBUGP("Switch clock to 20MHz\n");
 535                 sel = SSC_80;
 536                 div = CLK_DIV_4;
 537                 mcu_cnt = 5;
 538                 break;
 539
 540         case CLK_30:
 541                 RTS51X_DEBUGP("Switch clock to 30MHz\n");
 542                 sel = SSC_60;
 543                 div = CLK_DIV_2;
 544                 mcu_cnt = 4;
 545                 break;
 546
 547         case CLK_40:
 548                 RTS51X_DEBUGP("Switch clock to 40MHz\n");
 549                 sel = SSC_80;
 550                 div = CLK_DIV_2;
 551                 mcu_cnt = 3;
 552                 break;
 553
 554         case CLK_50:
 555                 RTS51X_DEBUGP("Switch clock to 50MHz\n");
 556                 sel = SSC_100;
 557                 div = CLK_DIV_2;
 558                 mcu_cnt = 3;
 559                 break;
 560
 561         case CLK_60:
 562                 RTS51X_DEBUGP("Switch clock to 60MHz\n");
 563                 sel = SSC_60;
 564                 div = CLK_DIV_1;
 565                 mcu_cnt = 3;
 566                 break;
 567
 568         case CLK_80:
 569                 RTS51X_DEBUGP("Switch clock to 80MHz\n");
 570                 sel = SSC_80;
 571                 div = CLK_DIV_1;
 572                 mcu_cnt = 2;
 573                 break;
 574
 575         case CLK_100:
 576                 RTS51X_DEBUGP("Switch clock to 100MHz\n");
 577                 sel = SSC_100;
 578                 div = CLK_DIV_1;
 579                 mcu_cnt = 2;
 580                 break;
 581
 582         /* case CLK_120:
 583                 RTS51X_DEBUGP("Switch clock to 120MHz\n");
 584                 sel = SSC_120;
 585                 div = CLK_DIV_1;
 586                 mcu_cnt = 2;
 587                 break;
 588
 589         case CLK_150:
 590                 RTS51X_DEBUGP("Switch clock to 150MHz\n");
 591                 sel = SSC_150;
 592                 div = CLK_DIV_1;
 593                 mcu_cnt = 2;
 594                 break; */
 595
 596         default:
 597                 RTS51X_DEBUGP("Try to switch to an illegal clock (%d)\n",
 598                                clk);
 599                 TRACE_RET(chip, STATUS_FAIL);
 600         }
 601
 602         if (!sd_vpclk_phase_reset) {
 603                 rts51x_init_cmd(chip);
 604
 605                 rts51x_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE,
 606                                CLK_CHANGE);
 607                 rts51x_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0x3F,
 608                                (div << 4) | mcu_cnt);
 609                 rts51x_add_cmd(chip, WRITE_REG_CMD, SSC_CLK_FPGA_SEL, 0xFF,
 610                                sel);
 611                 rts51x_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
 612
 613                 retval = rts51x_send_cmd(chip, MODE_C, 100);
 614                 if (retval != STATUS_SUCCESS)
 615                         TRACE_RET(chip, retval);
 616         } else {
 617                 rts51x_init_cmd(chip);
 618
 619                 rts51x_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE,
 620                                CLK_CHANGE);
 621                 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 622                                PHASE_NOT_RESET, 0);
 623                 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK1_CTL,
 624                                PHASE_NOT_RESET, 0);
 625                 rts51x_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0x3F,
 626                                (div << 4) | mcu_cnt);
 627                 rts51x_add_cmd(chip, WRITE_REG_CMD, SSC_CLK_FPGA_SEL, 0xFF,
 628                                sel);
 629
 630                 retval = rts51x_send_cmd(chip, MODE_C, 100);
 631                 if (retval != STATUS_SUCCESS)
 632                         TRACE_RET(chip, retval);
 633
 634                 udelay(200);
 635
 636                 rts51x_init_cmd(chip);
 637
 638                 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 639                                PHASE_NOT_RESET, PHASE_NOT_RESET);
 640                 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK1_CTL,
 641                                PHASE_NOT_RESET, PHASE_NOT_RESET);
 642
 643                 retval = rts51x_send_cmd(chip, MODE_C, 100);
 644                 if (retval != STATUS_SUCCESS)
 645                         TRACE_RET(chip, retval);
 646
 647                 udelay(200);
 648
 649                 RTS51X_WRITE_REG(chip, CLK_DIV, CLK_CHANGE, 0);
 650         }
 651
 652         chip->cur_clk = clk;
 653
 654         return STATUS_SUCCESS;
 655 }
 656
 657 int card_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 sec_addr,
 658             u16 sec_cnt)
 659 {
 660         int retval;
 661         unsigned int lun = SCSI_LUN(srb);
 662         int i;
 663
 664         if (chip->rw_card[lun] == NULL)
 665                 return STATUS_FAIL;
 666
 667         RTS51X_DEBUGP("%s card, sector addr: 0x%x, sector cnt: %d\n",
 668                        (srb->sc_data_direction ==
 669                         DMA_TO_DEVICE) ? "Write" : "Read", sec_addr, sec_cnt);
 670
 671         chip->rw_need_retry = 0;
 672         for (i = 0; i < 3; i++) {
 673                 retval = chip->rw_card[lun] (srb, chip, sec_addr, sec_cnt);
 674                 if (retval != STATUS_SUCCESS) {
 675                         CATCH_TRIGGER(chip);
 676                         if (chip->option.reset_or_rw_fail_set_pad_drive) {
 677                                 rts51x_write_register(chip, CARD_DRIVE_SEL,
 678                                                       SD20_DRIVE_MASK,
 679                                                       DRIVE_8mA);
 680                         }
 681                 }
 682
 683                 if (!chip->rw_need_retry)
 684                         break;
 685
 686                 RTS51X_DEBUGP("Retry RW, (i = %d\n)", i);
 687         }
 688
 689         return retval;
 690 }
 691
 692 u8 get_lun_card(struct rts51x_chip *chip, unsigned int lun)
 693 {
 694         if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD)
 695                 return (u8) XD_CARD;
 696         else if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD)
 697                 return (u8) SD_CARD;
 698         else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD)
 699                 return (u8) MS_CARD;
 700
 701         return 0;
 702 }
 703
 704 static int card_share_mode(struct rts51x_chip *chip, int card)
 705 {
 706         u8 value;
 707
 708         if (card == SD_CARD)
 709                 value = CARD_SHARE_SD;
 710         else if (card == MS_CARD)
 711                 value = CARD_SHARE_MS;
 712         else if (card == XD_CARD)
 713                 value = CARD_SHARE_XD;
 714         else
 715                 TRACE_RET(chip, STATUS_FAIL);
 716
 717         RTS51X_WRITE_REG(chip, CARD_SHARE_MODE, CARD_SHARE_MASK, value);
 718
 719         return STATUS_SUCCESS;
 720 }
 721
 722 int rts51x_select_card(struct rts51x_chip *chip, int card)
 723 {
 724         int retval;
 725
 726         if (chip->cur_card != card) {
 727                 u8 mod;
 728
 729                 if (card == SD_CARD)
 730                         mod = SD_MOD_SEL;
 731                 else if (card == MS_CARD)
 732                         mod = MS_MOD_SEL;
 733                 else if (card == XD_CARD)
 734                         mod = XD_MOD_SEL;
 735                 else
 736                         TRACE_RET(chip, STATUS_FAIL);
 737                 RTS51X_WRITE_REG(chip, CARD_SELECT, 0x07, mod);
 738                 chip->cur_card = card;
 739
 740                 retval = card_share_mode(chip, card);
 741                 if (retval != STATUS_SUCCESS)
 742                         TRACE_RET(chip, retval);
 743         }
 744
 745         return STATUS_SUCCESS;
 746 }
 747
 748 void eject_card(struct rts51x_chip *chip, unsigned int lun)
 749 {
 750         RTS51X_DEBUGP("eject card\n");
 751         RTS51X_SET_STAT(chip, STAT_RUN);
 752         do_remaining_work(chip);
 753
 754         if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) {
 755                 release_sd_card(chip);
 756                 chip->card_ejected |= SD_CARD;
 757                 chip->card_ready &= ~SD_CARD;
 758                 chip->capacity[lun] = 0;
 759         } else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) {
 760                 release_xd_card(chip);
 761                 chip->card_ejected |= XD_CARD;
 762                 chip->card_ready &= ~XD_CARD;
 763                 chip->capacity[lun] = 0;
 764         } else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) {
 765                 release_ms_card(chip);
 766                 chip->card_ejected |= MS_CARD;
 767                 chip->card_ready &= ~MS_CARD;
 768                 chip->capacity[lun] = 0;
 769         }
 770         rts51x_write_register(chip, CARD_INT_PEND, XD_INT | MS_INT | SD_INT,
 771                               XD_INT | MS_INT | SD_INT);
 772 }
 773
 774 void trans_dma_enable(enum dma_data_direction dir, struct rts51x_chip *chip,
 775                       u32 byte_cnt, u8 pack_size)
 776 {
 777         if (pack_size > DMA_1024)
 778                 pack_size = DMA_512;
 779
 780         rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
 781                        RING_BUFFER);
 782
 783         rts51x_add_cmd(chip, WRITE_REG_CMD, MC_DMA_TC3, 0xFF,
 784                        (u8) (byte_cnt >> 24));
 785         rts51x_add_cmd(chip, WRITE_REG_CMD, MC_DMA_TC2, 0xFF,
 786                        (u8) (byte_cnt >> 16));
 787         rts51x_add_cmd(chip, WRITE_REG_CMD, MC_DMA_TC1, 0xFF,
 788                        (u8) (byte_cnt >> 8));
 789         rts51x_add_cmd(chip, WRITE_REG_CMD, MC_DMA_TC0, 0xFF, (u8) byte_cnt);
 790
 791         if (dir == DMA_FROM_DEVICE) {
 792                 rts51x_add_cmd(chip, WRITE_REG_CMD, MC_DMA_CTL,
 793                                0x03 | DMA_PACK_SIZE_MASK,
 794                                DMA_DIR_FROM_CARD | DMA_EN | pack_size);
 795         } else {
 796                 rts51x_add_cmd(chip, WRITE_REG_CMD, MC_DMA_CTL,
 797                                0x03 | DMA_PACK_SIZE_MASK,
 798                                DMA_DIR_TO_CARD | DMA_EN | pack_size);
 799         }
 800 }
 801
 802 int enable_card_clock(struct rts51x_chip *chip, u8 card)
 803 {
 804         u8 clk_en = 0;
 805
 806         if (card & XD_CARD)
 807                 clk_en |= XD_CLK_EN;
 808         if (card & SD_CARD)
 809                 clk_en |= SD_CLK_EN;
 810         if (card & MS_CARD)
 811                 clk_en |= MS_CLK_EN;
 812
 813         RTS51X_WRITE_REG(chip, CARD_CLK_EN, clk_en, clk_en);
 814
 815         return STATUS_SUCCESS;
 816 }
 817
 818 int card_power_on(struct rts51x_chip *chip, u8 card)
 819 {
 820         u8 mask, val1, val2;
 821
 822         mask = POWER_MASK;
 823         val1 = PARTIAL_POWER_ON;
 824         val2 = POWER_ON;
 825
 826 #ifdef SD_XD_IO_FOLLOW_PWR
 827         if ((card == SD_CARD) || (card == XD_CARD)) {
 828                 RTS51X_WRITE_REG(chip, CARD_PWR_CTL, mask | LDO3318_PWR_MASK,
 829                                  val1 | LDO_SUSPEND);
 830         }
 831         else {
 832 #endif
 833                 RTS51X_WRITE_REG(chip, CARD_PWR_CTL, mask, val1);
 834 #ifdef SD_XD_IO_FOLLOW_PWR
 835         }
 836 #endif
 837         udelay(chip->option.pwr_delay);
 838         RTS51X_WRITE_REG(chip, CARD_PWR_CTL, mask, val2);
 839 #ifdef SD_XD_IO_FOLLOW_PWR
 840         if (card == SD_CARD) {
 841                 rts51x_write_register(chip, CARD_PWR_CTL, LDO3318_PWR_MASK,
 842                                       LDO_ON);
 843         }
 844 #endif
 845
 846         return STATUS_SUCCESS;
 847 }
 848
 849 int monitor_card_cd(struct rts51x_chip *chip, u8 card)
 850 {
 851         int retval;
 852         u8 card_cd[32] = { 0 };
 853
 854         card_cd[SD_CARD] = SD_CD;
 855         card_cd[XD_CARD] = XD_CD;
 856         card_cd[MS_CARD] = MS_CD;
 857
 858         retval = rts51x_get_card_status(chip, &(chip->card_status));
 859         if (retval != STATUS_SUCCESS)
 860                 return CD_NOT_EXIST;
 861
 862         if (chip->card_status & card_cd[card])
 863                 return CD_EXIST;
 864
 865         return CD_NOT_EXIST;
 866 }
 867
 868 int toggle_gpio(struct rts51x_chip *chip, u8 gpio)
 869 {
 870         int retval;
 871         u8 temp_reg;
 872         u8 gpio_output[4] = {
 873                 0x01,
 874         };
 875         u8 gpio_oe[4] = {
 876                 0x02,
 877         };
 878         if (chip->rts5179) {
 879                 retval = rts51x_ep0_read_register(chip, CARD_GPIO, &temp_reg);
 880                 if (retval != STATUS_SUCCESS)
 881                         TRACE_RET(chip, STATUS_FAIL);
 882                 temp_reg ^= gpio_oe[gpio];
 883                 temp_reg &= 0xfe; /* bit 0 always set 0 */
 884                 retval =
 885                     rts51x_ep0_write_register(chip, CARD_GPIO, 0x03, temp_reg);
 886                 if (retval != STATUS_SUCCESS)
 887                         TRACE_RET(chip, STATUS_FAIL);
 888         } else {
 889                 retval = rts51x_ep0_read_register(chip, CARD_GPIO, &temp_reg);
 890                 if (retval != STATUS_SUCCESS)
 891                         TRACE_RET(chip, STATUS_FAIL);
 892                 temp_reg ^= gpio_output[gpio];
 893                 retval =
 894                     rts51x_ep0_write_register(chip, CARD_GPIO, 0xFF,
 895                                               temp_reg | gpio_oe[gpio]);
 896                 if (retval != STATUS_SUCCESS)
 897                         TRACE_RET(chip, STATUS_FAIL);
 898         }
 899
 900         return STATUS_SUCCESS;
 901 }
 902
 903 int turn_on_led(struct rts51x_chip *chip, u8 gpio)
 904 {
 905         int retval;
 906         u8 gpio_oe[4] = {
 907                 0x02,
 908         };
 909         u8 gpio_mask[4] = {
 910                 0x03,
 911         };
 912
 913         retval =
 914             rts51x_ep0_write_register(chip, CARD_GPIO, gpio_mask[gpio],
 915                                       gpio_oe[gpio]);
 916         if (retval != STATUS_SUCCESS)
 917                 TRACE_RET(chip, STATUS_FAIL);
 918
 919         return STATUS_SUCCESS;
 920 }
 921
 922 int turn_off_led(struct rts51x_chip *chip, u8 gpio)
 923 {
 924         int retval;
 925         u8 gpio_output[4] = {
 926                 0x01,
 927         };
 928         u8 gpio_oe[4] = {
 929                 0x02,
 930         };
 931         u8 gpio_mask[4] = {
 932                 0x03,
 933         };
 934
 935         retval =
 936             rts51x_ep0_write_register(chip, CARD_GPIO, gpio_mask[gpio],
 937                                       gpio_oe[gpio] | gpio_output[gpio]);
 938         if (retval != STATUS_SUCCESS)
 939                 TRACE_RET(chip, STATUS_FAIL);
 940
 941         return STATUS_SUCCESS;
 942 }