1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24 ******************************************************************************/
26 #include "r8192E_phy.h"
27 #include "r8192E_phyreg.h"
28 #include "r8190P_rtl8256.h"
29 #include "r8192E_cmdpkt.h"
33 extern int WDCAPARA_ADD[];
35 void rtl8192e_start_beacon(struct net_device *dev)
37 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
38 struct rtllib_network *net = &priv->rtllib->current_network;
43 DMESG("Enabling beacon TX");
44 rtl8192_irq_disable(dev);
46 write_nic_word(dev, ATIMWND, 2);
48 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
49 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
50 write_nic_word(dev, BCN_DMATIME, 256);
52 write_nic_byte(dev, BCN_ERR_THRESH, 100);
54 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
55 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
56 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
57 rtl8192_irq_enable(dev);
60 void rtl8192e_update_msr(struct net_device *dev)
62 struct r8192_priv *priv = rtllib_priv(dev);
64 LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
65 msr = read_nic_byte(dev, MSR);
66 msr &= ~ MSR_LINK_MASK;
68 switch (priv->rtllib->iw_mode) {
70 if (priv->rtllib->state == RTLLIB_LINKED)
71 msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT);
73 msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
74 LedAction = LED_CTL_LINK;
77 if (priv->rtllib->state == RTLLIB_LINKED)
78 msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT);
80 msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
83 if (priv->rtllib->state == RTLLIB_LINKED)
84 msr |= (MSR_LINK_MASTER << MSR_LINK_SHIFT);
86 msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
92 write_nic_byte(dev, MSR, msr);
93 if (priv->rtllib->LedControlHandler)
94 priv->rtllib->LedControlHandler(dev, LedAction);
98 rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
100 struct r8192_priv* priv = rtllib_priv(dev);
106 write_nic_dword(dev, BSSIDR, ((u32*)(val))[0]);
107 write_nic_word(dev, BSSIDR+2, ((u16*)(val+2))[0]);
110 case HW_VAR_MEDIA_STATUS:
112 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
113 LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
114 u8 btMsr = read_nic_byte(dev, MSR);
120 case RT_OP_MODE_INFRASTRUCTURE:
122 LedAction = LED_CTL_LINK;
125 case RT_OP_MODE_IBSS:
131 LedAction = LED_CTL_LINK;
139 write_nic_byte(dev, MSR, btMsr);
144 case HW_VAR_CECHK_BSSID:
148 Type = ((u8*)(val))[0];
149 RegRCR = read_nic_dword(dev,RCR);
150 priv->ReceiveConfig = RegRCR;
153 RegRCR |= (RCR_CBSSID);
154 else if (Type == false)
155 RegRCR &= (~RCR_CBSSID);
157 write_nic_dword(dev, RCR,RegRCR);
158 priv->ReceiveConfig = RegRCR;
163 case HW_VAR_SLOT_TIME:
166 priv->slot_time = val[0];
167 write_nic_byte(dev, SLOT_TIME, val[0]);
170 if (priv->rtllib->current_network.qos_data.supported !=0)
172 for (eACI = 0; eACI < AC_MAX; eACI++)
174 priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, (u8*)(&eACI));
179 u8 u1bAIFS = aSifsTime + (2 * priv->slot_time);
181 write_nic_byte(dev, EDCAPARA_VO, u1bAIFS);
182 write_nic_byte(dev, EDCAPARA_VI, u1bAIFS);
183 write_nic_byte(dev, EDCAPARA_BE, u1bAIFS);
184 write_nic_byte(dev, EDCAPARA_BK, u1bAIFS);
190 case HW_VAR_ACK_PREAMBLE:
193 priv->short_preamble = (bool)(*(u8*)val );
194 regTmp = priv->basic_rate;
195 if (priv->short_preamble)
196 regTmp |= BRSR_AckShortPmb;
197 write_nic_dword(dev, RRSR, regTmp);
202 write_nic_dword(dev, CPU_GEN, ((u32*)(val))[0]);
205 case HW_VAR_AC_PARAM:
207 u8 pAcParam = *((u8*)val);
209 u32 eACI = GET_WMM_AC_PARAM_ACI(pAcParam);
215 u8 mode = priv->rtllib->mode;
216 struct rtllib_qos_parameters *qos_parameters = &priv->rtllib->current_network.qos_data.parameters;
219 u1bAIFS = qos_parameters->aifs[pAcParam] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
221 dm_init_edca_turbo(dev);
223 u4bAcParam = ( (((u32)(qos_parameters->tx_op_limit[pAcParam])) << AC_PARAM_TXOP_LIMIT_OFFSET) |
224 (((u32)(qos_parameters->cw_max[pAcParam])) << AC_PARAM_ECW_MAX_OFFSET) |
225 (((u32)(qos_parameters->cw_min[pAcParam])) << AC_PARAM_ECW_MIN_OFFSET) |
226 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET) );
228 RT_TRACE(COMP_DBG, "%s():HW_VAR_AC_PARAM eACI:%x:%x\n", __func__,eACI, u4bAcParam);
232 write_nic_dword(dev, EDCAPARA_BK, u4bAcParam);
236 write_nic_dword(dev, EDCAPARA_BE, u4bAcParam);
240 write_nic_dword(dev, EDCAPARA_VI, u4bAcParam);
244 write_nic_dword(dev, EDCAPARA_VO, u4bAcParam);
248 printk("SetHwReg8185(): invalid ACI: %d !\n", eACI);
251 priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACM_CTRL, (u8*)(&pAcParam));
255 case HW_VAR_ACM_CTRL:
257 struct rtllib_qos_parameters *qos_parameters = &priv->rtllib->current_network.qos_data.parameters;
258 u8 pAcParam = *((u8*)val);
260 u32 eACI = GET_WMM_AC_PARAM_ACI(pAciAifsn);
264 PACI_AIFSN pAciAifsn = (PACI_AIFSN)&(qos_parameters->aifs[0]);
265 u8 ACM = pAciAifsn->f.ACM;
266 u8 AcmCtrl = read_nic_byte( dev, AcmHwCtrl);
268 RT_TRACE(COMP_DBG, "===========>%s():HW_VAR_ACM_CTRL:%x\n", __func__,eACI);
269 AcmCtrl = AcmCtrl | ((priv->AcmMethod == 2)?0x0:0x1);
276 AcmCtrl |= AcmHw_BeqEn;
280 AcmCtrl |= AcmHw_ViqEn;
284 AcmCtrl |= AcmHw_VoqEn;
288 RT_TRACE( COMP_QOS, "SetHwReg8185(): [HW_VAR_ACM_CTRL] ACM set failed: eACI is %d\n", eACI );
297 AcmCtrl &= (~AcmHw_BeqEn);
301 AcmCtrl &= (~AcmHw_ViqEn);
305 AcmCtrl &= (~AcmHw_BeqEn);
313 RT_TRACE( COMP_QOS, "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl );
314 write_nic_byte(dev, AcmHwCtrl, AcmCtrl );
319 write_nic_byte(dev, SIFS, val[0]);
320 write_nic_byte(dev, SIFS+1, val[0]);
323 case HW_VAR_RF_TIMING:
325 u8 Rf_Timing = *((u8*)val);
326 write_nic_byte(dev, rFPGA0_RFTiming1, Rf_Timing);
336 static void rtl8192_read_eeprom_info(struct net_device* dev)
338 struct r8192_priv *priv = rtllib_priv(dev);
341 u8 ICVer8192, ICVer8256;
342 u16 i,usValue, IC_Version;
344 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
345 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
349 EEPROMId = eprom_read(dev, 0);
350 if ( EEPROMId != RTL8190_EEPROM_ID )
352 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
353 priv->AutoloadFailFlag=true;
357 priv->AutoloadFailFlag=false;
360 if (!priv->AutoloadFailFlag)
362 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
363 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
365 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
366 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
367 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
368 priv->eeprom_ChannelPlan = usValue&0xff;
369 IC_Version = ((usValue&0xff00)>>8);
371 ICVer8192 = (IC_Version&0xf);
372 ICVer8256 = ((IC_Version&0xf0)>>4);
373 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
374 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
375 if (ICVer8192 == 0x2)
377 if (ICVer8256 == 0x5)
378 priv->card_8192_version= VERSION_8190_BE;
380 switch (priv->card_8192_version)
382 case VERSION_8190_BD:
383 case VERSION_8190_BE:
386 priv->card_8192_version = VERSION_8190_BD;
389 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
393 priv->card_8192_version = VERSION_8190_BD;
394 priv->eeprom_vid = 0;
395 priv->eeprom_did = 0;
396 priv->eeprom_CustomerID = 0;
397 priv->eeprom_ChannelPlan = 0;
398 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
401 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
402 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
403 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
405 if (!priv->AutoloadFailFlag)
407 for (i = 0; i < 6; i += 2)
409 usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
410 *(u16*)(&dev->dev_addr[i]) = usValue;
413 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
416 RT_TRACE(COMP_INIT, "Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
417 dev->dev_addr[0], dev->dev_addr[1],
418 dev->dev_addr[2], dev->dev_addr[3],
419 dev->dev_addr[4], dev->dev_addr[5]);
421 if (priv->card_8192_version > VERSION_8190_BD) {
422 priv->bTXPowerDataReadFromEEPORM = true;
424 priv->bTXPowerDataReadFromEEPORM = false;
427 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
429 if (priv->card_8192_version > VERSION_8190_BD)
431 if (!priv->AutoloadFailFlag)
433 tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
434 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf;
437 priv->rf_type = RF_1T2R;
439 priv->rf_type = RF_2T4R;
443 priv->EEPROMLegacyHTTxPowerDiff = 0x04;
445 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
446 priv->EEPROMLegacyHTTxPowerDiff);
448 if (!priv->AutoloadFailFlag)
450 priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
454 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
456 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
457 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
459 if (priv->epromtype == EEPROM_93C46)
461 if (!priv->AutoloadFailFlag)
463 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
464 priv->EEPROMAntPwDiff = (usValue&0x0fff);
465 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
469 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
470 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
472 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
473 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
475 for (i=0; i<14; i+=2)
477 if (!priv->AutoloadFailFlag)
479 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
483 usValue = EEPROM_Default_TxPower;
485 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
486 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
487 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
489 for (i=0; i<14; i+=2)
491 if (!priv->AutoloadFailFlag)
493 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
497 usValue = EEPROM_Default_TxPower;
499 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
500 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
501 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
504 else if (priv->epromtype== EEPROM_93C56)
508 if (priv->epromtype == EEPROM_93C46)
512 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
513 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
515 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
516 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
517 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
518 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
519 priv->CrystalCap = priv->EEPROMCrystalCap;
520 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
521 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
523 else if (priv->epromtype == EEPROM_93C56)
528 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
529 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
530 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
531 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
535 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
536 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
537 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
538 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
542 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
543 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
544 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
545 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
548 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
550 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
552 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
554 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
555 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
556 priv->AntennaTxPwDiff[0] = 0;
557 priv->AntennaTxPwDiff[1] = 0;
558 priv->AntennaTxPwDiff[2] = 0;
559 priv->CrystalCap = priv->EEPROMCrystalCap;
560 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
561 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
565 if (priv->rf_type == RF_1T2R)
567 RT_TRACE(COMP_INIT, "\n1T2R config\n");
569 else if (priv->rf_type == RF_2T4R)
571 RT_TRACE(COMP_INIT, "\n2T4R config\n");
574 init_rate_adaptive(dev);
577 priv->rf_chip= RF_8256;
579 if (priv->RegChannelPlan == 0xf)
581 priv->ChannelPlan = priv->eeprom_ChannelPlan;
585 priv->ChannelPlan = priv->RegChannelPlan;
588 if ( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
590 priv->CustomerID = RT_CID_DLINK;
593 switch (priv->eeprom_CustomerID)
595 case EEPROM_CID_DEFAULT:
596 priv->CustomerID = RT_CID_DEFAULT;
598 case EEPROM_CID_CAMEO:
599 priv->CustomerID = RT_CID_819x_CAMEO;
601 case EEPROM_CID_RUNTOP:
602 priv->CustomerID = RT_CID_819x_RUNTOP;
604 case EEPROM_CID_NetCore:
605 priv->CustomerID = RT_CID_819x_Netcore;
607 case EEPROM_CID_TOSHIBA:
608 priv->CustomerID = RT_CID_TOSHIBA;
609 if (priv->eeprom_ChannelPlan&0x80)
610 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
612 priv->ChannelPlan = 0x0;
613 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
616 case EEPROM_CID_Nettronix:
617 priv->ScanDelay = 100;
618 priv->CustomerID = RT_CID_Nettronix;
620 case EEPROM_CID_Pronet:
621 priv->CustomerID = RT_CID_PRONET;
623 case EEPROM_CID_DLINK:
624 priv->CustomerID = RT_CID_DLINK;
627 case EEPROM_CID_WHQL:
636 if (priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
637 priv->ChannelPlan = 0;
639 priv->ChannelPlan = COUNTRY_CODE_WORLD_WIDE_13;
643 switch (priv->CustomerID)
646 priv->LedStrategy = SW_LED_MODE1;
649 case RT_CID_819x_CAMEO:
650 priv->LedStrategy = SW_LED_MODE2;
653 case RT_CID_819x_RUNTOP:
654 priv->LedStrategy = SW_LED_MODE3;
657 case RT_CID_819x_Netcore:
658 priv->LedStrategy = SW_LED_MODE4;
661 case RT_CID_Nettronix:
662 priv->LedStrategy = SW_LED_MODE5;
666 priv->LedStrategy = SW_LED_MODE6;
672 priv->LedStrategy = SW_LED_MODE1;
675 RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
678 if ( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
679 priv->rtllib->bSupportRemoteWakeUp = true;
681 priv->rtllib->bSupportRemoteWakeUp = false;
683 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
684 RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
685 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
690 void rtl8192_get_eeprom_size(struct net_device* dev)
693 struct r8192_priv *priv = rtllib_priv(dev);
694 RT_TRACE(COMP_INIT, "===========>%s()\n", __func__);
695 curCR = read_nic_dword(dev, EPROM_CMD);
696 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
697 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EEPROM_93C56 : EEPROM_93C46;
698 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __func__, priv->epromtype);
699 rtl8192_read_eeprom_info(dev);
702 static void rtl8192_hwconfig(struct net_device* dev)
704 u32 regRATR = 0, regRRSR = 0;
705 u8 regBwOpMode = 0, regTmp = 0;
706 struct r8192_priv *priv = rtllib_priv(dev);
708 switch (priv->rtllib->mode)
710 case WIRELESS_MODE_B:
711 regBwOpMode = BW_OPMODE_20MHZ;
712 regRATR = RATE_ALL_CCK;
713 regRRSR = RATE_ALL_CCK;
715 case WIRELESS_MODE_A:
716 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
717 regRATR = RATE_ALL_OFDM_AG;
718 regRRSR = RATE_ALL_OFDM_AG;
720 case WIRELESS_MODE_G:
721 regBwOpMode = BW_OPMODE_20MHZ;
722 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
723 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
725 case WIRELESS_MODE_AUTO:
726 case WIRELESS_MODE_N_24G:
727 regBwOpMode = BW_OPMODE_20MHZ;
728 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
729 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
731 case WIRELESS_MODE_N_5G:
732 regBwOpMode = BW_OPMODE_5G;
733 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
734 regRRSR = RATE_ALL_OFDM_AG;
737 regBwOpMode = BW_OPMODE_20MHZ;
738 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
739 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
743 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
746 ratr_value = regRATR;
747 if (priv->rf_type == RF_1T2R)
749 ratr_value &= ~(RATE_ALL_OFDM_2SS);
751 write_nic_dword(dev, RATR0, ratr_value);
752 write_nic_byte(dev, UFWP, 1);
754 regTmp = read_nic_byte(dev, 0x313);
755 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
756 write_nic_dword(dev, RRSR, regRRSR);
758 write_nic_word(dev, RETRY_LIMIT,
759 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
760 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
766 bool rtl8192_adapter_start(struct net_device *dev)
768 struct r8192_priv *priv = rtllib_priv(dev);
770 bool rtStatus = true;
772 u8 ICVersion,SwitchingRegulatorOutput;
773 bool bfirmwareok = true;
774 u32 tmpRegA, tmpRegC, TempCCk;
778 RT_TRACE(COMP_INIT, "====>%s()\n", __func__);
779 priv->being_init_adapter = true;
781 #ifdef CONFIG_ASPM_OR_D3
782 RT_DISABLE_ASPM(dev);
786 rtl8192_pci_resetdescring(dev);
787 priv->Rf_Mode = RF_OP_By_SW_3wire;
788 if (priv->ResetProgress == RESET_TYPE_NORESET)
790 write_nic_byte(dev, ANAPAR, 0x37);
793 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
795 if (priv->RegRfOff == true)
796 priv->rtllib->eRFPowerState = eRfOff;
798 ulRegRead = read_nic_dword(dev, CPU_GEN);
799 if (priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
801 ulRegRead |= CPU_GEN_SYSTEM_RESET;
802 }else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
803 ulRegRead |= CPU_GEN_FIRMWARE_RESET;
805 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __func__, priv->pFirmware->firmware_status);
808 write_nic_dword(dev, CPU_GEN, ulRegRead);
811 ICVersion = read_nic_byte(dev, IC_VERRSION);
812 if (ICVersion >= 0x4)
814 SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR);
815 if (SwitchingRegulatorOutput != 0xb8)
817 write_nic_byte(dev, SWREGULATOR, 0xa8);
819 write_nic_byte(dev, SWREGULATOR, 0xb8);
822 RT_TRACE(COMP_INIT, "BB Config Start!\n");
823 rtStatus = rtl8192_BBConfig(dev);
824 if (rtStatus != true)
826 RT_TRACE(COMP_ERR, "BB Config failed\n");
829 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
831 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
832 if (priv->ResetProgress == RESET_TYPE_NORESET)
834 ulRegRead = read_nic_dword(dev, CPU_GEN);
835 if (priv->LoopbackMode == RTL819X_NO_LOOPBACK)
837 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
839 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
841 ulRegRead |= CPU_CCK_LOOPBACK;
845 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
848 write_nic_dword(dev, CPU_GEN, ulRegRead);
852 rtl8192_hwconfig(dev);
853 write_nic_byte(dev, CMDR, CR_RE|CR_TE);
855 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |\
856 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
857 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
858 write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
859 write_nic_dword(dev, RCR, priv->ReceiveConfig);
862 if (priv->bInHctTest)
864 write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
865 NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
866 NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
867 NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
868 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
869 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
870 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
871 NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
876 write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
877 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
878 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
879 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
880 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
881 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
882 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
883 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
886 rtl8192_tx_enable(dev);
887 rtl8192_rx_enable(dev);
888 ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
889 write_nic_dword(dev, RRSR, ulRegRead);
890 write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
892 write_nic_byte(dev, ACK_TIMEOUT, 0x30);
894 if (priv->ResetProgress == RESET_TYPE_NORESET)
895 rtl8192_SetWirelessMode(dev, priv->rtllib->mode);
896 CamResetAllEntry(dev);
899 SECR_value |= SCR_TxEncEnable;
900 SECR_value |= SCR_RxDecEnable;
901 SECR_value |= SCR_NoSKMC;
902 write_nic_byte(dev, SECR, SECR_value);
904 write_nic_word(dev, ATIMWND, 2);
905 write_nic_word(dev, BCN_INTERVAL, 100);
908 for (i=0; i<QOS_QUEUE_NUM; i++)
909 write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
911 write_nic_byte(dev, 0xbe, 0xc0);
913 rtl8192_phy_configmac(dev);
915 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
916 rtl8192_phy_getTxPower(dev);
917 rtl8192_phy_setTxPower(dev, priv->chan);
920 tmpvalue = read_nic_byte(dev, IC_VERRSION);
921 priv->IC_Cut= tmpvalue;
922 RT_TRACE(COMP_INIT, "priv->IC_Cut= 0x%x\n", priv->IC_Cut);
923 if (priv->IC_Cut>= IC_VersionCut_D)
925 if (priv->IC_Cut== IC_VersionCut_D) {
926 RT_TRACE(COMP_INIT, "D-cut\n");
927 } else if (priv->IC_Cut== IC_VersionCut_E) {
928 RT_TRACE(COMP_INIT, "E-cut\n");
931 RT_TRACE(COMP_INIT, "Before C-cut\n");
934 RT_TRACE(COMP_INIT, "Load Firmware!\n");
935 bfirmwareok = init_firmware(dev);
937 if (retry_times < 10) {
945 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
946 if (priv->ResetProgress == RESET_TYPE_NORESET) {
947 RT_TRACE(COMP_INIT, "RF Config Started!\n");
948 rtStatus = rtl8192_phy_RFConfig(dev);
949 if (rtStatus != true) {
950 RT_TRACE(COMP_ERR, "RF Config failed\n");
953 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
955 rtl8192_phy_updateInitGain(dev);
957 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
958 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
960 write_nic_byte(dev, 0x87, 0x0);
962 if (priv->RegRfOff == true) {
963 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__func__);
964 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW,true);
965 } else if (priv->rtllib->RfOffReason > RF_CHANGE_BY_PS) {
966 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __func__,priv->rtllib->RfOffReason);
967 MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,true);
968 } else if (priv->rtllib->RfOffReason >= RF_CHANGE_BY_IPS) {
969 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __func__,priv->rtllib->RfOffReason);
970 MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,true);
972 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__func__);
973 priv->rtllib->eRFPowerState = eRfOn;
974 priv->rtllib->RfOffReason = 0;
979 if (priv->rtllib->FwRWRF)
980 priv->Rf_Mode = RF_OP_By_FW;
982 priv->Rf_Mode = RF_OP_By_SW_3wire;
984 if (priv->ResetProgress == RESET_TYPE_NORESET)
986 dm_initialize_txpower_tracking(dev);
988 if (priv->IC_Cut>= IC_VersionCut_D) {
989 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
990 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
991 for (i = 0; i<TxBBGainTableLength; i++) {
992 if (tmpRegA == priv->txbbgain_table[i].txbbgain_value) {
993 priv->rfa_txpowertrackingindex= (u8)i;
994 priv->rfa_txpowertrackingindex_real= (u8)i;
995 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
1000 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
1002 for (i = 0; i < CCKTxBBGainTableLength; i++) {
1003 if (TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0]) {
1004 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
1008 priv->CCKPresentAttentuation_40Mdefault = 0;
1009 priv->CCKPresentAttentuation_difference = 0;
1010 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
1011 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
1012 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
1013 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
1014 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
1015 priv->btxpower_tracking = false;
1018 rtl8192_irq_enable(dev);
1020 priv->being_init_adapter = false;
1024 void rtl8192_net_update(struct net_device *dev)
1027 struct r8192_priv *priv = rtllib_priv(dev);
1028 struct rtllib_network *net;
1029 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1030 u16 rate_config = 0;
1032 net = &priv->rtllib->current_network;
1033 rtl8192_config_rate(dev, &rate_config);
1034 priv->dot11CurrentPreambleMode = PREAMBLE_AUTO;
1035 priv->basic_rate = rate_config &= 0x15f;
1036 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1037 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1039 if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
1040 write_nic_word(dev, ATIMWND, 2);
1041 write_nic_word(dev, BCN_DMATIME, 256);
1042 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1043 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
1044 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1046 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1047 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1049 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1053 void rtl8192_link_change(struct net_device *dev)
1055 struct r8192_priv *priv = rtllib_priv(dev);
1056 struct rtllib_device* ieee = priv->rtllib;
1061 if (ieee->state == RTLLIB_LINKED) {
1062 rtl8192_net_update(dev);
1063 priv->ops->update_ratr_table(dev);
1064 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1065 EnableHWSecurityConfig8192(dev);
1067 write_nic_byte(dev, 0x173, 0);
1069 rtl8192e_update_msr(dev);
1071 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
1073 reg = read_nic_dword(dev, RCR);
1074 if (priv->rtllib->state == RTLLIB_LINKED) {
1075 if (ieee->IntelPromiscuousModeInfo.bPromiscuousOn)
1078 priv->ReceiveConfig = reg |= RCR_CBSSID;
1080 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1082 write_nic_dword(dev, RCR, reg);
1086 void rtl8192_AllowAllDestAddr(struct net_device* dev,
1087 bool bAllowAllDA, bool WriteIntoReg)
1089 struct r8192_priv* priv = rtllib_priv(dev);
1092 priv->ReceiveConfig |= RCR_AAP;
1094 priv->ReceiveConfig &= ~RCR_AAP;
1097 write_nic_dword( dev, RCR, priv->ReceiveConfig );
1101 static u8 MRateToHwRate8190Pci(u8 rate)
1103 u8 ret = DESC90_RATE1M;
1107 ret = DESC90_RATE1M;
1110 ret = DESC90_RATE2M;
1113 ret = DESC90_RATE5_5M;
1116 ret = DESC90_RATE11M;
1119 ret = DESC90_RATE6M;
1122 ret = DESC90_RATE9M;
1125 ret = DESC90_RATE12M;
1128 ret = DESC90_RATE18M;
1131 ret = DESC90_RATE24M;
1134 ret = DESC90_RATE36M;
1137 ret = DESC90_RATE48M;
1140 ret = DESC90_RATE54M;
1143 ret = DESC90_RATEMCS0;
1146 ret = DESC90_RATEMCS1;
1149 ret = DESC90_RATEMCS2;
1152 ret = DESC90_RATEMCS3;
1155 ret = DESC90_RATEMCS4;
1158 ret = DESC90_RATEMCS5;
1161 ret = DESC90_RATEMCS6;
1164 ret = DESC90_RATEMCS7;
1167 ret = DESC90_RATEMCS8;
1170 ret = DESC90_RATEMCS9;
1173 ret = DESC90_RATEMCS10;
1176 ret = DESC90_RATEMCS11;
1179 ret = DESC90_RATEMCS12;
1182 ret = DESC90_RATEMCS13;
1185 ret = DESC90_RATEMCS14;
1188 ret = DESC90_RATEMCS15;
1191 ret = DESC90_RATEMCS32;
1199 u8 rtl8192_MapHwQueueToFirmwareQueue(u8 QueueID, u8 priority)
1201 u8 QueueSelect = 0x0;
1205 QueueSelect = QSLT_BE;
1209 QueueSelect = QSLT_BK;
1213 QueueSelect = QSLT_VO;
1217 QueueSelect = QSLT_VI;
1220 QueueSelect = QSLT_MGNT;
1223 QueueSelect = QSLT_BEACON;
1226 QueueSelect = QSLT_CMD;
1229 QueueSelect = QSLT_HIGH;
1232 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection:"
1240 void rtl8192_tx_fill_desc(struct net_device* dev, tx_desc * pdesc, cb_desc * cb_desc, struct sk_buff* skb)
1242 struct r8192_priv *priv = rtllib_priv(dev);
1243 dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1244 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1245 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1246 memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
1247 pTxFwInfo->TxHT = (cb_desc->data_rate&0x80)?1:0;
1248 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)cb_desc->data_rate);
1249 pTxFwInfo->EnableCPUDur = cb_desc->bTxEnableFwCalcDur;
1250 pTxFwInfo->Short = rtl8192_QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, cb_desc);
1252 if (cb_desc->bAMPDUEnable) {
1253 pTxFwInfo->AllowAggregation = 1;
1254 pTxFwInfo->RxMF = cb_desc->ampdu_factor;
1255 pTxFwInfo->RxAMD = cb_desc->ampdu_density;
1257 pTxFwInfo->AllowAggregation = 0;
1258 pTxFwInfo->RxMF = 0;
1259 pTxFwInfo->RxAMD = 0;
1262 pTxFwInfo->RtsEnable = (cb_desc->bRTSEnable)?1:0;
1263 pTxFwInfo->CtsEnable = (cb_desc->bCTSEnable)?1:0;
1264 pTxFwInfo->RtsSTBC = (cb_desc->bRTSSTBC)?1:0;
1265 pTxFwInfo->RtsHT= (cb_desc->rts_rate&0x80)?1:0;
1266 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)cb_desc->rts_rate);
1267 pTxFwInfo->RtsBandwidth = 0;
1268 pTxFwInfo->RtsSubcarrier = cb_desc->RTSSC;
1269 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT==0)?(cb_desc->bRTSUseShortPreamble?1:0):(cb_desc->bRTSUseShortGI?1:0);
1270 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
1272 if (cb_desc->bPacketBW)
1274 pTxFwInfo->TxBandwidth = 1;
1275 pTxFwInfo->TxSubCarrier = 0;
1279 pTxFwInfo->TxBandwidth = 0;
1280 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1283 pTxFwInfo->TxBandwidth = 0;
1284 pTxFwInfo->TxSubCarrier = 0;
1287 memset((u8*)pdesc,0,12);
1290 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1291 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1294 pdesc->RATid = cb_desc->RATRIndex;
1298 pdesc->SecType = 0x0;
1299 if (cb_desc->bHwSec) {
1302 RT_TRACE(COMP_DBG, "==>================hw sec\n");
1305 switch (priv->rtllib->pairwise_key_type) {
1306 case KEY_TYPE_WEP40:
1307 case KEY_TYPE_WEP104:
1308 pdesc->SecType = 0x1;
1312 pdesc->SecType = 0x2;
1316 pdesc->SecType = 0x3;
1320 pdesc->SecType = 0x0;
1328 pdesc->QueueSelect = rtl8192_MapHwQueueToFirmwareQueue(cb_desc->queue_index, cb_desc->priority);
1329 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
1331 pdesc->DISFB = cb_desc->bTxDisableRateFallBack;
1332 pdesc->USERATE = cb_desc->bTxUseDriverAssingedRate;
1336 pdesc->TxBufferSize = skb->len;
1338 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1341 void rtl8192_tx_fill_cmd_desc(struct net_device* dev, tx_desc_cmd * entry,
1342 cb_desc * cb_desc, struct sk_buff* skb)
1344 struct r8192_priv *priv = rtllib_priv(dev);
1345 dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1348 entry->LINIP = cb_desc->bLastIniPkt;
1349 entry->FirstSeg = 1;
1351 if (cb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1352 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1354 tx_desc* entry_tmp = (tx_desc*)entry;
1355 entry_tmp->CmdInit = DESC_PACKET_TYPE_NORMAL;
1356 entry_tmp->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1357 entry_tmp->PktSize = (u16)(cb_desc->pkt_size + entry_tmp->Offset);
1358 entry_tmp->QueueSelect = QSLT_CMD;
1359 entry_tmp->TxFWInfoSize = 0x08;
1360 entry_tmp->RATid = (u8)DESC_PACKET_TYPE_INIT;
1362 entry->TxBufferSize = skb->len;
1363 entry->TxBuffAddr = cpu_to_le32(mapping);
1367 u8 HwRateToMRate90(bool bIsHT, u8 rate)
1373 case DESC90_RATE1M: ret_rate = MGN_1M; break;
1374 case DESC90_RATE2M: ret_rate = MGN_2M; break;
1375 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
1376 case DESC90_RATE11M: ret_rate = MGN_11M; break;
1377 case DESC90_RATE6M: ret_rate = MGN_6M; break;
1378 case DESC90_RATE9M: ret_rate = MGN_9M; break;
1379 case DESC90_RATE12M: ret_rate = MGN_12M; break;
1380 case DESC90_RATE18M: ret_rate = MGN_18M; break;
1381 case DESC90_RATE24M: ret_rate = MGN_24M; break;
1382 case DESC90_RATE36M: ret_rate = MGN_36M; break;
1383 case DESC90_RATE48M: ret_rate = MGN_48M; break;
1384 case DESC90_RATE54M: ret_rate = MGN_54M; break;
1387 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
1393 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
1394 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
1395 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
1396 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
1397 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
1398 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
1399 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
1400 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
1401 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
1402 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
1403 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
1404 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
1405 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
1406 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
1407 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
1408 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
1409 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
1412 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
1421 rtl8192_signal_scale_mapping(struct r8192_priv * priv,
1427 if (currsig >= 61 && currsig <= 100)
1429 retsig = 90 + ((currsig - 60) / 4);
1431 else if (currsig >= 41 && currsig <= 60)
1433 retsig = 78 + ((currsig - 40) / 2);
1435 else if (currsig >= 31 && currsig <= 40)
1437 retsig = 66 + (currsig - 30);
1439 else if (currsig >= 21 && currsig <= 30)
1441 retsig = 54 + (currsig - 20);
1443 else if (currsig >= 5 && currsig <= 20)
1445 retsig = 42 + (((currsig - 5) * 2) / 3);
1447 else if (currsig == 4)
1451 else if (currsig == 3)
1455 else if (currsig == 2)
1459 else if (currsig == 1)
1472 #define rx_hal_is_cck_rate(_pdrvinfo)\
1473 (_pdrvinfo->RxRate == DESC90_RATE1M ||\
1474 _pdrvinfo->RxRate == DESC90_RATE2M ||\
1475 _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
1476 _pdrvinfo->RxRate == DESC90_RATE11M) &&\
1478 void rtl8192_query_rxphystatus(
1479 struct r8192_priv * priv,
1480 struct rtllib_rx_stats * pstats,
1482 prx_fwinfo pdrvinfo,
1483 struct rtllib_rx_stats * precord_stats,
1484 bool bpacket_match_bssid,
1485 bool bpacket_toself,
1490 phy_sts_ofdm_819xpci_t* pofdm_buf;
1491 phy_sts_cck_819xpci_t * pcck_buf;
1492 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
1494 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
1495 char rx_pwr[4], rx_pwr_all=0;
1496 char rx_snrX, rx_evmX;
1498 u32 RSSI, total_rssi=0;
1502 static u8 check_reg824 = 0;
1503 static u32 reg824_bit9 = 0;
1505 priv->stats.numqry_phystatus++;
1508 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
1509 memset(precord_stats, 0, sizeof(struct rtllib_rx_stats));
1510 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
1511 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
1512 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;
1513 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
1514 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
1515 if (check_reg824 == 0)
1517 reg824_bit9 = rtl8192_QueryBBReg(priv->rtllib->dev, rFPGA0_XA_HSSIParameter2, 0x200);
1522 prxpkt = (u8*)pdrvinfo;
1524 prxpkt += sizeof(rx_fwinfo);
1526 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
1527 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
1529 pstats->RxMIMOSignalQuality[0] = -1;
1530 pstats->RxMIMOSignalQuality[1] = -1;
1531 precord_stats->RxMIMOSignalQuality[0] = -1;
1532 precord_stats->RxMIMOSignalQuality[1] = -1;
1539 priv->stats.numqry_phystatusCCK++;
1542 report = pcck_buf->cck_agc_rpt & 0xc0;
1547 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
1550 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
1553 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
1556 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
1562 report = pcck_buf->cck_agc_rpt & 0x60;
1567 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
1570 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
1573 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
1576 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
1581 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
1582 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
1583 pstats->RecvSignalPower = rx_pwr_all;
1585 if (bpacket_match_bssid)
1589 if (pstats->RxPWDBAll > 40)
1594 sq = pcck_buf->sq_rpt;
1596 if (pcck_buf->sq_rpt > 64)
1598 else if (pcck_buf->sq_rpt < 20)
1601 sq = ((64-sq) * 100) / 44;
1603 pstats->SignalQuality = precord_stats->SignalQuality = sq;
1604 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
1605 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
1610 priv->stats.numqry_phystatusHT++;
1611 for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
1613 if (priv->brfpath_rxenable[i])
1616 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
1618 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
1619 rx_snrX = (char)(tmp_rxsnr);
1621 priv->stats.rxSNRdB[i] = (long)rx_snrX;
1623 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
1624 if (priv->brfpath_rxenable[i])
1627 if (bpacket_match_bssid)
1629 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
1630 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
1635 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
1636 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
1638 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
1639 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
1640 pstats->RecvSignalPower = rx_pwr_all;
1641 if (pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
1642 pdrvinfo->RxRate<=DESC90_RATEMCS15)
1643 max_spatial_stream = 2;
1645 max_spatial_stream = 1;
1647 for (i=0; i<max_spatial_stream; i++)
1649 tmp_rxevm = pofdm_buf->rxevm_X[i];
1650 rx_evmX = (char)(tmp_rxevm);
1654 evm = rtl819x_evm_dbtopercentage(rx_evmX);
1655 if (bpacket_match_bssid)
1658 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
1659 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
1664 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
1665 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
1667 priv->stats.received_bwtype[1+prxsc->rxsc]++;
1669 priv->stats.received_bwtype[0]++;
1674 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl8192_signal_scale_mapping(priv,(long)pwdb_all));
1680 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl8192_signal_scale_mapping(priv,(long)(total_rssi/=rf_rx_num)));
1684 void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct rtllib_rx_stats * pprevious_stats, struct rtllib_rx_stats * pcurrent_stats)
1686 bool bcheck = false;
1688 u32 nspatial_stream, tmp_val;
1689 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
1690 static u32 slide_evm_index=0, slide_evm_statistics=0;
1691 static u32 last_rssi=0, last_evm=0;
1692 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
1693 static u32 last_beacon_adc_pwdb=0;
1695 struct rtllib_hdr_3addr *hdr;
1697 unsigned int frag,seq;
1698 hdr = (struct rtllib_hdr_3addr *)buffer;
1699 sc = le16_to_cpu(hdr->seq_ctl);
1700 frag = WLAN_GET_SEQ_FRAG(sc);
1701 seq = WLAN_GET_SEQ_SEQ(sc);
1702 pcurrent_stats->Seq_Num = seq;
1703 if (!pprevious_stats->bIsAMPDU)
1706 if (slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
1708 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
1709 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
1710 priv->stats.slide_rssi_total -= last_rssi;
1712 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
1714 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
1715 if (slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
1716 slide_rssi_index = 0;
1718 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
1719 priv->stats.signal_strength = rtl819x_translate_todbm(priv, (u8)tmp_val);
1720 pcurrent_stats->rssi = priv->stats.signal_strength;
1721 if (!pprevious_stats->bPacketMatchBSSID)
1723 if (!pprevious_stats->bToSelfBA)
1730 rtl819x_process_cck_rxpathsel(priv,pprevious_stats);
1732 priv->stats.num_process_phyinfo++;
1733 if (!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
1735 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
1737 if (!rtl8192_phy_CheckIsLegalRFPath(priv->rtllib->dev, rfpath))
1739 RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
1740 if (priv->stats.rx_rssi_percentage[rfpath] == 0)
1742 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
1744 if (pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
1746 priv->stats.rx_rssi_percentage[rfpath] =
1747 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
1748 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
1749 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
1753 priv->stats.rx_rssi_percentage[rfpath] =
1754 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
1755 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
1757 RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
1762 if (pprevious_stats->bPacketBeacon)
1764 if (slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
1766 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
1767 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
1768 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
1770 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
1771 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
1772 slide_beacon_adc_pwdb_index++;
1773 if (slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
1774 slide_beacon_adc_pwdb_index = 0;
1775 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
1776 if (pprevious_stats->RxPWDBAll >= 3)
1777 pprevious_stats->RxPWDBAll -= 3;
1780 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
1781 pprevious_stats->bIsCCK? "CCK": "OFDM",
1782 pprevious_stats->RxPWDBAll);
1784 if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
1786 if (priv->undecorated_smoothed_pwdb < 0)
1788 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
1790 if (pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
1792 priv->undecorated_smoothed_pwdb =
1793 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
1794 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
1795 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
1799 priv->undecorated_smoothed_pwdb =
1800 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
1801 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
1803 rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
1806 if (pprevious_stats->SignalQuality == 0)
1811 if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
1812 if (slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
1813 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
1814 last_evm = priv->stats.slide_evm[slide_evm_index];
1815 priv->stats.slide_evm_total -= last_evm;
1818 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
1820 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
1821 if (slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
1822 slide_evm_index = 0;
1824 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
1825 priv->stats.signal_quality = tmp_val;
1826 priv->stats.last_signal_strength_inpercent = tmp_val;
1829 if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
1831 for (nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++)
1833 if (pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
1835 if (priv->stats.rx_evm_percentage[nspatial_stream] == 0)
1837 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
1839 priv->stats.rx_evm_percentage[nspatial_stream] =
1840 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
1841 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
1850 void rtl8192_TranslateRxSignalStuff(struct net_device *dev,
1851 struct sk_buff *skb,
1852 struct rtllib_rx_stats * pstats,
1854 prx_fwinfo pdrvinfo)
1856 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1857 bool bpacket_match_bssid, bpacket_toself;
1858 bool bPacketBeacon=false;
1859 struct rtllib_hdr_3addr *hdr;
1860 bool bToSelfBA=false;
1861 static struct rtllib_rx_stats previous_stats;
1868 tmp_buf = skb->data + pstats->RxDrvInfoSize + pstats->RxBufShift;
1870 hdr = (struct rtllib_hdr_3addr *)tmp_buf;
1871 fc = le16_to_cpu(hdr->frame_ctl);
1872 type = WLAN_FC_GET_TYPE(fc);
1873 praddr = hdr->addr1;
1875 bpacket_match_bssid = ((RTLLIB_FTYPE_CTL != type) &&
1876 (!compare_ether_addr(priv->rtllib->current_network.bssid,
1877 (fc & RTLLIB_FCTL_TODS)? hdr->addr1 :
1878 (fc & RTLLIB_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
1879 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
1880 bpacket_toself = bpacket_match_bssid & (!compare_ether_addr(praddr, priv->rtllib->dev->dev_addr));
1881 if (WLAN_FC_GET_FRAMETYPE(fc)== RTLLIB_STYPE_BEACON)
1883 bPacketBeacon = true;
1885 if (bpacket_match_bssid)
1887 priv->stats.numpacket_matchbssid++;
1889 if (bpacket_toself){
1890 priv->stats.numpacket_toself++;
1892 rtl8192_process_phyinfo(priv, tmp_buf,&previous_stats, pstats);
1893 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &previous_stats, bpacket_match_bssid,
1894 bpacket_toself ,bPacketBeacon, bToSelfBA);
1895 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
1898 void rtl8192_UpdateReceivedRateHistogramStatistics(
1899 struct net_device *dev,
1900 struct rtllib_rx_stats* pstats
1903 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1906 u32 preamble_guardinterval;
1910 else if (pstats->bICV)
1913 if (pstats->bShortPreamble)
1914 preamble_guardinterval = 1;
1916 preamble_guardinterval = 0;
1918 switch (pstats->rate)
1920 case MGN_1M: rateIndex = 0; break;
1921 case MGN_2M: rateIndex = 1; break;
1922 case MGN_5_5M: rateIndex = 2; break;
1923 case MGN_11M: rateIndex = 3; break;
1924 case MGN_6M: rateIndex = 4; break;
1925 case MGN_9M: rateIndex = 5; break;
1926 case MGN_12M: rateIndex = 6; break;
1927 case MGN_18M: rateIndex = 7; break;
1928 case MGN_24M: rateIndex = 8; break;
1929 case MGN_36M: rateIndex = 9; break;
1930 case MGN_48M: rateIndex = 10; break;
1931 case MGN_54M: rateIndex = 11; break;
1932 case MGN_MCS0: rateIndex = 12; break;
1933 case MGN_MCS1: rateIndex = 13; break;
1934 case MGN_MCS2: rateIndex = 14; break;
1935 case MGN_MCS3: rateIndex = 15; break;
1936 case MGN_MCS4: rateIndex = 16; break;
1937 case MGN_MCS5: rateIndex = 17; break;
1938 case MGN_MCS6: rateIndex = 18; break;
1939 case MGN_MCS7: rateIndex = 19; break;
1940 case MGN_MCS8: rateIndex = 20; break;
1941 case MGN_MCS9: rateIndex = 21; break;
1942 case MGN_MCS10: rateIndex = 22; break;
1943 case MGN_MCS11: rateIndex = 23; break;
1944 case MGN_MCS12: rateIndex = 24; break;
1945 case MGN_MCS13: rateIndex = 25; break;
1946 case MGN_MCS14: rateIndex = 26; break;
1947 case MGN_MCS15: rateIndex = 27; break;
1948 default: rateIndex = 28; break;
1950 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
1951 priv->stats.received_rate_histogram[0][rateIndex]++;
1952 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
1955 bool rtl8192_rx_query_status_desc(struct net_device* dev, struct rtllib_rx_stats* stats,
1956 rx_desc *pdesc, struct sk_buff* skb)
1958 struct r8192_priv *priv = rtllib_priv(dev);
1960 stats->bICV = pdesc->ICV;
1961 stats->bCRC = pdesc->CRC32;
1962 stats->bHwError = pdesc->CRC32 | pdesc->ICV;
1964 stats->Length = pdesc->Length;
1965 if (stats->Length < 24)
1966 stats->bHwError |= 1;
1968 if (stats->bHwError) {
1969 stats->bShift = false;
1972 if (pdesc->Length <500)
1973 priv->stats.rxcrcerrmin++;
1974 else if (pdesc->Length >1000)
1975 priv->stats.rxcrcerrmax++;
1977 priv->stats.rxcrcerrmid++;
1981 prx_fwinfo pDrvInfo = NULL;
1982 stats->RxDrvInfoSize = pdesc->RxDrvInfoSize;
1983 stats->RxBufShift = ((pdesc->Shift)&0x03);
1984 stats->Decrypted = !pdesc->SWDec;
1986 pDrvInfo = (rx_fwinfo *)(skb->data + stats->RxBufShift);
1988 stats->rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
1989 stats->bShortPreamble = pDrvInfo->SPLCP;
1991 rtl8192_UpdateReceivedRateHistogramStatistics(dev, stats);
1993 stats->bIsAMPDU = (pDrvInfo->PartAggr==1);
1994 stats->bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
1996 stats->TimeStampLow = pDrvInfo->TSFL;
1997 stats->TimeStampHigh = read_nic_dword(dev, TSFR+4);
1999 rtl819x_UpdateRxPktTimeStamp(dev, stats);
2001 if ((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
2004 stats->RxIs40MHzPacket = pDrvInfo->BW;
2006 rtl8192_TranslateRxSignalStuff(dev,skb, stats, pdesc, pDrvInfo);
2008 if (pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
2009 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
2010 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
2011 skb_trim(skb, skb->len - 4/*sCrcLng*/);
2014 stats->packetlength = stats->Length-4;
2015 stats->fraglength = stats->packetlength;
2016 stats->fragoffset = 0;
2017 stats->ntotalfrag = 1;
2022 void rtl8192_halt_adapter(struct net_device *dev, bool reset)
2024 struct r8192_priv *priv = rtllib_priv(dev);
2030 OpMode = RT_OP_MODE_NO_LINK;
2031 priv->rtllib->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
2034 if (!priv->rtllib->bSupportRemoteWakeUp)
2037 write_nic_byte(dev, CMDR, u1bTmp);
2040 cmd=read_nic_byte(dev,CMDR);
2041 write_nic_byte(dev, CMDR, cmd &~ (CR_TE|CR_RE));
2050 priv->bHwRfOffAction = 2;
2052 if (!priv->rtllib->bSupportRemoteWakeUp)
2055 PHY_SetRtl8192eRfOff(dev);
2057 ulRegRead = read_nic_dword(dev,CPU_GEN);
2058 ulRegRead|=CPU_GEN_SYSTEM_RESET;
2059 write_nic_dword(dev,CPU_GEN, ulRegRead);
2063 write_nic_dword(dev, WFCRC0, 0xffffffff);
2064 write_nic_dword(dev, WFCRC1, 0xffffffff);
2065 write_nic_dword(dev, WFCRC2, 0xffffffff);
2068 write_nic_byte(dev, PMR, 0x5);
2069 write_nic_byte(dev, MacBlkCtrl, 0xa);
2073 for (i = 0; i < MAX_QUEUE_SIZE; i++) {
2074 skb_queue_purge(&priv->rtllib->skb_waitQ [i]);
2076 for (i = 0; i < MAX_QUEUE_SIZE; i++) {
2077 skb_queue_purge(&priv->rtllib->skb_aggQ [i]);
2080 skb_queue_purge(&priv->skb_queue);
2084 void rtl8192_update_ratr_table(struct net_device* dev)
2086 struct r8192_priv* priv = rtllib_priv(dev);
2087 struct rtllib_device* ieee = priv->rtllib;
2088 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2092 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2093 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2097 ratr_value &= 0x00000FF0;
2100 ratr_value &= 0x0000000F;
2104 ratr_value &= 0x00000FF7;
2108 if (ieee->pHTInfo->PeerMimoPs == 0)
2109 ratr_value &= 0x0007F007;
2111 if (priv->rf_type == RF_1T2R)
2112 ratr_value &= 0x000FF007;
2114 ratr_value &= 0x0F81F007;
2120 ratr_value &= 0x0FFFFFFF;
2121 if (ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2122 ratr_value |= 0x80000000;
2123 }else if (!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2124 ratr_value |= 0x80000000;
2126 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2127 write_nic_byte(dev, UFWP, 1);
2131 rtl8192_InitializeVariables(struct net_device *dev)
2133 struct r8192_priv *priv = rtllib_priv(dev);
2135 strcpy(priv->nick, "rtl8192E");
2137 #ifdef _ENABLE_SW_BEACON
2138 priv->rtllib->softmac_features = IEEE_SOFTMAC_SCAN |
2139 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2140 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
2141 IEEE_SOFTMAC_BEACONS;
2143 priv->rtllib->softmac_features = IEEE_SOFTMAC_SCAN |
2144 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2145 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE /* |
2146 IEEE_SOFTMAC_BEACONS*/;
2149 priv->rtllib->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2151 priv->ShortRetryLimit = 0x30;
2152 priv->LongRetryLimit = 0x30;
2154 priv->EarlyRxThreshold = 7;
2155 priv->pwrGroupCnt = 0;
2157 priv->bIgnoreSilentReset = false;
2158 priv->enable_gpio0 = 0;
2160 priv->TransmitConfig = 0;
2162 priv->ReceiveConfig = RCR_ADD3 |
2165 RCR_AB | RCR_AM | RCR_APM |
2166 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2167 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2169 priv->irq_mask[0] = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |\
2170 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |\
2171 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |\
2172 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2175 priv->MidHighPwrTHR_L1 = 0x3B;
2176 priv->MidHighPwrTHR_L2 = 0x40;
2177 priv->PwrDomainProtect = false;
2179 priv->bfirst_after_down = 0;
2182 void rtl8192_EnableInterrupt(struct net_device *dev)
2184 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2185 priv->irq_enabled = 1;
2187 write_nic_dword(dev,INTA_MASK, priv->irq_mask[0]);
2191 void rtl8192_DisableInterrupt(struct net_device *dev)
2193 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2195 write_nic_dword(dev,INTA_MASK,0);
2197 priv->irq_enabled = 0;
2200 void rtl8192_ClearInterrupt(struct net_device *dev)
2203 tmp = read_nic_dword(dev, ISR);
2204 write_nic_dword(dev, ISR, tmp);
2208 void rtl8192_enable_rx(struct net_device *dev)
2210 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2211 write_nic_dword(dev, RDQDA,priv->rx_ring_dma[RX_MPDU_QUEUE]);
2214 u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
2215 void rtl8192_enable_tx(struct net_device *dev)
2217 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2220 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
2221 write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
2225 void rtl8192_beacon_disable(struct net_device *dev)
2227 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2230 reg = read_nic_dword(priv->rtllib->dev,INTA_MASK);
2232 reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2233 write_nic_dword(priv->rtllib->dev, INTA_MASK, reg);
2236 void rtl8192_interrupt_recognized(struct net_device *dev, u32 *p_inta, u32 *p_intb)
2238 *p_inta = read_nic_dword(dev, ISR) ;
2239 write_nic_dword(dev,ISR,*p_inta);
2242 bool rtl8192_HalRxCheckStuck(struct net_device *dev)
2244 struct r8192_priv *priv = rtllib_priv(dev);
2245 u16 RegRxCounter = read_nic_word(dev, 0x130);
2246 bool bStuck = false;
2247 static u8 rx_chk_cnt = 0;
2248 u32 SlotIndex = 0, TotalRxStuckCount = 0;
2250 u8 SilentResetRxSoltNum = 4;
2252 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",
2253 __func__, RegRxCounter,priv->RxCounter);
2256 if (priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
2259 } else if ((priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5)) &&
2260 (((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
2261 (priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_40M)) ||
2262 ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
2263 (priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)))) {
2264 if (rx_chk_cnt < 2) {
2269 } else if ((((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
2270 (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_40M)) ||
2271 ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
2272 (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_20M))) &&
2273 priv->undecorated_smoothed_pwdb >= VeryLowRSSI) {
2274 if (rx_chk_cnt < 4) {
2280 if (rx_chk_cnt < 8) {
2288 SlotIndex = (priv->SilentResetRxSlotIndex++)%SilentResetRxSoltNum;
2290 if (priv->RxCounter==RegRxCounter)
2292 priv->SilentResetRxStuckEvent[SlotIndex] = 1;
2294 for ( i = 0; i < SilentResetRxSoltNum ; i++ )
2295 TotalRxStuckCount += priv->SilentResetRxStuckEvent[i];
2297 if (TotalRxStuckCount == SilentResetRxSoltNum)
2300 for ( i = 0; i < SilentResetRxSoltNum ; i++ )
2301 TotalRxStuckCount += priv->SilentResetRxStuckEvent[i];
2306 priv->SilentResetRxStuckEvent[SlotIndex] = 0;
2309 priv->RxCounter = RegRxCounter;
2314 bool rtl8192_HalTxCheckStuck(struct net_device *dev)
2316 struct r8192_priv *priv = rtllib_priv(dev);
2317 bool bStuck = false;
2318 u16 RegTxCounter = read_nic_word(dev, 0x128);
2320 RT_TRACE(COMP_RESET, "%s():RegTxCounter is %d,TxCounter is %d\n",
2321 __func__,RegTxCounter,priv->TxCounter);
2323 if (priv->TxCounter == RegTxCounter)
2326 priv->TxCounter = RegTxCounter;
2331 bool rtl8192_GetNmodeSupportBySecCfg(struct net_device *dev)
2333 struct r8192_priv *priv = rtllib_priv(dev);
2334 struct rtllib_device *ieee = priv->rtllib;
2335 if (ieee->rtllib_ap_sec_type &&
2336 (ieee->rtllib_ap_sec_type(priv->rtllib)&(SEC_ALG_WEP|SEC_ALG_TKIP))) {
2343 bool rtl8192_GetHalfNmodeSupportByAPs(struct net_device* dev)
2346 struct r8192_priv* priv = rtllib_priv(dev);
2347 struct rtllib_device* ieee = priv->rtllib;
2349 if (ieee->bHalfWirelessN24GMode == true)
2357 u8 rtl8192_QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2361 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2362 if (TxHT==1 && TxRate != DESC90_RATEMCS15)
2369 ActUpdateChannelAccessSetting(
2370 struct net_device* dev,
2371 WIRELESS_MODE WirelessMode,
2372 PCHANNEL_ACCESS_SETTING ChnlAccessSetting
2375 struct r8192_priv* priv = rtllib_priv(dev);
2382 if (WirelessMode == WIRELESS_MODE_G)
2383 SIFS_Timer = 0x0e0e;
2385 SIFS_Timer = priv->SifsTime;
2387 priv->rtllib->SetHwRegHandler( dev, HW_VAR_SIFS, (u8*)&SIFS_Timer);