Pileus Git - ~andy/linux/blob - drivers/staging/rtl8192e/r8192E_dev.c

   1 /******************************************************************************
   2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   3  *
   4  * Based on the r8180 driver, which is:
   5  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of version 2 of the GNU General Public License as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along with
  16  * this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  18  *
  19  * The full GNU General Public License is included in this distribution in the
  20  * file called LICENSE.
  21  *
  22  * Contact Information:
  23  * wlanfae <wlanfae@realtek.com>
  24 ******************************************************************************/
  25 #include "rtl_core.h"
  26 #include "r8192E_phy.h"
  27 #include "r8192E_phyreg.h"
  28 #include "r8190P_rtl8256.h"
  29 #include "r8192E_cmdpkt.h"
  30 #include "rtl_dm.h"
  31 #include "rtl_wx.h"
  32
  33 extern int WDCAPARA_ADD[];
  34
  35 void rtl8192e_start_beacon(struct net_device *dev)
  36 {
  37         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
  38         struct rtllib_network *net = &priv->rtllib->current_network;
  39         u16 BcnTimeCfg = 0;
  40         u16 BcnCW = 6;
  41         u16 BcnIFS = 0xf;
  42
  43         DMESG("Enabling beacon TX");
  44         rtl8192_irq_disable(dev);
  45
  46         write_nic_word(dev, ATIMWND, 2);
  47
  48         write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
  49         write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
  50         write_nic_word(dev, BCN_DMATIME, 256);
  51
  52         write_nic_byte(dev, BCN_ERR_THRESH, 100);
  53
  54         BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
  55         BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
  56         write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
  57         rtl8192_irq_enable(dev);
  58 }
  59
  60 void rtl8192e_update_msr(struct net_device *dev)
  61 {
  62         struct r8192_priv *priv = rtllib_priv(dev);
  63         u8 msr;
  64         LED_CTL_MODE    LedAction = LED_CTL_NO_LINK;
  65         msr  = read_nic_byte(dev, MSR);
  66         msr &= ~ MSR_LINK_MASK;
  67
  68         switch (priv->rtllib->iw_mode) {
  69         case IW_MODE_INFRA:
  70                 if (priv->rtllib->state == RTLLIB_LINKED)
  71                         msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT);
  72                 else
  73                         msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
  74                 LedAction = LED_CTL_LINK;
  75                 break;
  76         case IW_MODE_ADHOC:
  77                 if (priv->rtllib->state == RTLLIB_LINKED)
  78                         msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT);
  79                 else
  80                         msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
  81                 break;
  82         case IW_MODE_MASTER:
  83                 if (priv->rtllib->state == RTLLIB_LINKED)
  84                         msr |= (MSR_LINK_MASTER << MSR_LINK_SHIFT);
  85                 else
  86                         msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
  87                 break;
  88         default:
  89                 break;
  90         }
  91
  92         write_nic_byte(dev, MSR, msr);
  93         if (priv->rtllib->LedControlHandler)
  94                 priv->rtllib->LedControlHandler(dev, LedAction);
  95 }
  96
  97 void
  98 rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
  99 {
 100         struct r8192_priv* priv = rtllib_priv(dev);
 101
 102         switch (variable)
 103         {
 104
 105                 case HW_VAR_BSSID:
 106                         write_nic_dword(dev, BSSIDR, ((u32*)(val))[0]);
 107                         write_nic_word(dev, BSSIDR+2, ((u16*)(val+2))[0]);
 108                 break;
 109
 110                 case HW_VAR_MEDIA_STATUS:
 111                 {
 112                         RT_OP_MODE      OpMode = *((RT_OP_MODE *)(val));
 113                         LED_CTL_MODE    LedAction = LED_CTL_NO_LINK;
 114                         u8              btMsr = read_nic_byte(dev, MSR);
 115
 116                         btMsr &= 0xfc;
 117
 118                         switch (OpMode)
 119                         {
 120                         case RT_OP_MODE_INFRASTRUCTURE:
 121                                 btMsr |= MSR_INFRA;
 122                                 LedAction = LED_CTL_LINK;
 123                                 break;
 124
 125                         case RT_OP_MODE_IBSS:
 126                                 btMsr |= MSR_ADHOC;
 127                                 break;
 128
 129                         case RT_OP_MODE_AP:
 130                                 btMsr |= MSR_AP;
 131                                 LedAction = LED_CTL_LINK;
 132                                 break;
 133
 134                         default:
 135                                 btMsr |= MSR_NOLINK;
 136                                 break;
 137                         }
 138
 139                         write_nic_byte(dev, MSR, btMsr);
 140
 141                 }
 142                 break;
 143
 144                 case HW_VAR_CECHK_BSSID:
 145                 {
 146                         u32     RegRCR, Type;
 147
 148                         Type = ((u8*)(val))[0];
 149                         RegRCR = read_nic_dword(dev,RCR);
 150                         priv->ReceiveConfig = RegRCR;
 151
 152                         if (Type == true)
 153                                 RegRCR |= (RCR_CBSSID);
 154                         else if (Type == false)
 155                                 RegRCR &= (~RCR_CBSSID);
 156
 157                         write_nic_dword(dev, RCR,RegRCR);
 158                         priv->ReceiveConfig = RegRCR;
 159
 160                 }
 161                 break;
 162
 163                 case HW_VAR_SLOT_TIME:
 164                 {
 165
 166                         priv->slot_time = val[0];
 167                         write_nic_byte(dev, SLOT_TIME, val[0]);
 168
 169                 }
 170                 break;
 171
 172                 case HW_VAR_ACK_PREAMBLE:
 173                 {
 174                         u32 regTmp = 0;
 175                         priv->short_preamble = (bool)(*(u8*)val );
 176                         regTmp = priv->basic_rate;
 177                         if (priv->short_preamble)
 178                                 regTmp |= BRSR_AckShortPmb;
 179                         write_nic_dword(dev, RRSR, regTmp);
 180                 }
 181                 break;
 182
 183                 case HW_VAR_CPU_RST:
 184                         write_nic_dword(dev, CPU_GEN, ((u32*)(val))[0]);
 185                 break;
 186
 187                 case HW_VAR_AC_PARAM:
 188                 {
 189                         u8      pAcParam = *((u8*)val);
 190                         u32     eACI = pAcParam;
 191                         u8              u1bAIFS;
 192                         u32             u4bAcParam;
 193                         u8 mode = priv->rtllib->mode;
 194                         struct rtllib_qos_parameters *qos_parameters = &priv->rtllib->current_network.qos_data.parameters;
 195
 196
 197                         u1bAIFS = qos_parameters->aifs[pAcParam] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
 198
 199                         dm_init_edca_turbo(dev);
 200
 201                         u4bAcParam = (  (((u32)(qos_parameters->tx_op_limit[pAcParam])) << AC_PARAM_TXOP_LIMIT_OFFSET)  |
 202                                                         (((u32)(qos_parameters->cw_max[pAcParam])) << AC_PARAM_ECW_MAX_OFFSET)  |
 203                                                         (((u32)(qos_parameters->cw_min[pAcParam])) << AC_PARAM_ECW_MIN_OFFSET)  |
 204                                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET)        );
 205
 206                         RT_TRACE(COMP_DBG, "%s():HW_VAR_AC_PARAM eACI:%x:%x\n", __func__,eACI, u4bAcParam);
 207                         switch (eACI)
 208                         {
 209                         case AC1_BK:
 210                                 write_nic_dword(dev, EDCAPARA_BK, u4bAcParam);
 211                                 break;
 212
 213                         case AC0_BE:
 214                                 write_nic_dword(dev, EDCAPARA_BE, u4bAcParam);
 215                                 break;
 216
 217                         case AC2_VI:
 218                                 write_nic_dword(dev, EDCAPARA_VI, u4bAcParam);
 219                                 break;
 220
 221                         case AC3_VO:
 222                                 write_nic_dword(dev, EDCAPARA_VO, u4bAcParam);
 223                                 break;
 224
 225                         default:
 226                                 printk("SetHwReg8185(): invalid ACI: %d !\n", eACI);
 227                                 break;
 228                         }
 229                                 priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACM_CTRL, (u8*)(&pAcParam));
 230                 }
 231                 break;
 232
 233                 case HW_VAR_ACM_CTRL:
 234                 {
 235                         struct rtllib_qos_parameters *qos_parameters = &priv->rtllib->current_network.qos_data.parameters;
 236                         u8      pAcParam = *((u8*)val);
 237                         u32     eACI = pAcParam;
 238                         PACI_AIFSN      pAciAifsn = (PACI_AIFSN)&(qos_parameters->aifs[0]);
 239                         u8              ACM = pAciAifsn->f.ACM;
 240                         u8              AcmCtrl = read_nic_byte( dev, AcmHwCtrl);
 241
 242                         RT_TRACE(COMP_DBG, "===========>%s():HW_VAR_ACM_CTRL:%x\n", __func__,eACI);
 243                         AcmCtrl = AcmCtrl | ((priv->AcmMethod == 2)?0x0:0x1);
 244
 245                         if ( ACM )
 246                         {
 247                                 switch (eACI)
 248                                 {
 249                                 case AC0_BE:
 250                                         AcmCtrl |= AcmHw_BeqEn;
 251                                         break;
 252
 253                                 case AC2_VI:
 254                                         AcmCtrl |= AcmHw_ViqEn;
 255                                         break;
 256
 257                                 case AC3_VO:
 258                                         AcmCtrl |= AcmHw_VoqEn;
 259                                         break;
 260
 261                                 default:
 262                                         RT_TRACE( COMP_QOS, "SetHwReg8185(): [HW_VAR_ACM_CTRL] ACM set failed: eACI is %d\n", eACI );
 263                                         break;
 264                                 }
 265                         }
 266                         else
 267                         {
 268                                 switch (eACI)
 269                                 {
 270                                 case AC0_BE:
 271                                         AcmCtrl &= (~AcmHw_BeqEn);
 272                                         break;
 273
 274                                 case AC2_VI:
 275                                         AcmCtrl &= (~AcmHw_ViqEn);
 276                                         break;
 277
 278                                 case AC3_VO:
 279                                         AcmCtrl &= (~AcmHw_BeqEn);
 280                                         break;
 281
 282                                 default:
 283                                         break;
 284                                 }
 285                         }
 286
 287                         RT_TRACE( COMP_QOS, "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl );
 288                         write_nic_byte(dev, AcmHwCtrl, AcmCtrl );
 289                 }
 290                 break;
 291
 292                 case HW_VAR_SIFS:
 293                         write_nic_byte(dev, SIFS, val[0]);
 294                         write_nic_byte(dev, SIFS+1, val[0]);
 295                 break;
 296
 297                 case HW_VAR_RF_TIMING:
 298                 {
 299                         u8 Rf_Timing = *((u8*)val);
 300                         write_nic_byte(dev, rFPGA0_RFTiming1, Rf_Timing);
 301                 }
 302                 break;
 303
 304                 default:
 305                 break;
 306         }
 307
 308 }
 309
 310 static void rtl8192_read_eeprom_info(struct net_device* dev)
 311 {
 312         struct r8192_priv *priv = rtllib_priv(dev);
 313
 314         u8                      tempval;
 315         u8                      ICVer8192, ICVer8256;
 316         u16                     i,usValue, IC_Version;
 317         u16                     EEPROMId;
 318         u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
 319         RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
 320
 321
 322
 323         EEPROMId = eprom_read(dev, 0);
 324         if ( EEPROMId != RTL8190_EEPROM_ID )
 325         {
 326                 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
 327                 priv->AutoloadFailFlag=true;
 328         }
 329         else
 330         {
 331                 priv->AutoloadFailFlag=false;
 332         }
 333
 334         if (!priv->AutoloadFailFlag)
 335         {
 336                 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
 337                 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
 338
 339                 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
 340                 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
 341                 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
 342                 priv->eeprom_ChannelPlan = usValue&0xff;
 343                 IC_Version = ((usValue&0xff00)>>8);
 344
 345                 ICVer8192 = (IC_Version&0xf);
 346                 ICVer8256 = ((IC_Version&0xf0)>>4);
 347                 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
 348                 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
 349                 if (ICVer8192 == 0x2)
 350                 {
 351                         if (ICVer8256 == 0x5)
 352                                 priv->card_8192_version= VERSION_8190_BE;
 353                 }
 354                 switch (priv->card_8192_version)
 355                 {
 356                         case VERSION_8190_BD:
 357                         case VERSION_8190_BE:
 358                                 break;
 359                         default:
 360                                 priv->card_8192_version = VERSION_8190_BD;
 361                                 break;
 362                 }
 363                 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
 364         }
 365         else
 366         {
 367                 priv->card_8192_version = VERSION_8190_BD;
 368                 priv->eeprom_vid = 0;
 369                 priv->eeprom_did = 0;
 370                 priv->eeprom_CustomerID = 0;
 371                 priv->eeprom_ChannelPlan = 0;
 372                 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
 373         }
 374
 375         RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
 376         RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
 377         RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
 378
 379         if (!priv->AutoloadFailFlag)
 380         {
 381                 for (i = 0; i < 6; i += 2)
 382                 {
 383                         usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
 384                         *(u16*)(&dev->dev_addr[i]) = usValue;
 385                 }
 386         } else {
 387                 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
 388         }
 389
 390         RT_TRACE(COMP_INIT, "Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
 391                         dev->dev_addr[0], dev->dev_addr[1],
 392                         dev->dev_addr[2], dev->dev_addr[3],
 393                         dev->dev_addr[4], dev->dev_addr[5]);
 394
 395         if (priv->card_8192_version > VERSION_8190_BD) {
 396                 priv->bTXPowerDataReadFromEEPORM = true;
 397         } else {
 398                 priv->bTXPowerDataReadFromEEPORM = false;
 399         }
 400
 401         priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
 402
 403         if (priv->card_8192_version > VERSION_8190_BD)
 404         {
 405                 if (!priv->AutoloadFailFlag)
 406                 {
 407                         tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
 408                         priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf;
 409
 410                         if (tempval&0x80)
 411                                 priv->rf_type = RF_1T2R;
 412                         else
 413                                 priv->rf_type = RF_2T4R;
 414                 }
 415                 else
 416                 {
 417                         priv->EEPROMLegacyHTTxPowerDiff = 0x04;
 418                 }
 419                 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
 420                         priv->EEPROMLegacyHTTxPowerDiff);
 421
 422                 if (!priv->AutoloadFailFlag)
 423                 {
 424                         priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
 425                 }
 426                 else
 427                 {
 428                         priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
 429                 }
 430                 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
 431                 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
 432
 433                 if (priv->epromtype == EEPROM_93C46)
 434                 {
 435                 if (!priv->AutoloadFailFlag)
 436                 {
 437                                 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
 438                                 priv->EEPROMAntPwDiff = (usValue&0x0fff);
 439                                 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
 440                 }
 441                 else
 442                 {
 443                                 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
 444                                 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
 445                 }
 446                         RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
 447                         RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
 448
 449                 for (i=0; i<14; i+=2)
 450                 {
 451                         if (!priv->AutoloadFailFlag)
 452                         {
 453                                 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
 454                         }
 455                         else
 456                         {
 457                                 usValue = EEPROM_Default_TxPower;
 458                         }
 459                         *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
 460                         RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
 461                         RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
 462                 }
 463                 for (i=0; i<14; i+=2)
 464                 {
 465                         if (!priv->AutoloadFailFlag)
 466                         {
 467                                 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
 468                         }
 469                         else
 470                         {
 471                                 usValue = EEPROM_Default_TxPower;
 472                         }
 473                         *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
 474                         RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
 475                         RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
 476                 }
 477                 }
 478                 else if (priv->epromtype== EEPROM_93C56)
 479                 {
 480
 481                 }
 482                 if (priv->epromtype == EEPROM_93C46)
 483                 {
 484                         for (i=0; i<14; i++)
 485                         {
 486                                 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
 487                                 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
 488                         }
 489                         priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
 490                         priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
 491                         priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
 492                         priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
 493                         priv->CrystalCap = priv->EEPROMCrystalCap;
 494                         priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
 495                         priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
 496                 }
 497                 else if (priv->epromtype == EEPROM_93C56)
 498                 {
 499
 500                         for (i=0; i<3; i++)
 501                         {
 502                                 priv->TxPowerLevelCCK_A[i]  = priv->EEPROMRfACCKChnl1TxPwLevel[0];
 503                                 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
 504                                 priv->TxPowerLevelCCK_C[i] =  priv->EEPROMRfCCCKChnl1TxPwLevel[0];
 505                                 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
 506                         }
 507                         for (i=3; i<9; i++)
 508                         {
 509                                 priv->TxPowerLevelCCK_A[i]  = priv->EEPROMRfACCKChnl1TxPwLevel[1];
 510                                 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
 511                                 priv->TxPowerLevelCCK_C[i] =  priv->EEPROMRfCCCKChnl1TxPwLevel[1];
 512                                 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
 513                         }
 514                         for (i=9; i<14; i++)
 515                         {
 516                                 priv->TxPowerLevelCCK_A[i]  = priv->EEPROMRfACCKChnl1TxPwLevel[2];
 517                                 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
 518                                 priv->TxPowerLevelCCK_C[i] =  priv->EEPROMRfCCCKChnl1TxPwLevel[2];
 519                                 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
 520                         }
 521                         for (i=0; i<14; i++)
 522                                 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
 523                         for (i=0; i<14; i++)
 524                                 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
 525                         for (i=0; i<14; i++)
 526                                 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
 527                         for (i=0; i<14; i++)
 528                                 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
 529                         priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
 530                         priv->AntennaTxPwDiff[0] = 0;
 531                         priv->AntennaTxPwDiff[1] = 0;
 532                         priv->AntennaTxPwDiff[2] = 0;
 533                         priv->CrystalCap = priv->EEPROMCrystalCap;
 534                         priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
 535                         priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
 536                 }
 537         }
 538
 539         if (priv->rf_type == RF_1T2R)
 540         {
 541                 RT_TRACE(COMP_INIT, "\n1T2R config\n");
 542         }
 543         else if (priv->rf_type == RF_2T4R)
 544         {
 545                 RT_TRACE(COMP_INIT, "\n2T4R config\n");
 546         }
 547
 548         init_rate_adaptive(dev);
 549
 550
 551         priv->rf_chip= RF_8256;
 552
 553         if (priv->RegChannelPlan == 0xf)
 554         {
 555                 priv->ChannelPlan = priv->eeprom_ChannelPlan;
 556         }
 557         else
 558         {
 559                 priv->ChannelPlan = priv->RegChannelPlan;
 560         }
 561
 562         if ( priv->eeprom_vid == 0x1186 &&  priv->eeprom_did == 0x3304 )
 563         {
 564                 priv->CustomerID =  RT_CID_DLINK;
 565         }
 566
 567         switch (priv->eeprom_CustomerID)
 568         {
 569                 case EEPROM_CID_DEFAULT:
 570                         priv->CustomerID = RT_CID_DEFAULT;
 571                         break;
 572                 case EEPROM_CID_CAMEO:
 573                         priv->CustomerID = RT_CID_819x_CAMEO;
 574                         break;
 575                 case  EEPROM_CID_RUNTOP:
 576                         priv->CustomerID = RT_CID_819x_RUNTOP;
 577                         break;
 578                 case EEPROM_CID_NetCore:
 579                         priv->CustomerID = RT_CID_819x_Netcore;
 580                         break;
 581                 case EEPROM_CID_TOSHIBA:
 582                         priv->CustomerID = RT_CID_TOSHIBA;
 583                         if (priv->eeprom_ChannelPlan&0x80)
 584                                 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
 585                         else
 586                                 priv->ChannelPlan = 0x0;
 587                         RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
 588                                 priv->ChannelPlan);
 589                         break;
 590                 case EEPROM_CID_Nettronix:
 591                         priv->ScanDelay = 100;
 592                         priv->CustomerID = RT_CID_Nettronix;
 593                         break;
 594                 case EEPROM_CID_Pronet:
 595                         priv->CustomerID = RT_CID_PRONET;
 596                         break;
 597                 case EEPROM_CID_DLINK:
 598                         priv->CustomerID = RT_CID_DLINK;
 599                         break;
 600
 601                 case EEPROM_CID_WHQL:
 602
 603
 604
 605                         break;
 606                 default:
 607                         break;
 608         }
 609
 610         if (priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
 611                 priv->ChannelPlan = 0;
 612 #ifdef ENABLE_DOT11D
 613         priv->ChannelPlan = COUNTRY_CODE_WORLD_WIDE_13;
 614 #endif
 615
 616 #ifdef TO_DO_LIST
 617         switch (priv->CustomerID)
 618         {
 619                 case RT_CID_DEFAULT:
 620                         priv->LedStrategy = SW_LED_MODE1;
 621                         break;
 622
 623                 case RT_CID_819x_CAMEO:
 624                         priv->LedStrategy = SW_LED_MODE2;
 625                         break;
 626
 627                 case RT_CID_819x_RUNTOP:
 628                         priv->LedStrategy = SW_LED_MODE3;
 629                         break;
 630
 631                 case RT_CID_819x_Netcore:
 632                         priv->LedStrategy = SW_LED_MODE4;
 633                         break;
 634
 635                 case RT_CID_Nettronix:
 636                         priv->LedStrategy = SW_LED_MODE5;
 637                         break;
 638
 639                 case RT_CID_PRONET:
 640                         priv->LedStrategy = SW_LED_MODE6;
 641                         break;
 642
 643                 case RT_CID_TOSHIBA:
 644
 645                 default:
 646                         priv->LedStrategy = SW_LED_MODE1;
 647                         break;
 648         }
 649         RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
 650 #endif
 651
 652         if ( priv->eeprom_vid == 0x1186 &&  priv->eeprom_did == 0x3304)
 653                 priv->rtllib->bSupportRemoteWakeUp = true;
 654         else
 655                 priv->rtllib->bSupportRemoteWakeUp = false;
 656
 657         RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
 658         RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
 659         RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
 660
 661         return ;
 662 }
 663
 664 void rtl8192_get_eeprom_size(struct net_device* dev)
 665 {
 666         u16 curCR = 0;
 667         struct r8192_priv *priv = rtllib_priv(dev);
 668         RT_TRACE(COMP_INIT, "===========>%s()\n", __func__);
 669         curCR = read_nic_dword(dev, EPROM_CMD);
 670         RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
 671         priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EEPROM_93C56 : EEPROM_93C46;
 672         RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __func__, priv->epromtype);
 673         rtl8192_read_eeprom_info(dev);
 674 }
 675
 676 static void rtl8192_hwconfig(struct net_device* dev)
 677 {
 678         u32 regRATR = 0, regRRSR = 0;
 679         u8 regBwOpMode = 0, regTmp = 0;
 680         struct r8192_priv *priv = rtllib_priv(dev);
 681
 682         switch (priv->rtllib->mode)
 683         {
 684         case WIRELESS_MODE_B:
 685                 regBwOpMode = BW_OPMODE_20MHZ;
 686                 regRATR = RATE_ALL_CCK;
 687                 regRRSR = RATE_ALL_CCK;
 688                 break;
 689         case WIRELESS_MODE_A:
 690                 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
 691                 regRATR = RATE_ALL_OFDM_AG;
 692                 regRRSR = RATE_ALL_OFDM_AG;
 693                 break;
 694         case WIRELESS_MODE_G:
 695                 regBwOpMode = BW_OPMODE_20MHZ;
 696                 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 697                 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 698                 break;
 699         case WIRELESS_MODE_AUTO:
 700         case WIRELESS_MODE_N_24G:
 701                 regBwOpMode = BW_OPMODE_20MHZ;
 702                         regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
 703                         regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 704                 break;
 705         case WIRELESS_MODE_N_5G:
 706                 regBwOpMode = BW_OPMODE_5G;
 707                 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
 708                 regRRSR = RATE_ALL_OFDM_AG;
 709                 break;
 710         default:
 711                 regBwOpMode = BW_OPMODE_20MHZ;
 712                 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 713                 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 714                 break;
 715         }
 716
 717         write_nic_byte(dev, BW_OPMODE, regBwOpMode);
 718         {
 719                 u32 ratr_value = 0;
 720                 ratr_value = regRATR;
 721                 if (priv->rf_type == RF_1T2R)
 722                 {
 723                         ratr_value &= ~(RATE_ALL_OFDM_2SS);
 724                 }
 725                 write_nic_dword(dev, RATR0, ratr_value);
 726                 write_nic_byte(dev, UFWP, 1);
 727         }
 728         regTmp = read_nic_byte(dev, 0x313);
 729         regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
 730         write_nic_dword(dev, RRSR, regRRSR);
 731
 732         write_nic_word(dev, RETRY_LIMIT,
 733                         priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
 734                         priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
 735
 736
 737
 738 }
 739
 740 bool rtl8192_adapter_start(struct net_device *dev)
 741 {
 742         struct r8192_priv *priv = rtllib_priv(dev);
 743         u32 ulRegRead;
 744         bool rtStatus = true;
 745         u8 tmpvalue;
 746         u8 ICVersion,SwitchingRegulatorOutput;
 747         bool bfirmwareok = true;
 748         u32 tmpRegA, tmpRegC, TempCCk;
 749         int i = 0;
 750         u32 retry_times = 0;
 751
 752         RT_TRACE(COMP_INIT, "====>%s()\n", __func__);
 753         priv->being_init_adapter = true;
 754
 755 #ifdef CONFIG_ASPM_OR_D3
 756         RT_DISABLE_ASPM(dev);
 757 #endif
 758
 759 start:
 760         rtl8192_pci_resetdescring(dev);
 761         priv->Rf_Mode = RF_OP_By_SW_3wire;
 762         if (priv->ResetProgress == RESET_TYPE_NORESET)
 763         {
 764             write_nic_byte(dev, ANAPAR, 0x37);
 765             mdelay(500);
 766         }
 767         priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
 768
 769         if (priv->RegRfOff == true)
 770                 priv->rtllib->eRFPowerState = eRfOff;
 771
 772         ulRegRead = read_nic_dword(dev, CPU_GEN);
 773         if (priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
 774         {
 775                 ulRegRead |= CPU_GEN_SYSTEM_RESET;
 776         }else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
 777                 ulRegRead |= CPU_GEN_FIRMWARE_RESET;
 778         else
 779                 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __func__,   priv->pFirmware->firmware_status);
 780
 781
 782         write_nic_dword(dev, CPU_GEN, ulRegRead);
 783
 784
 785         ICVersion = read_nic_byte(dev, IC_VERRSION);
 786         if (ICVersion >= 0x4)
 787         {
 788                 SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR);
 789                 if (SwitchingRegulatorOutput  != 0xb8)
 790                 {
 791                         write_nic_byte(dev, SWREGULATOR, 0xa8);
 792                         mdelay(1);
 793                         write_nic_byte(dev, SWREGULATOR, 0xb8);
 794                 }
 795         }
 796         RT_TRACE(COMP_INIT, "BB Config Start!\n");
 797         rtStatus = rtl8192_BBConfig(dev);
 798         if (rtStatus != true)
 799         {
 800                 RT_TRACE(COMP_ERR, "BB Config failed\n");
 801                 return rtStatus;
 802         }
 803         RT_TRACE(COMP_INIT,"BB Config Finished!\n");
 804
 805         priv->LoopbackMode = RTL819X_NO_LOOPBACK;
 806         if (priv->ResetProgress == RESET_TYPE_NORESET)
 807         {
 808         ulRegRead = read_nic_dword(dev, CPU_GEN);
 809         if (priv->LoopbackMode == RTL819X_NO_LOOPBACK)
 810         {
 811                 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
 812         }
 813         else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
 814         {
 815                 ulRegRead |= CPU_CCK_LOOPBACK;
 816         }
 817         else
 818         {
 819                 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
 820         }
 821
 822         write_nic_dword(dev, CPU_GEN, ulRegRead);
 823
 824         udelay(500);
 825         }
 826         rtl8192_hwconfig(dev);
 827         write_nic_byte(dev, CMDR, CR_RE|CR_TE);
 828
 829         write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |\
 830                                 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
 831         write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
 832         write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
 833         write_nic_dword(dev, RCR, priv->ReceiveConfig);
 834
 835 #ifdef TO_DO_LIST
 836         if (priv->bInHctTest)
 837         {
 838                 write_nic_dword(dev, RQPN1,  NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
 839                                 NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
 840                                 NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
 841                                 NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
 842                 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
 843                 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
 844                                 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
 845                                 NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
 846         }
 847         else
 848 #endif
 849         {
 850                 write_nic_dword(dev, RQPN1,  NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
 851                                         NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
 852                                         NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
 853                                         NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
 854                 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
 855                 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
 856                                         NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
 857                                         NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
 858         }
 859
 860         rtl8192_tx_enable(dev);
 861         rtl8192_rx_enable(dev);
 862         ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR))  | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
 863         write_nic_dword(dev, RRSR, ulRegRead);
 864         write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
 865
 866         write_nic_byte(dev, ACK_TIMEOUT, 0x30);
 867
 868         if (priv->ResetProgress == RESET_TYPE_NORESET)
 869         rtl8192_SetWirelessMode(dev, priv->rtllib->mode);
 870         CamResetAllEntry(dev);
 871         {
 872                 u8 SECR_value = 0x0;
 873                 SECR_value |= SCR_TxEncEnable;
 874                 SECR_value |= SCR_RxDecEnable;
 875                 SECR_value |= SCR_NoSKMC;
 876                 write_nic_byte(dev, SECR, SECR_value);
 877         }
 878         write_nic_word(dev, ATIMWND, 2);
 879         write_nic_word(dev, BCN_INTERVAL, 100);
 880         {
 881                 int i;
 882                 for (i=0; i<QOS_QUEUE_NUM; i++)
 883                 write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
 884         }
 885         write_nic_byte(dev, 0xbe, 0xc0);
 886
 887         rtl8192_phy_configmac(dev);
 888
 889         if (priv->card_8192_version > (u8) VERSION_8190_BD) {
 890                 rtl8192_phy_getTxPower(dev);
 891                 rtl8192_phy_setTxPower(dev, priv->chan);
 892         }
 893
 894         tmpvalue = read_nic_byte(dev, IC_VERRSION);
 895         priv->IC_Cut= tmpvalue;
 896         RT_TRACE(COMP_INIT, "priv->IC_Cut= 0x%x\n", priv->IC_Cut);
 897         if (priv->IC_Cut>= IC_VersionCut_D)
 898         {
 899                 if (priv->IC_Cut== IC_VersionCut_D) {
 900                         RT_TRACE(COMP_INIT, "D-cut\n");
 901                 } else if (priv->IC_Cut== IC_VersionCut_E) {
 902                         RT_TRACE(COMP_INIT, "E-cut\n");
 903                 }
 904         } else {
 905                 RT_TRACE(COMP_INIT, "Before C-cut\n");
 906         }
 907
 908         RT_TRACE(COMP_INIT, "Load Firmware!\n");
 909         bfirmwareok = init_firmware(dev);
 910         if (!bfirmwareok) {
 911                 if (retry_times < 10) {
 912                         retry_times++;
 913                         goto start;
 914                 } else {
 915                         rtStatus = false;
 916                         goto end;
 917                 }
 918         }
 919         RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
 920         if (priv->ResetProgress == RESET_TYPE_NORESET) {
 921                 RT_TRACE(COMP_INIT, "RF Config Started!\n");
 922                 rtStatus = rtl8192_phy_RFConfig(dev);
 923                 if (rtStatus != true) {
 924                         RT_TRACE(COMP_ERR, "RF Config failed\n");
 925                         return rtStatus;
 926                 }
 927                 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
 928         }
 929         rtl8192_phy_updateInitGain(dev);
 930
 931         rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
 932         rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
 933
 934         write_nic_byte(dev, 0x87, 0x0);
 935
 936         if (priv->RegRfOff == true) {
 937                 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__func__);
 938                 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW,true);
 939         } else if (priv->rtllib->RfOffReason > RF_CHANGE_BY_PS) {
 940                 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __func__,priv->rtllib->RfOffReason);
 941                 MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,true);
 942         } else if (priv->rtllib->RfOffReason >= RF_CHANGE_BY_IPS) {
 943                 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __func__,priv->rtllib->RfOffReason);
 944                 MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,true);
 945         } else {
 946                 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__func__);
 947                 priv->rtllib->eRFPowerState = eRfOn;
 948                 priv->rtllib->RfOffReason = 0;
 949
 950
 951         }
 952
 953         if (priv->rtllib->FwRWRF)
 954                 priv->Rf_Mode = RF_OP_By_FW;
 955         else
 956                 priv->Rf_Mode = RF_OP_By_SW_3wire;
 957
 958         if (priv->ResetProgress == RESET_TYPE_NORESET)
 959         {
 960                 dm_initialize_txpower_tracking(dev);
 961
 962                 if (priv->IC_Cut>= IC_VersionCut_D) {
 963                         tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
 964                         tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
 965                         for (i = 0; i<TxBBGainTableLength; i++) {
 966                                 if (tmpRegA == priv->txbbgain_table[i].txbbgain_value) {
 967                                         priv->rfa_txpowertrackingindex= (u8)i;
 968                                         priv->rfa_txpowertrackingindex_real= (u8)i;
 969                                         priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
 970                                         break;
 971                                 }
 972                         }
 973
 974                         TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
 975
 976                         for (i = 0; i < CCKTxBBGainTableLength; i++) {
 977                                 if (TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0]) {
 978                                         priv->CCKPresentAttentuation_20Mdefault =(u8) i;
 979                                         break;
 980                                 }
 981                         }
 982                         priv->CCKPresentAttentuation_40Mdefault = 0;
 983                         priv->CCKPresentAttentuation_difference = 0;
 984                         priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
 985                         RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
 986                         RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
 987                         RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
 988                         RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
 989                         priv->btxpower_tracking = false;
 990                 }
 991         }
 992         rtl8192_irq_enable(dev);
 993 end:
 994         priv->being_init_adapter = false;
 995         return rtStatus;
 996 }
 997
 998 void rtl8192_net_update(struct net_device *dev)
 999 {
1000
1001         struct r8192_priv *priv = rtllib_priv(dev);
1002         struct rtllib_network *net;
1003         u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1004         u16 rate_config = 0;
1005
1006         net = &priv->rtllib->current_network;
1007         rtl8192_config_rate(dev, &rate_config);
1008         priv->dot11CurrentPreambleMode = PREAMBLE_AUTO;
1009          priv->basic_rate = rate_config &= 0x15f;
1010         write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1011         write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1012
1013         if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
1014                 write_nic_word(dev, ATIMWND, 2);
1015                 write_nic_word(dev, BCN_DMATIME, 256);
1016                 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1017                 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
1018                 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1019
1020                 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1021                 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1022
1023                 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1024         }
1025 }
1026
1027 void rtl8192_link_change(struct net_device *dev)
1028 {
1029         struct r8192_priv *priv = rtllib_priv(dev);
1030         struct rtllib_device* ieee = priv->rtllib;
1031
1032         if (!priv->up)
1033                 return;
1034
1035         if (ieee->state == RTLLIB_LINKED) {
1036                 rtl8192_net_update(dev);
1037                 priv->ops->update_ratr_table(dev);
1038                 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1039                         EnableHWSecurityConfig8192(dev);
1040         } else {
1041                 write_nic_byte(dev, 0x173, 0);
1042         }
1043         rtl8192e_update_msr(dev);
1044
1045         if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
1046                 u32 reg = 0;
1047                 reg = read_nic_dword(dev, RCR);
1048                 if (priv->rtllib->state == RTLLIB_LINKED) {
1049                         if (ieee->IntelPromiscuousModeInfo.bPromiscuousOn)
1050                                 ;
1051                         else
1052                                 priv->ReceiveConfig = reg |= RCR_CBSSID;
1053                 } else
1054                         priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1055
1056                 write_nic_dword(dev, RCR, reg);
1057         }
1058 }
1059
1060 void rtl8192_AllowAllDestAddr(struct net_device* dev,
1061                         bool bAllowAllDA, bool WriteIntoReg)
1062 {
1063         struct r8192_priv* priv = rtllib_priv(dev);
1064
1065         if (bAllowAllDA)
1066                 priv->ReceiveConfig |= RCR_AAP;
1067         else
1068                 priv->ReceiveConfig &= ~RCR_AAP;
1069
1070         if (WriteIntoReg)
1071                 write_nic_dword( dev, RCR, priv->ReceiveConfig );
1072 }
1073
1074
1075 static u8 MRateToHwRate8190Pci(u8 rate)
1076 {
1077         u8  ret = DESC90_RATE1M;
1078
1079         switch (rate) {
1080         case MGN_1M:
1081                 ret = DESC90_RATE1M;
1082                 break;
1083         case MGN_2M:
1084                 ret = DESC90_RATE2M;
1085                 break;
1086         case MGN_5_5M:
1087                 ret = DESC90_RATE5_5M;
1088                 break;
1089         case MGN_11M:
1090                 ret = DESC90_RATE11M;
1091                 break;
1092         case MGN_6M:
1093                 ret = DESC90_RATE6M;
1094                 break;
1095         case MGN_9M:
1096                 ret = DESC90_RATE9M;
1097                 break;
1098         case MGN_12M:
1099                 ret = DESC90_RATE12M;
1100                 break;
1101         case MGN_18M:
1102                 ret = DESC90_RATE18M;
1103                 break;
1104         case MGN_24M:
1105                 ret = DESC90_RATE24M;
1106                 break;
1107         case MGN_36M:
1108                 ret = DESC90_RATE36M;
1109                 break;
1110         case MGN_48M:
1111                 ret = DESC90_RATE48M;
1112                 break;
1113         case MGN_54M:
1114                 ret = DESC90_RATE54M;
1115                 break;
1116         case MGN_MCS0:
1117                 ret = DESC90_RATEMCS0;
1118                 break;
1119         case MGN_MCS1:
1120                 ret = DESC90_RATEMCS1;
1121                 break;
1122         case MGN_MCS2:
1123                 ret = DESC90_RATEMCS2;
1124                 break;
1125         case MGN_MCS3:
1126                 ret = DESC90_RATEMCS3;
1127                 break;
1128         case MGN_MCS4:
1129                 ret = DESC90_RATEMCS4;
1130                 break;
1131         case MGN_MCS5:
1132                 ret = DESC90_RATEMCS5;
1133                 break;
1134         case MGN_MCS6:
1135                 ret = DESC90_RATEMCS6;
1136                 break;
1137         case MGN_MCS7:
1138                 ret = DESC90_RATEMCS7;
1139                 break;
1140         case MGN_MCS8:
1141                 ret = DESC90_RATEMCS8;
1142                 break;
1143         case MGN_MCS9:
1144                 ret = DESC90_RATEMCS9;
1145                 break;
1146         case MGN_MCS10:
1147                 ret = DESC90_RATEMCS10;
1148                 break;
1149         case MGN_MCS11:
1150                 ret = DESC90_RATEMCS11;
1151                 break;
1152         case MGN_MCS12:
1153                 ret = DESC90_RATEMCS12;
1154                 break;
1155         case MGN_MCS13:
1156                 ret = DESC90_RATEMCS13;
1157                 break;
1158         case MGN_MCS14:
1159                 ret = DESC90_RATEMCS14;
1160                 break;
1161         case MGN_MCS15:
1162                 ret = DESC90_RATEMCS15;
1163                 break;
1164         case (0x80|0x20):
1165                 ret = DESC90_RATEMCS32;
1166                 break;
1167         default:
1168                 break;
1169         }
1170         return ret;
1171 }
1172
1173 u8 rtl8192_MapHwQueueToFirmwareQueue(u8 QueueID, u8 priority)
1174 {
1175         u8 QueueSelect = 0x0;
1176
1177         switch (QueueID) {
1178         case BE_QUEUE:
1179                 QueueSelect = QSLT_BE;
1180                 break;
1181
1182         case BK_QUEUE:
1183                 QueueSelect = QSLT_BK;
1184                 break;
1185
1186         case VO_QUEUE:
1187                 QueueSelect = QSLT_VO;
1188                 break;
1189
1190         case VI_QUEUE:
1191                 QueueSelect = QSLT_VI;
1192                 break;
1193         case MGNT_QUEUE:
1194                 QueueSelect = QSLT_MGNT;
1195                 break;
1196         case BEACON_QUEUE:
1197                 QueueSelect = QSLT_BEACON;
1198                 break;
1199         case TXCMD_QUEUE:
1200                 QueueSelect = QSLT_CMD;
1201                 break;
1202         case HIGH_QUEUE:
1203                 QueueSelect = QSLT_HIGH;
1204                 break;
1205         default:
1206                 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection:"
1207                          " %d \n", QueueID);
1208                 break;
1209         }
1210         return QueueSelect;
1211 }
1212
1213
1214 void  rtl8192_tx_fill_desc(struct net_device* dev, tx_desc * pdesc, cb_desc * cb_desc, struct sk_buff* skb)
1215 {
1216     struct r8192_priv *priv = rtllib_priv(dev);
1217     dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1218     TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1219     pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1220     memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
1221     pTxFwInfo->TxHT = (cb_desc->data_rate&0x80)?1:0;
1222     pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)cb_desc->data_rate);
1223     pTxFwInfo->EnableCPUDur = cb_desc->bTxEnableFwCalcDur;
1224     pTxFwInfo->Short    = rtl8192_QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, cb_desc);
1225
1226     if (cb_desc->bAMPDUEnable) {
1227         pTxFwInfo->AllowAggregation = 1;
1228         pTxFwInfo->RxMF = cb_desc->ampdu_factor;
1229         pTxFwInfo->RxAMD = cb_desc->ampdu_density;
1230     } else {
1231         pTxFwInfo->AllowAggregation = 0;
1232         pTxFwInfo->RxMF = 0;
1233         pTxFwInfo->RxAMD = 0;
1234     }
1235
1236     pTxFwInfo->RtsEnable =      (cb_desc->bRTSEnable)?1:0;
1237     pTxFwInfo->CtsEnable =      (cb_desc->bCTSEnable)?1:0;
1238     pTxFwInfo->RtsSTBC =        (cb_desc->bRTSSTBC)?1:0;
1239     pTxFwInfo->RtsHT=           (cb_desc->rts_rate&0x80)?1:0;
1240     pTxFwInfo->RtsRate =                MRateToHwRate8190Pci((u8)cb_desc->rts_rate);
1241     pTxFwInfo->RtsBandwidth = 0;
1242     pTxFwInfo->RtsSubcarrier = cb_desc->RTSSC;
1243     pTxFwInfo->RtsShort =       (pTxFwInfo->RtsHT==0)?(cb_desc->bRTSUseShortPreamble?1:0):(cb_desc->bRTSUseShortGI?1:0);
1244     if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
1245     {
1246         if (cb_desc->bPacketBW)
1247         {
1248             pTxFwInfo->TxBandwidth = 1;
1249             pTxFwInfo->TxSubCarrier = 0;
1250         }
1251         else
1252         {
1253             pTxFwInfo->TxBandwidth = 0;
1254             pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1255         }
1256     } else {
1257         pTxFwInfo->TxBandwidth = 0;
1258         pTxFwInfo->TxSubCarrier = 0;
1259     }
1260
1261     memset((u8*)pdesc,0,12);
1262     pdesc->LINIP = 0;
1263     pdesc->CmdInit = 1;
1264     pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1265     pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1266
1267     pdesc->SecCAMID= 0;
1268     pdesc->RATid = cb_desc->RATRIndex;
1269
1270
1271     pdesc->NoEnc = 1;
1272     pdesc->SecType = 0x0;
1273     if (cb_desc->bHwSec) {
1274         static u8 tmp =0;
1275         if (!tmp) {
1276             RT_TRACE(COMP_DBG, "==>================hw sec\n");
1277             tmp = 1;
1278         }
1279         switch (priv->rtllib->pairwise_key_type) {
1280             case KEY_TYPE_WEP40:
1281             case KEY_TYPE_WEP104:
1282                 pdesc->SecType = 0x1;
1283                 pdesc->NoEnc = 0;
1284                 break;
1285             case KEY_TYPE_TKIP:
1286                 pdesc->SecType = 0x2;
1287                 pdesc->NoEnc = 0;
1288                 break;
1289             case KEY_TYPE_CCMP:
1290                 pdesc->SecType = 0x3;
1291                 pdesc->NoEnc = 0;
1292                 break;
1293             case KEY_TYPE_NA:
1294                 pdesc->SecType = 0x0;
1295                 pdesc->NoEnc = 1;
1296                 break;
1297         }
1298     }
1299
1300     pdesc->PktId = 0x0;
1301
1302     pdesc->QueueSelect = rtl8192_MapHwQueueToFirmwareQueue(cb_desc->queue_index, cb_desc->priority);
1303     pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
1304
1305     pdesc->DISFB = cb_desc->bTxDisableRateFallBack;
1306     pdesc->USERATE = cb_desc->bTxUseDriverAssingedRate;
1307
1308     pdesc->FirstSeg =1;
1309     pdesc->LastSeg = 1;
1310     pdesc->TxBufferSize = skb->len;
1311
1312     pdesc->TxBuffAddr = cpu_to_le32(mapping);
1313 }
1314
1315 void  rtl8192_tx_fill_cmd_desc(struct net_device* dev, tx_desc_cmd * entry,
1316                 cb_desc * cb_desc, struct sk_buff* skb)
1317 {
1318     struct r8192_priv *priv = rtllib_priv(dev);
1319     dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1320
1321     memset(entry,0,12);
1322     entry->LINIP = cb_desc->bLastIniPkt;
1323     entry->FirstSeg = 1;
1324     entry->LastSeg = 1;
1325     if (cb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1326         entry->CmdInit = DESC_PACKET_TYPE_INIT;
1327     } else {
1328         tx_desc* entry_tmp = (tx_desc*)entry;
1329         entry_tmp->CmdInit = DESC_PACKET_TYPE_NORMAL;
1330         entry_tmp->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1331         entry_tmp->PktSize = (u16)(cb_desc->pkt_size + entry_tmp->Offset);
1332         entry_tmp->QueueSelect = QSLT_CMD;
1333         entry_tmp->TxFWInfoSize = 0x08;
1334         entry_tmp->RATid = (u8)DESC_PACKET_TYPE_INIT;
1335     }
1336     entry->TxBufferSize = skb->len;
1337     entry->TxBuffAddr = cpu_to_le32(mapping);
1338     entry->OWN = 1;
1339 }
1340
1341 u8 HwRateToMRate90(bool bIsHT, u8 rate)
1342 {
1343         u8  ret_rate = 0x02;
1344
1345         if (!bIsHT) {
1346                 switch (rate) {
1347                         case DESC90_RATE1M:   ret_rate = MGN_1M;         break;
1348                         case DESC90_RATE2M:   ret_rate = MGN_2M;         break;
1349                         case DESC90_RATE5_5M: ret_rate = MGN_5_5M;       break;
1350                         case DESC90_RATE11M:  ret_rate = MGN_11M;        break;
1351                         case DESC90_RATE6M:   ret_rate = MGN_6M;         break;
1352                         case DESC90_RATE9M:   ret_rate = MGN_9M;         break;
1353                         case DESC90_RATE12M:  ret_rate = MGN_12M;        break;
1354                         case DESC90_RATE18M:  ret_rate = MGN_18M;        break;
1355                         case DESC90_RATE24M:  ret_rate = MGN_24M;        break;
1356                         case DESC90_RATE36M:  ret_rate = MGN_36M;        break;
1357                         case DESC90_RATE48M:  ret_rate = MGN_48M;        break;
1358                         case DESC90_RATE54M:  ret_rate = MGN_54M;        break;
1359
1360                         default:
1361                                               RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
1362                                               break;
1363                 }
1364
1365         } else {
1366                 switch (rate) {
1367                         case DESC90_RATEMCS0:   ret_rate = MGN_MCS0;    break;
1368                         case DESC90_RATEMCS1:   ret_rate = MGN_MCS1;    break;
1369                         case DESC90_RATEMCS2:   ret_rate = MGN_MCS2;    break;
1370                         case DESC90_RATEMCS3:   ret_rate = MGN_MCS3;    break;
1371                         case DESC90_RATEMCS4:   ret_rate = MGN_MCS4;    break;
1372                         case DESC90_RATEMCS5:   ret_rate = MGN_MCS5;    break;
1373                         case DESC90_RATEMCS6:   ret_rate = MGN_MCS6;    break;
1374                         case DESC90_RATEMCS7:   ret_rate = MGN_MCS7;    break;
1375                         case DESC90_RATEMCS8:   ret_rate = MGN_MCS8;    break;
1376                         case DESC90_RATEMCS9:   ret_rate = MGN_MCS9;    break;
1377                         case DESC90_RATEMCS10:  ret_rate = MGN_MCS10;   break;
1378                         case DESC90_RATEMCS11:  ret_rate = MGN_MCS11;   break;
1379                         case DESC90_RATEMCS12:  ret_rate = MGN_MCS12;   break;
1380                         case DESC90_RATEMCS13:  ret_rate = MGN_MCS13;   break;
1381                         case DESC90_RATEMCS14:  ret_rate = MGN_MCS14;   break;
1382                         case DESC90_RATEMCS15:  ret_rate = MGN_MCS15;   break;
1383                         case DESC90_RATEMCS32:  ret_rate = (0x80|0x20); break;
1384
1385                         default:
1386                                                 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
1387                                                 break;
1388                 }
1389         }
1390
1391         return ret_rate;
1392 }
1393
1394 long
1395 rtl8192_signal_scale_mapping(struct r8192_priv * priv,
1396         long currsig
1397         )
1398 {
1399         long retsig;
1400
1401         if (currsig >= 61 && currsig <= 100)
1402         {
1403                 retsig = 90 + ((currsig - 60) / 4);
1404         }
1405         else if (currsig >= 41 && currsig <= 60)
1406         {
1407                 retsig = 78 + ((currsig - 40) / 2);
1408         }
1409         else if (currsig >= 31 && currsig <= 40)
1410         {
1411                 retsig = 66 + (currsig - 30);
1412         }
1413         else if (currsig >= 21 && currsig <= 30)
1414         {
1415                 retsig = 54 + (currsig - 20);
1416         }
1417         else if (currsig >= 5 && currsig <= 20)
1418         {
1419                 retsig = 42 + (((currsig - 5) * 2) / 3);
1420         }
1421         else if (currsig == 4)
1422         {
1423                 retsig = 36;
1424         }
1425         else if (currsig == 3)
1426         {
1427                 retsig = 27;
1428         }
1429         else if (currsig == 2)
1430         {
1431                 retsig = 18;
1432         }
1433         else if (currsig == 1)
1434         {
1435                 retsig = 9;
1436         }
1437         else
1438         {
1439                 retsig = currsig;
1440         }
1441
1442         return retsig;
1443 }
1444
1445
1446 #define         rx_hal_is_cck_rate(_pdrvinfo)\
1447                         (_pdrvinfo->RxRate == DESC90_RATE1M ||\
1448                         _pdrvinfo->RxRate == DESC90_RATE2M ||\
1449                         _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
1450                         _pdrvinfo->RxRate == DESC90_RATE11M) &&\
1451                         !_pdrvinfo->RxHT
1452 void rtl8192_query_rxphystatus(
1453         struct r8192_priv * priv,
1454         struct rtllib_rx_stats * pstats,
1455         prx_desc  pdesc,
1456         prx_fwinfo   pdrvinfo,
1457         struct rtllib_rx_stats * precord_stats,
1458         bool bpacket_match_bssid,
1459         bool bpacket_toself,
1460         bool bPacketBeacon,
1461         bool bToSelfBA
1462         )
1463 {
1464         phy_sts_ofdm_819xpci_t* pofdm_buf;
1465         phy_sts_cck_819xpci_t   *       pcck_buf;
1466         phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
1467         u8                              *prxpkt;
1468         u8                              i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
1469         char                            rx_pwr[4], rx_pwr_all=0;
1470         char                            rx_snrX, rx_evmX;
1471         u8                              evm, pwdb_all;
1472         u32                     RSSI, total_rssi=0;
1473         u8                              is_cck_rate=0;
1474         u8                              rf_rx_num = 0;
1475
1476         static  u8              check_reg824 = 0;
1477         static  u32             reg824_bit9 = 0;
1478
1479         priv->stats.numqry_phystatus++;
1480
1481
1482         is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
1483         memset(precord_stats, 0, sizeof(struct rtllib_rx_stats));
1484         pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
1485         pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
1486         pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;
1487         pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
1488         pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
1489         if (check_reg824 == 0)
1490         {
1491                 reg824_bit9 = rtl8192_QueryBBReg(priv->rtllib->dev, rFPGA0_XA_HSSIParameter2, 0x200);
1492                 check_reg824 = 1;
1493         }
1494
1495
1496         prxpkt = (u8*)pdrvinfo;
1497
1498         prxpkt += sizeof(rx_fwinfo);
1499
1500         pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
1501         pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
1502
1503         pstats->RxMIMOSignalQuality[0] = -1;
1504         pstats->RxMIMOSignalQuality[1] = -1;
1505         precord_stats->RxMIMOSignalQuality[0] = -1;
1506         precord_stats->RxMIMOSignalQuality[1] = -1;
1507
1508         if (is_cck_rate)
1509         {
1510
1511                 u8 report;
1512
1513                 priv->stats.numqry_phystatusCCK++;
1514                 if (!reg824_bit9)
1515                 {
1516                         report = pcck_buf->cck_agc_rpt & 0xc0;
1517                         report = report>>6;
1518                         switch (report)
1519                         {
1520                                 case 0x3:
1521                                         rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
1522                                         break;
1523                                 case 0x2:
1524                                         rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
1525                                         break;
1526                                 case 0x1:
1527                                         rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
1528                                         break;
1529                                 case 0x0:
1530                                         rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
1531                                         break;
1532                         }
1533                 }
1534                 else
1535                 {
1536                         report = pcck_buf->cck_agc_rpt & 0x60;
1537                         report = report>>5;
1538                         switch (report)
1539                         {
1540                                 case 0x3:
1541                                         rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
1542                                         break;
1543                                 case 0x2:
1544                                         rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
1545                                         break;
1546                                 case 0x1:
1547                                         rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
1548                                         break;
1549                                 case 0x0:
1550                                         rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
1551                                         break;
1552                         }
1553                 }
1554
1555                 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
1556                 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
1557                 pstats->RecvSignalPower = rx_pwr_all;
1558
1559                 if (bpacket_match_bssid)
1560                 {
1561                         u8      sq;
1562
1563                         if (pstats->RxPWDBAll > 40)
1564                         {
1565                                 sq = 100;
1566                         }else
1567                         {
1568                                 sq = pcck_buf->sq_rpt;
1569
1570                                 if (pcck_buf->sq_rpt > 64)
1571                                         sq = 0;
1572                                 else if (pcck_buf->sq_rpt < 20)
1573                                         sq = 100;
1574                                 else
1575                                         sq = ((64-sq) * 100) / 44;
1576                         }
1577                         pstats->SignalQuality = precord_stats->SignalQuality = sq;
1578                         pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
1579                         pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
1580                 }
1581         }
1582         else
1583         {
1584                 priv->stats.numqry_phystatusHT++;
1585                 for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
1586                 {
1587                         if (priv->brfpath_rxenable[i])
1588                                 rf_rx_num++;
1589
1590                         rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
1591
1592                         tmp_rxsnr = pofdm_buf->rxsnr_X[i];
1593                         rx_snrX = (char)(tmp_rxsnr);
1594                         rx_snrX /= 2;
1595                         priv->stats.rxSNRdB[i] = (long)rx_snrX;
1596
1597                         RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
1598                         if (priv->brfpath_rxenable[i])
1599                                 total_rssi += RSSI;
1600
1601                         if (bpacket_match_bssid)
1602                         {
1603                                 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
1604                                 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
1605                         }
1606                 }
1607
1608
1609                 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
1610                 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
1611
1612                 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
1613                 pstats->RxPower = precord_stats->RxPower =      rx_pwr_all;
1614                 pstats->RecvSignalPower = rx_pwr_all;
1615                 if (pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
1616                         pdrvinfo->RxRate<=DESC90_RATEMCS15)
1617                         max_spatial_stream = 2;
1618                 else
1619                         max_spatial_stream = 1;
1620
1621                 for (i=0; i<max_spatial_stream; i++)
1622                 {
1623                         tmp_rxevm = pofdm_buf->rxevm_X[i];
1624                         rx_evmX = (char)(tmp_rxevm);
1625
1626                         rx_evmX /= 2;
1627
1628                         evm = rtl819x_evm_dbtopercentage(rx_evmX);
1629                         if (bpacket_match_bssid)
1630                         {
1631                                 if (i==0)
1632                                         pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
1633                                 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
1634                         }
1635                 }
1636
1637
1638                 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
1639                 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
1640                 if (pdrvinfo->BW)
1641                         priv->stats.received_bwtype[1+prxsc->rxsc]++;
1642                 else
1643                         priv->stats.received_bwtype[0]++;
1644         }
1645
1646         if (is_cck_rate)
1647         {
1648                 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl8192_signal_scale_mapping(priv,(long)pwdb_all));
1649
1650         }
1651         else
1652         {
1653                 if (rf_rx_num != 0)
1654                         pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl8192_signal_scale_mapping(priv,(long)(total_rssi/=rf_rx_num)));
1655         }
1656 }
1657
1658 void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct rtllib_rx_stats * pprevious_stats, struct rtllib_rx_stats * pcurrent_stats)
1659 {
1660         bool bcheck = false;
1661         u8      rfpath;
1662         u32 nspatial_stream, tmp_val;
1663         static u32 slide_rssi_index=0, slide_rssi_statistics=0;
1664         static u32 slide_evm_index=0, slide_evm_statistics=0;
1665         static u32 last_rssi=0, last_evm=0;
1666         static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
1667         static u32 last_beacon_adc_pwdb=0;
1668
1669         struct rtllib_hdr_3addr *hdr;
1670         u16 sc ;
1671         unsigned int frag,seq;
1672         hdr = (struct rtllib_hdr_3addr *)buffer;
1673         sc = le16_to_cpu(hdr->seq_ctl);
1674         frag = WLAN_GET_SEQ_FRAG(sc);
1675         seq = WLAN_GET_SEQ_SEQ(sc);
1676         pcurrent_stats->Seq_Num = seq;
1677         if (!pprevious_stats->bIsAMPDU)
1678                 bcheck = true;
1679
1680         if (slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
1681         {
1682                 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
1683                 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
1684                 priv->stats.slide_rssi_total -= last_rssi;
1685         }
1686         priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
1687
1688         priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
1689         if (slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
1690                 slide_rssi_index = 0;
1691
1692         tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
1693         priv->stats.signal_strength = rtl819x_translate_todbm(priv, (u8)tmp_val);
1694         pcurrent_stats->rssi = priv->stats.signal_strength;
1695         if (!pprevious_stats->bPacketMatchBSSID)
1696         {
1697                 if (!pprevious_stats->bToSelfBA)
1698                         return;
1699         }
1700
1701         if (!bcheck)
1702                 return;
1703
1704         rtl819x_process_cck_rxpathsel(priv,pprevious_stats);
1705
1706         priv->stats.num_process_phyinfo++;
1707         if (!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
1708         {
1709                 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
1710                 {
1711                         if (!rtl8192_phy_CheckIsLegalRFPath(priv->rtllib->dev, rfpath))
1712                                 continue;
1713                         RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath]  = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
1714                         if (priv->stats.rx_rssi_percentage[rfpath] == 0)
1715                         {
1716                                 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
1717                         }
1718                         if (pprevious_stats->RxMIMOSignalStrength[rfpath]  > priv->stats.rx_rssi_percentage[rfpath])
1719                         {
1720                                 priv->stats.rx_rssi_percentage[rfpath] =
1721                                         ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
1722                                         (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
1723                                 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath]  + 1;
1724                         }
1725                         else
1726                         {
1727                                 priv->stats.rx_rssi_percentage[rfpath] =
1728                                         ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
1729                                         (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
1730                         }
1731                         RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath]  = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
1732                 }
1733         }
1734
1735
1736         if (pprevious_stats->bPacketBeacon)
1737         {
1738                 if (slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
1739                 {
1740                         slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
1741                         last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
1742                         priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
1743                 }
1744                 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
1745                 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
1746                 slide_beacon_adc_pwdb_index++;
1747                 if (slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
1748                         slide_beacon_adc_pwdb_index = 0;
1749                 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
1750                 if (pprevious_stats->RxPWDBAll >= 3)
1751                         pprevious_stats->RxPWDBAll -= 3;
1752         }
1753
1754         RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
1755                                 pprevious_stats->bIsCCK? "CCK": "OFDM",
1756                                 pprevious_stats->RxPWDBAll);
1757
1758         if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
1759         {
1760                 if (priv->undecorated_smoothed_pwdb < 0)
1761                 {
1762                         priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
1763                 }
1764                 if (pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
1765                 {
1766                         priv->undecorated_smoothed_pwdb =
1767                                         ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
1768                                         (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
1769                         priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
1770                 }
1771                 else
1772                 {
1773                         priv->undecorated_smoothed_pwdb =
1774                                         ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
1775                                         (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
1776                 }
1777                 rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
1778         }
1779
1780         if (pprevious_stats->SignalQuality == 0)
1781         {
1782         }
1783         else
1784         {
1785                 if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
1786                         if (slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
1787                                 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
1788                                 last_evm = priv->stats.slide_evm[slide_evm_index];
1789                                 priv->stats.slide_evm_total -= last_evm;
1790                         }
1791
1792                         priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
1793
1794                         priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
1795                         if (slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
1796                                 slide_evm_index = 0;
1797
1798                         tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
1799                         priv->stats.signal_quality = tmp_val;
1800                         priv->stats.last_signal_strength_inpercent = tmp_val;
1801                 }
1802
1803                 if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
1804                 {
1805                         for (nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++)
1806                         {
1807                                 if (pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
1808                                 {
1809                                         if (priv->stats.rx_evm_percentage[nspatial_stream] == 0)
1810                                         {
1811                                                 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
1812                                         }
1813                                         priv->stats.rx_evm_percentage[nspatial_stream] =
1814                                                 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
1815                                                 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
1816                                 }
1817                         }
1818                 }
1819         }
1820
1821 }
1822
1823
1824 void rtl8192_TranslateRxSignalStuff(struct net_device *dev,
1825         struct sk_buff *skb,
1826         struct rtllib_rx_stats * pstats,
1827         prx_desc pdesc,
1828         prx_fwinfo pdrvinfo)
1829 {
1830     struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1831     bool bpacket_match_bssid, bpacket_toself;
1832     bool bPacketBeacon=false;
1833     struct rtllib_hdr_3addr *hdr;
1834     bool bToSelfBA=false;
1835     static struct rtllib_rx_stats  previous_stats;
1836     u16 fc,type;
1837
1838
1839     u8* tmp_buf;
1840     u8  *praddr;
1841
1842     tmp_buf = skb->data + pstats->RxDrvInfoSize + pstats->RxBufShift;
1843
1844     hdr = (struct rtllib_hdr_3addr *)tmp_buf;
1845     fc = le16_to_cpu(hdr->frame_ctl);
1846     type = WLAN_FC_GET_TYPE(fc);
1847     praddr = hdr->addr1;
1848
1849     bpacket_match_bssid = ((RTLLIB_FTYPE_CTL != type) &&
1850             (!compare_ether_addr(priv->rtllib->current_network.bssid,
1851                        (fc & RTLLIB_FCTL_TODS)? hdr->addr1 :
1852                        (fc & RTLLIB_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
1853             && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
1854     bpacket_toself =  bpacket_match_bssid & (!compare_ether_addr(praddr, priv->rtllib->dev->dev_addr));
1855     if (WLAN_FC_GET_FRAMETYPE(fc)== RTLLIB_STYPE_BEACON)
1856     {
1857         bPacketBeacon = true;
1858     }
1859     if (bpacket_match_bssid)
1860     {
1861         priv->stats.numpacket_matchbssid++;
1862     }
1863     if (bpacket_toself){
1864         priv->stats.numpacket_toself++;
1865     }
1866     rtl8192_process_phyinfo(priv, tmp_buf,&previous_stats, pstats);
1867     rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &previous_stats, bpacket_match_bssid,
1868             bpacket_toself ,bPacketBeacon, bToSelfBA);
1869     rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
1870 }
1871
1872 void rtl8192_UpdateReceivedRateHistogramStatistics(
1873         struct net_device *dev,
1874         struct rtllib_rx_stats* pstats
1875         )
1876 {
1877         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1878         u32 rcvType=1;
1879         u32 rateIndex;
1880         u32 preamble_guardinterval;
1881
1882         if (pstats->bCRC)
1883                 rcvType = 2;
1884         else if (pstats->bICV)
1885                 rcvType = 3;
1886
1887         if (pstats->bShortPreamble)
1888                 preamble_guardinterval = 1;
1889         else
1890                 preamble_guardinterval = 0;
1891
1892         switch (pstats->rate)
1893         {
1894                 case MGN_1M:    rateIndex = 0;  break;
1895                 case MGN_2M:    rateIndex = 1;  break;
1896                 case MGN_5_5M:  rateIndex = 2;  break;
1897                 case MGN_11M:   rateIndex = 3;  break;
1898                 case MGN_6M:    rateIndex = 4;  break;
1899                 case MGN_9M:    rateIndex = 5;  break;
1900                 case MGN_12M:   rateIndex = 6;  break;
1901                 case MGN_18M:   rateIndex = 7;  break;
1902                 case MGN_24M:   rateIndex = 8;  break;
1903                 case MGN_36M:   rateIndex = 9;  break;
1904                 case MGN_48M:   rateIndex = 10; break;
1905                 case MGN_54M:   rateIndex = 11; break;
1906                 case MGN_MCS0:  rateIndex = 12; break;
1907                 case MGN_MCS1:  rateIndex = 13; break;
1908                 case MGN_MCS2:  rateIndex = 14; break;
1909                 case MGN_MCS3:  rateIndex = 15; break;
1910                 case MGN_MCS4:  rateIndex = 16; break;
1911                 case MGN_MCS5:  rateIndex = 17; break;
1912                 case MGN_MCS6:  rateIndex = 18; break;
1913                 case MGN_MCS7:  rateIndex = 19; break;
1914                 case MGN_MCS8:  rateIndex = 20; break;
1915                 case MGN_MCS9:  rateIndex = 21; break;
1916                 case MGN_MCS10: rateIndex = 22; break;
1917                 case MGN_MCS11: rateIndex = 23; break;
1918                 case MGN_MCS12: rateIndex = 24; break;
1919                 case MGN_MCS13: rateIndex = 25; break;
1920                 case MGN_MCS14: rateIndex = 26; break;
1921                 case MGN_MCS15: rateIndex = 27; break;
1922                 default:        rateIndex = 28; break;
1923         }
1924         priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
1925         priv->stats.received_rate_histogram[0][rateIndex]++;
1926         priv->stats.received_rate_histogram[rcvType][rateIndex]++;
1927 }
1928
1929 bool rtl8192_rx_query_status_desc(struct net_device* dev, struct rtllib_rx_stats*  stats,
1930                 rx_desc *pdesc, struct sk_buff* skb)
1931 {
1932         struct r8192_priv *priv = rtllib_priv(dev);
1933
1934         stats->bICV = pdesc->ICV;
1935         stats->bCRC = pdesc->CRC32;
1936         stats->bHwError = pdesc->CRC32 | pdesc->ICV;
1937
1938         stats->Length = pdesc->Length;
1939         if (stats->Length < 24)
1940                 stats->bHwError |= 1;
1941
1942         if (stats->bHwError) {
1943                 stats->bShift = false;
1944
1945                 if (pdesc->CRC32) {
1946                         if (pdesc->Length <500)
1947                                 priv->stats.rxcrcerrmin++;
1948                         else if (pdesc->Length >1000)
1949                                 priv->stats.rxcrcerrmax++;
1950                         else
1951                                 priv->stats.rxcrcerrmid++;
1952                 }
1953                 return false;
1954         } else {
1955                 prx_fwinfo pDrvInfo = NULL;
1956                 stats->RxDrvInfoSize = pdesc->RxDrvInfoSize;
1957                 stats->RxBufShift = ((pdesc->Shift)&0x03);
1958                 stats->Decrypted = !pdesc->SWDec;
1959
1960                 pDrvInfo = (rx_fwinfo *)(skb->data + stats->RxBufShift);
1961
1962                 stats->rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
1963                 stats->bShortPreamble = pDrvInfo->SPLCP;
1964
1965                 rtl8192_UpdateReceivedRateHistogramStatistics(dev, stats);
1966
1967                 stats->bIsAMPDU = (pDrvInfo->PartAggr==1);
1968                 stats->bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
1969
1970                 stats->TimeStampLow = pDrvInfo->TSFL;
1971                 stats->TimeStampHigh = read_nic_dword(dev, TSFR+4);
1972
1973                 rtl819x_UpdateRxPktTimeStamp(dev, stats);
1974
1975                 if ((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
1976                         stats->bShift = 1;
1977
1978                 stats->RxIs40MHzPacket = pDrvInfo->BW;
1979
1980                 rtl8192_TranslateRxSignalStuff(dev,skb, stats, pdesc, pDrvInfo);
1981
1982                 if (pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
1983                         RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
1984                                         pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
1985                 skb_trim(skb, skb->len - 4/*sCrcLng*/);
1986
1987
1988                 stats->packetlength = stats->Length-4;
1989                 stats->fraglength = stats->packetlength;
1990                 stats->fragoffset = 0;
1991                 stats->ntotalfrag = 1;
1992                 return true;
1993         }
1994 }
1995
1996 void rtl8192_halt_adapter(struct net_device *dev, bool reset)
1997 {
1998         struct r8192_priv *priv = rtllib_priv(dev);
1999         int i;
2000         u8      OpMode;
2001         u8      u1bTmp;
2002         u32     ulRegRead;
2003
2004         OpMode = RT_OP_MODE_NO_LINK;
2005         priv->rtllib->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
2006
2007 #if 1
2008         if (!priv->rtllib->bSupportRemoteWakeUp)
2009         {
2010                 u1bTmp = 0x0;
2011                 write_nic_byte(dev, CMDR, u1bTmp);
2012         }
2013 #else
2014         cmd=read_nic_byte(dev,CMDR);
2015         write_nic_byte(dev, CMDR, cmd &~ (CR_TE|CR_RE));
2016 #endif
2017
2018         mdelay(20);
2019
2020         if (!reset)
2021         {
2022                 mdelay(150);
2023
2024                 priv->bHwRfOffAction = 2;
2025
2026                 if (!priv->rtllib->bSupportRemoteWakeUp)
2027                 {
2028                         {
2029                                 PHY_SetRtl8192eRfOff(dev);
2030                         }
2031                         ulRegRead = read_nic_dword(dev,CPU_GEN);
2032                         ulRegRead|=CPU_GEN_SYSTEM_RESET;
2033                         write_nic_dword(dev,CPU_GEN, ulRegRead);
2034                 }
2035                 else
2036                 {
2037                         write_nic_dword(dev, WFCRC0, 0xffffffff);
2038                         write_nic_dword(dev, WFCRC1, 0xffffffff);
2039                         write_nic_dword(dev, WFCRC2, 0xffffffff);
2040
2041
2042                         write_nic_byte(dev, PMR, 0x5);
2043                         write_nic_byte(dev, MacBlkCtrl, 0xa);
2044                 }
2045         }
2046
2047         for (i = 0; i < MAX_QUEUE_SIZE; i++) {
2048                 skb_queue_purge(&priv->rtllib->skb_waitQ [i]);
2049         }
2050         for (i = 0; i < MAX_QUEUE_SIZE; i++) {
2051                 skb_queue_purge(&priv->rtllib->skb_aggQ [i]);
2052         }
2053
2054         skb_queue_purge(&priv->skb_queue);
2055         return;
2056 }
2057
2058 void rtl8192_update_ratr_table(struct net_device* dev)
2059 {
2060         struct r8192_priv* priv = rtllib_priv(dev);
2061         struct rtllib_device* ieee = priv->rtllib;
2062         u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2063         u32 ratr_value = 0;
2064         u8 rate_index = 0;
2065
2066         rtl8192_config_rate(dev, (u16*)(&ratr_value));
2067         ratr_value |= (*(u16*)(pMcsRate)) << 12;
2068         switch (ieee->mode)
2069         {
2070                 case IEEE_A:
2071                         ratr_value &= 0x00000FF0;
2072                         break;
2073                 case IEEE_B:
2074                         ratr_value &= 0x0000000F;
2075                         break;
2076                 case IEEE_G:
2077                 case IEEE_G|IEEE_B:
2078                         ratr_value &= 0x00000FF7;
2079                         break;
2080                 case IEEE_N_24G:
2081                 case IEEE_N_5G:
2082                         if (ieee->pHTInfo->PeerMimoPs == 0)
2083                                 ratr_value &= 0x0007F007;
2084                         else{
2085                                 if (priv->rf_type == RF_1T2R)
2086                                         ratr_value &= 0x000FF007;
2087                                 else
2088                                         ratr_value &= 0x0F81F007;
2089                         }
2090                         break;
2091                 default:
2092                         break;
2093         }
2094         ratr_value &= 0x0FFFFFFF;
2095         if (ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2096                 ratr_value |= 0x80000000;
2097         }else if (!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2098                 ratr_value |= 0x80000000;
2099         }
2100         write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2101         write_nic_byte(dev, UFWP, 1);
2102 }
2103
2104 void
2105 rtl8192_InitializeVariables(struct net_device  *dev)
2106 {
2107         struct r8192_priv *priv = rtllib_priv(dev);
2108
2109         strcpy(priv->nick, "rtl8192E");
2110
2111 #ifdef _ENABLE_SW_BEACON
2112         priv->rtllib->softmac_features  = IEEE_SOFTMAC_SCAN |
2113                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2114                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE  |
2115                 IEEE_SOFTMAC_BEACONS;
2116 #else
2117         priv->rtllib->softmac_features  = IEEE_SOFTMAC_SCAN |
2118                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2119                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE /* |
2120                 IEEE_SOFTMAC_BEACONS*/;
2121 #endif
2122
2123         priv->rtllib->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2124
2125         priv->ShortRetryLimit = 0x30;
2126         priv->LongRetryLimit = 0x30;
2127
2128         priv->EarlyRxThreshold = 7;
2129         priv->pwrGroupCnt = 0;
2130
2131         priv->bIgnoreSilentReset = false;
2132         priv->enable_gpio0 = 0;
2133
2134         priv->TransmitConfig = 0;
2135
2136         priv->ReceiveConfig = RCR_ADD3  |
2137                 RCR_AMF | RCR_ADF |
2138                 RCR_AICV |
2139                 RCR_AB | RCR_AM | RCR_APM |
2140                 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2141                 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2142
2143         priv->irq_mask[0] =     (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |\
2144                                 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |\
2145                                 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW    |\
2146                                 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2147
2148
2149         priv->MidHighPwrTHR_L1 = 0x3B;
2150         priv->MidHighPwrTHR_L2 = 0x40;
2151         priv->PwrDomainProtect = false;
2152
2153         priv->bfirst_after_down = 0;
2154 }
2155
2156 void rtl8192_EnableInterrupt(struct net_device *dev)
2157 {
2158         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2159         priv->irq_enabled = 1;
2160
2161         write_nic_dword(dev,INTA_MASK, priv->irq_mask[0]);
2162
2163 }
2164
2165 void rtl8192_DisableInterrupt(struct net_device *dev)
2166 {
2167         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2168
2169         write_nic_dword(dev,INTA_MASK,0);
2170
2171         priv->irq_enabled = 0;
2172 }
2173
2174 void rtl8192_ClearInterrupt(struct net_device *dev)
2175 {
2176         u32 tmp = 0;
2177         tmp = read_nic_dword(dev, ISR);
2178         write_nic_dword(dev, ISR, tmp);
2179 }
2180
2181
2182 void rtl8192_enable_rx(struct net_device *dev)
2183 {
2184     struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2185     write_nic_dword(dev, RDQDA,priv->rx_ring_dma[RX_MPDU_QUEUE]);
2186 }
2187
2188 u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
2189 void rtl8192_enable_tx(struct net_device *dev)
2190 {
2191     struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2192     u32 i;
2193
2194     for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
2195         write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
2196 }
2197
2198
2199 void rtl8192_beacon_disable(struct net_device *dev)
2200 {
2201         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2202         u32 reg;
2203
2204         reg = read_nic_dword(priv->rtllib->dev,INTA_MASK);
2205
2206         reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2207         write_nic_dword(priv->rtllib->dev, INTA_MASK, reg);
2208 }
2209
2210 void rtl8192_interrupt_recognized(struct net_device *dev, u32 *p_inta, u32 *p_intb)
2211 {
2212         *p_inta = read_nic_dword(dev, ISR) ;
2213         write_nic_dword(dev,ISR,*p_inta);
2214 }
2215
2216 bool rtl8192_HalRxCheckStuck(struct net_device *dev)
2217 {
2218         struct r8192_priv *priv = rtllib_priv(dev);
2219         u16               RegRxCounter = read_nic_word(dev, 0x130);
2220         bool              bStuck = false;
2221         static u8         rx_chk_cnt = 0;
2222         u32             SlotIndex = 0, TotalRxStuckCount = 0;
2223         u8              i;
2224         u8              SilentResetRxSoltNum = 4;
2225
2226         RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",
2227                         __func__, RegRxCounter,priv->RxCounter);
2228
2229         rx_chk_cnt++;
2230         if (priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
2231         {
2232                 rx_chk_cnt = 0;
2233         } else if ((priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5)) &&
2234                 (((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
2235                   (priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_40M)) ||
2236                 ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
2237                  (priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)))) {
2238                 if (rx_chk_cnt < 2) {
2239                         return bStuck;
2240                 } else {
2241                         rx_chk_cnt = 0;
2242                 }
2243         } else if ((((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
2244                   (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_40M)) ||
2245                 ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
2246                  (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_20M))) &&
2247                 priv->undecorated_smoothed_pwdb >= VeryLowRSSI) {
2248                 if (rx_chk_cnt < 4) {
2249                         return bStuck;
2250                 } else {
2251                         rx_chk_cnt = 0;
2252                 }
2253         } else {
2254                 if (rx_chk_cnt < 8) {
2255                         return bStuck;
2256                 } else {
2257                         rx_chk_cnt = 0;
2258                 }
2259         }
2260
2261
2262         SlotIndex = (priv->SilentResetRxSlotIndex++)%SilentResetRxSoltNum;
2263
2264         if (priv->RxCounter==RegRxCounter)
2265         {
2266                 priv->SilentResetRxStuckEvent[SlotIndex] = 1;
2267
2268                 for ( i = 0; i < SilentResetRxSoltNum ; i++ )
2269                         TotalRxStuckCount += priv->SilentResetRxStuckEvent[i];
2270
2271                 if (TotalRxStuckCount  == SilentResetRxSoltNum)
2272                 {
2273                 bStuck = true;
2274                         for ( i = 0; i < SilentResetRxSoltNum ; i++ )
2275                                 TotalRxStuckCount += priv->SilentResetRxStuckEvent[i];
2276                 }
2277
2278
2279         } else {
2280                 priv->SilentResetRxStuckEvent[SlotIndex] = 0;
2281         }
2282
2283         priv->RxCounter = RegRxCounter;
2284
2285         return bStuck;
2286 }
2287
2288 bool rtl8192_HalTxCheckStuck(struct net_device *dev)
2289 {
2290         struct r8192_priv *priv = rtllib_priv(dev);
2291         bool    bStuck = false;
2292         u16    RegTxCounter = read_nic_word(dev, 0x128);
2293
2294         RT_TRACE(COMP_RESET, "%s():RegTxCounter is %d,TxCounter is %d\n",
2295                         __func__,RegTxCounter,priv->TxCounter);
2296
2297         if (priv->TxCounter == RegTxCounter)
2298                 bStuck = true;
2299
2300         priv->TxCounter = RegTxCounter;
2301
2302         return bStuck;
2303 }
2304
2305 bool rtl8192_GetNmodeSupportBySecCfg(struct net_device *dev)
2306 {
2307         struct r8192_priv *priv = rtllib_priv(dev);
2308         struct rtllib_device *ieee = priv->rtllib;
2309         if (ieee->rtllib_ap_sec_type &&
2310            (ieee->rtllib_ap_sec_type(priv->rtllib)&(SEC_ALG_WEP|SEC_ALG_TKIP))) {
2311                 return false;
2312         } else {
2313                 return true;
2314         }
2315 }
2316
2317 bool rtl8192_GetHalfNmodeSupportByAPs(struct net_device* dev)
2318 {
2319         bool                    Reval;
2320         struct r8192_priv* priv = rtllib_priv(dev);
2321         struct rtllib_device* ieee = priv->rtllib;
2322
2323         if (ieee->bHalfWirelessN24GMode == true)
2324                 Reval = true;
2325         else
2326                 Reval =  false;
2327
2328         return Reval;
2329 }
2330
2331 u8 rtl8192_QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2332 {
2333         u8   tmp_Short;
2334
2335         tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2336         if (TxHT==1 && TxRate != DESC90_RATEMCS15)
2337                 tmp_Short = 0;
2338
2339         return tmp_Short;
2340 }
2341
2342 void
2343 ActUpdateChannelAccessSetting(
2344         struct net_device*                      dev,
2345         WIRELESS_MODE                   WirelessMode,
2346         PCHANNEL_ACCESS_SETTING ChnlAccessSetting
2347         )
2348 {
2349                 struct r8192_priv* priv = rtllib_priv(dev);
2350
2351                 return;
2352
2353                 {
2354                         u16     SIFS_Timer;
2355
2356                         if (WirelessMode == WIRELESS_MODE_G)
2357                                 SIFS_Timer = 0x0e0e;
2358                         else
2359                                  SIFS_Timer = priv->SifsTime;
2360
2361                         priv->rtllib->SetHwRegHandler( dev, HW_VAR_SIFS,  (u8*)&SIFS_Timer);
2362                 }
2363
2364 }