2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2008 Cavium Networks
8 * Some parts of the code were originally released under BSD license:
10 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions are
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18 * notice, this list of conditions and the following disclaimer.
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21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials provided
23 * with the distribution.
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30 * This Software, including technical data, may be subject to U.S. export
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35 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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44 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/init.h>
49 #include <linux/pci.h>
50 #include <linux/interrupt.h>
51 #include <linux/platform_device.h>
52 #include <linux/usb.h>
54 #include <linux/time.h>
55 #include <linux/delay.h>
57 #include <asm/octeon/cvmx.h>
58 #include <asm/octeon/cvmx-iob-defs.h>
60 #include <linux/usb/hcd.h>
62 #include <linux/err.h>
64 #include <asm/octeon/octeon.h>
65 #include <asm/octeon/cvmx-helper.h>
66 #include <asm/octeon/cvmx-sysinfo.h>
67 #include <asm/octeon/cvmx-helper-board.h>
69 #include "cvmx-usbcx-defs.h"
70 #include "cvmx-usbnx-defs.h"
73 * enum cvmx_usb_speed - the possible USB device speeds
75 * @CVMX_USB_SPEED_HIGH: Device is operation at 480Mbps
76 * @CVMX_USB_SPEED_FULL: Device is operation at 12Mbps
77 * @CVMX_USB_SPEED_LOW: Device is operation at 1.5Mbps
80 CVMX_USB_SPEED_HIGH = 0,
81 CVMX_USB_SPEED_FULL = 1,
82 CVMX_USB_SPEED_LOW = 2,
86 * enum cvmx_usb_transfer - the possible USB transfer types
88 * @CVMX_USB_TRANSFER_CONTROL: USB transfer type control for hub and status
90 * @CVMX_USB_TRANSFER_ISOCHRONOUS: USB transfer type isochronous for low
91 * priority periodic transfers
92 * @CVMX_USB_TRANSFER_BULK: USB transfer type bulk for large low priority
94 * @CVMX_USB_TRANSFER_INTERRUPT: USB transfer type interrupt for high priority
97 enum cvmx_usb_transfer {
98 CVMX_USB_TRANSFER_CONTROL = 0,
99 CVMX_USB_TRANSFER_ISOCHRONOUS = 1,
100 CVMX_USB_TRANSFER_BULK = 2,
101 CVMX_USB_TRANSFER_INTERRUPT = 3,
105 * enum cvmx_usb_direction - the transfer directions
107 * @CVMX_USB_DIRECTION_OUT: Data is transferring from Octeon to the device/host
108 * @CVMX_USB_DIRECTION_IN: Data is transferring from the device/host to Octeon
110 enum cvmx_usb_direction {
111 CVMX_USB_DIRECTION_OUT,
112 CVMX_USB_DIRECTION_IN,
116 * enum cvmx_usb_complete - possible callback function status codes
118 * @CVMX_USB_COMPLETE_SUCCESS: The transaction / operation finished without
120 * @CVMX_USB_COMPLETE_SHORT: FIXME: This is currently not implemented
121 * @CVMX_USB_COMPLETE_CANCEL: The transaction was canceled while in flight
122 * by a user call to cvmx_usb_cancel
123 * @CVMX_USB_COMPLETE_ERROR: The transaction aborted with an unexpected
125 * @CVMX_USB_COMPLETE_STALL: The transaction received a USB STALL response
127 * @CVMX_USB_COMPLETE_XACTERR: The transaction failed with an error from the
128 * device even after a number of retries
129 * @CVMX_USB_COMPLETE_DATATGLERR: The transaction failed with a data toggle
130 * error even after a number of retries
131 * @CVMX_USB_COMPLETE_BABBLEERR: The transaction failed with a babble error
132 * @CVMX_USB_COMPLETE_FRAMEERR: The transaction failed with a frame error
133 * even after a number of retries
135 enum cvmx_usb_complete {
136 CVMX_USB_COMPLETE_SUCCESS,
137 CVMX_USB_COMPLETE_SHORT,
138 CVMX_USB_COMPLETE_CANCEL,
139 CVMX_USB_COMPLETE_ERROR,
140 CVMX_USB_COMPLETE_STALL,
141 CVMX_USB_COMPLETE_XACTERR,
142 CVMX_USB_COMPLETE_DATATGLERR,
143 CVMX_USB_COMPLETE_BABBLEERR,
144 CVMX_USB_COMPLETE_FRAMEERR,
148 * struct cvmx_usb_port_status - the USB port status information
150 * @port_enabled: 1 = Usb port is enabled, 0 = disabled
151 * @port_over_current: 1 = Over current detected, 0 = Over current not
152 * detected. Octeon doesn't support over current detection.
153 * @port_powered: 1 = Port power is being supplied to the device, 0 =
154 * power is off. Octeon doesn't support turning port power
156 * @port_speed: Current port speed.
157 * @connected: 1 = A device is connected to the port, 0 = No device is
159 * @connect_change: 1 = Device connected state changed since the last set
162 struct cvmx_usb_port_status {
163 uint32_t reserved : 25;
164 uint32_t port_enabled : 1;
165 uint32_t port_over_current : 1;
166 uint32_t port_powered : 1;
167 enum cvmx_usb_speed port_speed : 2;
168 uint32_t connected : 1;
169 uint32_t connect_change : 1;
173 * union cvmx_usb_control_header - the structure of a Control packet header
175 * @s.request_type: Bit 7 tells the direction: 1=IN, 0=OUT
176 * @s.request The standard usb request to make
177 * @s.value Value parameter for the request in little endian format
178 * @s.index Index for the request in little endian format
179 * @s.length Length of the data associated with this request in
180 * little endian format
182 union cvmx_usb_control_header {
185 uint64_t request_type : 8;
186 uint64_t request : 8;
189 uint64_t length : 16;
194 * struct cvmx_usb_iso_packet - descriptor for Isochronous packets
196 * @offset: This is the offset in bytes into the main buffer where this data
198 * @length: This is the length in bytes of the data.
199 * @status: This is the status of this individual packet transfer.
201 struct cvmx_usb_iso_packet {
204 enum cvmx_usb_complete status;
208 * enum cvmx_usb_initialize_flags - flags used by the initialization function
210 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI: The USB port uses a 12MHz crystal
211 * as clock source at USB_XO and
213 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND: The USB port uses 12/24/48MHz 2.5V
214 * board clock source at USB_XO.
215 * USB_XI should be tied to GND.
216 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK: Mask for clock speed field
217 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ: Speed of reference clock or
219 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ: Speed of reference clock
220 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ: Speed of reference clock
221 * @CVMX_USB_INITIALIZE_FLAGS_NO_DMA: Disable DMA and used polled IO for
222 * data transfer use for the USB
224 enum cvmx_usb_initialize_flags {
225 CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI = 1 << 0,
226 CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND = 1 << 1,
227 CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK = 3 << 3,
228 CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ = 1 << 3,
229 CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ = 2 << 3,
230 CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ = 3 << 3,
231 /* Bits 3-4 used to encode the clock frequency */
232 CVMX_USB_INITIALIZE_FLAGS_NO_DMA = 1 << 5,
236 * enum cvmx_usb_pipe_flags - internal flags for a pipe.
238 * @__CVMX_USB_PIPE_FLAGS_OPEN: Used internally to determine if a pipe is
240 * @__CVMX_USB_PIPE_FLAGS_SCHEDULED: Used internally to determine if a pipe is
241 * actively using hardware. Do not use.
242 * @__CVMX_USB_PIPE_FLAGS_NEED_PING: Used internally to determine if a high
243 * speed pipe is in the ping state. Do not
246 enum cvmx_usb_pipe_flags {
247 __CVMX_USB_PIPE_FLAGS_OPEN = 1 << 16,
248 __CVMX_USB_PIPE_FLAGS_SCHEDULED = 1 << 17,
249 __CVMX_USB_PIPE_FLAGS_NEED_PING = 1 << 18,
252 /* Normal prefetch that use the pref instruction. */
253 #define CVMX_PREFETCH(address, offset) asm volatile ("pref %[type], %[off](%[rbase])" : : [rbase] "d" (address), [off] "I" (offset), [type] "n" (0))
255 /* Maximum number of times to retry failed transactions */
256 #define MAX_RETRIES 3
258 /* Maximum number of pipes that can be open at once */
261 /* Maximum number of outstanding transactions across all pipes */
262 #define MAX_TRANSACTIONS 256
264 /* Maximum number of hardware channels supported by the USB block */
265 #define MAX_CHANNELS 8
267 /* The highest valid USB device address */
268 #define MAX_USB_ADDRESS 127
270 /* The highest valid USB endpoint number */
271 #define MAX_USB_ENDPOINT 15
273 /* The highest valid port number on a hub */
274 #define MAX_USB_HUB_PORT 15
277 * The low level hardware can transfer a maximum of this number of bytes in each
278 * transfer. The field is 19 bits wide
280 #define MAX_TRANSFER_BYTES ((1<<19)-1)
283 * The low level hardware can transfer a maximum of this number of packets in
284 * each transfer. The field is 10 bits wide
286 #define MAX_TRANSFER_PACKETS ((1<<10)-1)
288 enum cvmx_usb_transaction_flags {
289 __CVMX_USB_TRANSACTION_FLAGS_IN_USE = 1<<16,
293 USB_CLOCK_TYPE_REF_12,
294 USB_CLOCK_TYPE_REF_24,
295 USB_CLOCK_TYPE_REF_48,
296 USB_CLOCK_TYPE_CRYSTAL_12,
300 * Logical transactions may take numerous low level
301 * transactions, especially when splits are concerned. This
302 * enum represents all of the possible stages a transaction can
303 * be in. Note that split completes are always even. This is so
304 * the NAK handler can backup to the previous low level
305 * transaction with a simple clearing of bit 0.
307 enum cvmx_usb_stage {
308 CVMX_USB_STAGE_NON_CONTROL,
309 CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE,
310 CVMX_USB_STAGE_SETUP,
311 CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE,
313 CVMX_USB_STAGE_DATA_SPLIT_COMPLETE,
314 CVMX_USB_STAGE_STATUS,
315 CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE,
319 * struct cvmx_usb_transaction - describes each pending USB transaction
320 * regardless of type. These are linked together
321 * to form a list of pending requests for a pipe.
323 * @prev: Transaction before this one in the pipe.
324 * @next: Transaction after this one in the pipe.
325 * @type: Type of transaction, duplicated of the pipe.
326 * @flags: State flags for this transaction.
327 * @buffer: User's physical buffer address to read/write.
328 * @buffer_length: Size of the user's buffer in bytes.
329 * @control_header: For control transactions, physical address of the 8
330 * byte standard header.
331 * @iso_start_frame: For ISO transactions, the starting frame number.
332 * @iso_number_packets: For ISO transactions, the number of packets in the
334 * @iso_packets: For ISO transactions, the sub packets in the request.
335 * @actual_bytes: Actual bytes transfer for this transaction.
336 * @stage: For control transactions, the current stage.
339 struct cvmx_usb_transaction {
340 struct cvmx_usb_transaction *prev;
341 struct cvmx_usb_transaction *next;
342 enum cvmx_usb_transfer type;
343 enum cvmx_usb_transaction_flags flags;
346 uint64_t control_header;
348 int iso_number_packets;
349 struct cvmx_usb_iso_packet *iso_packets;
354 enum cvmx_usb_stage stage;
359 * struct cvmx_usb_pipe - a pipe represents a virtual connection between Octeon
360 * and some USB device. It contains a list of pending
361 * request to the device.
363 * @prev: Pipe before this one in the list
364 * @next: Pipe after this one in the list
365 * @head: The first pending transaction
366 * @tail: The last pending transaction
367 * @interval: For periodic pipes, the interval between packets in
369 * @next_tx_frame: The next frame this pipe is allowed to transmit on
370 * @flags: State flags for this pipe
371 * @device_speed: Speed of device connected to this pipe
372 * @transfer_type: Type of transaction supported by this pipe
373 * @transfer_dir: IN or OUT. Ignored for Control
374 * @multi_count: Max packet in a row for the device
375 * @max_packet: The device's maximum packet size in bytes
376 * @device_addr: USB device address at other end of pipe
377 * @endpoint_num: USB endpoint number at other end of pipe
378 * @hub_device_addr: Hub address this device is connected to
379 * @hub_port: Hub port this device is connected to
380 * @pid_toggle: This toggles between 0/1 on every packet send to track
381 * the data pid needed
382 * @channel: Hardware DMA channel for this pipe
383 * @split_sc_frame: The low order bits of the frame number the split
384 * complete should be sent on
386 struct cvmx_usb_pipe {
387 struct cvmx_usb_pipe *prev;
388 struct cvmx_usb_pipe *next;
389 struct cvmx_usb_transaction *head;
390 struct cvmx_usb_transaction *tail;
392 uint64_t next_tx_frame;
393 enum cvmx_usb_pipe_flags flags;
394 enum cvmx_usb_speed device_speed;
395 enum cvmx_usb_transfer transfer_type;
396 enum cvmx_usb_direction transfer_dir;
400 uint8_t endpoint_num;
401 uint8_t hub_device_addr;
405 int8_t split_sc_frame;
409 * struct cvmx_usb_pipe_list
411 * @head: Head of the list, or NULL if empty.
412 * @tail: Tail if the list, or NULL if empty.
414 struct cvmx_usb_pipe_list {
415 struct cvmx_usb_pipe *head;
416 struct cvmx_usb_pipe *tail;
419 struct cvmx_usb_tx_fifo {
424 } entry[MAX_CHANNELS+1];
430 * struct cvmx_usb_state - the state of the USB block
432 * init_flags: Flags passed to initialize.
433 * index: Which USB block this is for.
434 * idle_hardware_channels: Bit set for every idle hardware channel.
435 * usbcx_hprt: Stored port status so we don't need to read a CSR to
437 * pipe_for_channel: Map channels to pipes.
438 * free_transaction_head: List of free transactions head.
439 * free_transaction_tail: List of free transactions tail.
440 * pipe: Storage for pipes.
441 * transaction: Storage for transactions.
442 * indent: Used by debug output to indent functions.
443 * port_status: Last port status used for change notification.
444 * free_pipes: List of all pipes that are currently closed.
445 * idle_pipes: List of open pipes that have no transactions.
446 * active_pipes: Active pipes indexed by transfer type.
447 * frame_number: Increments every SOF interrupt for time keeping.
448 * active_split: Points to the current active split, or NULL.
450 struct cvmx_usb_state {
453 int idle_hardware_channels;
454 union cvmx_usbcx_hprt usbcx_hprt;
455 struct cvmx_usb_pipe *pipe_for_channel[MAX_CHANNELS];
456 struct cvmx_usb_transaction *free_transaction_head;
457 struct cvmx_usb_transaction *free_transaction_tail;
458 struct cvmx_usb_pipe pipe[MAX_PIPES];
459 struct cvmx_usb_transaction transaction[MAX_TRANSACTIONS];
461 struct cvmx_usb_port_status port_status;
462 struct cvmx_usb_pipe_list free_pipes;
463 struct cvmx_usb_pipe_list idle_pipes;
464 struct cvmx_usb_pipe_list active_pipes[4];
465 uint64_t frame_number;
466 struct cvmx_usb_transaction *active_split;
467 struct cvmx_usb_tx_fifo periodic;
468 struct cvmx_usb_tx_fifo nonperiodic;
473 struct cvmx_usb_state usb;
474 struct tasklet_struct dequeue_tasklet;
475 struct list_head dequeue_list;
478 /* This macro spins on a field waiting for it to reach a value */
479 #define CVMX_WAIT_FOR_FIELD32(address, type, field, op, value, timeout_usec)\
482 uint64_t done = cvmx_get_cycle() + (uint64_t)timeout_usec * \
483 octeon_get_clock_rate() / 1000000; \
486 c.u32 = __cvmx_usb_read_csr32(usb, address); \
487 if (c.s.field op (value)) { \
490 } else if (cvmx_get_cycle() > done) { \
500 * This macro logically sets a single field in a CSR. It does the sequence
501 * read, modify, and write
503 #define USB_SET_FIELD32(address, type, field, value) \
506 c.u32 = __cvmx_usb_read_csr32(usb, address); \
508 __cvmx_usb_write_csr32(usb, address, c.u32); \
511 /* Returns the IO address to push/pop stuff data from the FIFOs */
512 #define USB_FIFO_ADDRESS(channel, usb_index) (CVMX_USBCX_GOTGCTL(usb_index) + ((channel)+1)*0x1000)
514 static int octeon_usb_get_clock_type(void)
516 switch (cvmx_sysinfo_get()->board_type) {
517 case CVMX_BOARD_TYPE_BBGW_REF:
518 case CVMX_BOARD_TYPE_LANAI2_A:
519 case CVMX_BOARD_TYPE_LANAI2_U:
520 case CVMX_BOARD_TYPE_LANAI2_G:
521 case CVMX_BOARD_TYPE_UBNT_E100:
522 return USB_CLOCK_TYPE_CRYSTAL_12;
524 return USB_CLOCK_TYPE_REF_48;
528 * Read a USB 32bit CSR. It performs the necessary address swizzle
529 * for 32bit CSRs and logs the value in a readable format if
532 * @usb: USB block this access is for
533 * @address: 64bit address to read
535 * Returns: Result of the read
537 static inline uint32_t __cvmx_usb_read_csr32(struct cvmx_usb_state *usb,
540 uint32_t result = cvmx_read64_uint32(address ^ 4);
546 * Write a USB 32bit CSR. It performs the necessary address
547 * swizzle for 32bit CSRs and logs the value in a readable format
548 * if debugging is on.
550 * @usb: USB block this access is for
551 * @address: 64bit address to write
552 * @value: Value to write
554 static inline void __cvmx_usb_write_csr32(struct cvmx_usb_state *usb,
555 uint64_t address, uint32_t value)
557 cvmx_write64_uint32(address ^ 4, value);
558 cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
563 * Read a USB 64bit CSR. It logs the value in a readable format if
566 * @usb: USB block this access is for
567 * @address: 64bit address to read
569 * Returns: Result of the read
571 static inline uint64_t __cvmx_usb_read_csr64(struct cvmx_usb_state *usb,
574 uint64_t result = cvmx_read64_uint64(address);
580 * Write a USB 64bit CSR. It logs the value in a readable format
581 * if debugging is on.
583 * @usb: USB block this access is for
584 * @address: 64bit address to write
585 * @value: Value to write
587 static inline void __cvmx_usb_write_csr64(struct cvmx_usb_state *usb,
588 uint64_t address, uint64_t value)
590 cvmx_write64_uint64(address, value);
594 * Return non zero if this pipe connects to a non HIGH speed
595 * device through a high speed hub.
597 * @usb: USB block this access is for
598 * @pipe: Pipe to check
600 * Returns: Non zero if we need to do split transactions
602 static inline int __cvmx_usb_pipe_needs_split(struct cvmx_usb_state *usb,
603 struct cvmx_usb_pipe *pipe)
605 return ((pipe->device_speed != CVMX_USB_SPEED_HIGH) && (usb->usbcx_hprt.s.prtspd == CVMX_USB_SPEED_HIGH));
610 * Trivial utility function to return the correct PID for a pipe
612 * @pipe: pipe to check
614 * Returns: PID for pipe
616 static inline int __cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe)
618 if (pipe->pid_toggle)
619 return 2; /* Data1 */
621 return 0; /* Data0 */
626 * Return the number of USB ports supported by this Octeon
627 * chip. If the chip doesn't support USB, or is not supported
628 * by this API, a zero will be returned. Most Octeon chips
629 * support one usb port, but some support two ports.
630 * cvmx_usb_initialize() must be called on independent
631 * struct cvmx_usb_state.
633 * Returns: Number of port, zero if usb isn't supported
635 static int cvmx_usb_get_num_ports(void)
639 if (OCTEON_IS_MODEL(OCTEON_CN56XX))
641 else if (OCTEON_IS_MODEL(OCTEON_CN52XX))
643 else if (OCTEON_IS_MODEL(OCTEON_CN50XX))
645 else if (OCTEON_IS_MODEL(OCTEON_CN31XX))
647 else if (OCTEON_IS_MODEL(OCTEON_CN30XX))
657 * Allocate a usb transaction for use
659 * @usb: USB device state populated by
660 * cvmx_usb_initialize().
662 * Returns: Transaction or NULL
664 static inline struct cvmx_usb_transaction *__cvmx_usb_alloc_transaction(struct cvmx_usb_state *usb)
666 struct cvmx_usb_transaction *t;
667 t = usb->free_transaction_head;
669 usb->free_transaction_head = t->next;
670 if (!usb->free_transaction_head)
671 usb->free_transaction_tail = NULL;
674 memset(t, 0, sizeof(*t));
675 t->flags = __CVMX_USB_TRANSACTION_FLAGS_IN_USE;
682 * Free a usb transaction
684 * @usb: USB device state populated by
685 * cvmx_usb_initialize().
687 * Transaction to free
689 static inline void __cvmx_usb_free_transaction(struct cvmx_usb_state *usb,
690 struct cvmx_usb_transaction *transaction)
692 transaction->flags = 0;
693 transaction->prev = NULL;
694 transaction->next = NULL;
695 if (usb->free_transaction_tail)
696 usb->free_transaction_tail->next = transaction;
698 usb->free_transaction_head = transaction;
699 usb->free_transaction_tail = transaction;
704 * Add a pipe to the tail of a list
705 * @list: List to add pipe to
708 static inline void __cvmx_usb_append_pipe(struct cvmx_usb_pipe_list *list, struct cvmx_usb_pipe *pipe)
711 pipe->prev = list->tail;
713 list->tail->next = pipe;
721 * Remove a pipe from a list
722 * @list: List to remove pipe from
723 * @pipe: Pipe to remove
725 static inline void __cvmx_usb_remove_pipe(struct cvmx_usb_pipe_list *list, struct cvmx_usb_pipe *pipe)
727 if (list->head == pipe) {
728 list->head = pipe->next;
731 list->head->prev = NULL;
734 } else if (list->tail == pipe) {
735 list->tail = pipe->prev;
736 list->tail->next = NULL;
739 pipe->prev->next = pipe->next;
740 pipe->next->prev = pipe->prev;
748 * Initialize a USB port for use. This must be called before any
749 * other access to the Octeon USB port is made. The port starts
750 * off in the disabled state.
752 * @usb: Pointer to an empty struct cvmx_usb_state
753 * that will be populated by the initialize call.
754 * This structure is then passed to all other USB
757 * Which Octeon USB port to initialize.
759 * Returns: 0 or a negative error code.
761 static int cvmx_usb_initialize(struct cvmx_usb_state *usb,
764 union cvmx_usbnx_clk_ctl usbn_clk_ctl;
765 union cvmx_usbnx_usbp_ctl_status usbn_usbp_ctl_status;
766 enum cvmx_usb_initialize_flags flags = 0;
768 /* At first allow 0-1 for the usb port number */
769 if ((usb_port_number < 0) || (usb_port_number > 1))
771 /* For all chips except 52XX there is only one port */
772 if (!OCTEON_IS_MODEL(OCTEON_CN52XX) && (usb_port_number > 0))
774 /* Try to determine clock type automatically */
775 if (octeon_usb_get_clock_type() == USB_CLOCK_TYPE_CRYSTAL_12) {
776 /* Only 12 MHZ crystals are supported */
777 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI;
779 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND;
781 switch (octeon_usb_get_clock_type()) {
782 case USB_CLOCK_TYPE_REF_12:
783 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ;
785 case USB_CLOCK_TYPE_REF_24:
786 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ;
788 case USB_CLOCK_TYPE_REF_48:
789 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ;
797 memset(usb, 0, sizeof(*usb));
798 usb->init_flags = flags;
800 /* Initialize the USB state structure */
803 usb->index = usb_port_number;
805 /* Initialize the transaction double linked list */
806 usb->free_transaction_head = NULL;
807 usb->free_transaction_tail = NULL;
808 for (i = 0; i < MAX_TRANSACTIONS; i++)
809 __cvmx_usb_free_transaction(usb, usb->transaction + i);
810 for (i = 0; i < MAX_PIPES; i++)
811 __cvmx_usb_append_pipe(&usb->free_pipes, usb->pipe + i);
815 * Power On Reset and PHY Initialization
817 * 1. Wait for DCOK to assert (nothing to do)
819 * 2a. Write USBN0/1_CLK_CTL[POR] = 1 and
820 * USBN0/1_CLK_CTL[HRST,PRST,HCLK_RST] = 0
822 usbn_clk_ctl.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index));
823 usbn_clk_ctl.s.por = 1;
824 usbn_clk_ctl.s.hrst = 0;
825 usbn_clk_ctl.s.prst = 0;
826 usbn_clk_ctl.s.hclk_rst = 0;
827 usbn_clk_ctl.s.enable = 0;
829 * 2b. Select the USB reference clock/crystal parameters by writing
830 * appropriate values to USBN0/1_CLK_CTL[P_C_SEL, P_RTYPE, P_COM_ON]
832 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND) {
834 * The USB port uses 12/24/48MHz 2.5V board clock
835 * source at USB_XO. USB_XI should be tied to GND.
836 * Most Octeon evaluation boards require this setting
838 if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
839 /* From CN31XX,CN30XX manual */
840 usbn_clk_ctl.cn31xx.p_rclk = 1;
841 usbn_clk_ctl.cn31xx.p_xenbn = 0;
842 } else if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN50XX))
843 /* From CN56XX,CN50XX manual */
844 usbn_clk_ctl.cn56xx.p_rtype = 2;
846 /* From CN52XX manual */
847 usbn_clk_ctl.cn52xx.p_rtype = 1;
849 switch (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK) {
850 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ:
851 usbn_clk_ctl.s.p_c_sel = 0;
853 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ:
854 usbn_clk_ctl.s.p_c_sel = 1;
856 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ:
857 usbn_clk_ctl.s.p_c_sel = 2;
862 * The USB port uses a 12MHz crystal as clock source
863 * at USB_XO and USB_XI
865 if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
866 /* From CN31XX,CN30XX manual */
867 usbn_clk_ctl.cn31xx.p_rclk = 1;
868 usbn_clk_ctl.cn31xx.p_xenbn = 1;
869 } else if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN50XX))
870 /* From CN56XX,CN50XX manual */
871 usbn_clk_ctl.cn56xx.p_rtype = 0;
873 /* From CN52XX manual */
874 usbn_clk_ctl.cn52xx.p_rtype = 0;
876 usbn_clk_ctl.s.p_c_sel = 0;
879 * 2c. Select the HCLK via writing USBN0/1_CLK_CTL[DIVIDE, DIVIDE2] and
880 * setting USBN0/1_CLK_CTL[ENABLE] = 1. Divide the core clock down
881 * such that USB is as close as possible to 125Mhz
884 int divisor = (octeon_get_clock_rate()+125000000-1)/125000000;
885 /* Lower than 4 doesn't seem to work properly */
888 usbn_clk_ctl.s.divide = divisor;
889 usbn_clk_ctl.s.divide2 = 0;
891 __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
893 /* 2d. Write USBN0/1_CLK_CTL[HCLK_RST] = 1 */
894 usbn_clk_ctl.s.hclk_rst = 1;
895 __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
897 /* 2e. Wait 64 core-clock cycles for HCLK to stabilize */
900 * 3. Program the power-on reset field in the USBN clock-control
902 * USBN_CLK_CTL[POR] = 0
904 usbn_clk_ctl.s.por = 0;
905 __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
907 /* 4. Wait 1 ms for PHY clock to start */
910 * 5. Program the Reset input from automatic test equipment field in the
911 * USBP control and status register:
912 * USBN_USBP_CTL_STATUS[ATE_RESET] = 1
914 usbn_usbp_ctl_status.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index));
915 usbn_usbp_ctl_status.s.ate_reset = 1;
916 __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
917 usbn_usbp_ctl_status.u64);
918 /* 6. Wait 10 cycles */
921 * 7. Clear ATE_RESET field in the USBN clock-control register:
922 * USBN_USBP_CTL_STATUS[ATE_RESET] = 0
924 usbn_usbp_ctl_status.s.ate_reset = 0;
925 __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
926 usbn_usbp_ctl_status.u64);
928 * 8. Program the PHY reset field in the USBN clock-control register:
929 * USBN_CLK_CTL[PRST] = 1
931 usbn_clk_ctl.s.prst = 1;
932 __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
935 * 9. Program the USBP control and status register to select host or
936 * device mode. USBN_USBP_CTL_STATUS[HST_MODE] = 0 for host, = 1 for
939 usbn_usbp_ctl_status.s.hst_mode = 0;
940 __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
941 usbn_usbp_ctl_status.u64);
945 * 11. Program the hreset_n field in the USBN clock-control register:
946 * USBN_CLK_CTL[HRST] = 1
948 usbn_clk_ctl.s.hrst = 1;
949 __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
951 /* 12. Proceed to USB core initialization */
952 usbn_clk_ctl.s.enable = 1;
953 __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
958 * USB Core Initialization
960 * 1. Read USBC_GHWCFG1, USBC_GHWCFG2, USBC_GHWCFG3, USBC_GHWCFG4 to
961 * determine USB core configuration parameters.
965 * 2. Program the following fields in the global AHB configuration
966 * register (USBC_GAHBCFG)
967 * DMA mode, USBC_GAHBCFG[DMAEn]: 1 = DMA mode, 0 = slave mode
968 * Burst length, USBC_GAHBCFG[HBSTLEN] = 0
969 * Nonperiodic TxFIFO empty level (slave mode only),
970 * USBC_GAHBCFG[NPTXFEMPLVL]
971 * Periodic TxFIFO empty level (slave mode only),
972 * USBC_GAHBCFG[PTXFEMPLVL]
973 * Global interrupt mask, USBC_GAHBCFG[GLBLINTRMSK] = 1
976 union cvmx_usbcx_gahbcfg usbcx_gahbcfg;
977 /* Due to an errata, CN31XX doesn't support DMA */
978 if (OCTEON_IS_MODEL(OCTEON_CN31XX))
979 usb->init_flags |= CVMX_USB_INITIALIZE_FLAGS_NO_DMA;
980 usbcx_gahbcfg.u32 = 0;
981 usbcx_gahbcfg.s.dmaen = !(usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA);
982 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
983 /* Only use one channel with non DMA */
984 usb->idle_hardware_channels = 0x1;
985 else if (OCTEON_IS_MODEL(OCTEON_CN5XXX))
986 /* CN5XXX have an errata with channel 3 */
987 usb->idle_hardware_channels = 0xf7;
989 usb->idle_hardware_channels = 0xff;
990 usbcx_gahbcfg.s.hbstlen = 0;
991 usbcx_gahbcfg.s.nptxfemplvl = 1;
992 usbcx_gahbcfg.s.ptxfemplvl = 1;
993 usbcx_gahbcfg.s.glblintrmsk = 1;
994 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GAHBCFG(usb->index),
998 * 3. Program the following fields in USBC_GUSBCFG register.
999 * HS/FS timeout calibration, USBC_GUSBCFG[TOUTCAL] = 0
1000 * ULPI DDR select, USBC_GUSBCFG[DDRSEL] = 0
1001 * USB turnaround time, USBC_GUSBCFG[USBTRDTIM] = 0x5
1002 * PHY low-power clock select, USBC_GUSBCFG[PHYLPWRCLKSEL] = 0
1005 union cvmx_usbcx_gusbcfg usbcx_gusbcfg;
1006 usbcx_gusbcfg.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index));
1007 usbcx_gusbcfg.s.toutcal = 0;
1008 usbcx_gusbcfg.s.ddrsel = 0;
1009 usbcx_gusbcfg.s.usbtrdtim = 0x5;
1010 usbcx_gusbcfg.s.phylpwrclksel = 0;
1011 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index),
1015 * 4. The software must unmask the following bits in the USBC_GINTMSK
1017 * OTG interrupt mask, USBC_GINTMSK[OTGINTMSK] = 1
1018 * Mode mismatch interrupt mask, USBC_GINTMSK[MODEMISMSK] = 1
1021 union cvmx_usbcx_gintmsk usbcx_gintmsk;
1024 usbcx_gintmsk.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GINTMSK(usb->index));
1025 usbcx_gintmsk.s.otgintmsk = 1;
1026 usbcx_gintmsk.s.modemismsk = 1;
1027 usbcx_gintmsk.s.hchintmsk = 1;
1028 usbcx_gintmsk.s.sofmsk = 0;
1029 /* We need RX FIFO interrupts if we don't have DMA */
1030 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
1031 usbcx_gintmsk.s.rxflvlmsk = 1;
1032 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index),
1036 * Disable all channel interrupts. We'll enable them per channel
1039 for (channel = 0; channel < 8; channel++)
1040 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
1045 * Host Port Initialization
1047 * 1. Program the host-port interrupt-mask field to unmask,
1048 * USBC_GINTMSK[PRTINT] = 1
1050 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk,
1052 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk,
1055 * 2. Program the USBC_HCFG register to select full-speed host
1056 * or high-speed host.
1059 union cvmx_usbcx_hcfg usbcx_hcfg;
1060 usbcx_hcfg.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCFG(usb->index));
1061 usbcx_hcfg.s.fslssupp = 0;
1062 usbcx_hcfg.s.fslspclksel = 0;
1063 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCFG(usb->index), usbcx_hcfg.u32);
1066 * 3. Program the port power bit to drive VBUS on the USB,
1067 * USBC_HPRT[PRTPWR] = 1
1069 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtpwr, 1);
1072 * Steps 4-15 from the manual are done later in the port enable
1081 * Shutdown a USB port after a call to cvmx_usb_initialize().
1082 * The port should be disabled with all pipes closed when this
1083 * function is called.
1085 * @usb: USB device state populated by cvmx_usb_initialize().
1087 * Returns: 0 or a negative error code.
1089 static int cvmx_usb_shutdown(struct cvmx_usb_state *usb)
1091 union cvmx_usbnx_clk_ctl usbn_clk_ctl;
1093 /* Make sure all pipes are closed */
1094 if (usb->idle_pipes.head ||
1095 usb->active_pipes[CVMX_USB_TRANSFER_ISOCHRONOUS].head ||
1096 usb->active_pipes[CVMX_USB_TRANSFER_INTERRUPT].head ||
1097 usb->active_pipes[CVMX_USB_TRANSFER_CONTROL].head ||
1098 usb->active_pipes[CVMX_USB_TRANSFER_BULK].head)
1101 /* Disable the clocks and put them in power on reset */
1102 usbn_clk_ctl.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index));
1103 usbn_clk_ctl.s.enable = 1;
1104 usbn_clk_ctl.s.por = 1;
1105 usbn_clk_ctl.s.hclk_rst = 1;
1106 usbn_clk_ctl.s.prst = 0;
1107 usbn_clk_ctl.s.hrst = 0;
1108 __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
1115 * Enable a USB port. After this call succeeds, the USB port is
1116 * online and servicing requests.
1118 * @usb: USB device state populated by cvmx_usb_initialize().
1120 * Returns: 0 or a negative error code.
1122 static int cvmx_usb_enable(struct cvmx_usb_state *usb)
1124 union cvmx_usbcx_ghwcfg3 usbcx_ghwcfg3;
1126 usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
1129 * If the port is already enabled the just return. We don't need to do
1132 if (usb->usbcx_hprt.s.prtena)
1135 /* If there is nothing plugged into the port then fail immediately */
1136 if (!usb->usbcx_hprt.s.prtconnsts) {
1140 /* Program the port reset bit to start the reset process */
1141 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtrst, 1);
1144 * Wait at least 50ms (high speed), or 10ms (full speed) for the reset
1145 * process to complete.
1149 /* Program the port reset bit to 0, USBC_HPRT[PRTRST] = 0 */
1150 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtrst, 0);
1152 /* Wait for the USBC_HPRT[PRTENA]. */
1153 if (CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt,
1154 prtena, ==, 1, 100000))
1158 * Read the port speed field to get the enumerated speed,
1159 * USBC_HPRT[PRTSPD].
1161 usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
1162 usbcx_ghwcfg3.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GHWCFG3(usb->index));
1165 * 13. Program the USBC_GRXFSIZ register to select the size of the
1166 * receive FIFO (25%).
1168 USB_SET_FIELD32(CVMX_USBCX_GRXFSIZ(usb->index), union cvmx_usbcx_grxfsiz,
1169 rxfdep, usbcx_ghwcfg3.s.dfifodepth / 4);
1171 * 14. Program the USBC_GNPTXFSIZ register to select the size and the
1172 * start address of the non- periodic transmit FIFO for nonperiodic
1173 * transactions (50%).
1176 union cvmx_usbcx_gnptxfsiz siz;
1177 siz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index));
1178 siz.s.nptxfdep = usbcx_ghwcfg3.s.dfifodepth / 2;
1179 siz.s.nptxfstaddr = usbcx_ghwcfg3.s.dfifodepth / 4;
1180 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index), siz.u32);
1183 * 15. Program the USBC_HPTXFSIZ register to select the size and start
1184 * address of the periodic transmit FIFO for periodic transactions
1188 union cvmx_usbcx_hptxfsiz siz;
1189 siz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index));
1190 siz.s.ptxfsize = usbcx_ghwcfg3.s.dfifodepth / 4;
1191 siz.s.ptxfstaddr = 3 * usbcx_ghwcfg3.s.dfifodepth / 4;
1192 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index), siz.u32);
1194 /* Flush all FIFOs */
1195 USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, txfnum, 0x10);
1196 USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, txfflsh, 1);
1197 CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl,
1198 txfflsh, ==, 0, 100);
1199 USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, rxfflsh, 1);
1200 CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl,
1201 rxfflsh, ==, 0, 100);
1208 * Disable a USB port. After this call the USB port will not
1209 * generate data transfers and will not generate events.
1210 * Transactions in process will fail and call their
1211 * associated callbacks.
1213 * @usb: USB device state populated by cvmx_usb_initialize().
1215 * Returns: 0 or a negative error code.
1217 static int cvmx_usb_disable(struct cvmx_usb_state *usb)
1219 /* Disable the port */
1220 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtena, 1);
1226 * Get the current state of the USB port. Use this call to
1227 * determine if the usb port has anything connected, is enabled,
1228 * or has some sort of error condition. The return value of this
1229 * call has "changed" bits to signal of the value of some fields
1230 * have changed between calls.
1232 * @usb: USB device state populated by cvmx_usb_initialize().
1234 * Returns: Port status information
1236 static struct cvmx_usb_port_status cvmx_usb_get_status(struct cvmx_usb_state *usb)
1238 union cvmx_usbcx_hprt usbc_hprt;
1239 struct cvmx_usb_port_status result;
1241 memset(&result, 0, sizeof(result));
1243 usbc_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
1244 result.port_enabled = usbc_hprt.s.prtena;
1245 result.port_over_current = usbc_hprt.s.prtovrcurract;
1246 result.port_powered = usbc_hprt.s.prtpwr;
1247 result.port_speed = usbc_hprt.s.prtspd;
1248 result.connected = usbc_hprt.s.prtconnsts;
1249 result.connect_change = (result.connected != usb->port_status.connected);
1255 * Convert a USB transaction into a handle
1257 * @usb: USB device state populated by cvmx_usb_initialize().
1259 * Transaction to get handle for
1263 static inline int __cvmx_usb_get_submit_handle(struct cvmx_usb_state *usb,
1264 struct cvmx_usb_transaction *transaction)
1266 return ((unsigned long)transaction - (unsigned long)usb->transaction) /
1267 sizeof(*transaction);
1272 * Convert a USB pipe into a handle
1274 * @usb: USB device state populated by cvmx_usb_initialize().
1275 * @pipe: Pipe to get handle for
1279 static inline int __cvmx_usb_get_pipe_handle(struct cvmx_usb_state *usb,
1280 struct cvmx_usb_pipe *pipe)
1282 return ((unsigned long)pipe - (unsigned long)usb->pipe) / sizeof(*pipe);
1287 * Open a virtual pipe between the host and a USB device. A pipe
1288 * must be opened before data can be transferred between a device
1291 * @usb: USB device state populated by cvmx_usb_initialize().
1293 * USB device address to open the pipe to
1296 * USB endpoint number to open the pipe to
1299 * The speed of the device the pipe is going
1300 * to. This must match the device's speed,
1301 * which may be different than the port speed.
1302 * @max_packet: The maximum packet length the device can
1303 * transmit/receive (low speed=0-8, full
1304 * speed=0-1023, high speed=0-1024). This value
1305 * comes from the standard endpoint descriptor
1306 * field wMaxPacketSize bits <10:0>.
1308 * The type of transfer this pipe is for.
1310 * The direction the pipe is in. This is not
1311 * used for control pipes.
1312 * @interval: For ISOCHRONOUS and INTERRUPT transfers,
1313 * this is how often the transfer is scheduled
1314 * for. All other transfers should specify
1315 * zero. The units are in frames (8000/sec at
1316 * high speed, 1000/sec for full speed).
1318 * For high speed devices, this is the maximum
1319 * allowed number of packet per microframe.
1320 * Specify zero for non high speed devices. This
1321 * value comes from the standard endpoint descriptor
1322 * field wMaxPacketSize bits <12:11>.
1324 * Hub device address this device is connected
1325 * to. Devices connected directly to Octeon
1326 * use zero. This is only used when the device
1327 * is full/low speed behind a high speed hub.
1328 * The address will be of the high speed hub,
1329 * not and full speed hubs after it.
1330 * @hub_port: Which port on the hub the device is
1331 * connected. Use zero for devices connected
1332 * directly to Octeon. Like hub_device_addr,
1333 * this is only used for full/low speed
1334 * devices behind a high speed hub.
1336 * Returns: A non negative value is a pipe handle. Negative
1337 * values are error codes.
1339 static int cvmx_usb_open_pipe(struct cvmx_usb_state *usb,
1340 int device_addr, int endpoint_num,
1341 enum cvmx_usb_speed device_speed, int max_packet,
1342 enum cvmx_usb_transfer transfer_type,
1343 enum cvmx_usb_direction transfer_dir,
1344 int interval, int multi_count,
1345 int hub_device_addr, int hub_port)
1347 struct cvmx_usb_pipe *pipe;
1349 if (unlikely((device_addr < 0) || (device_addr > MAX_USB_ADDRESS)))
1351 if (unlikely((endpoint_num < 0) || (endpoint_num > MAX_USB_ENDPOINT)))
1353 if (unlikely(device_speed > CVMX_USB_SPEED_LOW))
1355 if (unlikely((max_packet <= 0) || (max_packet > 1024)))
1357 if (unlikely(transfer_type > CVMX_USB_TRANSFER_INTERRUPT))
1359 if (unlikely((transfer_dir != CVMX_USB_DIRECTION_OUT) &&
1360 (transfer_dir != CVMX_USB_DIRECTION_IN)))
1362 if (unlikely(interval < 0))
1364 if (unlikely((transfer_type == CVMX_USB_TRANSFER_CONTROL) && interval))
1366 if (unlikely(multi_count < 0))
1368 if (unlikely((device_speed != CVMX_USB_SPEED_HIGH) &&
1369 (multi_count != 0)))
1371 if (unlikely((hub_device_addr < 0) || (hub_device_addr > MAX_USB_ADDRESS)))
1373 if (unlikely((hub_port < 0) || (hub_port > MAX_USB_HUB_PORT)))
1376 /* Find a free pipe */
1377 pipe = usb->free_pipes.head;
1380 __cvmx_usb_remove_pipe(&usb->free_pipes, pipe);
1381 pipe->flags = __CVMX_USB_PIPE_FLAGS_OPEN;
1382 if ((device_speed == CVMX_USB_SPEED_HIGH) &&
1383 (transfer_dir == CVMX_USB_DIRECTION_OUT) &&
1384 (transfer_type == CVMX_USB_TRANSFER_BULK))
1385 pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
1386 pipe->device_addr = device_addr;
1387 pipe->endpoint_num = endpoint_num;
1388 pipe->device_speed = device_speed;
1389 pipe->max_packet = max_packet;
1390 pipe->transfer_type = transfer_type;
1391 pipe->transfer_dir = transfer_dir;
1393 * All pipes use interval to rate limit NAK processing. Force an
1394 * interval if one wasn't supplied
1398 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1399 pipe->interval = interval*8;
1400 /* Force start splits to be schedule on uFrame 0 */
1401 pipe->next_tx_frame = ((usb->frame_number+7)&~7) + pipe->interval;
1403 pipe->interval = interval;
1404 pipe->next_tx_frame = usb->frame_number + pipe->interval;
1406 pipe->multi_count = multi_count;
1407 pipe->hub_device_addr = hub_device_addr;
1408 pipe->hub_port = hub_port;
1409 pipe->pid_toggle = 0;
1410 pipe->split_sc_frame = -1;
1411 __cvmx_usb_append_pipe(&usb->idle_pipes, pipe);
1414 * We don't need to tell the hardware about this pipe yet since
1415 * it doesn't have any submitted requests
1418 return __cvmx_usb_get_pipe_handle(usb, pipe);
1423 * Poll the RX FIFOs and remove data as needed. This function is only used
1424 * in non DMA mode. It is very important that this function be called quickly
1425 * enough to prevent FIFO overflow.
1427 * @usb: USB device state populated by cvmx_usb_initialize().
1429 static void __cvmx_usb_poll_rx_fifo(struct cvmx_usb_state *usb)
1431 union cvmx_usbcx_grxstsph rx_status;
1437 rx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GRXSTSPH(usb->index));
1438 /* Only read data if IN data is there */
1439 if (rx_status.s.pktsts != 2)
1441 /* Check if no data is available */
1442 if (!rx_status.s.bcnt)
1445 channel = rx_status.s.chnum;
1446 bytes = rx_status.s.bcnt;
1450 /* Get where the DMA engine would have written this data */
1451 address = __cvmx_usb_read_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8);
1452 ptr = cvmx_phys_to_ptr(address);
1453 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, address + bytes);
1455 /* Loop writing the FIFO data for this packet into memory */
1457 *ptr++ = __cvmx_usb_read_csr32(usb, USB_FIFO_ADDRESS(channel, usb->index));
1467 * Fill the TX hardware fifo with data out of the software
1470 * @usb: USB device state populated by cvmx_usb_initialize().
1471 * @fifo: Software fifo to use
1472 * @available: Amount of space in the hardware fifo
1474 * Returns: Non zero if the hardware fifo was too small and needs
1475 * to be serviced again.
1477 static int __cvmx_usb_fill_tx_hw(struct cvmx_usb_state *usb,
1478 struct cvmx_usb_tx_fifo *fifo, int available)
1481 * We're done either when there isn't anymore space or the software FIFO
1484 while (available && (fifo->head != fifo->tail)) {
1486 const uint32_t *ptr = cvmx_phys_to_ptr(fifo->entry[i].address);
1487 uint64_t csr_address = USB_FIFO_ADDRESS(fifo->entry[i].channel, usb->index) ^ 4;
1488 int words = available;
1490 /* Limit the amount of data to waht the SW fifo has */
1491 if (fifo->entry[i].size <= available) {
1492 words = fifo->entry[i].size;
1494 if (fifo->tail > MAX_CHANNELS)
1498 /* Update the next locations and counts */
1500 fifo->entry[i].address += words * 4;
1501 fifo->entry[i].size -= words;
1504 * Write the HW fifo data. The read every three writes is due
1505 * to an errata on CN3XXX chips
1508 cvmx_write64_uint32(csr_address, *ptr++);
1509 cvmx_write64_uint32(csr_address, *ptr++);
1510 cvmx_write64_uint32(csr_address, *ptr++);
1511 cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
1514 cvmx_write64_uint32(csr_address, *ptr++);
1516 cvmx_write64_uint32(csr_address, *ptr++);
1518 cvmx_write64_uint32(csr_address, *ptr++);
1520 cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
1522 return fifo->head != fifo->tail;
1527 * Check the hardware FIFOs and fill them as needed
1529 * @usb: USB device state populated by cvmx_usb_initialize().
1531 static void __cvmx_usb_poll_tx_fifo(struct cvmx_usb_state *usb)
1533 if (usb->periodic.head != usb->periodic.tail) {
1534 union cvmx_usbcx_hptxsts tx_status;
1535 tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXSTS(usb->index));
1536 if (__cvmx_usb_fill_tx_hw(usb, &usb->periodic, tx_status.s.ptxfspcavail))
1537 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, ptxfempmsk, 1);
1539 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, ptxfempmsk, 0);
1542 if (usb->nonperiodic.head != usb->nonperiodic.tail) {
1543 union cvmx_usbcx_gnptxsts tx_status;
1544 tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXSTS(usb->index));
1545 if (__cvmx_usb_fill_tx_hw(usb, &usb->nonperiodic, tx_status.s.nptxfspcavail))
1546 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, nptxfempmsk, 1);
1548 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, nptxfempmsk, 0);
1556 * Fill the TX FIFO with an outgoing packet
1558 * @usb: USB device state populated by cvmx_usb_initialize().
1559 * @channel: Channel number to get packet from
1561 static void __cvmx_usb_fill_tx_fifo(struct cvmx_usb_state *usb, int channel)
1563 union cvmx_usbcx_hccharx hcchar;
1564 union cvmx_usbcx_hcspltx usbc_hcsplt;
1565 union cvmx_usbcx_hctsizx usbc_hctsiz;
1566 struct cvmx_usb_tx_fifo *fifo;
1568 /* We only need to fill data on outbound channels */
1569 hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index));
1570 if (hcchar.s.epdir != CVMX_USB_DIRECTION_OUT)
1573 /* OUT Splits only have data on the start and not the complete */
1574 usbc_hcsplt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCSPLTX(channel, usb->index));
1575 if (usbc_hcsplt.s.spltena && usbc_hcsplt.s.compsplt)
1579 * Find out how many bytes we need to fill and convert it into 32bit
1582 usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
1583 if (!usbc_hctsiz.s.xfersize)
1586 if ((hcchar.s.eptype == CVMX_USB_TRANSFER_INTERRUPT) ||
1587 (hcchar.s.eptype == CVMX_USB_TRANSFER_ISOCHRONOUS))
1588 fifo = &usb->periodic;
1590 fifo = &usb->nonperiodic;
1592 fifo->entry[fifo->head].channel = channel;
1593 fifo->entry[fifo->head].address = __cvmx_usb_read_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8);
1594 fifo->entry[fifo->head].size = (usbc_hctsiz.s.xfersize+3)>>2;
1596 if (fifo->head > MAX_CHANNELS)
1599 __cvmx_usb_poll_tx_fifo(usb);
1605 * Perform channel specific setup for Control transactions. All
1606 * the generic stuff will already have been done in
1607 * __cvmx_usb_start_channel()
1609 * @usb: USB device state populated by cvmx_usb_initialize().
1610 * @channel: Channel to setup
1611 * @pipe: Pipe for control transaction
1613 static void __cvmx_usb_start_channel_control(struct cvmx_usb_state *usb,
1615 struct cvmx_usb_pipe *pipe)
1617 struct cvmx_usb_transaction *transaction = pipe->head;
1618 union cvmx_usb_control_header *header =
1619 cvmx_phys_to_ptr(transaction->control_header);
1620 int bytes_to_transfer = transaction->buffer_length - transaction->actual_bytes;
1621 int packets_to_transfer;
1622 union cvmx_usbcx_hctsizx usbc_hctsiz;
1624 usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
1626 switch (transaction->stage) {
1627 case CVMX_USB_STAGE_NON_CONTROL:
1628 case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
1629 cvmx_dprintf("%s: ERROR - Non control stage\n", __FUNCTION__);
1631 case CVMX_USB_STAGE_SETUP:
1632 usbc_hctsiz.s.pid = 3; /* Setup */
1633 bytes_to_transfer = sizeof(*header);
1634 /* All Control operations start with a setup going OUT */
1635 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, CVMX_USB_DIRECTION_OUT);
1637 * Setup send the control header instead of the buffer data. The
1638 * buffer data will be used in the next stage
1640 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, transaction->control_header);
1642 case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
1643 usbc_hctsiz.s.pid = 3; /* Setup */
1644 bytes_to_transfer = 0;
1645 /* All Control operations start with a setup going OUT */
1646 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, CVMX_USB_DIRECTION_OUT);
1647 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1);
1649 case CVMX_USB_STAGE_DATA:
1650 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1651 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1652 if (header->s.request_type & 0x80)
1653 bytes_to_transfer = 0;
1654 else if (bytes_to_transfer > pipe->max_packet)
1655 bytes_to_transfer = pipe->max_packet;
1657 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1658 union cvmx_usbcx_hccharx, epdir,
1659 ((header->s.request_type & 0x80) ?
1660 CVMX_USB_DIRECTION_IN :
1661 CVMX_USB_DIRECTION_OUT));
1663 case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE:
1664 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1665 if (!(header->s.request_type & 0x80))
1666 bytes_to_transfer = 0;
1667 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1668 union cvmx_usbcx_hccharx, epdir,
1669 ((header->s.request_type & 0x80) ?
1670 CVMX_USB_DIRECTION_IN :
1671 CVMX_USB_DIRECTION_OUT));
1672 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1);
1674 case CVMX_USB_STAGE_STATUS:
1675 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1676 bytes_to_transfer = 0;
1677 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir,
1678 ((header->s.request_type & 0x80) ?
1679 CVMX_USB_DIRECTION_OUT :
1680 CVMX_USB_DIRECTION_IN));
1682 case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
1683 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1684 bytes_to_transfer = 0;
1685 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir,
1686 ((header->s.request_type & 0x80) ?
1687 CVMX_USB_DIRECTION_OUT :
1688 CVMX_USB_DIRECTION_IN));
1689 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1);
1694 * Make sure the transfer never exceeds the byte limit of the hardware.
1695 * Further bytes will be sent as continued transactions
1697 if (bytes_to_transfer > MAX_TRANSFER_BYTES) {
1698 /* Round MAX_TRANSFER_BYTES to a multiple of out packet size */
1699 bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet;
1700 bytes_to_transfer *= pipe->max_packet;
1704 * Calculate the number of packets to transfer. If the length is zero
1705 * we still need to transfer one packet
1707 packets_to_transfer = (bytes_to_transfer + pipe->max_packet - 1) / pipe->max_packet;
1708 if (packets_to_transfer == 0)
1709 packets_to_transfer = 1;
1710 else if ((packets_to_transfer > 1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) {
1712 * Limit to one packet when not using DMA. Channels must be
1713 * restarted between every packet for IN transactions, so there
1714 * is no reason to do multiple packets in a row
1716 packets_to_transfer = 1;
1717 bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1718 } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) {
1720 * Limit the number of packet and data transferred to what the
1721 * hardware can handle
1723 packets_to_transfer = MAX_TRANSFER_PACKETS;
1724 bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1727 usbc_hctsiz.s.xfersize = bytes_to_transfer;
1728 usbc_hctsiz.s.pktcnt = packets_to_transfer;
1730 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index), usbc_hctsiz.u32);
1736 * Start a channel to perform the pipe's head transaction
1738 * @usb: USB device state populated by cvmx_usb_initialize().
1739 * @channel: Channel to setup
1740 * @pipe: Pipe to start
1742 static void __cvmx_usb_start_channel(struct cvmx_usb_state *usb,
1744 struct cvmx_usb_pipe *pipe)
1746 struct cvmx_usb_transaction *transaction = pipe->head;
1748 /* Make sure all writes to the DMA region get flushed */
1751 /* Attach the channel to the pipe */
1752 usb->pipe_for_channel[channel] = pipe;
1753 pipe->channel = channel;
1754 pipe->flags |= __CVMX_USB_PIPE_FLAGS_SCHEDULED;
1756 /* Mark this channel as in use */
1757 usb->idle_hardware_channels &= ~(1<<channel);
1759 /* Enable the channel interrupt bits */
1761 union cvmx_usbcx_hcintx usbc_hcint;
1762 union cvmx_usbcx_hcintmskx usbc_hcintmsk;
1763 union cvmx_usbcx_haintmsk usbc_haintmsk;
1765 /* Clear all channel status bits */
1766 usbc_hcint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index));
1767 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index), usbc_hcint.u32);
1769 usbc_hcintmsk.u32 = 0;
1770 usbc_hcintmsk.s.chhltdmsk = 1;
1771 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
1773 * Channels need these extra interrupts when we aren't
1776 usbc_hcintmsk.s.datatglerrmsk = 1;
1777 usbc_hcintmsk.s.frmovrunmsk = 1;
1778 usbc_hcintmsk.s.bblerrmsk = 1;
1779 usbc_hcintmsk.s.xacterrmsk = 1;
1780 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1782 * Splits don't generate xfercompl, so we need
1785 usbc_hcintmsk.s.nyetmsk = 1;
1786 usbc_hcintmsk.s.ackmsk = 1;
1788 usbc_hcintmsk.s.nakmsk = 1;
1789 usbc_hcintmsk.s.stallmsk = 1;
1790 usbc_hcintmsk.s.xfercomplmsk = 1;
1792 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), usbc_hcintmsk.u32);
1794 /* Enable the channel interrupt to propagate */
1795 usbc_haintmsk.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index));
1796 usbc_haintmsk.s.haintmsk |= 1<<channel;
1797 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index), usbc_haintmsk.u32);
1800 /* Setup the locations the DMA engines use */
1802 uint64_t dma_address = transaction->buffer + transaction->actual_bytes;
1803 if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
1804 dma_address = transaction->buffer + transaction->iso_packets[0].offset + transaction->actual_bytes;
1805 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, dma_address);
1806 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, dma_address);
1809 /* Setup both the size of the transfer and the SPLIT characteristics */
1811 union cvmx_usbcx_hcspltx usbc_hcsplt = {.u32 = 0};
1812 union cvmx_usbcx_hctsizx usbc_hctsiz = {.u32 = 0};
1813 int packets_to_transfer;
1814 int bytes_to_transfer = transaction->buffer_length - transaction->actual_bytes;
1817 * ISOCHRONOUS transactions store each individual transfer size
1818 * in the packet structure, not the global buffer_length
1820 if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
1821 bytes_to_transfer = transaction->iso_packets[0].length - transaction->actual_bytes;
1824 * We need to do split transactions when we are talking to non
1825 * high speed devices that are behind a high speed hub
1827 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1829 * On the start split phase (stage is even) record the
1830 * frame number we will need to send the split complete.
1831 * We only store the lower two bits since the time ahead
1832 * can only be two frames
1834 if ((transaction->stage&1) == 0) {
1835 if (transaction->type == CVMX_USB_TRANSFER_BULK)
1836 pipe->split_sc_frame = (usb->frame_number + 1) & 0x7f;
1838 pipe->split_sc_frame = (usb->frame_number + 2) & 0x7f;
1840 pipe->split_sc_frame = -1;
1842 usbc_hcsplt.s.spltena = 1;
1843 usbc_hcsplt.s.hubaddr = pipe->hub_device_addr;
1844 usbc_hcsplt.s.prtaddr = pipe->hub_port;
1845 usbc_hcsplt.s.compsplt = (transaction->stage == CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE);
1848 * SPLIT transactions can only ever transmit one data
1849 * packet so limit the transfer size to the max packet
1852 if (bytes_to_transfer > pipe->max_packet)
1853 bytes_to_transfer = pipe->max_packet;
1856 * ISOCHRONOUS OUT splits are unique in that they limit
1857 * data transfers to 188 byte chunks representing the
1858 * begin/middle/end of the data or all
1860 if (!usbc_hcsplt.s.compsplt &&
1861 (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&
1862 (pipe->transfer_type == CVMX_USB_TRANSFER_ISOCHRONOUS)) {
1864 * Clear the split complete frame number as
1865 * there isn't going to be a split complete
1867 pipe->split_sc_frame = -1;
1869 * See if we've started this transfer and sent
1872 if (transaction->actual_bytes == 0) {
1874 * Nothing sent yet, this is either a
1875 * begin or the entire payload
1877 if (bytes_to_transfer <= 188)
1878 /* Entire payload in one go */
1879 usbc_hcsplt.s.xactpos = 3;
1881 /* First part of payload */
1882 usbc_hcsplt.s.xactpos = 2;
1885 * Continuing the previous data, we must
1886 * either be in the middle or at the end
1888 if (bytes_to_transfer <= 188)
1889 /* End of payload */
1890 usbc_hcsplt.s.xactpos = 1;
1892 /* Middle of payload */
1893 usbc_hcsplt.s.xactpos = 0;
1896 * Again, the transfer size is limited to 188
1899 if (bytes_to_transfer > 188)
1900 bytes_to_transfer = 188;
1905 * Make sure the transfer never exceeds the byte limit of the
1906 * hardware. Further bytes will be sent as continued
1909 if (bytes_to_transfer > MAX_TRANSFER_BYTES) {
1911 * Round MAX_TRANSFER_BYTES to a multiple of out packet
1914 bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet;
1915 bytes_to_transfer *= pipe->max_packet;
1919 * Calculate the number of packets to transfer. If the length is
1920 * zero we still need to transfer one packet
1922 packets_to_transfer = (bytes_to_transfer + pipe->max_packet - 1) / pipe->max_packet;
1923 if (packets_to_transfer == 0)
1924 packets_to_transfer = 1;
1925 else if ((packets_to_transfer > 1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) {
1927 * Limit to one packet when not using DMA. Channels must
1928 * be restarted between every packet for IN
1929 * transactions, so there is no reason to do multiple
1932 packets_to_transfer = 1;
1933 bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1934 } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) {
1936 * Limit the number of packet and data transferred to
1937 * what the hardware can handle
1939 packets_to_transfer = MAX_TRANSFER_PACKETS;
1940 bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1943 usbc_hctsiz.s.xfersize = bytes_to_transfer;
1944 usbc_hctsiz.s.pktcnt = packets_to_transfer;
1946 /* Update the DATA0/DATA1 toggle */
1947 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1949 * High speed pipes may need a hardware ping before they start
1951 if (pipe->flags & __CVMX_USB_PIPE_FLAGS_NEED_PING)
1952 usbc_hctsiz.s.dopng = 1;
1954 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCSPLTX(channel, usb->index), usbc_hcsplt.u32);
1955 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index), usbc_hctsiz.u32);
1958 /* Setup the Host Channel Characteristics Register */
1960 union cvmx_usbcx_hccharx usbc_hcchar = {.u32 = 0};
1963 * Set the startframe odd/even properly. This is only used for
1966 usbc_hcchar.s.oddfrm = usb->frame_number&1;
1969 * Set the number of back to back packets allowed by this
1970 * endpoint. Split transactions interpret "ec" as the number of
1971 * immediate retries of failure. These retries happen too
1972 * quickly, so we disable these entirely for splits
1974 if (__cvmx_usb_pipe_needs_split(usb, pipe))
1975 usbc_hcchar.s.ec = 1;
1976 else if (pipe->multi_count < 1)
1977 usbc_hcchar.s.ec = 1;
1978 else if (pipe->multi_count > 3)
1979 usbc_hcchar.s.ec = 3;
1981 usbc_hcchar.s.ec = pipe->multi_count;
1983 /* Set the rest of the endpoint specific settings */
1984 usbc_hcchar.s.devaddr = pipe->device_addr;
1985 usbc_hcchar.s.eptype = transaction->type;
1986 usbc_hcchar.s.lspddev = (pipe->device_speed == CVMX_USB_SPEED_LOW);
1987 usbc_hcchar.s.epdir = pipe->transfer_dir;
1988 usbc_hcchar.s.epnum = pipe->endpoint_num;
1989 usbc_hcchar.s.mps = pipe->max_packet;
1990 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
1993 /* Do transaction type specific fixups as needed */
1994 switch (transaction->type) {
1995 case CVMX_USB_TRANSFER_CONTROL:
1996 __cvmx_usb_start_channel_control(usb, channel, pipe);
1998 case CVMX_USB_TRANSFER_BULK:
1999 case CVMX_USB_TRANSFER_INTERRUPT:
2001 case CVMX_USB_TRANSFER_ISOCHRONOUS:
2002 if (!__cvmx_usb_pipe_needs_split(usb, pipe)) {
2004 * ISO transactions require different PIDs depending on
2005 * direction and how many packets are needed
2007 if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {
2008 if (pipe->multi_count < 2) /* Need DATA0 */
2009 USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel, usb->index), union cvmx_usbcx_hctsizx, pid, 0);
2010 else /* Need MDATA */
2011 USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel, usb->index), union cvmx_usbcx_hctsizx, pid, 3);
2017 union cvmx_usbcx_hctsizx usbc_hctsiz = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index))};
2018 transaction->xfersize = usbc_hctsiz.s.xfersize;
2019 transaction->pktcnt = usbc_hctsiz.s.pktcnt;
2021 /* Remeber when we start a split transaction */
2022 if (__cvmx_usb_pipe_needs_split(usb, pipe))
2023 usb->active_split = transaction;
2024 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, chena, 1);
2025 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
2026 __cvmx_usb_fill_tx_fifo(usb, channel);
2032 * Find a pipe that is ready to be scheduled to hardware.
2033 * @usb: USB device state populated by cvmx_usb_initialize().
2034 * @list: Pipe list to search
2036 * Frame counter to use as a time reference.
2038 * Returns: Pipe or NULL if none are ready
2040 static struct cvmx_usb_pipe *__cvmx_usb_find_ready_pipe(struct cvmx_usb_state *usb, struct cvmx_usb_pipe_list *list, uint64_t current_frame)
2042 struct cvmx_usb_pipe *pipe = list->head;
2044 if (!(pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED) && pipe->head &&
2045 (pipe->next_tx_frame <= current_frame) &&
2046 ((pipe->split_sc_frame == -1) || ((((int)current_frame - (int)pipe->split_sc_frame) & 0x7f) < 0x40)) &&
2047 (!usb->active_split || (usb->active_split == pipe->head))) {
2048 CVMX_PREFETCH(pipe, 128);
2049 CVMX_PREFETCH(pipe->head, 0);
2059 * Called whenever a pipe might need to be scheduled to the
2062 * @usb: USB device state populated by cvmx_usb_initialize().
2063 * @is_sof: True if this schedule was called on a SOF interrupt.
2065 static void __cvmx_usb_schedule(struct cvmx_usb_state *usb, int is_sof)
2068 struct cvmx_usb_pipe *pipe;
2070 enum cvmx_usb_transfer ttype;
2072 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
2074 * Without DMA we need to be careful to not schedule something
2075 * at the end of a frame and cause an overrun.
2077 union cvmx_usbcx_hfnum hfnum = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index))};
2078 union cvmx_usbcx_hfir hfir = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFIR(usb->index))};
2079 if (hfnum.s.frrem < hfir.s.frint/4)
2083 while (usb->idle_hardware_channels) {
2084 /* Find an idle channel */
2085 channel = __fls(usb->idle_hardware_channels);
2086 if (unlikely(channel > 7))
2089 /* Find a pipe needing service */
2093 * Only process periodic pipes on SOF interrupts. This
2094 * way we are sure that the periodic data is sent in the
2095 * beginning of the frame
2097 pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_ISOCHRONOUS, usb->frame_number);
2099 pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_INTERRUPT, usb->frame_number);
2101 if (likely(!pipe)) {
2102 pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_CONTROL, usb->frame_number);
2104 pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_BULK, usb->frame_number);
2109 __cvmx_usb_start_channel(usb, channel, pipe);
2114 * Only enable SOF interrupts when we have transactions pending in the
2115 * future that might need to be scheduled
2118 for (ttype = CVMX_USB_TRANSFER_CONTROL; ttype <= CVMX_USB_TRANSFER_INTERRUPT; ttype++) {
2119 pipe = usb->active_pipes[ttype].head;
2121 if (pipe->next_tx_frame > usb->frame_number) {
2128 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, sofmsk, need_sof);
2132 static inline struct octeon_hcd *cvmx_usb_to_octeon(struct cvmx_usb_state *p)
2134 return container_of(p, struct octeon_hcd, usb);
2137 static inline struct usb_hcd *octeon_to_hcd(struct octeon_hcd *p)
2139 return container_of((void *)p, struct usb_hcd, hcd_priv);
2142 static void octeon_usb_urb_complete_callback(struct cvmx_usb_state *usb,
2143 enum cvmx_usb_complete status,
2146 int bytes_transferred,
2149 struct octeon_hcd *priv = cvmx_usb_to_octeon(usb);
2150 struct usb_hcd *hcd = octeon_to_hcd(priv);
2151 struct device *dev = hcd->self.controller;
2153 urb->actual_length = bytes_transferred;
2156 if (!list_empty(&urb->urb_list)) {
2158 * It is on the dequeue_list, but we are going to call
2159 * usb_hcd_giveback_urb(), so we must clear it from
2160 * the list. We got to it before the
2161 * octeon_usb_urb_dequeue_work() tasklet did.
2163 list_del(&urb->urb_list);
2164 /* No longer on the dequeue_list. */
2165 INIT_LIST_HEAD(&urb->urb_list);
2168 /* For Isochronous transactions we need to update the URB packet status
2169 list from data in our private copy */
2170 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
2173 * The pointer to the private list is stored in the setup_packet
2176 struct cvmx_usb_iso_packet *iso_packet =
2177 (struct cvmx_usb_iso_packet *) urb->setup_packet;
2178 /* Recalculate the transfer size by adding up each packet */
2179 urb->actual_length = 0;
2180 for (i = 0; i < urb->number_of_packets; i++) {
2181 if (iso_packet[i].status == CVMX_USB_COMPLETE_SUCCESS) {
2182 urb->iso_frame_desc[i].status = 0;
2183 urb->iso_frame_desc[i].actual_length = iso_packet[i].length;
2184 urb->actual_length += urb->iso_frame_desc[i].actual_length;
2186 dev_dbg(dev, "ISOCHRONOUS packet=%d of %d status=%d pipe=%d submit=%d size=%d\n",
2187 i, urb->number_of_packets,
2188 iso_packet[i].status, pipe_handle,
2189 submit_handle, iso_packet[i].length);
2190 urb->iso_frame_desc[i].status = -EREMOTEIO;
2193 /* Free the private list now that we don't need it anymore */
2195 urb->setup_packet = NULL;
2199 case CVMX_USB_COMPLETE_SUCCESS:
2202 case CVMX_USB_COMPLETE_CANCEL:
2203 if (urb->status == 0)
2204 urb->status = -ENOENT;
2206 case CVMX_USB_COMPLETE_STALL:
2207 dev_dbg(dev, "status=stall pipe=%d submit=%d size=%d\n",
2208 pipe_handle, submit_handle, bytes_transferred);
2209 urb->status = -EPIPE;
2211 case CVMX_USB_COMPLETE_BABBLEERR:
2212 dev_dbg(dev, "status=babble pipe=%d submit=%d size=%d\n",
2213 pipe_handle, submit_handle, bytes_transferred);
2214 urb->status = -EPIPE;
2216 case CVMX_USB_COMPLETE_SHORT:
2217 dev_dbg(dev, "status=short pipe=%d submit=%d size=%d\n",
2218 pipe_handle, submit_handle, bytes_transferred);
2219 urb->status = -EREMOTEIO;
2221 case CVMX_USB_COMPLETE_ERROR:
2222 case CVMX_USB_COMPLETE_XACTERR:
2223 case CVMX_USB_COMPLETE_DATATGLERR:
2224 case CVMX_USB_COMPLETE_FRAMEERR:
2225 dev_dbg(dev, "status=%d pipe=%d submit=%d size=%d\n",
2226 status, pipe_handle, submit_handle, bytes_transferred);
2227 urb->status = -EPROTO;
2230 spin_unlock(&priv->lock);
2231 usb_hcd_giveback_urb(octeon_to_hcd(priv), urb, urb->status);
2232 spin_lock(&priv->lock);
2236 * Signal the completion of a transaction and free it. The
2237 * transaction will be removed from the pipe transaction list.
2239 * @usb: USB device state populated by cvmx_usb_initialize().
2240 * @pipe: Pipe the transaction is on
2242 * Transaction that completed
2246 static void __cvmx_usb_perform_complete(struct cvmx_usb_state *usb,
2247 struct cvmx_usb_pipe *pipe,
2248 struct cvmx_usb_transaction *transaction,
2249 enum cvmx_usb_complete complete_code)
2254 /* If this was a split then clear our split in progress marker */
2255 if (usb->active_split == transaction)
2256 usb->active_split = NULL;
2259 * Isochronous transactions need extra processing as they might not be
2260 * done after a single data transfer
2262 if (unlikely(transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)) {
2263 /* Update the number of bytes transferred in this ISO packet */
2264 transaction->iso_packets[0].length = transaction->actual_bytes;
2265 transaction->iso_packets[0].status = complete_code;
2268 * If there are more ISOs pending and we succeeded, schedule the
2271 if ((transaction->iso_number_packets > 1) && (complete_code == CVMX_USB_COMPLETE_SUCCESS)) {
2272 /* No bytes transferred for this packet as of yet */
2273 transaction->actual_bytes = 0;
2274 /* One less ISO waiting to transfer */
2275 transaction->iso_number_packets--;
2276 /* Increment to the next location in our packet array */
2277 transaction->iso_packets++;
2278 transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2283 /* Remove the transaction from the pipe list */
2284 if (transaction->next)
2285 transaction->next->prev = transaction->prev;
2287 pipe->tail = transaction->prev;
2288 if (transaction->prev)
2289 transaction->prev->next = transaction->next;
2291 pipe->head = transaction->next;
2293 __cvmx_usb_remove_pipe(usb->active_pipes + pipe->transfer_type, pipe);
2294 __cvmx_usb_append_pipe(&usb->idle_pipes, pipe);
2297 pipe_handle = __cvmx_usb_get_pipe_handle(usb, pipe);
2298 submit_handle = __cvmx_usb_get_submit_handle(usb, transaction);
2299 octeon_usb_urb_complete_callback(usb, complete_code, pipe_handle,
2301 transaction->actual_bytes,
2303 __cvmx_usb_free_transaction(usb, transaction);
2310 * Submit a usb transaction to a pipe. Called for all types
2315 * Which pipe to submit to. Will be validated in this function.
2316 * @type: Transaction type
2317 * @buffer: User buffer for the transaction
2319 * User buffer's length in bytes
2321 * For control transactions, the 8 byte standard header
2323 * For ISO transactions, the start frame
2324 * @iso_number_packets:
2325 * For ISO, the number of packet in the transaction.
2327 * A description of each ISO packet
2328 * @urb: URB for the callback
2330 * Returns: Submit handle or negative on failure. Matches the result
2331 * in the external API.
2333 static int __cvmx_usb_submit_transaction(struct cvmx_usb_state *usb,
2335 enum cvmx_usb_transfer type,
2338 uint64_t control_header,
2339 int iso_start_frame,
2340 int iso_number_packets,
2341 struct cvmx_usb_iso_packet *iso_packets,
2345 struct cvmx_usb_transaction *transaction;
2346 struct cvmx_usb_pipe *pipe = usb->pipe + pipe_handle;
2348 if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES)))
2350 /* Fail if the pipe isn't open */
2351 if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0))
2353 if (unlikely(pipe->transfer_type != type))
2356 transaction = __cvmx_usb_alloc_transaction(usb);
2357 if (unlikely(!transaction))
2360 transaction->type = type;
2361 transaction->buffer = buffer;
2362 transaction->buffer_length = buffer_length;
2363 transaction->control_header = control_header;
2364 /* FIXME: This is not used, implement it. */
2365 transaction->iso_start_frame = iso_start_frame;
2366 transaction->iso_number_packets = iso_number_packets;
2367 transaction->iso_packets = iso_packets;
2368 transaction->urb = urb;
2369 if (transaction->type == CVMX_USB_TRANSFER_CONTROL)
2370 transaction->stage = CVMX_USB_STAGE_SETUP;
2372 transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2374 transaction->next = NULL;
2376 transaction->prev = pipe->tail;
2377 transaction->prev->next = transaction;
2379 if (pipe->next_tx_frame < usb->frame_number)
2380 pipe->next_tx_frame = usb->frame_number + pipe->interval -
2381 (usb->frame_number - pipe->next_tx_frame) % pipe->interval;
2382 transaction->prev = NULL;
2383 pipe->head = transaction;
2384 __cvmx_usb_remove_pipe(&usb->idle_pipes, pipe);
2385 __cvmx_usb_append_pipe(usb->active_pipes + pipe->transfer_type, pipe);
2387 pipe->tail = transaction;
2389 submit_handle = __cvmx_usb_get_submit_handle(usb, transaction);
2391 /* We may need to schedule the pipe if this was the head of the pipe */
2392 if (!transaction->prev)
2393 __cvmx_usb_schedule(usb, 0);
2395 return submit_handle;
2400 * Call to submit a USB Bulk transfer to a pipe.
2402 * @usb: USB device state populated by cvmx_usb_initialize().
2404 * Handle to the pipe for the transfer.
2407 * Returns: A submitted transaction handle or negative on
2408 * failure. Negative values are error codes.
2410 static int cvmx_usb_submit_bulk(struct cvmx_usb_state *usb, int pipe_handle,
2415 submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle,
2416 CVMX_USB_TRANSFER_BULK,
2418 urb->transfer_buffer_length,
2419 0, /* control_header */
2420 0, /* iso_start_frame */
2421 0, /* iso_number_packets */
2422 NULL, /* iso_packets */
2424 return submit_handle;
2429 * Call to submit a USB Interrupt transfer to a pipe.
2431 * @usb: USB device state populated by cvmx_usb_initialize().
2433 * Handle to the pipe for the transfer.
2434 * @urb: URB returned when the callback is called.
2436 * Returns: A submitted transaction handle or negative on
2437 * failure. Negative values are error codes.
2439 static int cvmx_usb_submit_interrupt(struct cvmx_usb_state *usb,
2440 int pipe_handle, struct urb *urb)
2444 submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle,
2445 CVMX_USB_TRANSFER_INTERRUPT,
2447 urb->transfer_buffer_length,
2448 0, /* control_header */
2449 0, /* iso_start_frame */
2450 0, /* iso_number_packets */
2451 NULL, /* iso_packets */
2453 return submit_handle;
2458 * Call to submit a USB Control transfer to a pipe.
2460 * @usb: USB device state populated by cvmx_usb_initialize().
2462 * Handle to the pipe for the transfer.
2465 * Returns: A submitted transaction handle or negative on
2466 * failure. Negative values are error codes.
2468 static int cvmx_usb_submit_control(struct cvmx_usb_state *usb, int pipe_handle,
2472 int buffer_length = urb->transfer_buffer_length;
2473 uint64_t control_header = urb->setup_dma;
2474 union cvmx_usb_control_header *header =
2475 cvmx_phys_to_ptr(control_header);
2477 /* Pipe handle checking is done later in a common place */
2478 if ((header->s.request_type & 0x80) == 0)
2479 buffer_length = le16_to_cpu(header->s.length);
2481 submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle,
2482 CVMX_USB_TRANSFER_CONTROL,
2486 0, /* iso_start_frame */
2487 0, /* iso_number_packets */
2488 NULL, /* iso_packets */
2490 return submit_handle;
2495 * Call to submit a USB Isochronous transfer to a pipe.
2497 * @usb: USB device state populated by cvmx_usb_initialize().
2499 * Handle to the pipe for the transfer.
2500 * @urb: URB returned when the callback is called.
2502 * Returns: A submitted transaction handle or negative on
2503 * failure. Negative values are error codes.
2505 static int cvmx_usb_submit_isochronous(struct cvmx_usb_state *usb,
2506 int pipe_handle, struct urb *urb)
2509 struct cvmx_usb_iso_packet *packets;
2511 packets = (struct cvmx_usb_iso_packet *) urb->setup_packet;
2512 submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle,
2513 CVMX_USB_TRANSFER_ISOCHRONOUS,
2515 urb->transfer_buffer_length,
2516 0, /* control_header */
2518 urb->number_of_packets,
2521 return submit_handle;
2526 * Cancel one outstanding request in a pipe. Canceling a request
2527 * can fail if the transaction has already completed before cancel
2528 * is called. Even after a successful cancel call, it may take
2529 * a frame or two for the cvmx_usb_poll() function to call the
2530 * associated callback.
2532 * @usb: USB device state populated by cvmx_usb_initialize().
2534 * Pipe handle to cancel requests in.
2536 * Handle to transaction to cancel, returned by the submit
2539 * Returns: 0 or a negative error code.
2541 static int cvmx_usb_cancel(struct cvmx_usb_state *usb, int pipe_handle,
2544 struct cvmx_usb_transaction *transaction;
2545 struct cvmx_usb_pipe *pipe = usb->pipe + pipe_handle;
2547 if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES)))
2549 if (unlikely((submit_handle < 0) || (submit_handle >= MAX_TRANSACTIONS)))
2552 /* Fail if the pipe isn't open */
2553 if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0))
2556 transaction = usb->transaction + submit_handle;
2558 /* Fail if this transaction already completed */
2559 if (unlikely((transaction->flags & __CVMX_USB_TRANSACTION_FLAGS_IN_USE) == 0))
2563 * If the transaction is the HEAD of the queue and scheduled. We need to
2566 if ((pipe->head == transaction) &&
2567 (pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED)) {
2568 union cvmx_usbcx_hccharx usbc_hcchar;
2570 usb->pipe_for_channel[pipe->channel] = NULL;
2571 pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED;
2575 usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index));
2577 * If the channel isn't enabled then the transaction already
2580 if (usbc_hcchar.s.chena) {
2581 usbc_hcchar.s.chdis = 1;
2582 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index), usbc_hcchar.u32);
2585 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_CANCEL);
2591 * Cancel all outstanding requests in a pipe. Logically all this
2592 * does is call cvmx_usb_cancel() in a loop.
2594 * @usb: USB device state populated by cvmx_usb_initialize().
2596 * Pipe handle to cancel requests in.
2598 * Returns: 0 or a negative error code.
2600 static int cvmx_usb_cancel_all(struct cvmx_usb_state *usb, int pipe_handle)
2602 struct cvmx_usb_pipe *pipe = usb->pipe + pipe_handle;
2604 if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES)))
2607 /* Fail if the pipe isn't open */
2608 if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0))
2611 /* Simply loop through and attempt to cancel each transaction */
2612 while (pipe->head) {
2613 int result = cvmx_usb_cancel(usb, pipe_handle,
2614 __cvmx_usb_get_submit_handle(usb, pipe->head));
2615 if (unlikely(result != 0))
2623 * Close a pipe created with cvmx_usb_open_pipe().
2625 * @usb: USB device state populated by cvmx_usb_initialize().
2627 * Pipe handle to close.
2629 * Returns: 0 or a negative error code. EBUSY is returned if the pipe has
2630 * outstanding transfers.
2632 static int cvmx_usb_close_pipe(struct cvmx_usb_state *usb, int pipe_handle)
2634 struct cvmx_usb_pipe *pipe = usb->pipe + pipe_handle;
2636 if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES)))
2639 /* Fail if the pipe isn't open */
2640 if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0))
2643 /* Fail if the pipe has pending transactions */
2644 if (unlikely(pipe->head))
2648 __cvmx_usb_remove_pipe(&usb->idle_pipes, pipe);
2649 __cvmx_usb_append_pipe(&usb->free_pipes, pipe);
2655 * Get the current USB protocol level frame number. The frame
2656 * number is always in the range of 0-0x7ff.
2658 * @usb: USB device state populated by cvmx_usb_initialize().
2660 * Returns: USB frame number
2662 static int cvmx_usb_get_frame_number(struct cvmx_usb_state *usb)
2665 union cvmx_usbcx_hfnum usbc_hfnum;
2667 usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
2668 frame_number = usbc_hfnum.s.frnum;
2670 return frame_number;
2675 * Poll a channel for status
2678 * @channel: Channel to poll
2680 * Returns: Zero on success
2682 static int __cvmx_usb_poll_channel(struct cvmx_usb_state *usb, int channel)
2684 union cvmx_usbcx_hcintx usbc_hcint;
2685 union cvmx_usbcx_hctsizx usbc_hctsiz;
2686 union cvmx_usbcx_hccharx usbc_hcchar;
2687 struct cvmx_usb_pipe *pipe;
2688 struct cvmx_usb_transaction *transaction;
2689 int bytes_this_transfer;
2690 int bytes_in_last_packet;
2691 int packets_processed;
2692 int buffer_space_left;
2694 /* Read the interrupt status bits for the channel */
2695 usbc_hcint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index));
2697 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
2698 usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index));
2700 if (usbc_hcchar.s.chena && usbc_hcchar.s.chdis) {
2702 * There seems to be a bug in CN31XX which can cause
2703 * interrupt IN transfers to get stuck until we do a
2704 * write of HCCHARX without changing things
2706 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
2711 * In non DMA mode the channels don't halt themselves. We need
2712 * to manually disable channels that are left running
2714 if (!usbc_hcint.s.chhltd) {
2715 if (usbc_hcchar.s.chena) {
2716 union cvmx_usbcx_hcintmskx hcintmsk;
2717 /* Disable all interrupts except CHHLTD */
2719 hcintmsk.s.chhltdmsk = 1;
2720 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), hcintmsk.u32);
2721 usbc_hcchar.s.chdis = 1;
2722 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
2724 } else if (usbc_hcint.s.xfercompl) {
2726 * Successful IN/OUT with transfer complete.
2727 * Channel halt isn't needed.
2730 cvmx_dprintf("USB%d: Channel %d interrupt without halt\n", usb->index, channel);
2736 * There is are no interrupts that we need to process when the
2737 * channel is still running
2739 if (!usbc_hcint.s.chhltd)
2743 /* Disable the channel interrupts now that it is done */
2744 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
2745 usb->idle_hardware_channels |= (1<<channel);
2747 /* Make sure this channel is tied to a valid pipe */
2748 pipe = usb->pipe_for_channel[channel];
2749 CVMX_PREFETCH(pipe, 0);
2750 CVMX_PREFETCH(pipe, 128);
2753 transaction = pipe->head;
2754 CVMX_PREFETCH(transaction, 0);
2757 * Disconnect this pipe from the HW channel. Later the schedule
2758 * function will figure out which pipe needs to go
2760 usb->pipe_for_channel[channel] = NULL;
2761 pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED;
2764 * Read the channel config info so we can figure out how much data
2767 usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index));
2768 usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
2771 * Calculating the number of bytes successfully transferred is dependent
2772 * on the transfer direction
2774 packets_processed = transaction->pktcnt - usbc_hctsiz.s.pktcnt;
2775 if (usbc_hcchar.s.epdir) {
2777 * IN transactions are easy. For every byte received the
2778 * hardware decrements xfersize. All we need to do is subtract
2779 * the current value of xfersize from its starting value and we
2780 * know how many bytes were written to the buffer
2782 bytes_this_transfer = transaction->xfersize - usbc_hctsiz.s.xfersize;
2785 * OUT transaction don't decrement xfersize. Instead pktcnt is
2786 * decremented on every successful packet send. The hardware
2787 * does this when it receives an ACK, or NYET. If it doesn't
2788 * receive one of these responses pktcnt doesn't change
2790 bytes_this_transfer = packets_processed * usbc_hcchar.s.mps;
2792 * The last packet may not be a full transfer if we didn't have
2795 if (bytes_this_transfer > transaction->xfersize)
2796 bytes_this_transfer = transaction->xfersize;
2798 /* Figure out how many bytes were in the last packet of the transfer */
2799 if (packets_processed)
2800 bytes_in_last_packet = bytes_this_transfer - (packets_processed-1) * usbc_hcchar.s.mps;
2802 bytes_in_last_packet = bytes_this_transfer;
2805 * As a special case, setup transactions output the setup header, not
2806 * the user's data. For this reason we don't count setup data as bytes
2809 if ((transaction->stage == CVMX_USB_STAGE_SETUP) ||
2810 (transaction->stage == CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE))
2811 bytes_this_transfer = 0;
2814 * Add the bytes transferred to the running total. It is important that
2815 * bytes_this_transfer doesn't count any data that needs to be
2818 transaction->actual_bytes += bytes_this_transfer;
2819 if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
2820 buffer_space_left = transaction->iso_packets[0].length - transaction->actual_bytes;
2822 buffer_space_left = transaction->buffer_length - transaction->actual_bytes;
2825 * We need to remember the PID toggle state for the next transaction.
2826 * The hardware already updated it for the next transaction
2828 pipe->pid_toggle = !(usbc_hctsiz.s.pid == 0);
2831 * For high speed bulk out, assume the next transaction will need to do
2832 * a ping before proceeding. If this isn't true the ACK processing below
2833 * will clear this flag
2835 if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&
2836 (pipe->transfer_type == CVMX_USB_TRANSFER_BULK) &&
2837 (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT))
2838 pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
2840 if (usbc_hcint.s.stall) {
2842 * STALL as a response means this transaction cannot be
2843 * completed because the device can't process transactions. Tell
2844 * the user. Any data that was transferred will be counted on
2845 * the actual bytes transferred
2847 pipe->pid_toggle = 0;
2848 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_STALL);
2849 } else if (usbc_hcint.s.xacterr) {
2851 * We know at least one packet worked if we get a ACK or NAK.
2852 * Reset the retry counter
2854 if (usbc_hcint.s.nak || usbc_hcint.s.ack)
2855 transaction->retries = 0;
2856 transaction->retries++;
2857 if (transaction->retries > MAX_RETRIES) {
2859 * XactErr as a response means the device signaled
2860 * something wrong with the transfer. For example, PID
2861 * toggle errors cause these
2863 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_XACTERR);
2866 * If this was a split then clear our split in progress
2869 if (usb->active_split == transaction)
2870 usb->active_split = NULL;
2872 * Rewind to the beginning of the transaction by anding
2873 * off the split complete bit
2875 transaction->stage &= ~1;
2876 pipe->split_sc_frame = -1;
2877 pipe->next_tx_frame += pipe->interval;
2878 if (pipe->next_tx_frame < usb->frame_number)
2879 pipe->next_tx_frame = usb->frame_number + pipe->interval -
2880 (usb->frame_number - pipe->next_tx_frame) % pipe->interval;
2882 } else if (usbc_hcint.s.bblerr) {
2883 /* Babble Error (BblErr) */
2884 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_BABBLEERR);
2885 } else if (usbc_hcint.s.datatglerr) {
2886 /* We'll retry the exact same transaction again */
2887 transaction->retries++;
2888 } else if (usbc_hcint.s.nyet) {
2890 * NYET as a response is only allowed in three cases: as a
2891 * response to a ping, as a response to a split transaction, and
2892 * as a response to a bulk out. The ping case is handled by
2893 * hardware, so we only have splits and bulk out
2895 if (!__cvmx_usb_pipe_needs_split(usb, pipe)) {
2896 transaction->retries = 0;
2898 * If there is more data to go then we need to try
2899 * again. Otherwise this transaction is complete
2901 if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet))
2902 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2905 * Split transactions retry the split complete 4 times
2906 * then rewind to the start split and do the entire
2907 * transactions again
2909 transaction->retries++;
2910 if ((transaction->retries & 0x3) == 0) {
2912 * Rewind to the beginning of the transaction by
2913 * anding off the split complete bit
2915 transaction->stage &= ~1;
2916 pipe->split_sc_frame = -1;
2919 } else if (usbc_hcint.s.ack) {
2920 transaction->retries = 0;
2922 * The ACK bit can only be checked after the other error bits.
2923 * This is because a multi packet transfer may succeed in a
2924 * number of packets and then get a different response on the
2925 * last packet. In this case both ACK and the last response bit
2926 * will be set. If none of the other response bits is set, then
2927 * the last packet must have been an ACK
2929 * Since we got an ACK, we know we don't need to do a ping on
2932 pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_NEED_PING;
2934 switch (transaction->type) {
2935 case CVMX_USB_TRANSFER_CONTROL:
2936 switch (transaction->stage) {
2937 case CVMX_USB_STAGE_NON_CONTROL:
2938 case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
2939 /* This should be impossible */
2940 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_ERROR);
2942 case CVMX_USB_STAGE_SETUP:
2943 pipe->pid_toggle = 1;
2944 if (__cvmx_usb_pipe_needs_split(usb, pipe))
2945 transaction->stage = CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE;
2947 union cvmx_usb_control_header *header =
2948 cvmx_phys_to_ptr(transaction->control_header);
2949 if (header->s.length)
2950 transaction->stage = CVMX_USB_STAGE_DATA;
2952 transaction->stage = CVMX_USB_STAGE_STATUS;
2955 case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
2957 union cvmx_usb_control_header *header =
2958 cvmx_phys_to_ptr(transaction->control_header);
2959 if (header->s.length)
2960 transaction->stage = CVMX_USB_STAGE_DATA;
2962 transaction->stage = CVMX_USB_STAGE_STATUS;
2965 case CVMX_USB_STAGE_DATA:
2966 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
2967 transaction->stage = CVMX_USB_STAGE_DATA_SPLIT_COMPLETE;
2969 * For setup OUT data that are splits,
2970 * the hardware doesn't appear to count
2971 * transferred data. Here we manually
2972 * update the data transferred
2974 if (!usbc_hcchar.s.epdir) {
2975 if (buffer_space_left < pipe->max_packet)
2976 transaction->actual_bytes += buffer_space_left;
2978 transaction->actual_bytes += pipe->max_packet;
2980 } else if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) {
2981 pipe->pid_toggle = 1;
2982 transaction->stage = CVMX_USB_STAGE_STATUS;
2985 case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE:
2986 if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) {
2987 pipe->pid_toggle = 1;
2988 transaction->stage = CVMX_USB_STAGE_STATUS;
2990 transaction->stage = CVMX_USB_STAGE_DATA;
2993 case CVMX_USB_STAGE_STATUS:
2994 if (__cvmx_usb_pipe_needs_split(usb, pipe))
2995 transaction->stage = CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE;
2997 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2999 case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
3000 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
3004 case CVMX_USB_TRANSFER_BULK:
3005 case CVMX_USB_TRANSFER_INTERRUPT:
3007 * The only time a bulk transfer isn't complete when it
3008 * finishes with an ACK is during a split transaction.
3009 * For splits we need to continue the transfer if more
3012 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
3013 if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL)
3014 transaction->stage = CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE;
3016 if (buffer_space_left && (bytes_in_last_packet == pipe->max_packet))
3017 transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
3019 if (transaction->type == CVMX_USB_TRANSFER_INTERRUPT)
3020 pipe->next_tx_frame += pipe->interval;
3021 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
3025 if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&
3026 (pipe->transfer_type == CVMX_USB_TRANSFER_BULK) &&
3027 (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&
3029 pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
3030 if (!buffer_space_left || (bytes_in_last_packet < pipe->max_packet)) {
3031 if (transaction->type == CVMX_USB_TRANSFER_INTERRUPT)
3032 pipe->next_tx_frame += pipe->interval;
3033 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
3037 case CVMX_USB_TRANSFER_ISOCHRONOUS:
3038 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
3040 * ISOCHRONOUS OUT splits don't require a
3041 * complete split stage. Instead they use a
3042 * sequence of begin OUT splits to transfer the
3043 * data 188 bytes at a time. Once the transfer
3044 * is complete, the pipe sleeps until the next
3047 if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {
3049 * If no space left or this wasn't a max
3050 * size packet then this transfer is
3051 * complete. Otherwise start it again to
3052 * send the next 188 bytes
3054 if (!buffer_space_left || (bytes_this_transfer < 188)) {
3055 pipe->next_tx_frame += pipe->interval;
3056 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
3059 if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE) {
3061 * We are in the incoming data
3062 * phase. Keep getting data
3063 * until we run out of space or
3064 * get a small packet
3066 if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) {
3067 pipe->next_tx_frame += pipe->interval;
3068 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
3071 transaction->stage = CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE;
3074 pipe->next_tx_frame += pipe->interval;
3075 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
3079 } else if (usbc_hcint.s.nak) {
3081 * If this was a split then clear our split in progress marker.
3083 if (usb->active_split == transaction)
3084 usb->active_split = NULL;
3086 * NAK as a response means the device couldn't accept the
3087 * transaction, but it should be retried in the future. Rewind
3088 * to the beginning of the transaction by anding off the split
3089 * complete bit. Retry in the next interval
3091 transaction->retries = 0;
3092 transaction->stage &= ~1;
3093 pipe->next_tx_frame += pipe->interval;
3094 if (pipe->next_tx_frame < usb->frame_number)
3095 pipe->next_tx_frame = usb->frame_number + pipe->interval -
3096 (usb->frame_number - pipe->next_tx_frame) % pipe->interval;
3098 struct cvmx_usb_port_status port;
3099 port = cvmx_usb_get_status(usb);
3100 if (port.port_enabled) {
3101 /* We'll retry the exact same transaction again */
3102 transaction->retries++;
3105 * We get channel halted interrupts with no result bits
3106 * sets when the cable is unplugged
3108 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_ERROR);
3114 static void octeon_usb_port_callback(struct cvmx_usb_state *usb)
3116 struct octeon_hcd *priv = cvmx_usb_to_octeon(usb);
3118 spin_unlock(&priv->lock);
3119 usb_hcd_poll_rh_status(octeon_to_hcd(priv));
3120 spin_lock(&priv->lock);
3124 * Poll the USB block for status and call all needed callback
3125 * handlers. This function is meant to be called in the interrupt
3126 * handler for the USB controller. It can also be called
3127 * periodically in a loop for non-interrupt based operation.
3129 * @usb: USB device state populated by cvmx_usb_initialize().
3131 * Returns: 0 or a negative error code.
3133 static int cvmx_usb_poll(struct cvmx_usb_state *usb)
3135 union cvmx_usbcx_hfnum usbc_hfnum;
3136 union cvmx_usbcx_gintsts usbc_gintsts;
3138 CVMX_PREFETCH(usb, 0);
3139 CVMX_PREFETCH(usb, 1*128);
3140 CVMX_PREFETCH(usb, 2*128);
3141 CVMX_PREFETCH(usb, 3*128);
3142 CVMX_PREFETCH(usb, 4*128);
3144 /* Update the frame counter */
3145 usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
3146 if ((usb->frame_number&0x3fff) > usbc_hfnum.s.frnum)
3147 usb->frame_number += 0x4000;
3148 usb->frame_number &= ~0x3fffull;
3149 usb->frame_number |= usbc_hfnum.s.frnum;
3151 /* Read the pending interrupts */
3152 usbc_gintsts.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GINTSTS(usb->index));
3154 /* Clear the interrupts now that we know about them */
3155 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTSTS(usb->index), usbc_gintsts.u32);
3157 if (usbc_gintsts.s.rxflvl) {
3159 * RxFIFO Non-Empty (RxFLvl)
3160 * Indicates that there is at least one packet pending to be
3161 * read from the RxFIFO.
3163 * In DMA mode this is handled by hardware
3165 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
3166 __cvmx_usb_poll_rx_fifo(usb);
3168 if (usbc_gintsts.s.ptxfemp || usbc_gintsts.s.nptxfemp) {
3169 /* Fill the Tx FIFOs when not in DMA mode */
3170 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
3171 __cvmx_usb_poll_tx_fifo(usb);
3173 if (usbc_gintsts.s.disconnint || usbc_gintsts.s.prtint) {
3174 union cvmx_usbcx_hprt usbc_hprt;
3176 * Disconnect Detected Interrupt (DisconnInt)
3177 * Asserted when a device disconnect is detected.
3179 * Host Port Interrupt (PrtInt)
3180 * The core sets this bit to indicate a change in port status of
3181 * one of the O2P USB core ports in Host mode. The application
3182 * must read the Host Port Control and Status (HPRT) register to
3183 * determine the exact event that caused this interrupt. The
3184 * application must clear the appropriate status bit in the Host
3185 * Port Control and Status register to clear this bit.
3187 * Call the user's port callback
3189 octeon_usb_port_callback(usb);
3190 /* Clear the port change bits */
3191 usbc_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
3192 usbc_hprt.s.prtena = 0;
3193 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPRT(usb->index), usbc_hprt.u32);
3195 if (usbc_gintsts.s.hchint) {
3197 * Host Channels Interrupt (HChInt)
3198 * The core sets this bit to indicate that an interrupt is
3199 * pending on one of the channels of the core (in Host mode).
3200 * The application must read the Host All Channels Interrupt
3201 * (HAINT) register to determine the exact number of the channel
3202 * on which the interrupt occurred, and then read the
3203 * corresponding Host Channel-n Interrupt (HCINTn) register to
3204 * determine the exact cause of the interrupt. The application
3205 * must clear the appropriate status bit in the HCINTn register
3206 * to clear this bit.
3208 union cvmx_usbcx_haint usbc_haint;
3209 usbc_haint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINT(usb->index));
3210 while (usbc_haint.u32) {
3213 channel = __fls(usbc_haint.u32);
3214 __cvmx_usb_poll_channel(usb, channel);
3215 usbc_haint.u32 ^= 1<<channel;
3219 __cvmx_usb_schedule(usb, usbc_gintsts.s.sof);
3224 /* convert between an HCD pointer and the corresponding struct octeon_hcd */
3225 static inline struct octeon_hcd *hcd_to_octeon(struct usb_hcd *hcd)
3227 return (struct octeon_hcd *)(hcd->hcd_priv);
3230 static irqreturn_t octeon_usb_irq(struct usb_hcd *hcd)
3232 struct octeon_hcd *priv = hcd_to_octeon(hcd);
3233 unsigned long flags;
3235 spin_lock_irqsave(&priv->lock, flags);
3236 cvmx_usb_poll(&priv->usb);
3237 spin_unlock_irqrestore(&priv->lock, flags);
3241 static int octeon_usb_start(struct usb_hcd *hcd)
3243 hcd->state = HC_STATE_RUNNING;
3247 static void octeon_usb_stop(struct usb_hcd *hcd)
3249 hcd->state = HC_STATE_HALT;
3252 static int octeon_usb_get_frame_number(struct usb_hcd *hcd)
3254 struct octeon_hcd *priv = hcd_to_octeon(hcd);
3256 return cvmx_usb_get_frame_number(&priv->usb);
3259 static int octeon_usb_urb_enqueue(struct usb_hcd *hcd,
3263 struct octeon_hcd *priv = hcd_to_octeon(hcd);
3264 struct device *dev = hcd->self.controller;
3265 int submit_handle = -1;
3267 unsigned long flags;
3268 struct cvmx_usb_iso_packet *iso_packet;
3269 struct usb_host_endpoint *ep = urb->ep;
3272 INIT_LIST_HEAD(&urb->urb_list); /* not enqueued on dequeue_list */
3273 spin_lock_irqsave(&priv->lock, flags);
3276 enum cvmx_usb_transfer transfer_type;
3277 enum cvmx_usb_speed speed;
3278 int split_device = 0;
3280 switch (usb_pipetype(urb->pipe)) {
3281 case PIPE_ISOCHRONOUS:
3282 transfer_type = CVMX_USB_TRANSFER_ISOCHRONOUS;
3284 case PIPE_INTERRUPT:
3285 transfer_type = CVMX_USB_TRANSFER_INTERRUPT;
3288 transfer_type = CVMX_USB_TRANSFER_CONTROL;
3291 transfer_type = CVMX_USB_TRANSFER_BULK;
3294 switch (urb->dev->speed) {
3296 speed = CVMX_USB_SPEED_LOW;
3298 case USB_SPEED_FULL:
3299 speed = CVMX_USB_SPEED_FULL;
3302 speed = CVMX_USB_SPEED_HIGH;
3306 * For slow devices on high speed ports we need to find the hub
3307 * that does the speed translation so we know where to send the
3308 * split transactions.
3310 if (speed != CVMX_USB_SPEED_HIGH) {
3312 * Start at this device and work our way up the usb
3315 struct usb_device *dev = urb->dev;
3316 while (dev->parent) {
3318 * If our parent is high speed then he'll
3319 * receive the splits.
3321 if (dev->parent->speed == USB_SPEED_HIGH) {
3322 split_device = dev->parent->devnum;
3323 split_port = dev->portnum;
3327 * Move up the tree one level. If we make it all
3328 * the way up the tree, then the port must not
3329 * be in high speed mode and we don't need a
3335 pipe_handle = cvmx_usb_open_pipe(&priv->usb,
3336 usb_pipedevice(urb->pipe),
3337 usb_pipeendpoint(urb->pipe),
3339 le16_to_cpu(ep->desc.wMaxPacketSize) & 0x7ff,
3341 usb_pipein(urb->pipe) ? CVMX_USB_DIRECTION_IN : CVMX_USB_DIRECTION_OUT,
3343 (le16_to_cpu(ep->desc.wMaxPacketSize) >> 11) & 0x3,
3346 if (pipe_handle < 0) {
3347 spin_unlock_irqrestore(&priv->lock, flags);
3348 dev_dbg(dev, "Failed to create pipe\n");
3351 ep->hcpriv = (void *)(0x10000L + pipe_handle);
3353 pipe_handle = 0xffff & (long)ep->hcpriv;
3356 switch (usb_pipetype(urb->pipe)) {
3357 case PIPE_ISOCHRONOUS:
3358 dev_dbg(dev, "Submit isochronous to %d.%d\n",
3359 usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe));
3361 * Allocate a structure to use for our private list of
3362 * isochronous packets.
3364 iso_packet = kmalloc(urb->number_of_packets *
3365 sizeof(struct cvmx_usb_iso_packet),
3369 /* Fill the list with the data from the URB */
3370 for (i = 0; i < urb->number_of_packets; i++) {
3371 iso_packet[i].offset = urb->iso_frame_desc[i].offset;
3372 iso_packet[i].length = urb->iso_frame_desc[i].length;
3373 iso_packet[i].status = CVMX_USB_COMPLETE_ERROR;
3376 * Store a pointer to the list in the URB setup_packet
3377 * field. We know this currently isn't being used and
3378 * this saves us a bunch of logic.
3380 urb->setup_packet = (char *)iso_packet;
3381 submit_handle = cvmx_usb_submit_isochronous(&priv->usb,
3385 * If submit failed we need to free our private packet
3388 if (submit_handle < 0) {
3389 urb->setup_packet = NULL;
3394 case PIPE_INTERRUPT:
3395 dev_dbg(dev, "Submit interrupt to %d.%d\n",
3396 usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe));
3397 submit_handle = cvmx_usb_submit_interrupt(&priv->usb,
3401 dev_dbg(dev, "Submit control to %d.%d\n",
3402 usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe));
3403 submit_handle = cvmx_usb_submit_control(&priv->usb, pipe_handle,
3407 dev_dbg(dev, "Submit bulk to %d.%d\n",
3408 usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe));
3409 submit_handle = cvmx_usb_submit_bulk(&priv->usb, pipe_handle,
3413 if (submit_handle < 0) {
3414 spin_unlock_irqrestore(&priv->lock, flags);
3415 dev_dbg(dev, "Failed to submit\n");
3418 urb->hcpriv = (void *)(long)(((submit_handle & 0xffff) << 16) | pipe_handle);
3419 spin_unlock_irqrestore(&priv->lock, flags);
3423 static void octeon_usb_urb_dequeue_work(unsigned long arg)
3425 unsigned long flags;
3426 struct octeon_hcd *priv = (struct octeon_hcd *)arg;
3428 spin_lock_irqsave(&priv->lock, flags);
3430 while (!list_empty(&priv->dequeue_list)) {
3433 struct urb *urb = container_of(priv->dequeue_list.next, struct urb, urb_list);
3434 list_del(&urb->urb_list);
3435 /* not enqueued on dequeue_list */
3436 INIT_LIST_HEAD(&urb->urb_list);
3437 pipe_handle = 0xffff & (long)urb->hcpriv;
3438 submit_handle = ((long)urb->hcpriv) >> 16;
3439 cvmx_usb_cancel(&priv->usb, pipe_handle, submit_handle);
3442 spin_unlock_irqrestore(&priv->lock, flags);
3445 static int octeon_usb_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
3447 struct octeon_hcd *priv = hcd_to_octeon(hcd);
3448 unsigned long flags;
3453 spin_lock_irqsave(&priv->lock, flags);
3455 urb->status = status;
3456 list_add_tail(&urb->urb_list, &priv->dequeue_list);
3458 spin_unlock_irqrestore(&priv->lock, flags);
3460 tasklet_schedule(&priv->dequeue_tasklet);
3465 static void octeon_usb_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
3467 struct device *dev = hcd->self.controller;
3470 struct octeon_hcd *priv = hcd_to_octeon(hcd);
3471 int pipe_handle = 0xffff & (long)ep->hcpriv;
3472 unsigned long flags;
3473 spin_lock_irqsave(&priv->lock, flags);
3474 cvmx_usb_cancel_all(&priv->usb, pipe_handle);
3475 if (cvmx_usb_close_pipe(&priv->usb, pipe_handle))
3476 dev_dbg(dev, "Closing pipe %d failed\n", pipe_handle);
3477 spin_unlock_irqrestore(&priv->lock, flags);
3482 static int octeon_usb_hub_status_data(struct usb_hcd *hcd, char *buf)
3484 struct octeon_hcd *priv = hcd_to_octeon(hcd);
3485 struct cvmx_usb_port_status port_status;
3486 unsigned long flags;
3488 spin_lock_irqsave(&priv->lock, flags);
3489 port_status = cvmx_usb_get_status(&priv->usb);
3490 spin_unlock_irqrestore(&priv->lock, flags);
3492 buf[0] = port_status.connect_change << 1;
3494 return (buf[0] != 0);
3497 static int octeon_usb_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength)
3499 struct octeon_hcd *priv = hcd_to_octeon(hcd);
3500 struct device *dev = hcd->self.controller;
3501 struct cvmx_usb_port_status usb_port_status;
3503 struct usb_hub_descriptor *desc;
3504 unsigned long flags;
3507 case ClearHubFeature:
3508 dev_dbg(dev, "ClearHubFeature\n");
3510 case C_HUB_LOCAL_POWER:
3511 case C_HUB_OVER_CURRENT:
3512 /* Nothing required here */
3518 case ClearPortFeature:
3519 dev_dbg(dev, "ClearPortFeature\n");
3521 dev_dbg(dev, " INVALID\n");
3526 case USB_PORT_FEAT_ENABLE:
3527 dev_dbg(dev, " ENABLE\n");
3528 spin_lock_irqsave(&priv->lock, flags);
3529 cvmx_usb_disable(&priv->usb);
3530 spin_unlock_irqrestore(&priv->lock, flags);
3532 case USB_PORT_FEAT_SUSPEND:
3533 dev_dbg(dev, " SUSPEND\n");
3534 /* Not supported on Octeon */
3536 case USB_PORT_FEAT_POWER:
3537 dev_dbg(dev, " POWER\n");
3538 /* Not supported on Octeon */
3540 case USB_PORT_FEAT_INDICATOR:
3541 dev_dbg(dev, " INDICATOR\n");
3542 /* Port inidicator not supported */
3544 case USB_PORT_FEAT_C_CONNECTION:
3545 dev_dbg(dev, " C_CONNECTION\n");
3546 /* Clears drivers internal connect status change flag */
3547 spin_lock_irqsave(&priv->lock, flags);
3548 priv->usb.port_status = cvmx_usb_get_status(&priv->usb);
3549 spin_unlock_irqrestore(&priv->lock, flags);
3551 case USB_PORT_FEAT_C_RESET:
3552 dev_dbg(dev, " C_RESET\n");
3554 * Clears the driver's internal Port Reset Change flag.
3556 spin_lock_irqsave(&priv->lock, flags);
3557 priv->usb.port_status = cvmx_usb_get_status(&priv->usb);
3558 spin_unlock_irqrestore(&priv->lock, flags);
3560 case USB_PORT_FEAT_C_ENABLE:
3561 dev_dbg(dev, " C_ENABLE\n");
3563 * Clears the driver's internal Port Enable/Disable
3566 spin_lock_irqsave(&priv->lock, flags);
3567 priv->usb.port_status = cvmx_usb_get_status(&priv->usb);
3568 spin_unlock_irqrestore(&priv->lock, flags);
3570 case USB_PORT_FEAT_C_SUSPEND:
3571 dev_dbg(dev, " C_SUSPEND\n");
3573 * Clears the driver's internal Port Suspend Change
3574 * flag, which is set when resume signaling on the host
3578 case USB_PORT_FEAT_C_OVER_CURRENT:
3579 dev_dbg(dev, " C_OVER_CURRENT\n");
3580 /* Clears the driver's overcurrent Change flag */
3581 spin_lock_irqsave(&priv->lock, flags);
3582 priv->usb.port_status = cvmx_usb_get_status(&priv->usb);
3583 spin_unlock_irqrestore(&priv->lock, flags);
3586 dev_dbg(dev, " UNKNOWN\n");
3590 case GetHubDescriptor:
3591 dev_dbg(dev, "GetHubDescriptor\n");
3592 desc = (struct usb_hub_descriptor *)buf;
3593 desc->bDescLength = 9;
3594 desc->bDescriptorType = 0x29;
3595 desc->bNbrPorts = 1;
3596 desc->wHubCharacteristics = 0x08;
3597 desc->bPwrOn2PwrGood = 1;
3598 desc->bHubContrCurrent = 0;
3599 desc->u.hs.DeviceRemovable[0] = 0;
3600 desc->u.hs.DeviceRemovable[1] = 0xff;
3603 dev_dbg(dev, "GetHubStatus\n");
3604 *(__le32 *) buf = 0;
3607 dev_dbg(dev, "GetPortStatus\n");
3609 dev_dbg(dev, " INVALID\n");
3613 spin_lock_irqsave(&priv->lock, flags);
3614 usb_port_status = cvmx_usb_get_status(&priv->usb);
3615 spin_unlock_irqrestore(&priv->lock, flags);
3618 if (usb_port_status.connect_change) {
3619 port_status |= (1 << USB_PORT_FEAT_C_CONNECTION);
3620 dev_dbg(dev, " C_CONNECTION\n");
3623 if (usb_port_status.port_enabled) {
3624 port_status |= (1 << USB_PORT_FEAT_C_ENABLE);
3625 dev_dbg(dev, " C_ENABLE\n");
3628 if (usb_port_status.connected) {
3629 port_status |= (1 << USB_PORT_FEAT_CONNECTION);
3630 dev_dbg(dev, " CONNECTION\n");
3633 if (usb_port_status.port_enabled) {
3634 port_status |= (1 << USB_PORT_FEAT_ENABLE);
3635 dev_dbg(dev, " ENABLE\n");
3638 if (usb_port_status.port_over_current) {
3639 port_status |= (1 << USB_PORT_FEAT_OVER_CURRENT);
3640 dev_dbg(dev, " OVER_CURRENT\n");
3643 if (usb_port_status.port_powered) {
3644 port_status |= (1 << USB_PORT_FEAT_POWER);
3645 dev_dbg(dev, " POWER\n");
3648 if (usb_port_status.port_speed == CVMX_USB_SPEED_HIGH) {
3649 port_status |= USB_PORT_STAT_HIGH_SPEED;
3650 dev_dbg(dev, " HIGHSPEED\n");
3651 } else if (usb_port_status.port_speed == CVMX_USB_SPEED_LOW) {
3652 port_status |= (1 << USB_PORT_FEAT_LOWSPEED);
3653 dev_dbg(dev, " LOWSPEED\n");
3656 *((__le32 *) buf) = cpu_to_le32(port_status);
3659 dev_dbg(dev, "SetHubFeature\n");
3660 /* No HUB features supported */
3662 case SetPortFeature:
3663 dev_dbg(dev, "SetPortFeature\n");
3665 dev_dbg(dev, " INVALID\n");
3670 case USB_PORT_FEAT_SUSPEND:
3671 dev_dbg(dev, " SUSPEND\n");
3673 case USB_PORT_FEAT_POWER:
3674 dev_dbg(dev, " POWER\n");
3676 case USB_PORT_FEAT_RESET:
3677 dev_dbg(dev, " RESET\n");
3678 spin_lock_irqsave(&priv->lock, flags);
3679 cvmx_usb_disable(&priv->usb);
3680 if (cvmx_usb_enable(&priv->usb))
3681 dev_dbg(dev, "Failed to enable the port\n");
3682 spin_unlock_irqrestore(&priv->lock, flags);
3684 case USB_PORT_FEAT_INDICATOR:
3685 dev_dbg(dev, " INDICATOR\n");
3689 dev_dbg(dev, " UNKNOWN\n");
3694 dev_dbg(dev, "Unknown root hub request\n");
3701 static const struct hc_driver octeon_hc_driver = {
3702 .description = "Octeon USB",
3703 .product_desc = "Octeon Host Controller",
3704 .hcd_priv_size = sizeof(struct octeon_hcd),
3705 .irq = octeon_usb_irq,
3706 .flags = HCD_MEMORY | HCD_USB2,
3707 .start = octeon_usb_start,
3708 .stop = octeon_usb_stop,
3709 .urb_enqueue = octeon_usb_urb_enqueue,
3710 .urb_dequeue = octeon_usb_urb_dequeue,
3711 .endpoint_disable = octeon_usb_endpoint_disable,
3712 .get_frame_number = octeon_usb_get_frame_number,
3713 .hub_status_data = octeon_usb_hub_status_data,
3714 .hub_control = octeon_usb_hub_control,
3718 static int octeon_usb_driver_probe(struct device *dev)
3721 int usb_num = to_platform_device(dev)->id;
3722 int irq = platform_get_irq(to_platform_device(dev), 0);
3723 struct octeon_hcd *priv;
3724 struct usb_hcd *hcd;
3725 unsigned long flags;
3728 * Set the DMA mask to 64bits so we get buffers already translated for
3731 dev->coherent_dma_mask = ~0;
3732 dev->dma_mask = &dev->coherent_dma_mask;
3734 hcd = usb_create_hcd(&octeon_hc_driver, dev, dev_name(dev));
3736 dev_dbg(dev, "Failed to allocate memory for HCD\n");
3739 hcd->uses_new_polling = 1;
3740 priv = (struct octeon_hcd *)hcd->hcd_priv;
3742 spin_lock_init(&priv->lock);
3744 tasklet_init(&priv->dequeue_tasklet, octeon_usb_urb_dequeue_work, (unsigned long)priv);
3745 INIT_LIST_HEAD(&priv->dequeue_list);
3747 status = cvmx_usb_initialize(&priv->usb, usb_num);
3749 dev_dbg(dev, "USB initialization failed with %d\n", status);
3754 /* This delay is needed for CN3010, but I don't know why... */
3757 spin_lock_irqsave(&priv->lock, flags);
3758 cvmx_usb_poll(&priv->usb);
3759 spin_unlock_irqrestore(&priv->lock, flags);
3761 status = usb_add_hcd(hcd, irq, IRQF_SHARED);
3763 dev_dbg(dev, "USB add HCD failed with %d\n", status);
3768 dev_dbg(dev, "Registered HCD for port %d on irq %d\n", usb_num, irq);
3773 static int octeon_usb_driver_remove(struct device *dev)
3776 struct usb_hcd *hcd = dev_get_drvdata(dev);
3777 struct octeon_hcd *priv = hcd_to_octeon(hcd);
3778 unsigned long flags;
3780 usb_remove_hcd(hcd);
3781 tasklet_kill(&priv->dequeue_tasklet);
3782 spin_lock_irqsave(&priv->lock, flags);
3783 status = cvmx_usb_shutdown(&priv->usb);
3784 spin_unlock_irqrestore(&priv->lock, flags);
3786 dev_dbg(dev, "USB shutdown failed with %d\n", status);
3793 static struct device_driver octeon_usb_driver = {
3794 .name = "OcteonUSB",
3795 .bus = &platform_bus_type,
3796 .probe = octeon_usb_driver_probe,
3797 .remove = octeon_usb_driver_remove,
3801 #define MAX_USB_PORTS 10
3802 static struct platform_device *pdev_glob[MAX_USB_PORTS];
3803 static int octeon_usb_registered;
3804 static int __init octeon_usb_module_init(void)
3806 int num_devices = cvmx_usb_get_num_ports();
3809 if (usb_disabled() || num_devices == 0)
3812 if (driver_register(&octeon_usb_driver))
3815 octeon_usb_registered = 1;
3818 * Only cn52XX and cn56XX have DWC_OTG USB hardware and the
3819 * IOB priority registers. Under heavy network load USB
3820 * hardware can be starved by the IOB causing a crash. Give
3821 * it a priority boost if it has been waiting more than 400
3822 * cycles to avoid this situation.
3824 * Testing indicates that a cnt_val of 8192 is not sufficient,
3825 * but no failures are seen with 4096. We choose a value of
3826 * 400 to give a safety factor of 10.
3828 if (OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN56XX)) {
3829 union cvmx_iob_n2c_l2c_pri_cnt pri_cnt;
3832 pri_cnt.s.cnt_enb = 1;
3833 pri_cnt.s.cnt_val = 400;
3834 cvmx_write_csr(CVMX_IOB_N2C_L2C_PRI_CNT, pri_cnt.u64);
3837 for (device = 0; device < num_devices; device++) {
3838 struct resource irq_resource;
3839 struct platform_device *pdev;
3840 memset(&irq_resource, 0, sizeof(irq_resource));
3841 irq_resource.start = (device == 0) ? OCTEON_IRQ_USB0 : OCTEON_IRQ_USB1;
3842 irq_resource.end = irq_resource.start;
3843 irq_resource.flags = IORESOURCE_IRQ;
3844 pdev = platform_device_register_simple((char *)octeon_usb_driver. name, device, &irq_resource, 1);
3846 driver_unregister(&octeon_usb_driver);
3847 octeon_usb_registered = 0;
3848 return PTR_ERR(pdev);
3850 if (device < MAX_USB_PORTS)
3851 pdev_glob[device] = pdev;
3857 static void __exit octeon_usb_module_cleanup(void)
3861 for (i = 0; i < MAX_USB_PORTS; i++)
3863 platform_device_unregister(pdev_glob[i]);
3864 pdev_glob[i] = NULL;
3866 if (octeon_usb_registered)
3867 driver_unregister(&octeon_usb_driver);
3870 MODULE_LICENSE("GPL");
3871 MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>");
3872 MODULE_DESCRIPTION("Cavium Networks Octeon USB Host driver.");
3873 module_init(octeon_usb_module_init);
3874 module_exit(octeon_usb_module_cleanup);