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staging: octeon-usb: use dynamic allocation for pipes
[~andy/linux] / drivers / staging / octeon-usb / octeon-hcd.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2008 Cavium Networks
7  *
8  * Some parts of the code were originally released under BSD license:
9  *
10  * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
11  * reserved.
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions are
15  * met:
16  *
17  *   * Redistributions of source code must retain the above copyright
18  *     notice, this list of conditions and the following disclaimer.
19  *
20  *   * Redistributions in binary form must reproduce the above
21  *     copyright notice, this list of conditions and the following
22  *     disclaimer in the documentation and/or other materials provided
23  *     with the distribution.
24  *
25  *   * Neither the name of Cavium Networks nor the names of
26  *     its contributors may be used to endorse or promote products
27  *     derived from this software without specific prior written
28  *     permission.
29  *
30  * This Software, including technical data, may be subject to U.S. export
31  * control laws, including the U.S. Export Administration Act and its associated
32  * regulations, and may be subject to export or import regulations in other
33  * countries.
34  *
35  * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
36  * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
37  * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
38  * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION
39  * OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
40  * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
41  * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
42  * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
43  * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
44  * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
45  */
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/init.h>
49 #include <linux/pci.h>
50 #include <linux/interrupt.h>
51 #include <linux/platform_device.h>
52 #include <linux/usb.h>
53
54 #include <linux/time.h>
55 #include <linux/delay.h>
56
57 #include <asm/octeon/cvmx.h>
58 #include <asm/octeon/cvmx-iob-defs.h>
59
60 #include <linux/usb/hcd.h>
61
62 #include <linux/err.h>
63
64 #include <asm/octeon/octeon.h>
65 #include <asm/octeon/cvmx-helper.h>
66 #include <asm/octeon/cvmx-sysinfo.h>
67 #include <asm/octeon/cvmx-helper-board.h>
68
69 #include "octeon-hcd.h"
70
71 /**
72  * enum cvmx_usb_speed - the possible USB device speeds
73  *
74  * @CVMX_USB_SPEED_HIGH: Device is operation at 480Mbps
75  * @CVMX_USB_SPEED_FULL: Device is operation at 12Mbps
76  * @CVMX_USB_SPEED_LOW:  Device is operation at 1.5Mbps
77  */
78 enum cvmx_usb_speed {
79         CVMX_USB_SPEED_HIGH = 0,
80         CVMX_USB_SPEED_FULL = 1,
81         CVMX_USB_SPEED_LOW = 2,
82 };
83
84 /**
85  * enum cvmx_usb_transfer - the possible USB transfer types
86  *
87  * @CVMX_USB_TRANSFER_CONTROL:     USB transfer type control for hub and status
88  *                                 transfers
89  * @CVMX_USB_TRANSFER_ISOCHRONOUS: USB transfer type isochronous for low
90  *                                 priority periodic transfers
91  * @CVMX_USB_TRANSFER_BULK:        USB transfer type bulk for large low priority
92  *                                 transfers
93  * @CVMX_USB_TRANSFER_INTERRUPT:   USB transfer type interrupt for high priority
94  *                                 periodic transfers
95  */
96 enum cvmx_usb_transfer {
97         CVMX_USB_TRANSFER_CONTROL = 0,
98         CVMX_USB_TRANSFER_ISOCHRONOUS = 1,
99         CVMX_USB_TRANSFER_BULK = 2,
100         CVMX_USB_TRANSFER_INTERRUPT = 3,
101 };
102
103 /**
104  * enum cvmx_usb_direction - the transfer directions
105  *
106  * @CVMX_USB_DIRECTION_OUT: Data is transferring from Octeon to the device/host
107  * @CVMX_USB_DIRECTION_IN:  Data is transferring from the device/host to Octeon
108  */
109 enum cvmx_usb_direction {
110         CVMX_USB_DIRECTION_OUT,
111         CVMX_USB_DIRECTION_IN,
112 };
113
114 /**
115  * enum cvmx_usb_complete - possible callback function status codes
116  *
117  * @CVMX_USB_COMPLETE_SUCCESS:    The transaction / operation finished without
118  *                                any errors
119  * @CVMX_USB_COMPLETE_SHORT:      FIXME: This is currently not implemented
120  * @CVMX_USB_COMPLETE_CANCEL:     The transaction was canceled while in flight
121  *                                by a user call to cvmx_usb_cancel
122  * @CVMX_USB_COMPLETE_ERROR:      The transaction aborted with an unexpected
123  *                                error status
124  * @CVMX_USB_COMPLETE_STALL:      The transaction received a USB STALL response
125  *                                from the device
126  * @CVMX_USB_COMPLETE_XACTERR:    The transaction failed with an error from the
127  *                                device even after a number of retries
128  * @CVMX_USB_COMPLETE_DATATGLERR: The transaction failed with a data toggle
129  *                                error even after a number of retries
130  * @CVMX_USB_COMPLETE_BABBLEERR:  The transaction failed with a babble error
131  * @CVMX_USB_COMPLETE_FRAMEERR:   The transaction failed with a frame error
132  *                                even after a number of retries
133  */
134 enum cvmx_usb_complete {
135         CVMX_USB_COMPLETE_SUCCESS,
136         CVMX_USB_COMPLETE_SHORT,
137         CVMX_USB_COMPLETE_CANCEL,
138         CVMX_USB_COMPLETE_ERROR,
139         CVMX_USB_COMPLETE_STALL,
140         CVMX_USB_COMPLETE_XACTERR,
141         CVMX_USB_COMPLETE_DATATGLERR,
142         CVMX_USB_COMPLETE_BABBLEERR,
143         CVMX_USB_COMPLETE_FRAMEERR,
144 };
145
146 /**
147  * struct cvmx_usb_port_status - the USB port status information
148  *
149  * @port_enabled:       1 = Usb port is enabled, 0 = disabled
150  * @port_over_current:  1 = Over current detected, 0 = Over current not
151  *                      detected. Octeon doesn't support over current detection.
152  * @port_powered:       1 = Port power is being supplied to the device, 0 =
153  *                      power is off. Octeon doesn't support turning port power
154  *                      off.
155  * @port_speed:         Current port speed.
156  * @connected:          1 = A device is connected to the port, 0 = No device is
157  *                      connected.
158  * @connect_change:     1 = Device connected state changed since the last set
159  *                      status call.
160  */
161 struct cvmx_usb_port_status {
162         uint32_t reserved               : 25;
163         uint32_t port_enabled           : 1;
164         uint32_t port_over_current      : 1;
165         uint32_t port_powered           : 1;
166         enum cvmx_usb_speed port_speed  : 2;
167         uint32_t connected              : 1;
168         uint32_t connect_change         : 1;
169 };
170
171 /**
172  * union cvmx_usb_control_header - the structure of a Control packet header
173  *
174  * @s.request_type:     Bit 7 tells the direction: 1=IN, 0=OUT
175  * @s.request           The standard usb request to make
176  * @s.value             Value parameter for the request in little endian format
177  * @s.index             Index for the request in little endian format
178  * @s.length            Length of the data associated with this request in
179  *                      little endian format
180  */
181 union cvmx_usb_control_header {
182         uint64_t u64;
183         struct {
184                 uint64_t request_type   : 8;
185                 uint64_t request        : 8;
186                 uint64_t value          : 16;
187                 uint64_t index          : 16;
188                 uint64_t length         : 16;
189         } s;
190 };
191
192 /**
193  * struct cvmx_usb_iso_packet - descriptor for Isochronous packets
194  *
195  * @offset:     This is the offset in bytes into the main buffer where this data
196  *              is stored.
197  * @length:     This is the length in bytes of the data.
198  * @status:     This is the status of this individual packet transfer.
199  */
200 struct cvmx_usb_iso_packet {
201         int offset;
202         int length;
203         enum cvmx_usb_complete status;
204 };
205
206 /**
207  * enum cvmx_usb_initialize_flags - flags used by the initialization function
208  *
209  * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI:    The USB port uses a 12MHz crystal
210  *                                            as clock source at USB_XO and
211  *                                            USB_XI.
212  * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND:   The USB port uses 12/24/48MHz 2.5V
213  *                                            board clock source at USB_XO.
214  *                                            USB_XI should be tied to GND.
215  * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK: Mask for clock speed field
216  * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ:    Speed of reference clock or
217  *                                            crystal
218  * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ:    Speed of reference clock
219  * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ:    Speed of reference clock
220  * @CVMX_USB_INITIALIZE_FLAGS_NO_DMA:         Disable DMA and used polled IO for
221  *                                            data transfer use for the USB
222  */
223 enum cvmx_usb_initialize_flags {
224         CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI           = 1 << 0,
225         CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND          = 1 << 1,
226         CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK        = 3 << 3,
227         CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ           = 1 << 3,
228         CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ           = 2 << 3,
229         CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ           = 3 << 3,
230         /* Bits 3-4 used to encode the clock frequency */
231         CVMX_USB_INITIALIZE_FLAGS_NO_DMA                = 1 << 5,
232 };
233
234 /**
235  * enum cvmx_usb_pipe_flags - internal flags for a pipe.
236  *
237  * @__CVMX_USB_PIPE_FLAGS_SCHEDULED: Used internally to determine if a pipe is
238  *                                   actively using hardware. Do not use.
239  * @__CVMX_USB_PIPE_FLAGS_NEED_PING: Used internally to determine if a high
240  *                                   speed pipe is in the ping state. Do not
241  *                                   use.
242  */
243 enum cvmx_usb_pipe_flags {
244         __CVMX_USB_PIPE_FLAGS_SCHEDULED = 1 << 17,
245         __CVMX_USB_PIPE_FLAGS_NEED_PING = 1 << 18,
246 };
247
248 /* Normal prefetch that use the pref instruction. */
249 #define CVMX_PREFETCH(address, offset) asm volatile ("pref %[type], %[off](%[rbase])" : : [rbase] "d" (address), [off] "I" (offset), [type] "n" (0))
250
251 /* Maximum number of times to retry failed transactions */
252 #define MAX_RETRIES             3
253
254 /* Maximum number of hardware channels supported by the USB block */
255 #define MAX_CHANNELS            8
256
257 /* The highest valid USB device address */
258 #define MAX_USB_ADDRESS         127
259
260 /* The highest valid USB endpoint number */
261 #define MAX_USB_ENDPOINT        15
262
263 /* The highest valid port number on a hub */
264 #define MAX_USB_HUB_PORT        15
265
266 /*
267  * The low level hardware can transfer a maximum of this number of bytes in each
268  * transfer. The field is 19 bits wide
269  */
270 #define MAX_TRANSFER_BYTES      ((1<<19)-1)
271
272 /*
273  * The low level hardware can transfer a maximum of this number of packets in
274  * each transfer. The field is 10 bits wide
275  */
276 #define MAX_TRANSFER_PACKETS    ((1<<10)-1)
277
278 enum {
279         USB_CLOCK_TYPE_REF_12,
280         USB_CLOCK_TYPE_REF_24,
281         USB_CLOCK_TYPE_REF_48,
282         USB_CLOCK_TYPE_CRYSTAL_12,
283 };
284
285 /**
286  * Logical transactions may take numerous low level
287  * transactions, especially when splits are concerned. This
288  * enum represents all of the possible stages a transaction can
289  * be in. Note that split completes are always even. This is so
290  * the NAK handler can backup to the previous low level
291  * transaction with a simple clearing of bit 0.
292  */
293 enum cvmx_usb_stage {
294         CVMX_USB_STAGE_NON_CONTROL,
295         CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE,
296         CVMX_USB_STAGE_SETUP,
297         CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE,
298         CVMX_USB_STAGE_DATA,
299         CVMX_USB_STAGE_DATA_SPLIT_COMPLETE,
300         CVMX_USB_STAGE_STATUS,
301         CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE,
302 };
303
304 /**
305  * struct cvmx_usb_transaction - describes each pending USB transaction
306  *                               regardless of type. These are linked together
307  *                               to form a list of pending requests for a pipe.
308  *
309  * @prev:               Transaction before this one in the pipe.
310  * @next:               Transaction after this one in the pipe.
311  * @type:               Type of transaction, duplicated of the pipe.
312  * @flags:              State flags for this transaction.
313  * @buffer:             User's physical buffer address to read/write.
314  * @buffer_length:      Size of the user's buffer in bytes.
315  * @control_header:     For control transactions, physical address of the 8
316  *                      byte standard header.
317  * @iso_start_frame:    For ISO transactions, the starting frame number.
318  * @iso_number_packets: For ISO transactions, the number of packets in the
319  *                      request.
320  * @iso_packets:        For ISO transactions, the sub packets in the request.
321  * @actual_bytes:       Actual bytes transfer for this transaction.
322  * @stage:              For control transactions, the current stage.
323  * @urb:                URB.
324  */
325 struct cvmx_usb_transaction {
326         struct cvmx_usb_transaction *prev;
327         struct cvmx_usb_transaction *next;
328         enum cvmx_usb_transfer type;
329         uint64_t buffer;
330         int buffer_length;
331         uint64_t control_header;
332         int iso_start_frame;
333         int iso_number_packets;
334         struct cvmx_usb_iso_packet *iso_packets;
335         int xfersize;
336         int pktcnt;
337         int retries;
338         int actual_bytes;
339         enum cvmx_usb_stage stage;
340         struct urb *urb;
341 };
342
343 /**
344  * struct cvmx_usb_pipe - a pipe represents a virtual connection between Octeon
345  *                        and some USB device. It contains a list of pending
346  *                        request to the device.
347  *
348  * @prev:               Pipe before this one in the list
349  * @next:               Pipe after this one in the list
350  * @head:               The first pending transaction
351  * @tail:               The last pending transaction
352  * @interval:           For periodic pipes, the interval between packets in
353  *                      frames
354  * @next_tx_frame:      The next frame this pipe is allowed to transmit on
355  * @flags:              State flags for this pipe
356  * @device_speed:       Speed of device connected to this pipe
357  * @transfer_type:      Type of transaction supported by this pipe
358  * @transfer_dir:       IN or OUT. Ignored for Control
359  * @multi_count:        Max packet in a row for the device
360  * @max_packet:         The device's maximum packet size in bytes
361  * @device_addr:        USB device address at other end of pipe
362  * @endpoint_num:       USB endpoint number at other end of pipe
363  * @hub_device_addr:    Hub address this device is connected to
364  * @hub_port:           Hub port this device is connected to
365  * @pid_toggle:         This toggles between 0/1 on every packet send to track
366  *                      the data pid needed
367  * @channel:            Hardware DMA channel for this pipe
368  * @split_sc_frame:     The low order bits of the frame number the split
369  *                      complete should be sent on
370  */
371 struct cvmx_usb_pipe {
372         struct cvmx_usb_pipe *prev;
373         struct cvmx_usb_pipe *next;
374         struct cvmx_usb_transaction *head;
375         struct cvmx_usb_transaction *tail;
376         uint64_t interval;
377         uint64_t next_tx_frame;
378         enum cvmx_usb_pipe_flags flags;
379         enum cvmx_usb_speed device_speed;
380         enum cvmx_usb_transfer transfer_type;
381         enum cvmx_usb_direction transfer_dir;
382         int multi_count;
383         uint16_t max_packet;
384         uint8_t device_addr;
385         uint8_t endpoint_num;
386         uint8_t hub_device_addr;
387         uint8_t hub_port;
388         uint8_t pid_toggle;
389         uint8_t channel;
390         int8_t split_sc_frame;
391 };
392
393 /**
394  * struct cvmx_usb_pipe_list
395  *
396  * @head: Head of the list, or NULL if empty.
397  * @tail: Tail if the list, or NULL if empty.
398  */
399 struct cvmx_usb_pipe_list {
400         struct cvmx_usb_pipe *head;
401         struct cvmx_usb_pipe *tail;
402 };
403
404 struct cvmx_usb_tx_fifo {
405         struct {
406                 int channel;
407                 int size;
408                 uint64_t address;
409         } entry[MAX_CHANNELS+1];
410         int head;
411         int tail;
412 };
413
414 /**
415  * struct cvmx_usb_state - the state of the USB block
416  *
417  * init_flags:             Flags passed to initialize.
418  * index:                  Which USB block this is for.
419  * idle_hardware_channels: Bit set for every idle hardware channel.
420  * usbcx_hprt:             Stored port status so we don't need to read a CSR to
421  *                         determine splits.
422  * pipe_for_channel:       Map channels to pipes.
423  * pipe:                   Storage for pipes.
424  * indent:                 Used by debug output to indent functions.
425  * port_status:            Last port status used for change notification.
426  * idle_pipes:             List of open pipes that have no transactions.
427  * active_pipes:           Active pipes indexed by transfer type.
428  * frame_number:           Increments every SOF interrupt for time keeping.
429  * active_split:           Points to the current active split, or NULL.
430  */
431 struct cvmx_usb_state {
432         int init_flags;
433         int index;
434         int idle_hardware_channels;
435         union cvmx_usbcx_hprt usbcx_hprt;
436         struct cvmx_usb_pipe *pipe_for_channel[MAX_CHANNELS];
437         int indent;
438         struct cvmx_usb_port_status port_status;
439         struct cvmx_usb_pipe_list idle_pipes;
440         struct cvmx_usb_pipe_list active_pipes[4];
441         uint64_t frame_number;
442         struct cvmx_usb_transaction *active_split;
443         struct cvmx_usb_tx_fifo periodic;
444         struct cvmx_usb_tx_fifo nonperiodic;
445 };
446
447 struct octeon_hcd {
448         spinlock_t lock;
449         struct cvmx_usb_state usb;
450         struct tasklet_struct dequeue_tasklet;
451         struct list_head dequeue_list;
452 };
453
454 /* This macro spins on a field waiting for it to reach a value */
455 #define CVMX_WAIT_FOR_FIELD32(address, type, field, op, value, timeout_usec)\
456         ({int result;                                                       \
457         do {                                                                \
458                 uint64_t done = cvmx_get_cycle() + (uint64_t)timeout_usec * \
459                         octeon_get_clock_rate() / 1000000;                  \
460                 type c;                                                     \
461                 while (1) {                                                 \
462                         c.u32 = __cvmx_usb_read_csr32(usb, address);        \
463                         if (c.s.field op (value)) {                         \
464                                 result = 0;                                 \
465                                 break;                                      \
466                         } else if (cvmx_get_cycle() > done) {               \
467                                 result = -1;                                \
468                                 break;                                      \
469                         } else                                              \
470                                 cvmx_wait(100);                             \
471                 }                                                           \
472         } while (0);                                                        \
473         result; })
474
475 /*
476  * This macro logically sets a single field in a CSR. It does the sequence
477  * read, modify, and write
478  */
479 #define USB_SET_FIELD32(address, type, field, value)            \
480         do {                                                    \
481                 type c;                                         \
482                 c.u32 = __cvmx_usb_read_csr32(usb, address);    \
483                 c.s.field = value;                              \
484                 __cvmx_usb_write_csr32(usb, address, c.u32);    \
485         } while (0)
486
487 /* Returns the IO address to push/pop stuff data from the FIFOs */
488 #define USB_FIFO_ADDRESS(channel, usb_index) (CVMX_USBCX_GOTGCTL(usb_index) + ((channel)+1)*0x1000)
489
490 static int octeon_usb_get_clock_type(void)
491 {
492         switch (cvmx_sysinfo_get()->board_type) {
493         case CVMX_BOARD_TYPE_BBGW_REF:
494         case CVMX_BOARD_TYPE_LANAI2_A:
495         case CVMX_BOARD_TYPE_LANAI2_U:
496         case CVMX_BOARD_TYPE_LANAI2_G:
497         case CVMX_BOARD_TYPE_UBNT_E100:
498                 return USB_CLOCK_TYPE_CRYSTAL_12;
499         }
500         return USB_CLOCK_TYPE_REF_48;
501 }
502
503 /**
504  * Read a USB 32bit CSR. It performs the necessary address swizzle
505  * for 32bit CSRs and logs the value in a readable format if
506  * debugging is on.
507  *
508  * @usb:     USB block this access is for
509  * @address: 64bit address to read
510  *
511  * Returns: Result of the read
512  */
513 static inline uint32_t __cvmx_usb_read_csr32(struct cvmx_usb_state *usb,
514                                              uint64_t address)
515 {
516         uint32_t result = cvmx_read64_uint32(address ^ 4);
517         return result;
518 }
519
520
521 /**
522  * Write a USB 32bit CSR. It performs the necessary address
523  * swizzle for 32bit CSRs and logs the value in a readable format
524  * if debugging is on.
525  *
526  * @usb:     USB block this access is for
527  * @address: 64bit address to write
528  * @value:   Value to write
529  */
530 static inline void __cvmx_usb_write_csr32(struct cvmx_usb_state *usb,
531                                           uint64_t address, uint32_t value)
532 {
533         cvmx_write64_uint32(address ^ 4, value);
534         cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
535 }
536
537
538 /**
539  * Read a USB 64bit CSR. It logs the value in a readable format if
540  * debugging is on.
541  *
542  * @usb:     USB block this access is for
543  * @address: 64bit address to read
544  *
545  * Returns: Result of the read
546  */
547 static inline uint64_t __cvmx_usb_read_csr64(struct cvmx_usb_state *usb,
548                                              uint64_t address)
549 {
550         uint64_t result = cvmx_read64_uint64(address);
551         return result;
552 }
553
554
555 /**
556  * Write a USB 64bit CSR. It logs the value in a readable format
557  * if debugging is on.
558  *
559  * @usb:     USB block this access is for
560  * @address: 64bit address to write
561  * @value:   Value to write
562  */
563 static inline void __cvmx_usb_write_csr64(struct cvmx_usb_state *usb,
564                                           uint64_t address, uint64_t value)
565 {
566         cvmx_write64_uint64(address, value);
567 }
568
569 /**
570  * Return non zero if this pipe connects to a non HIGH speed
571  * device through a high speed hub.
572  *
573  * @usb:    USB block this access is for
574  * @pipe:   Pipe to check
575  *
576  * Returns: Non zero if we need to do split transactions
577  */
578 static inline int __cvmx_usb_pipe_needs_split(struct cvmx_usb_state *usb,
579                                               struct cvmx_usb_pipe *pipe)
580 {
581         return pipe->device_speed != CVMX_USB_SPEED_HIGH &&
582                usb->usbcx_hprt.s.prtspd == CVMX_USB_SPEED_HIGH;
583 }
584
585
586 /**
587  * Trivial utility function to return the correct PID for a pipe
588  *
589  * @pipe:   pipe to check
590  *
591  * Returns: PID for pipe
592  */
593 static inline int __cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe)
594 {
595         if (pipe->pid_toggle)
596                 return 2; /* Data1 */
597         else
598                 return 0; /* Data0 */
599 }
600
601
602 /**
603  * Return the number of USB ports supported by this Octeon
604  * chip. If the chip doesn't support USB, or is not supported
605  * by this API, a zero will be returned. Most Octeon chips
606  * support one usb port, but some support two ports.
607  * cvmx_usb_initialize() must be called on independent
608  * struct cvmx_usb_state.
609  *
610  * Returns: Number of port, zero if usb isn't supported
611  */
612 static int cvmx_usb_get_num_ports(void)
613 {
614         int arch_ports = 0;
615
616         if (OCTEON_IS_MODEL(OCTEON_CN56XX))
617                 arch_ports = 1;
618         else if (OCTEON_IS_MODEL(OCTEON_CN52XX))
619                 arch_ports = 2;
620         else if (OCTEON_IS_MODEL(OCTEON_CN50XX))
621                 arch_ports = 1;
622         else if (OCTEON_IS_MODEL(OCTEON_CN31XX))
623                 arch_ports = 1;
624         else if (OCTEON_IS_MODEL(OCTEON_CN30XX))
625                 arch_ports = 1;
626         else
627                 arch_ports = 0;
628
629         return arch_ports;
630 }
631
632 /**
633  * Add a pipe to the tail of a list
634  * @list:   List to add pipe to
635  * @pipe:   Pipe to add
636  */
637 static inline void __cvmx_usb_append_pipe(struct cvmx_usb_pipe_list *list, struct cvmx_usb_pipe *pipe)
638 {
639         pipe->next = NULL;
640         pipe->prev = list->tail;
641         if (list->tail)
642                 list->tail->next = pipe;
643         else
644                 list->head = pipe;
645         list->tail = pipe;
646 }
647
648
649 /**
650  * Remove a pipe from a list
651  * @list:   List to remove pipe from
652  * @pipe:   Pipe to remove
653  */
654 static inline void __cvmx_usb_remove_pipe(struct cvmx_usb_pipe_list *list, struct cvmx_usb_pipe *pipe)
655 {
656         if (list->head == pipe) {
657                 list->head = pipe->next;
658                 pipe->next = NULL;
659                 if (list->head)
660                         list->head->prev = NULL;
661                 else
662                         list->tail = NULL;
663         } else if (list->tail == pipe) {
664                 list->tail = pipe->prev;
665                 list->tail->next = NULL;
666                 pipe->prev = NULL;
667         } else {
668                 pipe->prev->next = pipe->next;
669                 pipe->next->prev = pipe->prev;
670                 pipe->prev = NULL;
671                 pipe->next = NULL;
672         }
673 }
674
675
676 /**
677  * Initialize a USB port for use. This must be called before any
678  * other access to the Octeon USB port is made. The port starts
679  * off in the disabled state.
680  *
681  * @usb:         Pointer to an empty struct cvmx_usb_state
682  *               that will be populated by the initialize call.
683  *               This structure is then passed to all other USB
684  *               functions.
685  * @usb_port_number:
686  *               Which Octeon USB port to initialize.
687  *
688  * Returns: 0 or a negative error code.
689  */
690 static int cvmx_usb_initialize(struct cvmx_usb_state *usb,
691                                int usb_port_number)
692 {
693         union cvmx_usbnx_clk_ctl usbn_clk_ctl;
694         union cvmx_usbnx_usbp_ctl_status usbn_usbp_ctl_status;
695         enum cvmx_usb_initialize_flags flags = 0;
696
697         /* At first allow 0-1 for the usb port number */
698         if ((usb_port_number < 0) || (usb_port_number > 1))
699                 return -EINVAL;
700         /* For all chips except 52XX there is only one port */
701         if (!OCTEON_IS_MODEL(OCTEON_CN52XX) && (usb_port_number > 0))
702                 return -EINVAL;
703         /* Try to determine clock type automatically */
704         if (octeon_usb_get_clock_type() == USB_CLOCK_TYPE_CRYSTAL_12) {
705                 /* Only 12 MHZ crystals are supported */
706                 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI;
707         } else {
708                 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND;
709
710                 switch (octeon_usb_get_clock_type()) {
711                 case USB_CLOCK_TYPE_REF_12:
712                         flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ;
713                         break;
714                 case USB_CLOCK_TYPE_REF_24:
715                         flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ;
716                         break;
717                 case USB_CLOCK_TYPE_REF_48:
718                         flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ;
719                         break;
720                 default:
721                         return -EINVAL;
722                         break;
723                 }
724         }
725
726         memset(usb, 0, sizeof(*usb));
727         usb->init_flags = flags;
728
729         /* Initialize the USB state structure */
730         usb->index = usb_port_number;
731
732         /*
733          * Power On Reset and PHY Initialization
734          *
735          * 1. Wait for DCOK to assert (nothing to do)
736          *
737          * 2a. Write USBN0/1_CLK_CTL[POR] = 1 and
738          *     USBN0/1_CLK_CTL[HRST,PRST,HCLK_RST] = 0
739          */
740         usbn_clk_ctl.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index));
741         usbn_clk_ctl.s.por = 1;
742         usbn_clk_ctl.s.hrst = 0;
743         usbn_clk_ctl.s.prst = 0;
744         usbn_clk_ctl.s.hclk_rst = 0;
745         usbn_clk_ctl.s.enable = 0;
746         /*
747          * 2b. Select the USB reference clock/crystal parameters by writing
748          *     appropriate values to USBN0/1_CLK_CTL[P_C_SEL, P_RTYPE, P_COM_ON]
749          */
750         if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND) {
751                 /*
752                  * The USB port uses 12/24/48MHz 2.5V board clock
753                  * source at USB_XO. USB_XI should be tied to GND.
754                  * Most Octeon evaluation boards require this setting
755                  */
756                 if (OCTEON_IS_MODEL(OCTEON_CN3XXX) ||
757                     OCTEON_IS_MODEL(OCTEON_CN56XX) ||
758                     OCTEON_IS_MODEL(OCTEON_CN50XX))
759                         /* From CN56XX,CN50XX,CN31XX,CN30XX manuals */
760                         usbn_clk_ctl.s.p_rtype = 2; /* p_rclk=1 & p_xenbn=0 */
761                 else
762                         /* From CN52XX manual */
763                         usbn_clk_ctl.s.p_rtype = 1;
764
765                 switch (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK) {
766                 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ:
767                         usbn_clk_ctl.s.p_c_sel = 0;
768                         break;
769                 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ:
770                         usbn_clk_ctl.s.p_c_sel = 1;
771                         break;
772                 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ:
773                         usbn_clk_ctl.s.p_c_sel = 2;
774                         break;
775                 }
776         } else {
777                 /*
778                  * The USB port uses a 12MHz crystal as clock source
779                  * at USB_XO and USB_XI
780                  */
781                 if (OCTEON_IS_MODEL(OCTEON_CN3XXX))
782                         /* From CN31XX,CN30XX manual */
783                         usbn_clk_ctl.s.p_rtype = 3; /* p_rclk=1 & p_xenbn=1 */
784                 else
785                         /* From CN56XX,CN52XX,CN50XX manuals. */
786                         usbn_clk_ctl.s.p_rtype = 0;
787
788                 usbn_clk_ctl.s.p_c_sel = 0;
789         }
790         /*
791          * 2c. Select the HCLK via writing USBN0/1_CLK_CTL[DIVIDE, DIVIDE2] and
792          *     setting USBN0/1_CLK_CTL[ENABLE] = 1. Divide the core clock down
793          *     such that USB is as close as possible to 125Mhz
794          */
795         {
796                 int divisor = (octeon_get_clock_rate()+125000000-1)/125000000;
797                 /* Lower than 4 doesn't seem to work properly */
798                 if (divisor < 4)
799                         divisor = 4;
800                 usbn_clk_ctl.s.divide = divisor;
801                 usbn_clk_ctl.s.divide2 = 0;
802         }
803         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
804                                usbn_clk_ctl.u64);
805         /* 2d. Write USBN0/1_CLK_CTL[HCLK_RST] = 1 */
806         usbn_clk_ctl.s.hclk_rst = 1;
807         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
808                                usbn_clk_ctl.u64);
809         /* 2e.  Wait 64 core-clock cycles for HCLK to stabilize */
810         cvmx_wait(64);
811         /*
812          * 3. Program the power-on reset field in the USBN clock-control
813          *    register:
814          *    USBN_CLK_CTL[POR] = 0
815          */
816         usbn_clk_ctl.s.por = 0;
817         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
818                                usbn_clk_ctl.u64);
819         /* 4. Wait 1 ms for PHY clock to start */
820         mdelay(1);
821         /*
822          * 5. Program the Reset input from automatic test equipment field in the
823          *    USBP control and status register:
824          *    USBN_USBP_CTL_STATUS[ATE_RESET] = 1
825          */
826         usbn_usbp_ctl_status.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index));
827         usbn_usbp_ctl_status.s.ate_reset = 1;
828         __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
829                                usbn_usbp_ctl_status.u64);
830         /* 6. Wait 10 cycles */
831         cvmx_wait(10);
832         /*
833          * 7. Clear ATE_RESET field in the USBN clock-control register:
834          *    USBN_USBP_CTL_STATUS[ATE_RESET] = 0
835          */
836         usbn_usbp_ctl_status.s.ate_reset = 0;
837         __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
838                                usbn_usbp_ctl_status.u64);
839         /*
840          * 8. Program the PHY reset field in the USBN clock-control register:
841          *    USBN_CLK_CTL[PRST] = 1
842          */
843         usbn_clk_ctl.s.prst = 1;
844         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
845                                usbn_clk_ctl.u64);
846         /*
847          * 9. Program the USBP control and status register to select host or
848          *    device mode. USBN_USBP_CTL_STATUS[HST_MODE] = 0 for host, = 1 for
849          *    device
850          */
851         usbn_usbp_ctl_status.s.hst_mode = 0;
852         __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
853                                usbn_usbp_ctl_status.u64);
854         /* 10. Wait 1 us */
855         udelay(1);
856         /*
857          * 11. Program the hreset_n field in the USBN clock-control register:
858          *     USBN_CLK_CTL[HRST] = 1
859          */
860         usbn_clk_ctl.s.hrst = 1;
861         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
862                                usbn_clk_ctl.u64);
863         /* 12. Proceed to USB core initialization */
864         usbn_clk_ctl.s.enable = 1;
865         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
866                                usbn_clk_ctl.u64);
867         udelay(1);
868
869         /*
870          * USB Core Initialization
871          *
872          * 1. Read USBC_GHWCFG1, USBC_GHWCFG2, USBC_GHWCFG3, USBC_GHWCFG4 to
873          *    determine USB core configuration parameters.
874          *
875          *    Nothing needed
876          *
877          * 2. Program the following fields in the global AHB configuration
878          *    register (USBC_GAHBCFG)
879          *    DMA mode, USBC_GAHBCFG[DMAEn]: 1 = DMA mode, 0 = slave mode
880          *    Burst length, USBC_GAHBCFG[HBSTLEN] = 0
881          *    Nonperiodic TxFIFO empty level (slave mode only),
882          *    USBC_GAHBCFG[NPTXFEMPLVL]
883          *    Periodic TxFIFO empty level (slave mode only),
884          *    USBC_GAHBCFG[PTXFEMPLVL]
885          *    Global interrupt mask, USBC_GAHBCFG[GLBLINTRMSK] = 1
886          */
887         {
888                 union cvmx_usbcx_gahbcfg usbcx_gahbcfg;
889                 /* Due to an errata, CN31XX doesn't support DMA */
890                 if (OCTEON_IS_MODEL(OCTEON_CN31XX))
891                         usb->init_flags |= CVMX_USB_INITIALIZE_FLAGS_NO_DMA;
892                 usbcx_gahbcfg.u32 = 0;
893                 usbcx_gahbcfg.s.dmaen = !(usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA);
894                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
895                         /* Only use one channel with non DMA */
896                         usb->idle_hardware_channels = 0x1;
897                 else if (OCTEON_IS_MODEL(OCTEON_CN5XXX))
898                         /* CN5XXX have an errata with channel 3 */
899                         usb->idle_hardware_channels = 0xf7;
900                 else
901                         usb->idle_hardware_channels = 0xff;
902                 usbcx_gahbcfg.s.hbstlen = 0;
903                 usbcx_gahbcfg.s.nptxfemplvl = 1;
904                 usbcx_gahbcfg.s.ptxfemplvl = 1;
905                 usbcx_gahbcfg.s.glblintrmsk = 1;
906                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GAHBCFG(usb->index),
907                                        usbcx_gahbcfg.u32);
908         }
909         /*
910          * 3. Program the following fields in USBC_GUSBCFG register.
911          *    HS/FS timeout calibration, USBC_GUSBCFG[TOUTCAL] = 0
912          *    ULPI DDR select, USBC_GUSBCFG[DDRSEL] = 0
913          *    USB turnaround time, USBC_GUSBCFG[USBTRDTIM] = 0x5
914          *    PHY low-power clock select, USBC_GUSBCFG[PHYLPWRCLKSEL] = 0
915          */
916         {
917                 union cvmx_usbcx_gusbcfg usbcx_gusbcfg;
918                 usbcx_gusbcfg.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index));
919                 usbcx_gusbcfg.s.toutcal = 0;
920                 usbcx_gusbcfg.s.ddrsel = 0;
921                 usbcx_gusbcfg.s.usbtrdtim = 0x5;
922                 usbcx_gusbcfg.s.phylpwrclksel = 0;
923                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index),
924                                        usbcx_gusbcfg.u32);
925         }
926         /*
927          * 4. The software must unmask the following bits in the USBC_GINTMSK
928          *    register.
929          *    OTG interrupt mask, USBC_GINTMSK[OTGINTMSK] = 1
930          *    Mode mismatch interrupt mask, USBC_GINTMSK[MODEMISMSK] = 1
931          */
932         {
933                 union cvmx_usbcx_gintmsk usbcx_gintmsk;
934                 int channel;
935
936                 usbcx_gintmsk.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GINTMSK(usb->index));
937                 usbcx_gintmsk.s.otgintmsk = 1;
938                 usbcx_gintmsk.s.modemismsk = 1;
939                 usbcx_gintmsk.s.hchintmsk = 1;
940                 usbcx_gintmsk.s.sofmsk = 0;
941                 /* We need RX FIFO interrupts if we don't have DMA */
942                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
943                         usbcx_gintmsk.s.rxflvlmsk = 1;
944                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index),
945                                        usbcx_gintmsk.u32);
946
947                 /*
948                  * Disable all channel interrupts. We'll enable them per channel
949                  * later.
950                  */
951                 for (channel = 0; channel < 8; channel++)
952                         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
953         }
954
955         {
956                 /*
957                  * Host Port Initialization
958                  *
959                  * 1. Program the host-port interrupt-mask field to unmask,
960                  *    USBC_GINTMSK[PRTINT] = 1
961                  */
962                 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk,
963                                 prtintmsk, 1);
964                 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk,
965                                 disconnintmsk, 1);
966                 /*
967                  * 2. Program the USBC_HCFG register to select full-speed host
968                  *    or high-speed host.
969                  */
970                 {
971                         union cvmx_usbcx_hcfg usbcx_hcfg;
972                         usbcx_hcfg.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCFG(usb->index));
973                         usbcx_hcfg.s.fslssupp = 0;
974                         usbcx_hcfg.s.fslspclksel = 0;
975                         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCFG(usb->index), usbcx_hcfg.u32);
976                 }
977                 /*
978                  * 3. Program the port power bit to drive VBUS on the USB,
979                  *    USBC_HPRT[PRTPWR] = 1
980                  */
981                 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtpwr, 1);
982
983                 /*
984                  * Steps 4-15 from the manual are done later in the port enable
985                  */
986         }
987
988         return 0;
989 }
990
991
992 /**
993  * Shutdown a USB port after a call to cvmx_usb_initialize().
994  * The port should be disabled with all pipes closed when this
995  * function is called.
996  *
997  * @usb: USB device state populated by cvmx_usb_initialize().
998  *
999  * Returns: 0 or a negative error code.
1000  */
1001 static int cvmx_usb_shutdown(struct cvmx_usb_state *usb)
1002 {
1003         union cvmx_usbnx_clk_ctl usbn_clk_ctl;
1004
1005         /* Make sure all pipes are closed */
1006         if (usb->idle_pipes.head ||
1007                 usb->active_pipes[CVMX_USB_TRANSFER_ISOCHRONOUS].head ||
1008                 usb->active_pipes[CVMX_USB_TRANSFER_INTERRUPT].head ||
1009                 usb->active_pipes[CVMX_USB_TRANSFER_CONTROL].head ||
1010                 usb->active_pipes[CVMX_USB_TRANSFER_BULK].head)
1011                 return -EBUSY;
1012
1013         /* Disable the clocks and put them in power on reset */
1014         usbn_clk_ctl.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index));
1015         usbn_clk_ctl.s.enable = 1;
1016         usbn_clk_ctl.s.por = 1;
1017         usbn_clk_ctl.s.hclk_rst = 1;
1018         usbn_clk_ctl.s.prst = 0;
1019         usbn_clk_ctl.s.hrst = 0;
1020         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
1021                                usbn_clk_ctl.u64);
1022         return 0;
1023 }
1024
1025
1026 /**
1027  * Enable a USB port. After this call succeeds, the USB port is
1028  * online and servicing requests.
1029  *
1030  * @usb: USB device state populated by cvmx_usb_initialize().
1031  *
1032  * Returns: 0 or a negative error code.
1033  */
1034 static int cvmx_usb_enable(struct cvmx_usb_state *usb)
1035 {
1036         union cvmx_usbcx_ghwcfg3 usbcx_ghwcfg3;
1037
1038         usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
1039
1040         /*
1041          * If the port is already enabled the just return. We don't need to do
1042          * anything
1043          */
1044         if (usb->usbcx_hprt.s.prtena)
1045                 return 0;
1046
1047         /* If there is nothing plugged into the port then fail immediately */
1048         if (!usb->usbcx_hprt.s.prtconnsts) {
1049                 return -ETIMEDOUT;
1050         }
1051
1052         /* Program the port reset bit to start the reset process */
1053         USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtrst, 1);
1054
1055         /*
1056          * Wait at least 50ms (high speed), or 10ms (full speed) for the reset
1057          * process to complete.
1058          */
1059         mdelay(50);
1060
1061         /* Program the port reset bit to 0, USBC_HPRT[PRTRST] = 0 */
1062         USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtrst, 0);
1063
1064         /* Wait for the USBC_HPRT[PRTENA]. */
1065         if (CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt,
1066                                   prtena, ==, 1, 100000))
1067                 return -ETIMEDOUT;
1068
1069         /*
1070          * Read the port speed field to get the enumerated speed,
1071          * USBC_HPRT[PRTSPD].
1072          */
1073         usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
1074         usbcx_ghwcfg3.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GHWCFG3(usb->index));
1075
1076         /*
1077          * 13. Program the USBC_GRXFSIZ register to select the size of the
1078          *     receive FIFO (25%).
1079          */
1080         USB_SET_FIELD32(CVMX_USBCX_GRXFSIZ(usb->index), union cvmx_usbcx_grxfsiz,
1081                         rxfdep, usbcx_ghwcfg3.s.dfifodepth / 4);
1082         /*
1083          * 14. Program the USBC_GNPTXFSIZ register to select the size and the
1084          *     start address of the non- periodic transmit FIFO for nonperiodic
1085          *     transactions (50%).
1086          */
1087         {
1088                 union cvmx_usbcx_gnptxfsiz siz;
1089                 siz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index));
1090                 siz.s.nptxfdep = usbcx_ghwcfg3.s.dfifodepth / 2;
1091                 siz.s.nptxfstaddr = usbcx_ghwcfg3.s.dfifodepth / 4;
1092                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index), siz.u32);
1093         }
1094         /*
1095          * 15. Program the USBC_HPTXFSIZ register to select the size and start
1096          *     address of the periodic transmit FIFO for periodic transactions
1097          *     (25%).
1098          */
1099         {
1100                 union cvmx_usbcx_hptxfsiz siz;
1101                 siz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index));
1102                 siz.s.ptxfsize = usbcx_ghwcfg3.s.dfifodepth / 4;
1103                 siz.s.ptxfstaddr = 3 * usbcx_ghwcfg3.s.dfifodepth / 4;
1104                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index), siz.u32);
1105         }
1106         /* Flush all FIFOs */
1107         USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, txfnum, 0x10);
1108         USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, txfflsh, 1);
1109         CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl,
1110                               txfflsh, ==, 0, 100);
1111         USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, rxfflsh, 1);
1112         CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl,
1113                               rxfflsh, ==, 0, 100);
1114
1115         return 0;
1116 }
1117
1118
1119 /**
1120  * Disable a USB port. After this call the USB port will not
1121  * generate data transfers and will not generate events.
1122  * Transactions in process will fail and call their
1123  * associated callbacks.
1124  *
1125  * @usb: USB device state populated by cvmx_usb_initialize().
1126  *
1127  * Returns: 0 or a negative error code.
1128  */
1129 static int cvmx_usb_disable(struct cvmx_usb_state *usb)
1130 {
1131         /* Disable the port */
1132         USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtena, 1);
1133         return 0;
1134 }
1135
1136
1137 /**
1138  * Get the current state of the USB port. Use this call to
1139  * determine if the usb port has anything connected, is enabled,
1140  * or has some sort of error condition. The return value of this
1141  * call has "changed" bits to signal of the value of some fields
1142  * have changed between calls.
1143  *
1144  * @usb: USB device state populated by cvmx_usb_initialize().
1145  *
1146  * Returns: Port status information
1147  */
1148 static struct cvmx_usb_port_status cvmx_usb_get_status(struct cvmx_usb_state *usb)
1149 {
1150         union cvmx_usbcx_hprt usbc_hprt;
1151         struct cvmx_usb_port_status result;
1152
1153         memset(&result, 0, sizeof(result));
1154
1155         usbc_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
1156         result.port_enabled = usbc_hprt.s.prtena;
1157         result.port_over_current = usbc_hprt.s.prtovrcurract;
1158         result.port_powered = usbc_hprt.s.prtpwr;
1159         result.port_speed = usbc_hprt.s.prtspd;
1160         result.connected = usbc_hprt.s.prtconnsts;
1161         result.connect_change = (result.connected != usb->port_status.connected);
1162
1163         return result;
1164 }
1165
1166 /**
1167  * Open a virtual pipe between the host and a USB device. A pipe
1168  * must be opened before data can be transferred between a device
1169  * and Octeon.
1170  *
1171  * @usb:             USB device state populated by cvmx_usb_initialize().
1172  * @device_addr:
1173  *                   USB device address to open the pipe to
1174  *                   (0-127).
1175  * @endpoint_num:
1176  *                   USB endpoint number to open the pipe to
1177  *                   (0-15).
1178  * @device_speed:
1179  *                   The speed of the device the pipe is going
1180  *                   to. This must match the device's speed,
1181  *                   which may be different than the port speed.
1182  * @max_packet:      The maximum packet length the device can
1183  *                   transmit/receive (low speed=0-8, full
1184  *                   speed=0-1023, high speed=0-1024). This value
1185  *                   comes from the standard endpoint descriptor
1186  *                   field wMaxPacketSize bits <10:0>.
1187  * @transfer_type:
1188  *                   The type of transfer this pipe is for.
1189  * @transfer_dir:
1190  *                   The direction the pipe is in. This is not
1191  *                   used for control pipes.
1192  * @interval:        For ISOCHRONOUS and INTERRUPT transfers,
1193  *                   this is how often the transfer is scheduled
1194  *                   for. All other transfers should specify
1195  *                   zero. The units are in frames (8000/sec at
1196  *                   high speed, 1000/sec for full speed).
1197  * @multi_count:
1198  *                   For high speed devices, this is the maximum
1199  *                   allowed number of packet per microframe.
1200  *                   Specify zero for non high speed devices. This
1201  *                   value comes from the standard endpoint descriptor
1202  *                   field wMaxPacketSize bits <12:11>.
1203  * @hub_device_addr:
1204  *                   Hub device address this device is connected
1205  *                   to. Devices connected directly to Octeon
1206  *                   use zero. This is only used when the device
1207  *                   is full/low speed behind a high speed hub.
1208  *                   The address will be of the high speed hub,
1209  *                   not and full speed hubs after it.
1210  * @hub_port:        Which port on the hub the device is
1211  *                   connected. Use zero for devices connected
1212  *                   directly to Octeon. Like hub_device_addr,
1213  *                   this is only used for full/low speed
1214  *                   devices behind a high speed hub.
1215  *
1216  * Returns: A non-NULL value is a pipe. NULL means an error.
1217  */
1218 static struct cvmx_usb_pipe *cvmx_usb_open_pipe(struct cvmx_usb_state *usb,
1219                                                 int device_addr, int
1220                                                 endpoint_num,
1221                                                 enum cvmx_usb_speed
1222                                                         device_speed,
1223                                                 int max_packet,
1224                                                 enum cvmx_usb_transfer
1225                                                         transfer_type,
1226                                                 enum cvmx_usb_direction
1227                                                         transfer_dir,
1228                                                 int interval, int multi_count,
1229                                                 int hub_device_addr,
1230                                                 int hub_port)
1231 {
1232         struct cvmx_usb_pipe *pipe;
1233
1234         if (unlikely((device_addr < 0) || (device_addr > MAX_USB_ADDRESS)))
1235                 return NULL;
1236         if (unlikely((endpoint_num < 0) || (endpoint_num > MAX_USB_ENDPOINT)))
1237                 return NULL;
1238         if (unlikely(device_speed > CVMX_USB_SPEED_LOW))
1239                 return NULL;
1240         if (unlikely((max_packet <= 0) || (max_packet > 1024)))
1241                 return NULL;
1242         if (unlikely(transfer_type > CVMX_USB_TRANSFER_INTERRUPT))
1243                 return NULL;
1244         if (unlikely((transfer_dir != CVMX_USB_DIRECTION_OUT) &&
1245                 (transfer_dir != CVMX_USB_DIRECTION_IN)))
1246                 return NULL;
1247         if (unlikely(interval < 0))
1248                 return NULL;
1249         if (unlikely((transfer_type == CVMX_USB_TRANSFER_CONTROL) && interval))
1250                 return NULL;
1251         if (unlikely(multi_count < 0))
1252                 return NULL;
1253         if (unlikely((device_speed != CVMX_USB_SPEED_HIGH) &&
1254                 (multi_count != 0)))
1255                 return NULL;
1256         if (unlikely((hub_device_addr < 0) || (hub_device_addr > MAX_USB_ADDRESS)))
1257                 return NULL;
1258         if (unlikely((hub_port < 0) || (hub_port > MAX_USB_HUB_PORT)))
1259                 return NULL;
1260
1261         pipe = kzalloc(sizeof(*pipe), GFP_ATOMIC);
1262         if (!pipe)
1263                 return NULL;
1264         if ((device_speed == CVMX_USB_SPEED_HIGH) &&
1265                 (transfer_dir == CVMX_USB_DIRECTION_OUT) &&
1266                 (transfer_type == CVMX_USB_TRANSFER_BULK))
1267                 pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
1268         pipe->device_addr = device_addr;
1269         pipe->endpoint_num = endpoint_num;
1270         pipe->device_speed = device_speed;
1271         pipe->max_packet = max_packet;
1272         pipe->transfer_type = transfer_type;
1273         pipe->transfer_dir = transfer_dir;
1274         /*
1275          * All pipes use interval to rate limit NAK processing. Force an
1276          * interval if one wasn't supplied
1277          */
1278         if (!interval)
1279                 interval = 1;
1280         if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1281                 pipe->interval = interval*8;
1282                 /* Force start splits to be schedule on uFrame 0 */
1283                 pipe->next_tx_frame = ((usb->frame_number+7)&~7) + pipe->interval;
1284         } else {
1285                 pipe->interval = interval;
1286                 pipe->next_tx_frame = usb->frame_number + pipe->interval;
1287         }
1288         pipe->multi_count = multi_count;
1289         pipe->hub_device_addr = hub_device_addr;
1290         pipe->hub_port = hub_port;
1291         pipe->pid_toggle = 0;
1292         pipe->split_sc_frame = -1;
1293         __cvmx_usb_append_pipe(&usb->idle_pipes, pipe);
1294
1295         /*
1296          * We don't need to tell the hardware about this pipe yet since
1297          * it doesn't have any submitted requests
1298          */
1299
1300         return pipe;
1301 }
1302
1303
1304 /**
1305  * Poll the RX FIFOs and remove data as needed. This function is only used
1306  * in non DMA mode. It is very important that this function be called quickly
1307  * enough to prevent FIFO overflow.
1308  *
1309  * @usb:        USB device state populated by cvmx_usb_initialize().
1310  */
1311 static void __cvmx_usb_poll_rx_fifo(struct cvmx_usb_state *usb)
1312 {
1313         union cvmx_usbcx_grxstsph rx_status;
1314         int channel;
1315         int bytes;
1316         uint64_t address;
1317         uint32_t *ptr;
1318
1319         rx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GRXSTSPH(usb->index));
1320         /* Only read data if IN data is there */
1321         if (rx_status.s.pktsts != 2)
1322                 return;
1323         /* Check if no data is available */
1324         if (!rx_status.s.bcnt)
1325                 return;
1326
1327         channel = rx_status.s.chnum;
1328         bytes = rx_status.s.bcnt;
1329         if (!bytes)
1330                 return;
1331
1332         /* Get where the DMA engine would have written this data */
1333         address = __cvmx_usb_read_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8);
1334         ptr = cvmx_phys_to_ptr(address);
1335         __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, address + bytes);
1336
1337         /* Loop writing the FIFO data for this packet into memory */
1338         while (bytes > 0) {
1339                 *ptr++ = __cvmx_usb_read_csr32(usb, USB_FIFO_ADDRESS(channel, usb->index));
1340                 bytes -= 4;
1341         }
1342         CVMX_SYNCW;
1343
1344         return;
1345 }
1346
1347
1348 /**
1349  * Fill the TX hardware fifo with data out of the software
1350  * fifos
1351  *
1352  * @usb:            USB device state populated by cvmx_usb_initialize().
1353  * @fifo:           Software fifo to use
1354  * @available:      Amount of space in the hardware fifo
1355  *
1356  * Returns: Non zero if the hardware fifo was too small and needs
1357  *          to be serviced again.
1358  */
1359 static int __cvmx_usb_fill_tx_hw(struct cvmx_usb_state *usb,
1360                                  struct cvmx_usb_tx_fifo *fifo, int available)
1361 {
1362         /*
1363          * We're done either when there isn't anymore space or the software FIFO
1364          * is empty
1365          */
1366         while (available && (fifo->head != fifo->tail)) {
1367                 int i = fifo->tail;
1368                 const uint32_t *ptr = cvmx_phys_to_ptr(fifo->entry[i].address);
1369                 uint64_t csr_address = USB_FIFO_ADDRESS(fifo->entry[i].channel, usb->index) ^ 4;
1370                 int words = available;
1371
1372                 /* Limit the amount of data to waht the SW fifo has */
1373                 if (fifo->entry[i].size <= available) {
1374                         words = fifo->entry[i].size;
1375                         fifo->tail++;
1376                         if (fifo->tail > MAX_CHANNELS)
1377                                 fifo->tail = 0;
1378                 }
1379
1380                 /* Update the next locations and counts */
1381                 available -= words;
1382                 fifo->entry[i].address += words * 4;
1383                 fifo->entry[i].size -= words;
1384
1385                 /*
1386                  * Write the HW fifo data. The read every three writes is due
1387                  * to an errata on CN3XXX chips
1388                  */
1389                 while (words > 3) {
1390                         cvmx_write64_uint32(csr_address, *ptr++);
1391                         cvmx_write64_uint32(csr_address, *ptr++);
1392                         cvmx_write64_uint32(csr_address, *ptr++);
1393                         cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
1394                         words -= 3;
1395                 }
1396                 cvmx_write64_uint32(csr_address, *ptr++);
1397                 if (--words) {
1398                         cvmx_write64_uint32(csr_address, *ptr++);
1399                         if (--words)
1400                                 cvmx_write64_uint32(csr_address, *ptr++);
1401                 }
1402                 cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
1403         }
1404         return fifo->head != fifo->tail;
1405 }
1406
1407
1408 /**
1409  * Check the hardware FIFOs and fill them as needed
1410  *
1411  * @usb:        USB device state populated by cvmx_usb_initialize().
1412  */
1413 static void __cvmx_usb_poll_tx_fifo(struct cvmx_usb_state *usb)
1414 {
1415         if (usb->periodic.head != usb->periodic.tail) {
1416                 union cvmx_usbcx_hptxsts tx_status;
1417                 tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXSTS(usb->index));
1418                 if (__cvmx_usb_fill_tx_hw(usb, &usb->periodic, tx_status.s.ptxfspcavail))
1419                         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, ptxfempmsk, 1);
1420                 else
1421                         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, ptxfempmsk, 0);
1422         }
1423
1424         if (usb->nonperiodic.head != usb->nonperiodic.tail) {
1425                 union cvmx_usbcx_gnptxsts tx_status;
1426                 tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXSTS(usb->index));
1427                 if (__cvmx_usb_fill_tx_hw(usb, &usb->nonperiodic, tx_status.s.nptxfspcavail))
1428                         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, nptxfempmsk, 1);
1429                 else
1430                         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, nptxfempmsk, 0);
1431         }
1432
1433         return;
1434 }
1435
1436
1437 /**
1438  * Fill the TX FIFO with an outgoing packet
1439  *
1440  * @usb:          USB device state populated by cvmx_usb_initialize().
1441  * @channel:      Channel number to get packet from
1442  */
1443 static void __cvmx_usb_fill_tx_fifo(struct cvmx_usb_state *usb, int channel)
1444 {
1445         union cvmx_usbcx_hccharx hcchar;
1446         union cvmx_usbcx_hcspltx usbc_hcsplt;
1447         union cvmx_usbcx_hctsizx usbc_hctsiz;
1448         struct cvmx_usb_tx_fifo *fifo;
1449
1450         /* We only need to fill data on outbound channels */
1451         hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index));
1452         if (hcchar.s.epdir != CVMX_USB_DIRECTION_OUT)
1453                 return;
1454
1455         /* OUT Splits only have data on the start and not the complete */
1456         usbc_hcsplt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCSPLTX(channel, usb->index));
1457         if (usbc_hcsplt.s.spltena && usbc_hcsplt.s.compsplt)
1458                 return;
1459
1460         /*
1461          * Find out how many bytes we need to fill and convert it into 32bit
1462          * words.
1463          */
1464         usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
1465         if (!usbc_hctsiz.s.xfersize)
1466                 return;
1467
1468         if ((hcchar.s.eptype == CVMX_USB_TRANSFER_INTERRUPT) ||
1469                 (hcchar.s.eptype == CVMX_USB_TRANSFER_ISOCHRONOUS))
1470                 fifo = &usb->periodic;
1471         else
1472                 fifo = &usb->nonperiodic;
1473
1474         fifo->entry[fifo->head].channel = channel;
1475         fifo->entry[fifo->head].address = __cvmx_usb_read_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8);
1476         fifo->entry[fifo->head].size = (usbc_hctsiz.s.xfersize+3)>>2;
1477         fifo->head++;
1478         if (fifo->head > MAX_CHANNELS)
1479                 fifo->head = 0;
1480
1481         __cvmx_usb_poll_tx_fifo(usb);
1482
1483         return;
1484 }
1485
1486 /**
1487  * Perform channel specific setup for Control transactions. All
1488  * the generic stuff will already have been done in
1489  * __cvmx_usb_start_channel()
1490  *
1491  * @usb:          USB device state populated by cvmx_usb_initialize().
1492  * @channel:      Channel to setup
1493  * @pipe:         Pipe for control transaction
1494  */
1495 static void __cvmx_usb_start_channel_control(struct cvmx_usb_state *usb,
1496                                              int channel,
1497                                              struct cvmx_usb_pipe *pipe)
1498 {
1499         struct cvmx_usb_transaction *transaction = pipe->head;
1500         union cvmx_usb_control_header *header =
1501                 cvmx_phys_to_ptr(transaction->control_header);
1502         int bytes_to_transfer = transaction->buffer_length - transaction->actual_bytes;
1503         int packets_to_transfer;
1504         union cvmx_usbcx_hctsizx usbc_hctsiz;
1505
1506         usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
1507
1508         switch (transaction->stage) {
1509         case CVMX_USB_STAGE_NON_CONTROL:
1510         case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
1511                 cvmx_dprintf("%s: ERROR - Non control stage\n", __FUNCTION__);
1512                 break;
1513         case CVMX_USB_STAGE_SETUP:
1514                 usbc_hctsiz.s.pid = 3; /* Setup */
1515                 bytes_to_transfer = sizeof(*header);
1516                 /* All Control operations start with a setup going OUT */
1517                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, CVMX_USB_DIRECTION_OUT);
1518                 /*
1519                  * Setup send the control header instead of the buffer data. The
1520                  * buffer data will be used in the next stage
1521                  */
1522                 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, transaction->control_header);
1523                 break;
1524         case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
1525                 usbc_hctsiz.s.pid = 3; /* Setup */
1526                 bytes_to_transfer = 0;
1527                 /* All Control operations start with a setup going OUT */
1528                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, CVMX_USB_DIRECTION_OUT);
1529                 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1);
1530                 break;
1531         case CVMX_USB_STAGE_DATA:
1532                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1533                 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1534                         if (header->s.request_type & 0x80)
1535                                 bytes_to_transfer = 0;
1536                         else if (bytes_to_transfer > pipe->max_packet)
1537                                 bytes_to_transfer = pipe->max_packet;
1538                 }
1539                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1540                                 union cvmx_usbcx_hccharx, epdir,
1541                                 ((header->s.request_type & 0x80) ?
1542                                         CVMX_USB_DIRECTION_IN :
1543                                         CVMX_USB_DIRECTION_OUT));
1544                 break;
1545         case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE:
1546                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1547                 if (!(header->s.request_type & 0x80))
1548                         bytes_to_transfer = 0;
1549                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1550                                 union cvmx_usbcx_hccharx, epdir,
1551                                 ((header->s.request_type & 0x80) ?
1552                                         CVMX_USB_DIRECTION_IN :
1553                                         CVMX_USB_DIRECTION_OUT));
1554                 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1);
1555                 break;
1556         case CVMX_USB_STAGE_STATUS:
1557                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1558                 bytes_to_transfer = 0;
1559                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir,
1560                                 ((header->s.request_type & 0x80) ?
1561                                         CVMX_USB_DIRECTION_OUT :
1562                                         CVMX_USB_DIRECTION_IN));
1563                 break;
1564         case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
1565                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1566                 bytes_to_transfer = 0;
1567                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir,
1568                                 ((header->s.request_type & 0x80) ?
1569                                         CVMX_USB_DIRECTION_OUT :
1570                                         CVMX_USB_DIRECTION_IN));
1571                 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1);
1572                 break;
1573         }
1574
1575         /*
1576          * Make sure the transfer never exceeds the byte limit of the hardware.
1577          * Further bytes will be sent as continued transactions
1578          */
1579         if (bytes_to_transfer > MAX_TRANSFER_BYTES) {
1580                 /* Round MAX_TRANSFER_BYTES to a multiple of out packet size */
1581                 bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet;
1582                 bytes_to_transfer *= pipe->max_packet;
1583         }
1584
1585         /*
1586          * Calculate the number of packets to transfer. If the length is zero
1587          * we still need to transfer one packet
1588          */
1589         packets_to_transfer = (bytes_to_transfer + pipe->max_packet - 1) / pipe->max_packet;
1590         if (packets_to_transfer == 0)
1591                 packets_to_transfer = 1;
1592         else if ((packets_to_transfer > 1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) {
1593                 /*
1594                  * Limit to one packet when not using DMA. Channels must be
1595                  * restarted between every packet for IN transactions, so there
1596                  * is no reason to do multiple packets in a row
1597                  */
1598                 packets_to_transfer = 1;
1599                 bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1600         } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) {
1601                 /*
1602                  * Limit the number of packet and data transferred to what the
1603                  * hardware can handle
1604                  */
1605                 packets_to_transfer = MAX_TRANSFER_PACKETS;
1606                 bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1607         }
1608
1609         usbc_hctsiz.s.xfersize = bytes_to_transfer;
1610         usbc_hctsiz.s.pktcnt = packets_to_transfer;
1611
1612         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index), usbc_hctsiz.u32);
1613         return;
1614 }
1615
1616
1617 /**
1618  * Start a channel to perform the pipe's head transaction
1619  *
1620  * @usb:          USB device state populated by cvmx_usb_initialize().
1621  * @channel:      Channel to setup
1622  * @pipe:         Pipe to start
1623  */
1624 static void __cvmx_usb_start_channel(struct cvmx_usb_state *usb,
1625                                      int channel,
1626                                      struct cvmx_usb_pipe *pipe)
1627 {
1628         struct cvmx_usb_transaction *transaction = pipe->head;
1629
1630         /* Make sure all writes to the DMA region get flushed */
1631         CVMX_SYNCW;
1632
1633         /* Attach the channel to the pipe */
1634         usb->pipe_for_channel[channel] = pipe;
1635         pipe->channel = channel;
1636         pipe->flags |= __CVMX_USB_PIPE_FLAGS_SCHEDULED;
1637
1638         /* Mark this channel as in use */
1639         usb->idle_hardware_channels &= ~(1<<channel);
1640
1641         /* Enable the channel interrupt bits */
1642         {
1643                 union cvmx_usbcx_hcintx usbc_hcint;
1644                 union cvmx_usbcx_hcintmskx usbc_hcintmsk;
1645                 union cvmx_usbcx_haintmsk usbc_haintmsk;
1646
1647                 /* Clear all channel status bits */
1648                 usbc_hcint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index));
1649                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index), usbc_hcint.u32);
1650
1651                 usbc_hcintmsk.u32 = 0;
1652                 usbc_hcintmsk.s.chhltdmsk = 1;
1653                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
1654                         /*
1655                          * Channels need these extra interrupts when we aren't
1656                          * in DMA mode.
1657                          */
1658                         usbc_hcintmsk.s.datatglerrmsk = 1;
1659                         usbc_hcintmsk.s.frmovrunmsk = 1;
1660                         usbc_hcintmsk.s.bblerrmsk = 1;
1661                         usbc_hcintmsk.s.xacterrmsk = 1;
1662                         if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1663                                 /*
1664                                  * Splits don't generate xfercompl, so we need
1665                                  * ACK and NYET.
1666                                  */
1667                                 usbc_hcintmsk.s.nyetmsk = 1;
1668                                 usbc_hcintmsk.s.ackmsk = 1;
1669                         }
1670                         usbc_hcintmsk.s.nakmsk = 1;
1671                         usbc_hcintmsk.s.stallmsk = 1;
1672                         usbc_hcintmsk.s.xfercomplmsk = 1;
1673                 }
1674                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), usbc_hcintmsk.u32);
1675
1676                 /* Enable the channel interrupt to propagate */
1677                 usbc_haintmsk.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index));
1678                 usbc_haintmsk.s.haintmsk |= 1<<channel;
1679                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index), usbc_haintmsk.u32);
1680         }
1681
1682         /* Setup the locations the DMA engines use  */
1683         {
1684                 uint64_t dma_address = transaction->buffer + transaction->actual_bytes;
1685                 if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
1686                         dma_address = transaction->buffer + transaction->iso_packets[0].offset + transaction->actual_bytes;
1687                 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, dma_address);
1688                 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, dma_address);
1689         }
1690
1691         /* Setup both the size of the transfer and the SPLIT characteristics */
1692         {
1693                 union cvmx_usbcx_hcspltx usbc_hcsplt = {.u32 = 0};
1694                 union cvmx_usbcx_hctsizx usbc_hctsiz = {.u32 = 0};
1695                 int packets_to_transfer;
1696                 int bytes_to_transfer = transaction->buffer_length - transaction->actual_bytes;
1697
1698                 /*
1699                  * ISOCHRONOUS transactions store each individual transfer size
1700                  * in the packet structure, not the global buffer_length
1701                  */
1702                 if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
1703                         bytes_to_transfer = transaction->iso_packets[0].length - transaction->actual_bytes;
1704
1705                 /*
1706                  * We need to do split transactions when we are talking to non
1707                  * high speed devices that are behind a high speed hub
1708                  */
1709                 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1710                         /*
1711                          * On the start split phase (stage is even) record the
1712                          * frame number we will need to send the split complete.
1713                          * We only store the lower two bits since the time ahead
1714                          * can only be two frames
1715                          */
1716                         if ((transaction->stage&1) == 0) {
1717                                 if (transaction->type == CVMX_USB_TRANSFER_BULK)
1718                                         pipe->split_sc_frame = (usb->frame_number + 1) & 0x7f;
1719                                 else
1720                                         pipe->split_sc_frame = (usb->frame_number + 2) & 0x7f;
1721                         } else
1722                                 pipe->split_sc_frame = -1;
1723
1724                         usbc_hcsplt.s.spltena = 1;
1725                         usbc_hcsplt.s.hubaddr = pipe->hub_device_addr;
1726                         usbc_hcsplt.s.prtaddr = pipe->hub_port;
1727                         usbc_hcsplt.s.compsplt = (transaction->stage == CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE);
1728
1729                         /*
1730                          * SPLIT transactions can only ever transmit one data
1731                          * packet so limit the transfer size to the max packet
1732                          * size
1733                          */
1734                         if (bytes_to_transfer > pipe->max_packet)
1735                                 bytes_to_transfer = pipe->max_packet;
1736
1737                         /*
1738                          * ISOCHRONOUS OUT splits are unique in that they limit
1739                          * data transfers to 188 byte chunks representing the
1740                          * begin/middle/end of the data or all
1741                          */
1742                         if (!usbc_hcsplt.s.compsplt &&
1743                                 (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&
1744                                 (pipe->transfer_type == CVMX_USB_TRANSFER_ISOCHRONOUS)) {
1745                                 /*
1746                                  * Clear the split complete frame number as
1747                                  * there isn't going to be a split complete
1748                                  */
1749                                 pipe->split_sc_frame = -1;
1750                                 /*
1751                                  * See if we've started this transfer and sent
1752                                  * data
1753                                  */
1754                                 if (transaction->actual_bytes == 0) {
1755                                         /*
1756                                          * Nothing sent yet, this is either a
1757                                          * begin or the entire payload
1758                                          */
1759                                         if (bytes_to_transfer <= 188)
1760                                                 /* Entire payload in one go */
1761                                                 usbc_hcsplt.s.xactpos = 3;
1762                                         else
1763                                                 /* First part of payload */
1764                                                 usbc_hcsplt.s.xactpos = 2;
1765                                 } else {
1766                                         /*
1767                                          * Continuing the previous data, we must
1768                                          * either be in the middle or at the end
1769                                          */
1770                                         if (bytes_to_transfer <= 188)
1771                                                 /* End of payload */
1772                                                 usbc_hcsplt.s.xactpos = 1;
1773                                         else
1774                                                 /* Middle of payload */
1775                                                 usbc_hcsplt.s.xactpos = 0;
1776                                 }
1777                                 /*
1778                                  * Again, the transfer size is limited to 188
1779                                  * bytes
1780                                  */
1781                                 if (bytes_to_transfer > 188)
1782                                         bytes_to_transfer = 188;
1783                         }
1784                 }
1785
1786                 /*
1787                  * Make sure the transfer never exceeds the byte limit of the
1788                  * hardware. Further bytes will be sent as continued
1789                  * transactions
1790                  */
1791                 if (bytes_to_transfer > MAX_TRANSFER_BYTES) {
1792                         /*
1793                          * Round MAX_TRANSFER_BYTES to a multiple of out packet
1794                          * size
1795                          */
1796                         bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet;
1797                         bytes_to_transfer *= pipe->max_packet;
1798                 }
1799
1800                 /*
1801                  * Calculate the number of packets to transfer. If the length is
1802                  * zero we still need to transfer one packet
1803                  */
1804                 packets_to_transfer = (bytes_to_transfer + pipe->max_packet - 1) / pipe->max_packet;
1805                 if (packets_to_transfer == 0)
1806                         packets_to_transfer = 1;
1807                 else if ((packets_to_transfer > 1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) {
1808                         /*
1809                          * Limit to one packet when not using DMA. Channels must
1810                          * be restarted between every packet for IN
1811                          * transactions, so there is no reason to do multiple
1812                          * packets in a row
1813                          */
1814                         packets_to_transfer = 1;
1815                         bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1816                 } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) {
1817                         /*
1818                          * Limit the number of packet and data transferred to
1819                          * what the hardware can handle
1820                          */
1821                         packets_to_transfer = MAX_TRANSFER_PACKETS;
1822                         bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1823                 }
1824
1825                 usbc_hctsiz.s.xfersize = bytes_to_transfer;
1826                 usbc_hctsiz.s.pktcnt = packets_to_transfer;
1827
1828                 /* Update the DATA0/DATA1 toggle */
1829                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1830                 /*
1831                  * High speed pipes may need a hardware ping before they start
1832                  */
1833                 if (pipe->flags & __CVMX_USB_PIPE_FLAGS_NEED_PING)
1834                         usbc_hctsiz.s.dopng = 1;
1835
1836                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCSPLTX(channel, usb->index), usbc_hcsplt.u32);
1837                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index), usbc_hctsiz.u32);
1838         }
1839
1840         /* Setup the Host Channel Characteristics Register */
1841         {
1842                 union cvmx_usbcx_hccharx usbc_hcchar = {.u32 = 0};
1843
1844                 /*
1845                  * Set the startframe odd/even properly. This is only used for
1846                  * periodic
1847                  */
1848                 usbc_hcchar.s.oddfrm = usb->frame_number&1;
1849
1850                 /*
1851                  * Set the number of back to back packets allowed by this
1852                  * endpoint. Split transactions interpret "ec" as the number of
1853                  * immediate retries of failure. These retries happen too
1854                  * quickly, so we disable these entirely for splits
1855                  */
1856                 if (__cvmx_usb_pipe_needs_split(usb, pipe))
1857                         usbc_hcchar.s.ec = 1;
1858                 else if (pipe->multi_count < 1)
1859                         usbc_hcchar.s.ec = 1;
1860                 else if (pipe->multi_count > 3)
1861                         usbc_hcchar.s.ec = 3;
1862                 else
1863                         usbc_hcchar.s.ec = pipe->multi_count;
1864
1865                 /* Set the rest of the endpoint specific settings */
1866                 usbc_hcchar.s.devaddr = pipe->device_addr;
1867                 usbc_hcchar.s.eptype = transaction->type;
1868                 usbc_hcchar.s.lspddev = (pipe->device_speed == CVMX_USB_SPEED_LOW);
1869                 usbc_hcchar.s.epdir = pipe->transfer_dir;
1870                 usbc_hcchar.s.epnum = pipe->endpoint_num;
1871                 usbc_hcchar.s.mps = pipe->max_packet;
1872                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
1873         }
1874
1875         /* Do transaction type specific fixups as needed */
1876         switch (transaction->type) {
1877         case CVMX_USB_TRANSFER_CONTROL:
1878                 __cvmx_usb_start_channel_control(usb, channel, pipe);
1879                 break;
1880         case CVMX_USB_TRANSFER_BULK:
1881         case CVMX_USB_TRANSFER_INTERRUPT:
1882                 break;
1883         case CVMX_USB_TRANSFER_ISOCHRONOUS:
1884                 if (!__cvmx_usb_pipe_needs_split(usb, pipe)) {
1885                         /*
1886                          * ISO transactions require different PIDs depending on
1887                          * direction and how many packets are needed
1888                          */
1889                         if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {
1890                                 if (pipe->multi_count < 2) /* Need DATA0 */
1891                                         USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel, usb->index), union cvmx_usbcx_hctsizx, pid, 0);
1892                                 else /* Need MDATA */
1893                                         USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel, usb->index), union cvmx_usbcx_hctsizx, pid, 3);
1894                         }
1895                 }
1896                 break;
1897         }
1898         {
1899                 union cvmx_usbcx_hctsizx usbc_hctsiz = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index))};
1900                 transaction->xfersize = usbc_hctsiz.s.xfersize;
1901                 transaction->pktcnt = usbc_hctsiz.s.pktcnt;
1902         }
1903         /* Remeber when we start a split transaction */
1904         if (__cvmx_usb_pipe_needs_split(usb, pipe))
1905                 usb->active_split = transaction;
1906         USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, chena, 1);
1907         if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
1908                 __cvmx_usb_fill_tx_fifo(usb, channel);
1909         return;
1910 }
1911
1912
1913 /**
1914  * Find a pipe that is ready to be scheduled to hardware.
1915  * @usb:         USB device state populated by cvmx_usb_initialize().
1916  * @list:        Pipe list to search
1917  * @current_frame:
1918  *               Frame counter to use as a time reference.
1919  *
1920  * Returns: Pipe or NULL if none are ready
1921  */
1922 static struct cvmx_usb_pipe *__cvmx_usb_find_ready_pipe(struct cvmx_usb_state *usb, struct cvmx_usb_pipe_list *list, uint64_t current_frame)
1923 {
1924         struct cvmx_usb_pipe *pipe = list->head;
1925         while (pipe) {
1926                 if (!(pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED) && pipe->head &&
1927                         (pipe->next_tx_frame <= current_frame) &&
1928                         ((pipe->split_sc_frame == -1) || ((((int)current_frame - (int)pipe->split_sc_frame) & 0x7f) < 0x40)) &&
1929                         (!usb->active_split || (usb->active_split == pipe->head))) {
1930                         CVMX_PREFETCH(pipe, 128);
1931                         CVMX_PREFETCH(pipe->head, 0);
1932                         return pipe;
1933                 }
1934                 pipe = pipe->next;
1935         }
1936         return NULL;
1937 }
1938
1939
1940 /**
1941  * Called whenever a pipe might need to be scheduled to the
1942  * hardware.
1943  *
1944  * @usb:         USB device state populated by cvmx_usb_initialize().
1945  * @is_sof:      True if this schedule was called on a SOF interrupt.
1946  */
1947 static void __cvmx_usb_schedule(struct cvmx_usb_state *usb, int is_sof)
1948 {
1949         int channel;
1950         struct cvmx_usb_pipe *pipe;
1951         int need_sof;
1952         enum cvmx_usb_transfer ttype;
1953
1954         if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
1955                 /*
1956                  * Without DMA we need to be careful to not schedule something
1957                  * at the end of a frame and cause an overrun.
1958                  */
1959                 union cvmx_usbcx_hfnum hfnum = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index))};
1960                 union cvmx_usbcx_hfir hfir = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFIR(usb->index))};
1961                 if (hfnum.s.frrem < hfir.s.frint/4)
1962                         goto done;
1963         }
1964
1965         while (usb->idle_hardware_channels) {
1966                 /* Find an idle channel */
1967                 channel = __fls(usb->idle_hardware_channels);
1968                 if (unlikely(channel > 7))
1969                         break;
1970
1971                 /* Find a pipe needing service */
1972                 pipe = NULL;
1973                 if (is_sof) {
1974                         /*
1975                          * Only process periodic pipes on SOF interrupts. This
1976                          * way we are sure that the periodic data is sent in the
1977                          * beginning of the frame
1978                          */
1979                         pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_ISOCHRONOUS, usb->frame_number);
1980                         if (likely(!pipe))
1981                                 pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_INTERRUPT, usb->frame_number);
1982                 }
1983                 if (likely(!pipe)) {
1984                         pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_CONTROL, usb->frame_number);
1985                         if (likely(!pipe))
1986                                 pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_BULK, usb->frame_number);
1987                 }
1988                 if (!pipe)
1989                         break;
1990
1991                 __cvmx_usb_start_channel(usb, channel, pipe);
1992         }
1993
1994 done:
1995         /*
1996          * Only enable SOF interrupts when we have transactions pending in the
1997          * future that might need to be scheduled
1998          */
1999         need_sof = 0;
2000         for (ttype = CVMX_USB_TRANSFER_CONTROL; ttype <= CVMX_USB_TRANSFER_INTERRUPT; ttype++) {
2001                 pipe = usb->active_pipes[ttype].head;
2002                 while (pipe) {
2003                         if (pipe->next_tx_frame > usb->frame_number) {
2004                                 need_sof = 1;
2005                                 break;
2006                         }
2007                         pipe = pipe->next;
2008                 }
2009         }
2010         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, sofmsk, need_sof);
2011         return;
2012 }
2013
2014 static inline struct octeon_hcd *cvmx_usb_to_octeon(struct cvmx_usb_state *p)
2015 {
2016         return container_of(p, struct octeon_hcd, usb);
2017 }
2018
2019 static inline struct usb_hcd *octeon_to_hcd(struct octeon_hcd *p)
2020 {
2021         return container_of((void *)p, struct usb_hcd, hcd_priv);
2022 }
2023
2024 static void octeon_usb_urb_complete_callback(struct cvmx_usb_state *usb,
2025                                              enum cvmx_usb_complete status,
2026                                              struct cvmx_usb_pipe *pipe,
2027                                              struct cvmx_usb_transaction
2028                                                 *transaction,
2029                                              int bytes_transferred,
2030                                              struct urb *urb)
2031 {
2032         struct octeon_hcd *priv = cvmx_usb_to_octeon(usb);
2033         struct usb_hcd *hcd = octeon_to_hcd(priv);
2034         struct device *dev = hcd->self.controller;
2035
2036         urb->actual_length = bytes_transferred;
2037         urb->hcpriv = NULL;
2038
2039         if (!list_empty(&urb->urb_list)) {
2040                 /*
2041                  * It is on the dequeue_list, but we are going to call
2042                  * usb_hcd_giveback_urb(), so we must clear it from
2043                  * the list.  We got to it before the
2044                  * octeon_usb_urb_dequeue_work() tasklet did.
2045                  */
2046                 list_del(&urb->urb_list);
2047                 /* No longer on the dequeue_list. */
2048                 INIT_LIST_HEAD(&urb->urb_list);
2049         }
2050
2051         /* For Isochronous transactions we need to update the URB packet status
2052            list from data in our private copy */
2053         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
2054                 int i;
2055                 /*
2056                  * The pointer to the private list is stored in the setup_packet
2057                  * field.
2058                  */
2059                 struct cvmx_usb_iso_packet *iso_packet =
2060                         (struct cvmx_usb_iso_packet *) urb->setup_packet;
2061                 /* Recalculate the transfer size by adding up each packet */
2062                 urb->actual_length = 0;
2063                 for (i = 0; i < urb->number_of_packets; i++) {
2064                         if (iso_packet[i].status == CVMX_USB_COMPLETE_SUCCESS) {
2065                                 urb->iso_frame_desc[i].status = 0;
2066                                 urb->iso_frame_desc[i].actual_length = iso_packet[i].length;
2067                                 urb->actual_length += urb->iso_frame_desc[i].actual_length;
2068                         } else {
2069                                 dev_dbg(dev, "ISOCHRONOUS packet=%d of %d status=%d pipe=%p transaction=%p size=%d\n",
2070                                         i, urb->number_of_packets,
2071                                         iso_packet[i].status, pipe,
2072                                         transaction, iso_packet[i].length);
2073                                 urb->iso_frame_desc[i].status = -EREMOTEIO;
2074                         }
2075                 }
2076                 /* Free the private list now that we don't need it anymore */
2077                 kfree(iso_packet);
2078                 urb->setup_packet = NULL;
2079         }
2080
2081         switch (status) {
2082         case CVMX_USB_COMPLETE_SUCCESS:
2083                 urb->status = 0;
2084                 break;
2085         case CVMX_USB_COMPLETE_CANCEL:
2086                 if (urb->status == 0)
2087                         urb->status = -ENOENT;
2088                 break;
2089         case CVMX_USB_COMPLETE_STALL:
2090                 dev_dbg(dev, "status=stall pipe=%p transaction=%p size=%d\n",
2091                         pipe, transaction, bytes_transferred);
2092                 urb->status = -EPIPE;
2093                 break;
2094         case CVMX_USB_COMPLETE_BABBLEERR:
2095                 dev_dbg(dev, "status=babble pipe=%p transaction=%p size=%d\n",
2096                         pipe, transaction, bytes_transferred);
2097                 urb->status = -EPIPE;
2098                 break;
2099         case CVMX_USB_COMPLETE_SHORT:
2100                 dev_dbg(dev, "status=short pipe=%p transaction=%p size=%d\n",
2101                         pipe, transaction, bytes_transferred);
2102                 urb->status = -EREMOTEIO;
2103                 break;
2104         case CVMX_USB_COMPLETE_ERROR:
2105         case CVMX_USB_COMPLETE_XACTERR:
2106         case CVMX_USB_COMPLETE_DATATGLERR:
2107         case CVMX_USB_COMPLETE_FRAMEERR:
2108                 dev_dbg(dev, "status=%d pipe=%p transaction=%p size=%d\n",
2109                         status, pipe, transaction, bytes_transferred);
2110                 urb->status = -EPROTO;
2111                 break;
2112         }
2113         spin_unlock(&priv->lock);
2114         usb_hcd_giveback_urb(octeon_to_hcd(priv), urb, urb->status);
2115         spin_lock(&priv->lock);
2116 }
2117
2118 /**
2119  * Signal the completion of a transaction and free it. The
2120  * transaction will be removed from the pipe transaction list.
2121  *
2122  * @usb:         USB device state populated by cvmx_usb_initialize().
2123  * @pipe:        Pipe the transaction is on
2124  * @transaction:
2125  *               Transaction that completed
2126  * @complete_code:
2127  *               Completion code
2128  */
2129 static void __cvmx_usb_perform_complete(struct cvmx_usb_state *usb,
2130                                         struct cvmx_usb_pipe *pipe,
2131                                         struct cvmx_usb_transaction *transaction,
2132                                         enum cvmx_usb_complete complete_code)
2133 {
2134         /* If this was a split then clear our split in progress marker */
2135         if (usb->active_split == transaction)
2136                 usb->active_split = NULL;
2137
2138         /*
2139          * Isochronous transactions need extra processing as they might not be
2140          * done after a single data transfer
2141          */
2142         if (unlikely(transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)) {
2143                 /* Update the number of bytes transferred in this ISO packet */
2144                 transaction->iso_packets[0].length = transaction->actual_bytes;
2145                 transaction->iso_packets[0].status = complete_code;
2146
2147                 /*
2148                  * If there are more ISOs pending and we succeeded, schedule the
2149                  * next one
2150                  */
2151                 if ((transaction->iso_number_packets > 1) && (complete_code == CVMX_USB_COMPLETE_SUCCESS)) {
2152                         /* No bytes transferred for this packet as of yet */
2153                         transaction->actual_bytes = 0;
2154                         /* One less ISO waiting to transfer */
2155                         transaction->iso_number_packets--;
2156                         /* Increment to the next location in our packet array */
2157                         transaction->iso_packets++;
2158                         transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2159                         goto done;
2160                 }
2161         }
2162
2163         /* Remove the transaction from the pipe list */
2164         if (transaction->next)
2165                 transaction->next->prev = transaction->prev;
2166         else
2167                 pipe->tail = transaction->prev;
2168         if (transaction->prev)
2169                 transaction->prev->next = transaction->next;
2170         else
2171                 pipe->head = transaction->next;
2172         if (!pipe->head) {
2173                 __cvmx_usb_remove_pipe(usb->active_pipes + pipe->transfer_type, pipe);
2174                 __cvmx_usb_append_pipe(&usb->idle_pipes, pipe);
2175
2176         }
2177         octeon_usb_urb_complete_callback(usb, complete_code, pipe,
2178                                          transaction,
2179                                          transaction->actual_bytes,
2180                                          transaction->urb);
2181         kfree(transaction);
2182 done:
2183         return;
2184 }
2185
2186
2187 /**
2188  * Submit a usb transaction to a pipe. Called for all types
2189  * of transactions.
2190  *
2191  * @usb:
2192  * @pipe:           Which pipe to submit to.
2193  * @type:           Transaction type
2194  * @buffer:         User buffer for the transaction
2195  * @buffer_length:
2196  *                  User buffer's length in bytes
2197  * @control_header:
2198  *                  For control transactions, the 8 byte standard header
2199  * @iso_start_frame:
2200  *                  For ISO transactions, the start frame
2201  * @iso_number_packets:
2202  *                  For ISO, the number of packet in the transaction.
2203  * @iso_packets:
2204  *                  A description of each ISO packet
2205  * @urb:            URB for the callback
2206  *
2207  * Returns: Transaction or NULL on failure.
2208  */
2209 static struct cvmx_usb_transaction *__cvmx_usb_submit_transaction(struct cvmx_usb_state *usb,
2210                                                                   struct cvmx_usb_pipe *pipe,
2211                                                                   enum cvmx_usb_transfer type,
2212                                                                   uint64_t buffer,
2213                                                                   int buffer_length,
2214                                                                   uint64_t control_header,
2215                                                                   int iso_start_frame,
2216                                                                   int iso_number_packets,
2217                                                                   struct cvmx_usb_iso_packet *iso_packets,
2218                                                                   struct urb *urb)
2219 {
2220         struct cvmx_usb_transaction *transaction;
2221
2222         if (unlikely(pipe->transfer_type != type))
2223                 return NULL;
2224
2225         transaction = kzalloc(sizeof(*transaction), GFP_ATOMIC);
2226         if (unlikely(!transaction))
2227                 return NULL;
2228
2229         transaction->type = type;
2230         transaction->buffer = buffer;
2231         transaction->buffer_length = buffer_length;
2232         transaction->control_header = control_header;
2233         /* FIXME: This is not used, implement it. */
2234         transaction->iso_start_frame = iso_start_frame;
2235         transaction->iso_number_packets = iso_number_packets;
2236         transaction->iso_packets = iso_packets;
2237         transaction->urb = urb;
2238         if (transaction->type == CVMX_USB_TRANSFER_CONTROL)
2239                 transaction->stage = CVMX_USB_STAGE_SETUP;
2240         else
2241                 transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2242
2243         transaction->next = NULL;
2244         if (pipe->tail) {
2245                 transaction->prev = pipe->tail;
2246                 transaction->prev->next = transaction;
2247         } else {
2248                 if (pipe->next_tx_frame < usb->frame_number)
2249                         pipe->next_tx_frame = usb->frame_number + pipe->interval -
2250                                 (usb->frame_number - pipe->next_tx_frame) % pipe->interval;
2251                 transaction->prev = NULL;
2252                 pipe->head = transaction;
2253                 __cvmx_usb_remove_pipe(&usb->idle_pipes, pipe);
2254                 __cvmx_usb_append_pipe(usb->active_pipes + pipe->transfer_type, pipe);
2255         }
2256         pipe->tail = transaction;
2257
2258         /* We may need to schedule the pipe if this was the head of the pipe */
2259         if (!transaction->prev)
2260                 __cvmx_usb_schedule(usb, 0);
2261
2262         return transaction;
2263 }
2264
2265
2266 /**
2267  * Call to submit a USB Bulk transfer to a pipe.
2268  *
2269  * @usb:            USB device state populated by cvmx_usb_initialize().
2270  * @pipe:           Handle to the pipe for the transfer.
2271  * @urb:            URB.
2272  *
2273  * Returns: A submitted transaction or NULL on failure.
2274  */
2275 static struct cvmx_usb_transaction *cvmx_usb_submit_bulk(struct cvmx_usb_state *usb,
2276                                                          struct cvmx_usb_pipe *pipe,
2277                                                          struct urb *urb)
2278 {
2279         return __cvmx_usb_submit_transaction(usb, pipe, CVMX_USB_TRANSFER_BULK,
2280                                              urb->transfer_dma,
2281                                              urb->transfer_buffer_length,
2282                                              0, /* control_header */
2283                                              0, /* iso_start_frame */
2284                                              0, /* iso_number_packets */
2285                                              NULL, /* iso_packets */
2286                                              urb);
2287 }
2288
2289
2290 /**
2291  * Call to submit a USB Interrupt transfer to a pipe.
2292  *
2293  * @usb:            USB device state populated by cvmx_usb_initialize().
2294  * @pipe:           Handle to the pipe for the transfer.
2295  * @urb:            URB returned when the callback is called.
2296  *
2297  * Returns: A submitted transaction or NULL on failure.
2298  */
2299 static struct cvmx_usb_transaction *cvmx_usb_submit_interrupt(struct cvmx_usb_state *usb,
2300                                                               struct cvmx_usb_pipe *pipe,
2301                                                               struct urb *urb)
2302 {
2303         return __cvmx_usb_submit_transaction(usb, pipe,
2304                                              CVMX_USB_TRANSFER_INTERRUPT,
2305                                              urb->transfer_dma,
2306                                              urb->transfer_buffer_length,
2307                                              0, /* control_header */
2308                                              0, /* iso_start_frame */
2309                                              0, /* iso_number_packets */
2310                                              NULL, /* iso_packets */
2311                                              urb);
2312 }
2313
2314
2315 /**
2316  * Call to submit a USB Control transfer to a pipe.
2317  *
2318  * @usb:            USB device state populated by cvmx_usb_initialize().
2319  * @pipe:           Handle to the pipe for the transfer.
2320  * @urb:            URB.
2321  *
2322  * Returns: A submitted transaction or NULL on failure.
2323  */
2324 static struct cvmx_usb_transaction *cvmx_usb_submit_control(struct cvmx_usb_state *usb,
2325                                                             struct cvmx_usb_pipe *pipe,
2326                                                             struct urb *urb)
2327 {
2328         int buffer_length = urb->transfer_buffer_length;
2329         uint64_t control_header = urb->setup_dma;
2330         union cvmx_usb_control_header *header =
2331                 cvmx_phys_to_ptr(control_header);
2332
2333         if ((header->s.request_type & 0x80) == 0)
2334                 buffer_length = le16_to_cpu(header->s.length);
2335
2336         return __cvmx_usb_submit_transaction(usb, pipe,
2337                                              CVMX_USB_TRANSFER_CONTROL,
2338                                              urb->transfer_dma, buffer_length,
2339                                              control_header,
2340                                              0, /* iso_start_frame */
2341                                              0, /* iso_number_packets */
2342                                              NULL, /* iso_packets */
2343                                              urb);
2344 }
2345
2346
2347 /**
2348  * Call to submit a USB Isochronous transfer to a pipe.
2349  *
2350  * @usb:            USB device state populated by cvmx_usb_initialize().
2351  * @pipe:           Handle to the pipe for the transfer.
2352  * @urb:            URB returned when the callback is called.
2353  *
2354  * Returns: A submitted transaction or NULL on failure.
2355  */
2356 static struct cvmx_usb_transaction *cvmx_usb_submit_isochronous(struct cvmx_usb_state *usb,
2357                                                                 struct cvmx_usb_pipe *pipe,
2358                                                                 struct urb *urb)
2359 {
2360         struct cvmx_usb_iso_packet *packets;
2361
2362         packets = (struct cvmx_usb_iso_packet *) urb->setup_packet;
2363         return __cvmx_usb_submit_transaction(usb, pipe,
2364                                              CVMX_USB_TRANSFER_ISOCHRONOUS,
2365                                              urb->transfer_dma,
2366                                              urb->transfer_buffer_length,
2367                                              0, /* control_header */
2368                                              urb->start_frame,
2369                                              urb->number_of_packets,
2370                                              packets, urb);
2371 }
2372
2373
2374 /**
2375  * Cancel one outstanding request in a pipe. Canceling a request
2376  * can fail if the transaction has already completed before cancel
2377  * is called. Even after a successful cancel call, it may take
2378  * a frame or two for the cvmx_usb_poll() function to call the
2379  * associated callback.
2380  *
2381  * @usb:         USB device state populated by cvmx_usb_initialize().
2382  * @pipe:        Pipe to cancel requests in.
2383  * @transaction: Transaction to cancel, returned by the submit function.
2384  *
2385  * Returns: 0 or a negative error code.
2386  */
2387 static int cvmx_usb_cancel(struct cvmx_usb_state *usb,
2388                            struct cvmx_usb_pipe *pipe,
2389                            struct cvmx_usb_transaction *transaction)
2390 {
2391         /*
2392          * If the transaction is the HEAD of the queue and scheduled. We need to
2393          * treat it special
2394          */
2395         if ((pipe->head == transaction) &&
2396                 (pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED)) {
2397                 union cvmx_usbcx_hccharx usbc_hcchar;
2398
2399                 usb->pipe_for_channel[pipe->channel] = NULL;
2400                 pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED;
2401
2402                 CVMX_SYNCW;
2403
2404                 usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index));
2405                 /*
2406                  * If the channel isn't enabled then the transaction already
2407                  * completed.
2408                  */
2409                 if (usbc_hcchar.s.chena) {
2410                         usbc_hcchar.s.chdis = 1;
2411                         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index), usbc_hcchar.u32);
2412                 }
2413         }
2414         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_CANCEL);
2415         return 0;
2416 }
2417
2418
2419 /**
2420  * Cancel all outstanding requests in a pipe. Logically all this
2421  * does is call cvmx_usb_cancel() in a loop.
2422  *
2423  * @usb:         USB device state populated by cvmx_usb_initialize().
2424  * @pipe:        Pipe to cancel requests in.
2425  *
2426  * Returns: 0 or a negative error code.
2427  */
2428 static int cvmx_usb_cancel_all(struct cvmx_usb_state *usb,
2429                                struct cvmx_usb_pipe *pipe)
2430 {
2431         /* Simply loop through and attempt to cancel each transaction */
2432         while (pipe->head) {
2433                 int result = cvmx_usb_cancel(usb, pipe, pipe->head);
2434                 if (unlikely(result != 0))
2435                         return result;
2436         }
2437         return 0;
2438 }
2439
2440
2441 /**
2442  * Close a pipe created with cvmx_usb_open_pipe().
2443  *
2444  * @usb:         USB device state populated by cvmx_usb_initialize().
2445  * @pipe:        Pipe to close.
2446  *
2447  * Returns: 0 or a negative error code. EBUSY is returned if the pipe has
2448  *          outstanding transfers.
2449  */
2450 static int cvmx_usb_close_pipe(struct cvmx_usb_state *usb,
2451                                struct cvmx_usb_pipe *pipe)
2452 {
2453         /* Fail if the pipe has pending transactions */
2454         if (unlikely(pipe->head))
2455                 return -EBUSY;
2456
2457         __cvmx_usb_remove_pipe(&usb->idle_pipes, pipe);
2458         kfree(pipe);
2459
2460         return 0;
2461 }
2462
2463 /**
2464  * Get the current USB protocol level frame number. The frame
2465  * number is always in the range of 0-0x7ff.
2466  *
2467  * @usb: USB device state populated by cvmx_usb_initialize().
2468  *
2469  * Returns: USB frame number
2470  */
2471 static int cvmx_usb_get_frame_number(struct cvmx_usb_state *usb)
2472 {
2473         int frame_number;
2474         union cvmx_usbcx_hfnum usbc_hfnum;
2475
2476         usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
2477         frame_number = usbc_hfnum.s.frnum;
2478
2479         return frame_number;
2480 }
2481
2482
2483 /**
2484  * Poll a channel for status
2485  *
2486  * @usb:     USB device
2487  * @channel: Channel to poll
2488  *
2489  * Returns: Zero on success
2490  */
2491 static int __cvmx_usb_poll_channel(struct cvmx_usb_state *usb, int channel)
2492 {
2493         union cvmx_usbcx_hcintx usbc_hcint;
2494         union cvmx_usbcx_hctsizx usbc_hctsiz;
2495         union cvmx_usbcx_hccharx usbc_hcchar;
2496         struct cvmx_usb_pipe *pipe;
2497         struct cvmx_usb_transaction *transaction;
2498         int bytes_this_transfer;
2499         int bytes_in_last_packet;
2500         int packets_processed;
2501         int buffer_space_left;
2502
2503         /* Read the interrupt status bits for the channel */
2504         usbc_hcint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index));
2505
2506         if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
2507                 usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index));
2508
2509                 if (usbc_hcchar.s.chena && usbc_hcchar.s.chdis) {
2510                         /*
2511                          * There seems to be a bug in CN31XX which can cause
2512                          * interrupt IN transfers to get stuck until we do a
2513                          * write of HCCHARX without changing things
2514                          */
2515                         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
2516                         return 0;
2517                 }
2518
2519                 /*
2520                  * In non DMA mode the channels don't halt themselves. We need
2521                  * to manually disable channels that are left running
2522                  */
2523                 if (!usbc_hcint.s.chhltd) {
2524                         if (usbc_hcchar.s.chena) {
2525                                 union cvmx_usbcx_hcintmskx hcintmsk;
2526                                 /* Disable all interrupts except CHHLTD */
2527                                 hcintmsk.u32 = 0;
2528                                 hcintmsk.s.chhltdmsk = 1;
2529                                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), hcintmsk.u32);
2530                                 usbc_hcchar.s.chdis = 1;
2531                                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
2532                                 return 0;
2533                         } else if (usbc_hcint.s.xfercompl) {
2534                                 /*
2535                                  * Successful IN/OUT with transfer complete.
2536                                  * Channel halt isn't needed.
2537                                  */
2538                         } else {
2539                                 cvmx_dprintf("USB%d: Channel %d interrupt without halt\n", usb->index, channel);
2540                                 return 0;
2541                         }
2542                 }
2543         } else {
2544                 /*
2545                  * There is are no interrupts that we need to process when the
2546                  * channel is still running
2547                  */
2548                 if (!usbc_hcint.s.chhltd)
2549                         return 0;
2550         }
2551
2552         /* Disable the channel interrupts now that it is done */
2553         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
2554         usb->idle_hardware_channels |= (1<<channel);
2555
2556         /* Make sure this channel is tied to a valid pipe */
2557         pipe = usb->pipe_for_channel[channel];
2558         CVMX_PREFETCH(pipe, 0);
2559         CVMX_PREFETCH(pipe, 128);
2560         if (!pipe)
2561                 return 0;
2562         transaction = pipe->head;
2563         CVMX_PREFETCH(transaction, 0);
2564
2565         /*
2566          * Disconnect this pipe from the HW channel. Later the schedule
2567          * function will figure out which pipe needs to go
2568          */
2569         usb->pipe_for_channel[channel] = NULL;
2570         pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED;
2571
2572         /*
2573          * Read the channel config info so we can figure out how much data
2574          * transfered
2575          */
2576         usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index));
2577         usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
2578
2579         /*
2580          * Calculating the number of bytes successfully transferred is dependent
2581          * on the transfer direction
2582          */
2583         packets_processed = transaction->pktcnt - usbc_hctsiz.s.pktcnt;
2584         if (usbc_hcchar.s.epdir) {
2585                 /*
2586                  * IN transactions are easy. For every byte received the
2587                  * hardware decrements xfersize. All we need to do is subtract
2588                  * the current value of xfersize from its starting value and we
2589                  * know how many bytes were written to the buffer
2590                  */
2591                 bytes_this_transfer = transaction->xfersize - usbc_hctsiz.s.xfersize;
2592         } else {
2593                 /*
2594                  * OUT transaction don't decrement xfersize. Instead pktcnt is
2595                  * decremented on every successful packet send. The hardware
2596                  * does this when it receives an ACK, or NYET. If it doesn't
2597                  * receive one of these responses pktcnt doesn't change
2598                  */
2599                 bytes_this_transfer = packets_processed * usbc_hcchar.s.mps;
2600                 /*
2601                  * The last packet may not be a full transfer if we didn't have
2602                  * enough data
2603                  */
2604                 if (bytes_this_transfer > transaction->xfersize)
2605                         bytes_this_transfer = transaction->xfersize;
2606         }
2607         /* Figure out how many bytes were in the last packet of the transfer */
2608         if (packets_processed)
2609                 bytes_in_last_packet = bytes_this_transfer - (packets_processed-1) * usbc_hcchar.s.mps;
2610         else
2611                 bytes_in_last_packet = bytes_this_transfer;
2612
2613         /*
2614          * As a special case, setup transactions output the setup header, not
2615          * the user's data. For this reason we don't count setup data as bytes
2616          * transferred
2617          */
2618         if ((transaction->stage == CVMX_USB_STAGE_SETUP) ||
2619                 (transaction->stage == CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE))
2620                 bytes_this_transfer = 0;
2621
2622         /*
2623          * Add the bytes transferred to the running total. It is important that
2624          * bytes_this_transfer doesn't count any data that needs to be
2625          * retransmitted
2626          */
2627         transaction->actual_bytes += bytes_this_transfer;
2628         if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
2629                 buffer_space_left = transaction->iso_packets[0].length - transaction->actual_bytes;
2630         else
2631                 buffer_space_left = transaction->buffer_length - transaction->actual_bytes;
2632
2633         /*
2634          * We need to remember the PID toggle state for the next transaction.
2635          * The hardware already updated it for the next transaction
2636          */
2637         pipe->pid_toggle = !(usbc_hctsiz.s.pid == 0);
2638
2639         /*
2640          * For high speed bulk out, assume the next transaction will need to do
2641          * a ping before proceeding. If this isn't true the ACK processing below
2642          * will clear this flag
2643          */
2644         if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&
2645                 (pipe->transfer_type == CVMX_USB_TRANSFER_BULK) &&
2646                 (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT))
2647                 pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
2648
2649         if (usbc_hcint.s.stall) {
2650                 /*
2651                  * STALL as a response means this transaction cannot be
2652                  * completed because the device can't process transactions. Tell
2653                  * the user. Any data that was transferred will be counted on
2654                  * the actual bytes transferred
2655                  */
2656                 pipe->pid_toggle = 0;
2657                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_STALL);
2658         } else if (usbc_hcint.s.xacterr) {
2659                 /*
2660                  * We know at least one packet worked if we get a ACK or NAK.
2661                  * Reset the retry counter
2662                  */
2663                 if (usbc_hcint.s.nak || usbc_hcint.s.ack)
2664                         transaction->retries = 0;
2665                 transaction->retries++;
2666                 if (transaction->retries > MAX_RETRIES) {
2667                         /*
2668                          * XactErr as a response means the device signaled
2669                          * something wrong with the transfer. For example, PID
2670                          * toggle errors cause these
2671                          */
2672                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_XACTERR);
2673                 } else {
2674                         /*
2675                          * If this was a split then clear our split in progress
2676                          * marker
2677                          */
2678                         if (usb->active_split == transaction)
2679                                 usb->active_split = NULL;
2680                         /*
2681                          * Rewind to the beginning of the transaction by anding
2682                          * off the split complete bit
2683                          */
2684                         transaction->stage &= ~1;
2685                         pipe->split_sc_frame = -1;
2686                         pipe->next_tx_frame += pipe->interval;
2687                         if (pipe->next_tx_frame < usb->frame_number)
2688                                 pipe->next_tx_frame = usb->frame_number + pipe->interval -
2689                                                       (usb->frame_number - pipe->next_tx_frame) % pipe->interval;
2690                 }
2691         } else if (usbc_hcint.s.bblerr) {
2692                 /* Babble Error (BblErr) */
2693                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_BABBLEERR);
2694         } else if (usbc_hcint.s.datatglerr) {
2695                 /* We'll retry the exact same transaction again */
2696                 transaction->retries++;
2697         } else if (usbc_hcint.s.nyet) {
2698                 /*
2699                  * NYET as a response is only allowed in three cases: as a
2700                  * response to a ping, as a response to a split transaction, and
2701                  * as a response to a bulk out. The ping case is handled by
2702                  * hardware, so we only have splits and bulk out
2703                  */
2704                 if (!__cvmx_usb_pipe_needs_split(usb, pipe)) {
2705                         transaction->retries = 0;
2706                         /*
2707                          * If there is more data to go then we need to try
2708                          * again. Otherwise this transaction is complete
2709                          */
2710                         if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet))
2711                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2712                 } else {
2713                         /*
2714                          * Split transactions retry the split complete 4 times
2715                          * then rewind to the start split and do the entire
2716                          * transactions again
2717                          */
2718                         transaction->retries++;
2719                         if ((transaction->retries & 0x3) == 0) {
2720                                 /*
2721                                  * Rewind to the beginning of the transaction by
2722                                  * anding off the split complete bit
2723                                  */
2724                                 transaction->stage &= ~1;
2725                                 pipe->split_sc_frame = -1;
2726                         }
2727                 }
2728         } else if (usbc_hcint.s.ack) {
2729                 transaction->retries = 0;
2730                 /*
2731                  * The ACK bit can only be checked after the other error bits.
2732                  * This is because a multi packet transfer may succeed in a
2733                  * number of packets and then get a different response on the
2734                  * last packet. In this case both ACK and the last response bit
2735                  * will be set. If none of the other response bits is set, then
2736                  * the last packet must have been an ACK
2737                  *
2738                  * Since we got an ACK, we know we don't need to do a ping on
2739                  * this pipe
2740                  */
2741                 pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_NEED_PING;
2742
2743                 switch (transaction->type) {
2744                 case CVMX_USB_TRANSFER_CONTROL:
2745                         switch (transaction->stage) {
2746                         case CVMX_USB_STAGE_NON_CONTROL:
2747                         case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
2748                                 /* This should be impossible */
2749                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_ERROR);
2750                                 break;
2751                         case CVMX_USB_STAGE_SETUP:
2752                                 pipe->pid_toggle = 1;
2753                                 if (__cvmx_usb_pipe_needs_split(usb, pipe))
2754                                         transaction->stage = CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE;
2755                                 else {
2756                                         union cvmx_usb_control_header *header =
2757                                                 cvmx_phys_to_ptr(transaction->control_header);
2758                                         if (header->s.length)
2759                                                 transaction->stage = CVMX_USB_STAGE_DATA;
2760                                         else
2761                                                 transaction->stage = CVMX_USB_STAGE_STATUS;
2762                                 }
2763                                 break;
2764                         case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
2765                                 {
2766                                         union cvmx_usb_control_header *header =
2767                                                 cvmx_phys_to_ptr(transaction->control_header);
2768                                         if (header->s.length)
2769                                                 transaction->stage = CVMX_USB_STAGE_DATA;
2770                                         else
2771                                                 transaction->stage = CVMX_USB_STAGE_STATUS;
2772                                 }
2773                                 break;
2774                         case CVMX_USB_STAGE_DATA:
2775                                 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
2776                                         transaction->stage = CVMX_USB_STAGE_DATA_SPLIT_COMPLETE;
2777                                         /*
2778                                          * For setup OUT data that are splits,
2779                                          * the hardware doesn't appear to count
2780                                          * transferred data. Here we manually
2781                                          * update the data transferred
2782                                          */
2783                                         if (!usbc_hcchar.s.epdir) {
2784                                                 if (buffer_space_left < pipe->max_packet)
2785                                                         transaction->actual_bytes += buffer_space_left;
2786                                                 else
2787                                                         transaction->actual_bytes += pipe->max_packet;
2788                                         }
2789                                 } else if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) {
2790                                         pipe->pid_toggle = 1;
2791                                         transaction->stage = CVMX_USB_STAGE_STATUS;
2792                                 }
2793                                 break;
2794                         case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE:
2795                                 if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) {
2796                                         pipe->pid_toggle = 1;
2797                                         transaction->stage = CVMX_USB_STAGE_STATUS;
2798                                 } else {
2799                                         transaction->stage = CVMX_USB_STAGE_DATA;
2800                                 }
2801                                 break;
2802                         case CVMX_USB_STAGE_STATUS:
2803                                 if (__cvmx_usb_pipe_needs_split(usb, pipe))
2804                                         transaction->stage = CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE;
2805                                 else
2806                                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2807                                 break;
2808                         case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
2809                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2810                                 break;
2811                         }
2812                         break;
2813                 case CVMX_USB_TRANSFER_BULK:
2814                 case CVMX_USB_TRANSFER_INTERRUPT:
2815                         /*
2816                          * The only time a bulk transfer isn't complete when it
2817                          * finishes with an ACK is during a split transaction.
2818                          * For splits we need to continue the transfer if more
2819                          * data is needed
2820                          */
2821                         if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
2822                                 if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL)
2823                                         transaction->stage = CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE;
2824                                 else {
2825                                         if (buffer_space_left && (bytes_in_last_packet == pipe->max_packet))
2826                                                 transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2827                                         else {
2828                                                 if (transaction->type == CVMX_USB_TRANSFER_INTERRUPT)
2829                                                         pipe->next_tx_frame += pipe->interval;
2830                                                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2831                                         }
2832                                 }
2833                         } else {
2834                                 if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&
2835                                     (pipe->transfer_type == CVMX_USB_TRANSFER_BULK) &&
2836                                     (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&
2837                                     (usbc_hcint.s.nak))
2838                                         pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
2839                                 if (!buffer_space_left || (bytes_in_last_packet < pipe->max_packet)) {
2840                                         if (transaction->type == CVMX_USB_TRANSFER_INTERRUPT)
2841                                                 pipe->next_tx_frame += pipe->interval;
2842                                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2843                                 }
2844                         }
2845                         break;
2846                 case CVMX_USB_TRANSFER_ISOCHRONOUS:
2847                         if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
2848                                 /*
2849                                  * ISOCHRONOUS OUT splits don't require a
2850                                  * complete split stage. Instead they use a
2851                                  * sequence of begin OUT splits to transfer the
2852                                  * data 188 bytes at a time. Once the transfer
2853                                  * is complete, the pipe sleeps until the next
2854                                  * schedule interval
2855                                  */
2856                                 if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {
2857                                         /*
2858                                          * If no space left or this wasn't a max
2859                                          * size packet then this transfer is
2860                                          * complete. Otherwise start it again to
2861                                          * send the next 188 bytes
2862                                          */
2863                                         if (!buffer_space_left || (bytes_this_transfer < 188)) {
2864                                                 pipe->next_tx_frame += pipe->interval;
2865                                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2866                                         }
2867                                 } else {
2868                                         if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE) {
2869                                                 /*
2870                                                  * We are in the incoming data
2871                                                  * phase. Keep getting data
2872                                                  * until we run out of space or
2873                                                  * get a small packet
2874                                                  */
2875                                                 if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) {
2876                                                         pipe->next_tx_frame += pipe->interval;
2877                                                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2878                                                 }
2879                                         } else
2880                                                 transaction->stage = CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE;
2881                                 }
2882                         } else {
2883                                 pipe->next_tx_frame += pipe->interval;
2884                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2885                         }
2886                         break;
2887                 }
2888         } else if (usbc_hcint.s.nak) {
2889                 /*
2890                  * If this was a split then clear our split in progress marker.
2891                  */
2892                 if (usb->active_split == transaction)
2893                         usb->active_split = NULL;
2894                 /*
2895                  * NAK as a response means the device couldn't accept the
2896                  * transaction, but it should be retried in the future. Rewind
2897                  * to the beginning of the transaction by anding off the split
2898                  * complete bit. Retry in the next interval
2899                  */
2900                 transaction->retries = 0;
2901                 transaction->stage &= ~1;
2902                 pipe->next_tx_frame += pipe->interval;
2903                 if (pipe->next_tx_frame < usb->frame_number)
2904                         pipe->next_tx_frame = usb->frame_number + pipe->interval -
2905                                 (usb->frame_number - pipe->next_tx_frame) % pipe->interval;
2906         } else {
2907                 struct cvmx_usb_port_status port;
2908                 port = cvmx_usb_get_status(usb);
2909                 if (port.port_enabled) {
2910                         /* We'll retry the exact same transaction again */
2911                         transaction->retries++;
2912                 } else {
2913                         /*
2914                          * We get channel halted interrupts with no result bits
2915                          * sets when the cable is unplugged
2916                          */
2917                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_ERROR);
2918                 }
2919         }
2920         return 0;
2921 }
2922
2923 static void octeon_usb_port_callback(struct cvmx_usb_state *usb)
2924 {
2925         struct octeon_hcd *priv = cvmx_usb_to_octeon(usb);
2926
2927         spin_unlock(&priv->lock);
2928         usb_hcd_poll_rh_status(octeon_to_hcd(priv));
2929         spin_lock(&priv->lock);
2930 }
2931
2932 /**
2933  * Poll the USB block for status and call all needed callback
2934  * handlers. This function is meant to be called in the interrupt
2935  * handler for the USB controller. It can also be called
2936  * periodically in a loop for non-interrupt based operation.
2937  *
2938  * @usb: USB device state populated by cvmx_usb_initialize().
2939  *
2940  * Returns: 0 or a negative error code.
2941  */
2942 static int cvmx_usb_poll(struct cvmx_usb_state *usb)
2943 {
2944         union cvmx_usbcx_hfnum usbc_hfnum;
2945         union cvmx_usbcx_gintsts usbc_gintsts;
2946
2947         CVMX_PREFETCH(usb, 0);
2948         CVMX_PREFETCH(usb, 1*128);
2949         CVMX_PREFETCH(usb, 2*128);
2950         CVMX_PREFETCH(usb, 3*128);
2951         CVMX_PREFETCH(usb, 4*128);
2952
2953         /* Update the frame counter */
2954         usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
2955         if ((usb->frame_number&0x3fff) > usbc_hfnum.s.frnum)
2956                 usb->frame_number += 0x4000;
2957         usb->frame_number &= ~0x3fffull;
2958         usb->frame_number |= usbc_hfnum.s.frnum;
2959
2960         /* Read the pending interrupts */
2961         usbc_gintsts.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GINTSTS(usb->index));
2962
2963         /* Clear the interrupts now that we know about them */
2964         __cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTSTS(usb->index), usbc_gintsts.u32);
2965
2966         if (usbc_gintsts.s.rxflvl) {
2967                 /*
2968                  * RxFIFO Non-Empty (RxFLvl)
2969                  * Indicates that there is at least one packet pending to be
2970                  * read from the RxFIFO.
2971                  *
2972                  * In DMA mode this is handled by hardware
2973                  */
2974                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
2975                         __cvmx_usb_poll_rx_fifo(usb);
2976         }
2977         if (usbc_gintsts.s.ptxfemp || usbc_gintsts.s.nptxfemp) {
2978                 /* Fill the Tx FIFOs when not in DMA mode */
2979                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
2980                         __cvmx_usb_poll_tx_fifo(usb);
2981         }
2982         if (usbc_gintsts.s.disconnint || usbc_gintsts.s.prtint) {
2983                 union cvmx_usbcx_hprt usbc_hprt;
2984                 /*
2985                  * Disconnect Detected Interrupt (DisconnInt)
2986                  * Asserted when a device disconnect is detected.
2987                  *
2988                  * Host Port Interrupt (PrtInt)
2989                  * The core sets this bit to indicate a change in port status of
2990                  * one of the O2P USB core ports in Host mode. The application
2991                  * must read the Host Port Control and Status (HPRT) register to
2992                  * determine the exact event that caused this interrupt. The
2993                  * application must clear the appropriate status bit in the Host
2994                  * Port Control and Status register to clear this bit.
2995                  *
2996                  * Call the user's port callback
2997                  */
2998                 octeon_usb_port_callback(usb);
2999                 /* Clear the port change bits */
3000                 usbc_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
3001                 usbc_hprt.s.prtena = 0;
3002                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPRT(usb->index), usbc_hprt.u32);
3003         }
3004         if (usbc_gintsts.s.hchint) {
3005                 /*
3006                  * Host Channels Interrupt (HChInt)
3007                  * The core sets this bit to indicate that an interrupt is
3008                  * pending on one of the channels of the core (in Host mode).
3009                  * The application must read the Host All Channels Interrupt
3010                  * (HAINT) register to determine the exact number of the channel
3011                  * on which the interrupt occurred, and then read the
3012                  * corresponding Host Channel-n Interrupt (HCINTn) register to
3013                  * determine the exact cause of the interrupt. The application
3014                  * must clear the appropriate status bit in the HCINTn register
3015                  * to clear this bit.
3016                  */
3017                 union cvmx_usbcx_haint usbc_haint;
3018                 usbc_haint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINT(usb->index));
3019                 while (usbc_haint.u32) {
3020                         int channel;
3021
3022                         channel = __fls(usbc_haint.u32);
3023                         __cvmx_usb_poll_channel(usb, channel);
3024                         usbc_haint.u32 ^= 1<<channel;
3025                 }
3026         }
3027
3028         __cvmx_usb_schedule(usb, usbc_gintsts.s.sof);
3029
3030         return 0;
3031 }
3032
3033 /* convert between an HCD pointer and the corresponding struct octeon_hcd */
3034 static inline struct octeon_hcd *hcd_to_octeon(struct usb_hcd *hcd)
3035 {
3036         return (struct octeon_hcd *)(hcd->hcd_priv);
3037 }
3038
3039 static irqreturn_t octeon_usb_irq(struct usb_hcd *hcd)
3040 {
3041         struct octeon_hcd *priv = hcd_to_octeon(hcd);
3042         unsigned long flags;
3043
3044         spin_lock_irqsave(&priv->lock, flags);
3045         cvmx_usb_poll(&priv->usb);
3046         spin_unlock_irqrestore(&priv->lock, flags);
3047         return IRQ_HANDLED;
3048 }
3049
3050 static int octeon_usb_start(struct usb_hcd *hcd)
3051 {
3052         hcd->state = HC_STATE_RUNNING;
3053         return 0;
3054 }
3055
3056 static void octeon_usb_stop(struct usb_hcd *hcd)
3057 {
3058         hcd->state = HC_STATE_HALT;
3059 }
3060
3061 static int octeon_usb_get_frame_number(struct usb_hcd *hcd)
3062 {
3063         struct octeon_hcd *priv = hcd_to_octeon(hcd);
3064
3065         return cvmx_usb_get_frame_number(&priv->usb);
3066 }
3067
3068 static int octeon_usb_urb_enqueue(struct usb_hcd *hcd,
3069                                   struct urb *urb,
3070                                   gfp_t mem_flags)
3071 {
3072         struct octeon_hcd *priv = hcd_to_octeon(hcd);
3073         struct device *dev = hcd->self.controller;
3074         struct cvmx_usb_transaction *transaction = NULL;
3075         struct cvmx_usb_pipe *pipe;
3076         unsigned long flags;
3077         struct cvmx_usb_iso_packet *iso_packet;
3078         struct usb_host_endpoint *ep = urb->ep;
3079
3080         urb->status = 0;
3081         INIT_LIST_HEAD(&urb->urb_list); /* not enqueued on dequeue_list */
3082         spin_lock_irqsave(&priv->lock, flags);
3083
3084         if (!ep->hcpriv) {
3085                 enum cvmx_usb_transfer transfer_type;
3086                 enum cvmx_usb_speed speed;
3087                 int split_device = 0;
3088                 int split_port = 0;
3089                 switch (usb_pipetype(urb->pipe)) {
3090                 case PIPE_ISOCHRONOUS:
3091                         transfer_type = CVMX_USB_TRANSFER_ISOCHRONOUS;
3092                         break;
3093                 case PIPE_INTERRUPT:
3094                         transfer_type = CVMX_USB_TRANSFER_INTERRUPT;
3095                         break;
3096                 case PIPE_CONTROL:
3097                         transfer_type = CVMX_USB_TRANSFER_CONTROL;
3098                         break;
3099                 default:
3100                         transfer_type = CVMX_USB_TRANSFER_BULK;
3101                         break;
3102                 }
3103                 switch (urb->dev->speed) {
3104                 case USB_SPEED_LOW:
3105                         speed = CVMX_USB_SPEED_LOW;
3106                         break;
3107                 case USB_SPEED_FULL:
3108                         speed = CVMX_USB_SPEED_FULL;
3109                         break;
3110                 default:
3111                         speed = CVMX_USB_SPEED_HIGH;
3112                         break;
3113                 }
3114                 /*
3115                  * For slow devices on high speed ports we need to find the hub
3116                  * that does the speed translation so we know where to send the
3117                  * split transactions.
3118                  */
3119                 if (speed != CVMX_USB_SPEED_HIGH) {
3120                         /*
3121                          * Start at this device and work our way up the usb
3122                          * tree.
3123                          */
3124                         struct usb_device *dev = urb->dev;
3125                         while (dev->parent) {
3126                                 /*
3127                                  * If our parent is high speed then he'll
3128                                  * receive the splits.
3129                                  */
3130                                 if (dev->parent->speed == USB_SPEED_HIGH) {
3131                                         split_device = dev->parent->devnum;
3132                                         split_port = dev->portnum;
3133                                         break;
3134                                 }
3135                                 /*
3136                                  * Move up the tree one level. If we make it all
3137                                  * the way up the tree, then the port must not
3138                                  * be in high speed mode and we don't need a
3139                                  * split.
3140                                  */
3141                                 dev = dev->parent;
3142                         }
3143                 }
3144                 pipe = cvmx_usb_open_pipe(&priv->usb, usb_pipedevice(urb->pipe),
3145                                           usb_pipeendpoint(urb->pipe), speed,
3146                                           le16_to_cpu(ep->desc.wMaxPacketSize) & 0x7ff,
3147                                           transfer_type,
3148                                           usb_pipein(urb->pipe) ?
3149                                                 CVMX_USB_DIRECTION_IN :
3150                                                 CVMX_USB_DIRECTION_OUT,
3151                                           urb->interval,
3152                                           (le16_to_cpu(ep->desc.wMaxPacketSize) >> 11) & 0x3,
3153                                           split_device, split_port);
3154                 if (!pipe) {
3155                         spin_unlock_irqrestore(&priv->lock, flags);
3156                         dev_dbg(dev, "Failed to create pipe\n");
3157                         return -ENOMEM;
3158                 }
3159                 ep->hcpriv = pipe;
3160         } else {
3161                 pipe = ep->hcpriv;
3162         }
3163
3164         switch (usb_pipetype(urb->pipe)) {
3165         case PIPE_ISOCHRONOUS:
3166                 dev_dbg(dev, "Submit isochronous to %d.%d\n",
3167                         usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe));
3168                 /*
3169                  * Allocate a structure to use for our private list of
3170                  * isochronous packets.
3171                  */
3172                 iso_packet = kmalloc(urb->number_of_packets *
3173                                      sizeof(struct cvmx_usb_iso_packet),
3174                                      GFP_ATOMIC);
3175                 if (iso_packet) {
3176                         int i;
3177                         /* Fill the list with the data from the URB */
3178                         for (i = 0; i < urb->number_of_packets; i++) {
3179                                 iso_packet[i].offset = urb->iso_frame_desc[i].offset;
3180                                 iso_packet[i].length = urb->iso_frame_desc[i].length;
3181                                 iso_packet[i].status = CVMX_USB_COMPLETE_ERROR;
3182                         }
3183                         /*
3184                          * Store a pointer to the list in the URB setup_packet
3185                          * field. We know this currently isn't being used and
3186                          * this saves us a bunch of logic.
3187                          */
3188                         urb->setup_packet = (char *)iso_packet;
3189                         transaction = cvmx_usb_submit_isochronous(&priv->usb,
3190                                                                   pipe, urb);
3191                         /*
3192                          * If submit failed we need to free our private packet
3193                          * list.
3194                          */
3195                         if (!transaction) {
3196                                 urb->setup_packet = NULL;
3197                                 kfree(iso_packet);
3198                         }
3199                 }
3200                 break;
3201         case PIPE_INTERRUPT:
3202                 dev_dbg(dev, "Submit interrupt to %d.%d\n",
3203                         usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe));
3204                 transaction = cvmx_usb_submit_interrupt(&priv->usb, pipe, urb);
3205                 break;
3206         case PIPE_CONTROL:
3207                 dev_dbg(dev, "Submit control to %d.%d\n",
3208                         usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe));
3209                 transaction = cvmx_usb_submit_control(&priv->usb, pipe, urb);
3210                 break;
3211         case PIPE_BULK:
3212                 dev_dbg(dev, "Submit bulk to %d.%d\n",
3213                         usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe));
3214                 transaction = cvmx_usb_submit_bulk(&priv->usb, pipe, urb);
3215                 break;
3216         }
3217         if (!transaction) {
3218                 spin_unlock_irqrestore(&priv->lock, flags);
3219                 dev_dbg(dev, "Failed to submit\n");
3220                 return -ENOMEM;
3221         }
3222         urb->hcpriv = transaction;
3223         spin_unlock_irqrestore(&priv->lock, flags);
3224         return 0;
3225 }
3226
3227 static void octeon_usb_urb_dequeue_work(unsigned long arg)
3228 {
3229         unsigned long flags;
3230         struct octeon_hcd *priv = (struct octeon_hcd *)arg;
3231
3232         spin_lock_irqsave(&priv->lock, flags);
3233
3234         while (!list_empty(&priv->dequeue_list)) {
3235                 struct urb *urb = container_of(priv->dequeue_list.next, struct urb, urb_list);
3236                 list_del(&urb->urb_list);
3237                 /* not enqueued on dequeue_list */
3238                 INIT_LIST_HEAD(&urb->urb_list);
3239                 cvmx_usb_cancel(&priv->usb, urb->ep->hcpriv, urb->hcpriv);
3240         }
3241
3242         spin_unlock_irqrestore(&priv->lock, flags);
3243 }
3244
3245 static int octeon_usb_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
3246 {
3247         struct octeon_hcd *priv = hcd_to_octeon(hcd);
3248         unsigned long flags;
3249
3250         if (!urb->dev)
3251                 return -EINVAL;
3252
3253         spin_lock_irqsave(&priv->lock, flags);
3254
3255         urb->status = status;
3256         list_add_tail(&urb->urb_list, &priv->dequeue_list);
3257
3258         spin_unlock_irqrestore(&priv->lock, flags);
3259
3260         tasklet_schedule(&priv->dequeue_tasklet);
3261
3262         return 0;
3263 }
3264
3265 static void octeon_usb_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
3266 {
3267         struct device *dev = hcd->self.controller;
3268
3269         if (ep->hcpriv) {
3270                 struct octeon_hcd *priv = hcd_to_octeon(hcd);
3271                 struct cvmx_usb_pipe *pipe = ep->hcpriv;
3272                 unsigned long flags;
3273                 spin_lock_irqsave(&priv->lock, flags);
3274                 cvmx_usb_cancel_all(&priv->usb, pipe);
3275                 if (cvmx_usb_close_pipe(&priv->usb, pipe))
3276                         dev_dbg(dev, "Closing pipe %p failed\n", pipe);
3277                 spin_unlock_irqrestore(&priv->lock, flags);
3278                 ep->hcpriv = NULL;
3279         }
3280 }
3281
3282 static int octeon_usb_hub_status_data(struct usb_hcd *hcd, char *buf)
3283 {
3284         struct octeon_hcd *priv = hcd_to_octeon(hcd);
3285         struct cvmx_usb_port_status port_status;
3286         unsigned long flags;
3287
3288         spin_lock_irqsave(&priv->lock, flags);
3289         port_status = cvmx_usb_get_status(&priv->usb);
3290         spin_unlock_irqrestore(&priv->lock, flags);
3291         buf[0] = 0;
3292         buf[0] = port_status.connect_change << 1;
3293
3294         return (buf[0] != 0);
3295 }
3296
3297 static int octeon_usb_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength)
3298 {
3299         struct octeon_hcd *priv = hcd_to_octeon(hcd);
3300         struct device *dev = hcd->self.controller;
3301         struct cvmx_usb_port_status usb_port_status;
3302         int port_status;
3303         struct usb_hub_descriptor *desc;
3304         unsigned long flags;
3305
3306         switch (typeReq) {
3307         case ClearHubFeature:
3308                 dev_dbg(dev, "ClearHubFeature\n");
3309                 switch (wValue) {
3310                 case C_HUB_LOCAL_POWER:
3311                 case C_HUB_OVER_CURRENT:
3312                         /* Nothing required here */
3313                         break;
3314                 default:
3315                         return -EINVAL;
3316                 }
3317                 break;
3318         case ClearPortFeature:
3319                 dev_dbg(dev, "ClearPortFeature\n");
3320                 if (wIndex != 1) {
3321                         dev_dbg(dev, " INVALID\n");
3322                         return -EINVAL;
3323                 }
3324
3325                 switch (wValue) {
3326                 case USB_PORT_FEAT_ENABLE:
3327                         dev_dbg(dev, " ENABLE\n");
3328                         spin_lock_irqsave(&priv->lock, flags);
3329                         cvmx_usb_disable(&priv->usb);
3330                         spin_unlock_irqrestore(&priv->lock, flags);
3331                         break;
3332                 case USB_PORT_FEAT_SUSPEND:
3333                         dev_dbg(dev, " SUSPEND\n");
3334                         /* Not supported on Octeon */
3335                         break;
3336                 case USB_PORT_FEAT_POWER:
3337                         dev_dbg(dev, " POWER\n");
3338                         /* Not supported on Octeon */
3339                         break;
3340                 case USB_PORT_FEAT_INDICATOR:
3341                         dev_dbg(dev, " INDICATOR\n");
3342                         /* Port inidicator not supported */
3343                         break;
3344                 case USB_PORT_FEAT_C_CONNECTION:
3345                         dev_dbg(dev, " C_CONNECTION\n");
3346                         /* Clears drivers internal connect status change flag */
3347                         spin_lock_irqsave(&priv->lock, flags);
3348                         priv->usb.port_status = cvmx_usb_get_status(&priv->usb);
3349                         spin_unlock_irqrestore(&priv->lock, flags);
3350                         break;
3351                 case USB_PORT_FEAT_C_RESET:
3352                         dev_dbg(dev, " C_RESET\n");
3353                         /*
3354                          * Clears the driver's internal Port Reset Change flag.
3355                          */
3356                         spin_lock_irqsave(&priv->lock, flags);
3357                         priv->usb.port_status = cvmx_usb_get_status(&priv->usb);
3358                         spin_unlock_irqrestore(&priv->lock, flags);
3359                         break;
3360                 case USB_PORT_FEAT_C_ENABLE:
3361                         dev_dbg(dev, " C_ENABLE\n");
3362                         /*
3363                          * Clears the driver's internal Port Enable/Disable
3364                          * Change flag.
3365                          */
3366                         spin_lock_irqsave(&priv->lock, flags);
3367                         priv->usb.port_status = cvmx_usb_get_status(&priv->usb);
3368                         spin_unlock_irqrestore(&priv->lock, flags);
3369                         break;
3370                 case USB_PORT_FEAT_C_SUSPEND:
3371                         dev_dbg(dev, " C_SUSPEND\n");
3372                         /*
3373                          * Clears the driver's internal Port Suspend Change
3374                          * flag, which is set when resume signaling on the host
3375                          * port is complete.
3376                          */
3377                         break;
3378                 case USB_PORT_FEAT_C_OVER_CURRENT:
3379                         dev_dbg(dev, " C_OVER_CURRENT\n");
3380                         /* Clears the driver's overcurrent Change flag */
3381                         spin_lock_irqsave(&priv->lock, flags);
3382                         priv->usb.port_status = cvmx_usb_get_status(&priv->usb);
3383                         spin_unlock_irqrestore(&priv->lock, flags);
3384                         break;
3385                 default:
3386                         dev_dbg(dev, " UNKNOWN\n");
3387                         return -EINVAL;
3388                 }
3389                 break;
3390         case GetHubDescriptor:
3391                 dev_dbg(dev, "GetHubDescriptor\n");
3392                 desc = (struct usb_hub_descriptor *)buf;
3393                 desc->bDescLength = 9;
3394                 desc->bDescriptorType = 0x29;
3395                 desc->bNbrPorts = 1;
3396                 desc->wHubCharacteristics = 0x08;
3397                 desc->bPwrOn2PwrGood = 1;
3398                 desc->bHubContrCurrent = 0;
3399                 desc->u.hs.DeviceRemovable[0] = 0;
3400                 desc->u.hs.DeviceRemovable[1] = 0xff;
3401                 break;
3402         case GetHubStatus:
3403                 dev_dbg(dev, "GetHubStatus\n");
3404                 *(__le32 *) buf = 0;
3405                 break;
3406         case GetPortStatus:
3407                 dev_dbg(dev, "GetPortStatus\n");
3408                 if (wIndex != 1) {
3409                         dev_dbg(dev, " INVALID\n");
3410                         return -EINVAL;
3411                 }
3412
3413                 spin_lock_irqsave(&priv->lock, flags);
3414                 usb_port_status = cvmx_usb_get_status(&priv->usb);
3415                 spin_unlock_irqrestore(&priv->lock, flags);
3416                 port_status = 0;
3417
3418                 if (usb_port_status.connect_change) {
3419                         port_status |= (1 << USB_PORT_FEAT_C_CONNECTION);
3420                         dev_dbg(dev, " C_CONNECTION\n");
3421                 }
3422
3423                 if (usb_port_status.port_enabled) {
3424                         port_status |= (1 << USB_PORT_FEAT_C_ENABLE);
3425                         dev_dbg(dev, " C_ENABLE\n");
3426                 }
3427
3428                 if (usb_port_status.connected) {
3429                         port_status |= (1 << USB_PORT_FEAT_CONNECTION);
3430                         dev_dbg(dev, " CONNECTION\n");
3431                 }
3432
3433                 if (usb_port_status.port_enabled) {
3434                         port_status |= (1 << USB_PORT_FEAT_ENABLE);
3435                         dev_dbg(dev, " ENABLE\n");
3436                 }
3437
3438                 if (usb_port_status.port_over_current) {
3439                         port_status |= (1 << USB_PORT_FEAT_OVER_CURRENT);
3440                         dev_dbg(dev, " OVER_CURRENT\n");
3441                 }
3442
3443                 if (usb_port_status.port_powered) {
3444                         port_status |= (1 << USB_PORT_FEAT_POWER);
3445                         dev_dbg(dev, " POWER\n");
3446                 }
3447
3448                 if (usb_port_status.port_speed == CVMX_USB_SPEED_HIGH) {
3449                         port_status |= USB_PORT_STAT_HIGH_SPEED;
3450                         dev_dbg(dev, " HIGHSPEED\n");
3451                 } else if (usb_port_status.port_speed == CVMX_USB_SPEED_LOW) {
3452                         port_status |= (1 << USB_PORT_FEAT_LOWSPEED);
3453                         dev_dbg(dev, " LOWSPEED\n");
3454                 }
3455
3456                 *((__le32 *) buf) = cpu_to_le32(port_status);
3457                 break;
3458         case SetHubFeature:
3459                 dev_dbg(dev, "SetHubFeature\n");
3460                 /* No HUB features supported */
3461                 break;
3462         case SetPortFeature:
3463                 dev_dbg(dev, "SetPortFeature\n");
3464                 if (wIndex != 1) {
3465                         dev_dbg(dev, " INVALID\n");
3466                         return -EINVAL;
3467                 }
3468
3469                 switch (wValue) {
3470                 case USB_PORT_FEAT_SUSPEND:
3471                         dev_dbg(dev, " SUSPEND\n");
3472                         return -EINVAL;
3473                 case USB_PORT_FEAT_POWER:
3474                         dev_dbg(dev, " POWER\n");
3475                         return -EINVAL;
3476                 case USB_PORT_FEAT_RESET:
3477                         dev_dbg(dev, " RESET\n");
3478                         spin_lock_irqsave(&priv->lock, flags);
3479                         cvmx_usb_disable(&priv->usb);
3480                         if (cvmx_usb_enable(&priv->usb))
3481                                 dev_dbg(dev, "Failed to enable the port\n");
3482                         spin_unlock_irqrestore(&priv->lock, flags);
3483                         return 0;
3484                 case USB_PORT_FEAT_INDICATOR:
3485                         dev_dbg(dev, " INDICATOR\n");
3486                         /* Not supported */
3487                         break;
3488                 default:
3489                         dev_dbg(dev, " UNKNOWN\n");
3490                         return -EINVAL;
3491                 }
3492                 break;
3493         default:
3494                 dev_dbg(dev, "Unknown root hub request\n");
3495                 return -EINVAL;
3496         }
3497         return 0;
3498 }
3499
3500
3501 static const struct hc_driver octeon_hc_driver = {
3502         .description            = "Octeon USB",
3503         .product_desc           = "Octeon Host Controller",
3504         .hcd_priv_size          = sizeof(struct octeon_hcd),
3505         .irq                    = octeon_usb_irq,
3506         .flags                  = HCD_MEMORY | HCD_USB2,
3507         .start                  = octeon_usb_start,
3508         .stop                   = octeon_usb_stop,
3509         .urb_enqueue            = octeon_usb_urb_enqueue,
3510         .urb_dequeue            = octeon_usb_urb_dequeue,
3511         .endpoint_disable       = octeon_usb_endpoint_disable,
3512         .get_frame_number       = octeon_usb_get_frame_number,
3513         .hub_status_data        = octeon_usb_hub_status_data,
3514         .hub_control            = octeon_usb_hub_control,
3515 };
3516
3517
3518 static int octeon_usb_driver_probe(struct device *dev)
3519 {
3520         int status;
3521         int usb_num = to_platform_device(dev)->id;
3522         int irq = platform_get_irq(to_platform_device(dev), 0);
3523         struct octeon_hcd *priv;
3524         struct usb_hcd *hcd;
3525         unsigned long flags;
3526
3527         /*
3528          * Set the DMA mask to 64bits so we get buffers already translated for
3529          * DMA.
3530          */
3531         dev->coherent_dma_mask = ~0;
3532         dev->dma_mask = &dev->coherent_dma_mask;
3533
3534         hcd = usb_create_hcd(&octeon_hc_driver, dev, dev_name(dev));
3535         if (!hcd) {
3536                 dev_dbg(dev, "Failed to allocate memory for HCD\n");
3537                 return -1;
3538         }
3539         hcd->uses_new_polling = 1;
3540         priv = (struct octeon_hcd *)hcd->hcd_priv;
3541
3542         spin_lock_init(&priv->lock);
3543
3544         tasklet_init(&priv->dequeue_tasklet, octeon_usb_urb_dequeue_work, (unsigned long)priv);
3545         INIT_LIST_HEAD(&priv->dequeue_list);
3546
3547         status = cvmx_usb_initialize(&priv->usb, usb_num);
3548         if (status) {
3549                 dev_dbg(dev, "USB initialization failed with %d\n", status);
3550                 kfree(hcd);
3551                 return -1;
3552         }
3553
3554         /* This delay is needed for CN3010, but I don't know why... */
3555         mdelay(10);
3556
3557         spin_lock_irqsave(&priv->lock, flags);
3558         cvmx_usb_poll(&priv->usb);
3559         spin_unlock_irqrestore(&priv->lock, flags);
3560
3561         status = usb_add_hcd(hcd, irq, IRQF_SHARED);
3562         if (status) {
3563                 dev_dbg(dev, "USB add HCD failed with %d\n", status);
3564                 kfree(hcd);
3565                 return -1;
3566         }
3567
3568         dev_dbg(dev, "Registered HCD for port %d on irq %d\n", usb_num, irq);
3569
3570         return 0;
3571 }
3572
3573 static int octeon_usb_driver_remove(struct device *dev)
3574 {
3575         int status;
3576         struct usb_hcd *hcd = dev_get_drvdata(dev);
3577         struct octeon_hcd *priv = hcd_to_octeon(hcd);
3578         unsigned long flags;
3579
3580         usb_remove_hcd(hcd);
3581         tasklet_kill(&priv->dequeue_tasklet);
3582         spin_lock_irqsave(&priv->lock, flags);
3583         status = cvmx_usb_shutdown(&priv->usb);
3584         spin_unlock_irqrestore(&priv->lock, flags);
3585         if (status)
3586                 dev_dbg(dev, "USB shutdown failed with %d\n", status);
3587
3588         kfree(hcd);
3589
3590         return 0;
3591 }
3592
3593 static struct device_driver octeon_usb_driver = {
3594         .name   = "OcteonUSB",
3595         .bus    = &platform_bus_type,
3596         .probe  = octeon_usb_driver_probe,
3597         .remove = octeon_usb_driver_remove,
3598 };
3599
3600
3601 #define MAX_USB_PORTS   10
3602 static struct platform_device *pdev_glob[MAX_USB_PORTS];
3603 static int octeon_usb_registered;
3604 static int __init octeon_usb_module_init(void)
3605 {
3606         int num_devices = cvmx_usb_get_num_ports();
3607         int device;
3608
3609         if (usb_disabled() || num_devices == 0)
3610                 return -ENODEV;
3611
3612         if (driver_register(&octeon_usb_driver))
3613                 return -ENOMEM;
3614
3615         octeon_usb_registered = 1;
3616
3617         /*
3618          * Only cn52XX and cn56XX have DWC_OTG USB hardware and the
3619          * IOB priority registers.  Under heavy network load USB
3620          * hardware can be starved by the IOB causing a crash.  Give
3621          * it a priority boost if it has been waiting more than 400
3622          * cycles to avoid this situation.
3623          *
3624          * Testing indicates that a cnt_val of 8192 is not sufficient,
3625          * but no failures are seen with 4096.  We choose a value of
3626          * 400 to give a safety factor of 10.
3627          */
3628         if (OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN56XX)) {
3629                 union cvmx_iob_n2c_l2c_pri_cnt pri_cnt;
3630
3631                 pri_cnt.u64 = 0;
3632                 pri_cnt.s.cnt_enb = 1;
3633                 pri_cnt.s.cnt_val = 400;
3634                 cvmx_write_csr(CVMX_IOB_N2C_L2C_PRI_CNT, pri_cnt.u64);
3635         }
3636
3637         for (device = 0; device < num_devices; device++) {
3638                 struct resource irq_resource;
3639                 struct platform_device *pdev;
3640                 memset(&irq_resource, 0, sizeof(irq_resource));
3641                 irq_resource.start = (device == 0) ? OCTEON_IRQ_USB0 : OCTEON_IRQ_USB1;
3642                 irq_resource.end = irq_resource.start;
3643                 irq_resource.flags = IORESOURCE_IRQ;
3644                 pdev = platform_device_register_simple((char *)octeon_usb_driver.  name, device, &irq_resource, 1);
3645                 if (IS_ERR(pdev)) {
3646                         driver_unregister(&octeon_usb_driver);
3647                         octeon_usb_registered = 0;
3648                         return PTR_ERR(pdev);
3649                 }
3650                 if (device < MAX_USB_PORTS)
3651                         pdev_glob[device] = pdev;
3652
3653         }
3654         return 0;
3655 }
3656
3657 static void __exit octeon_usb_module_cleanup(void)
3658 {
3659         int i;
3660
3661         for (i = 0; i < MAX_USB_PORTS; i++)
3662                 if (pdev_glob[i]) {
3663                         platform_device_unregister(pdev_glob[i]);
3664                         pdev_glob[i] = NULL;
3665                 }
3666         if (octeon_usb_registered)
3667                 driver_unregister(&octeon_usb_driver);
3668 }
3669
3670 MODULE_LICENSE("GPL");
3671 MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>");
3672 MODULE_DESCRIPTION("Cavium Networks Octeon USB Host driver.");
3673 module_init(octeon_usb_module_init);
3674 module_exit(octeon_usb_module_cleanup);