Pileus Git - ~andy/linux/blob - drivers/staging/octeon-usb/cvmx-usb.c

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  39
  40
  41 /**
  42  * @file
  43  *
  44  * "cvmx-usb.c" defines a set of low level USB functions to help
  45  * developers create Octeon USB drivers for various operating
  46  * systems. These functions provide a generic API to the Octeon
  47  * USB blocks, hiding the internal hardware specific
  48  * operations.
  49  */
  50 #include <linux/delay.h>
  51 #include <asm/octeon/cvmx.h>
  52 #include <asm/octeon/octeon.h>
  53 #include <asm/octeon/cvmx-sysinfo.h>
  54 #include "cvmx-usbnx-defs.h"
  55 #include "cvmx-usbcx-defs.h"
  56 #include "cvmx-usb.h"
  57 #include <asm/octeon/cvmx-helper.h>
  58 #include <asm/octeon/cvmx-helper-board.h>
  59
  60 #define CVMX_PREFETCH0(address) CVMX_PREFETCH(address, 0)
  61 #define CVMX_PREFETCH128(address) CVMX_PREFETCH(address, 128)
  62 // a normal prefetch
  63 #define CVMX_PREFETCH(address, offset) CVMX_PREFETCH_PREF0(address, offset)
  64 // normal prefetches that use the pref instruction
  65 #define CVMX_PREFETCH_PREFX(X, address, offset) asm volatile ("pref %[type], %[off](%[rbase])" : : [rbase] "d" (address), [off] "I" (offset), [type] "n" (X))
  66 #define CVMX_PREFETCH_PREF0(address, offset) CVMX_PREFETCH_PREFX(0, address, offset)
  67 #define CVMX_CLZ(result, input) asm ("clz %[rd],%[rs]" : [rd] "=d" (result) : [rs] "d" (input))
  68
  69 #define MAX_RETRIES             3               /* Maximum number of times to retry failed transactions */
  70 #define MAX_PIPES               32              /* Maximum number of pipes that can be open at once */
  71 #define MAX_TRANSACTIONS        256             /* Maximum number of outstanding transactions across all pipes */
  72 #define MAX_CHANNELS            8               /* Maximum number of hardware channels supported by the USB block */
  73 #define MAX_USB_ADDRESS         127             /* The highest valid USB device address */
  74 #define MAX_USB_ENDPOINT        15              /* The highest valid USB endpoint number */
  75 #define MAX_USB_HUB_PORT        15              /* The highest valid port number on a hub */
  76 #define MAX_TRANSFER_BYTES      ((1<<19)-1)     /* The low level hardware can transfer a maximum of this number of bytes in each transfer. The field is 19 bits wide */
  77 #define MAX_TRANSFER_PACKETS    ((1<<10)-1)     /* The low level hardware can transfer a maximum of this number of packets in each transfer. The field is 10 bits wide */
  78
  79 /*
  80  * These defines disable the normal read and write csr. This is so I can add
  81  * extra debug stuff to the usb specific version and I won't use the normal
  82  * version by mistake
  83  */
  84 #define cvmx_read_csr use_cvmx_usb_read_csr64_instead_of_cvmx_read_csr
  85 #define cvmx_write_csr use_cvmx_usb_write_csr64_instead_of_cvmx_write_csr
  86
  87 typedef enum {
  88         __CVMX_USB_TRANSACTION_FLAGS_IN_USE = 1<<16,
  89 } cvmx_usb_transaction_flags_t;
  90
  91 enum {
  92         USB_CLOCK_TYPE_REF_12,
  93         USB_CLOCK_TYPE_REF_24,
  94         USB_CLOCK_TYPE_REF_48,
  95         USB_CLOCK_TYPE_CRYSTAL_12,
  96 };
  97
  98 /**
  99  * Logical transactions may take numerous low level
 100  * transactions, especially when splits are concerned. This
 101  * enum represents all of the possible stages a transaction can
 102  * be in. Note that split completes are always even. This is so
 103  * the NAK handler can backup to the previous low level
 104  * transaction with a simple clearing of bit 0.
 105  */
 106 typedef enum {
 107         CVMX_USB_STAGE_NON_CONTROL,
 108         CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE,
 109         CVMX_USB_STAGE_SETUP,
 110         CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE,
 111         CVMX_USB_STAGE_DATA,
 112         CVMX_USB_STAGE_DATA_SPLIT_COMPLETE,
 113         CVMX_USB_STAGE_STATUS,
 114         CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE,
 115 } cvmx_usb_stage_t;
 116
 117 /**
 118  * This structure describes each pending USB transaction
 119  * regardless of type. These are linked together to form a list
 120  * of pending requests for a pipe.
 121  */
 122 typedef struct cvmx_usb_transaction {
 123         struct cvmx_usb_transaction *prev;      /**< Transaction before this one in the pipe */
 124         struct cvmx_usb_transaction *next;      /**< Transaction after this one in the pipe */
 125         cvmx_usb_transfer_t type;               /**< Type of transaction, duplicated of the pipe */
 126         cvmx_usb_transaction_flags_t flags;     /**< State flags for this transaction */
 127         uint64_t buffer;                        /**< User's physical buffer address to read/write */
 128         int buffer_length;                      /**< Size of the user's buffer in bytes */
 129         uint64_t control_header;                /**< For control transactions, physical address of the 8 byte standard header */
 130         int iso_start_frame;                    /**< For ISO transactions, the starting frame number */
 131         int iso_number_packets;                 /**< For ISO transactions, the number of packets in the request */
 132         cvmx_usb_iso_packet_t *iso_packets;     /**< For ISO transactions, the sub packets in the request */
 133         int xfersize;
 134         int pktcnt;
 135         int retries;
 136         int actual_bytes;                       /**< Actual bytes transfer for this transaction */
 137         cvmx_usb_stage_t stage;                 /**< For control transactions, the current stage */
 138         cvmx_usb_callback_func_t callback;      /**< User's callback function when complete */
 139         void *callback_data;                    /**< User's data */
 140 } cvmx_usb_transaction_t;
 141
 142 /**
 143  * A pipe represents a virtual connection between Octeon and some
 144  * USB device. It contains a list of pending request to the device.
 145  */
 146 typedef struct cvmx_usb_pipe {
 147         struct cvmx_usb_pipe *prev;             /**< Pipe before this one in the list */
 148         struct cvmx_usb_pipe *next;             /**< Pipe after this one in the list */
 149         cvmx_usb_transaction_t *head;           /**< The first pending transaction */
 150         cvmx_usb_transaction_t *tail;           /**< The last pending transaction */
 151         uint64_t interval;                      /**< For periodic pipes, the interval between packets in frames */
 152         uint64_t next_tx_frame;                 /**< The next frame this pipe is allowed to transmit on */
 153         cvmx_usb_pipe_flags_t flags;            /**< State flags for this pipe */
 154         cvmx_usb_speed_t device_speed;          /**< Speed of device connected to this pipe */
 155         cvmx_usb_transfer_t transfer_type;      /**< Type of transaction supported by this pipe */
 156         cvmx_usb_direction_t transfer_dir;      /**< IN or OUT. Ignored for Control */
 157         int multi_count;                        /**< Max packet in a row for the device */
 158         uint16_t max_packet;                    /**< The device's maximum packet size in bytes */
 159         uint8_t device_addr;                    /**< USB device address at other end of pipe */
 160         uint8_t endpoint_num;                   /**< USB endpoint number at other end of pipe */
 161         uint8_t hub_device_addr;                /**< Hub address this device is connected to */
 162         uint8_t hub_port;                       /**< Hub port this device is connected to */
 163         uint8_t pid_toggle;                     /**< This toggles between 0/1 on every packet send to track the data pid needed */
 164         uint8_t channel;                        /**< Hardware DMA channel for this pipe */
 165         int8_t split_sc_frame;                  /**< The low order bits of the frame number the split complete should be sent on */
 166 } cvmx_usb_pipe_t;
 167
 168 typedef struct {
 169         cvmx_usb_pipe_t *head;  /**< Head of the list, or NULL if empty */
 170         cvmx_usb_pipe_t *tail;  /**< Tail if the list, or NULL if empty */
 171 } cvmx_usb_pipe_list_t;
 172
 173 typedef struct {
 174         struct {
 175                 int channel;
 176                 int size;
 177                 uint64_t address;
 178         } entry[MAX_CHANNELS+1];
 179         int head;
 180         int tail;
 181 } cvmx_usb_tx_fifo_t;
 182
 183 /**
 184  * The state of the USB block is stored in this structure
 185  */
 186 typedef struct {
 187         int init_flags;                                                 /**< Flags passed to initialize */
 188         int index;                                                      /**< Which USB block this is for */
 189         int idle_hardware_channels;                                     /**< Bit set for every idle hardware channel */
 190         cvmx_usbcx_hprt_t usbcx_hprt;                                   /**< Stored port status so we don't need to read a CSR to determine splits */
 191         cvmx_usb_pipe_t *pipe_for_channel[MAX_CHANNELS];                /**< Map channels to pipes */
 192         cvmx_usb_transaction_t *free_transaction_head;                  /**< List of free transactions head */
 193         cvmx_usb_transaction_t *free_transaction_tail;                  /**< List of free transactions tail */
 194         cvmx_usb_pipe_t pipe[MAX_PIPES];                                /**< Storage for pipes */
 195         cvmx_usb_transaction_t transaction[MAX_TRANSACTIONS];           /**< Storage for transactions */
 196         cvmx_usb_callback_func_t callback[__CVMX_USB_CALLBACK_END];     /**< User global callbacks */
 197         void *callback_data[__CVMX_USB_CALLBACK_END];                   /**< User data for each callback */
 198         int indent;                                                     /**< Used by debug output to indent functions */
 199         cvmx_usb_port_status_t port_status;                             /**< Last port status used for change notification */
 200         cvmx_usb_pipe_list_t free_pipes;                                /**< List of all pipes that are currently closed */
 201         cvmx_usb_pipe_list_t idle_pipes;                                /**< List of open pipes that have no transactions */
 202         cvmx_usb_pipe_list_t active_pipes[4];                           /**< Active pipes indexed by transfer type */
 203         uint64_t frame_number;                                          /**< Increments every SOF interrupt for time keeping */
 204         cvmx_usb_transaction_t *active_split;                           /**< Points to the current active split, or NULL */
 205         cvmx_usb_tx_fifo_t periodic;
 206         cvmx_usb_tx_fifo_t nonperiodic;
 207 } cvmx_usb_internal_state_t;
 208
 209 /* This macro spins on a field waiting for it to reach a value */
 210 #define CVMX_WAIT_FOR_FIELD32(address, type, field, op, value, timeout_usec)\
 211         ({int result;                                                       \
 212         do {                                                                \
 213                 uint64_t done = cvmx_get_cycle() + (uint64_t)timeout_usec * \
 214                         octeon_get_clock_rate() / 1000000;                  \
 215                 type c;                                                     \
 216                 while (1) {                                                 \
 217                         c.u32 = __cvmx_usb_read_csr32(usb, address);        \
 218                         if (c.s.field op (value)) {                         \
 219                                 result = 0;                                 \
 220                                 break;                                      \
 221                         } else if (cvmx_get_cycle() > done) {               \
 222                                 result = -1;                                \
 223                                 break;                                      \
 224                         } else                                              \
 225                                 cvmx_wait(100);                             \
 226                 }                                                           \
 227         } while (0);                                                        \
 228         result; })
 229
 230 /*
 231  * This macro logically sets a single field in a CSR. It does the sequence
 232  * read, modify, and write
 233  */
 234 #define USB_SET_FIELD32(address, type, field, value)            \
 235         do {                                                    \
 236                 type c;                                         \
 237                 c.u32 = __cvmx_usb_read_csr32(usb, address);    \
 238                 c.s.field = value;                              \
 239                 __cvmx_usb_write_csr32(usb, address, c.u32);    \
 240         } while (0)
 241
 242 /* Returns the IO address to push/pop stuff data from the FIFOs */
 243 #define USB_FIFO_ADDRESS(channel, usb_index) (CVMX_USBCX_GOTGCTL(usb_index) + ((channel)+1)*0x1000)
 244
 245 static int octeon_usb_get_clock_type(void)
 246 {
 247         switch (cvmx_sysinfo_get()->board_type) {
 248         case CVMX_BOARD_TYPE_BBGW_REF:
 249         case CVMX_BOARD_TYPE_LANAI2_A:
 250         case CVMX_BOARD_TYPE_LANAI2_U:
 251         case CVMX_BOARD_TYPE_LANAI2_G:
 252         case CVMX_BOARD_TYPE_UBNT_E100:
 253                 return USB_CLOCK_TYPE_CRYSTAL_12;
 254         }
 255         return USB_CLOCK_TYPE_REF_48;
 256 }
 257
 258 /**
 259  * Read a USB 32bit CSR. It performs the necessary address swizzle
 260  * for 32bit CSRs and logs the value in a readable format if
 261  * debugging is on.
 262  *
 263  * @usb:     USB block this access is for
 264  * @address: 64bit address to read
 265  *
 266  * Returns: Result of the read
 267  */
 268 static inline uint32_t __cvmx_usb_read_csr32(cvmx_usb_internal_state_t *usb,
 269                                              uint64_t address)
 270 {
 271         uint32_t result = cvmx_read64_uint32(address ^ 4);
 272         return result;
 273 }
 274
 275
 276 /**
 277  * Write a USB 32bit CSR. It performs the necessary address
 278  * swizzle for 32bit CSRs and logs the value in a readable format
 279  * if debugging is on.
 280  *
 281  * @usb:     USB block this access is for
 282  * @address: 64bit address to write
 283  * @value:   Value to write
 284  */
 285 static inline void __cvmx_usb_write_csr32(cvmx_usb_internal_state_t *usb,
 286                                           uint64_t address, uint32_t value)
 287 {
 288         cvmx_write64_uint32(address ^ 4, value);
 289         cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
 290 }
 291
 292
 293 /**
 294  * Read a USB 64bit CSR. It logs the value in a readable format if
 295  * debugging is on.
 296  *
 297  * @usb:     USB block this access is for
 298  * @address: 64bit address to read
 299  *
 300  * Returns: Result of the read
 301  */
 302 static inline uint64_t __cvmx_usb_read_csr64(cvmx_usb_internal_state_t *usb,
 303                                              uint64_t address)
 304 {
 305         uint64_t result = cvmx_read64_uint64(address);
 306         return result;
 307 }
 308
 309
 310 /**
 311  * Write a USB 64bit CSR. It logs the value in a readable format
 312  * if debugging is on.
 313  *
 314  * @usb:     USB block this access is for
 315  * @address: 64bit address to write
 316  * @value:   Value to write
 317  */
 318 static inline void __cvmx_usb_write_csr64(cvmx_usb_internal_state_t *usb,
 319                                           uint64_t address, uint64_t value)
 320 {
 321         cvmx_write64_uint64(address, value);
 322 }
 323
 324 /**
 325  * Return non zero if this pipe connects to a non HIGH speed
 326  * device through a high speed hub.
 327  *
 328  * @usb:    USB block this access is for
 329  * @pipe:   Pipe to check
 330  *
 331  * Returns: Non zero if we need to do split transactions
 332  */
 333 static inline int __cvmx_usb_pipe_needs_split(cvmx_usb_internal_state_t *usb, cvmx_usb_pipe_t *pipe)
 334 {
 335         return ((pipe->device_speed != CVMX_USB_SPEED_HIGH) && (usb->usbcx_hprt.s.prtspd == CVMX_USB_SPEED_HIGH));
 336 }
 337
 338
 339 /**
 340  * Trivial utility function to return the correct PID for a pipe
 341  *
 342  * @pipe:   pipe to check
 343  *
 344  * Returns: PID for pipe
 345  */
 346 static inline int __cvmx_usb_get_data_pid(cvmx_usb_pipe_t *pipe)
 347 {
 348         if (pipe->pid_toggle)
 349                 return 2; /* Data1 */
 350         else
 351                 return 0; /* Data0 */
 352 }
 353
 354
 355 /**
 356  * Return the number of USB ports supported by this Octeon
 357  * chip. If the chip doesn't support USB, or is not supported
 358  * by this API, a zero will be returned. Most Octeon chips
 359  * support one usb port, but some support two ports.
 360  * cvmx_usb_initialize() must be called on independent
 361  * cvmx_usb_state_t structures.
 362  *
 363  * Returns: Number of port, zero if usb isn't supported
 364  */
 365 int cvmx_usb_get_num_ports(void)
 366 {
 367         int arch_ports = 0;
 368
 369         if (OCTEON_IS_MODEL(OCTEON_CN56XX))
 370                 arch_ports = 1;
 371         else if (OCTEON_IS_MODEL(OCTEON_CN52XX))
 372                 arch_ports = 2;
 373         else if (OCTEON_IS_MODEL(OCTEON_CN50XX))
 374                 arch_ports = 1;
 375         else if (OCTEON_IS_MODEL(OCTEON_CN31XX))
 376                 arch_ports = 1;
 377         else if (OCTEON_IS_MODEL(OCTEON_CN30XX))
 378                 arch_ports = 1;
 379         else
 380                 arch_ports = 0;
 381
 382         return arch_ports;
 383 }
 384
 385
 386 /**
 387  * Allocate a usb transaction for use
 388  *
 389  * @usb:         USB device state populated by
 390  *               cvmx_usb_initialize().
 391  *
 392  * Returns: Transaction or NULL
 393  */
 394 static inline cvmx_usb_transaction_t *__cvmx_usb_alloc_transaction(cvmx_usb_internal_state_t *usb)
 395 {
 396         cvmx_usb_transaction_t *t;
 397         t = usb->free_transaction_head;
 398         if (t) {
 399                 usb->free_transaction_head = t->next;
 400                 if (!usb->free_transaction_head)
 401                         usb->free_transaction_tail = NULL;
 402         }
 403         if (t) {
 404                 memset(t, 0, sizeof(*t));
 405                 t->flags = __CVMX_USB_TRANSACTION_FLAGS_IN_USE;
 406         }
 407         return t;
 408 }
 409
 410
 411 /**
 412  * Free a usb transaction
 413  *
 414  * @usb:         USB device state populated by
 415  *               cvmx_usb_initialize().
 416  * @transaction:
 417  *               Transaction to free
 418  */
 419 static inline void __cvmx_usb_free_transaction(cvmx_usb_internal_state_t *usb,
 420                                                cvmx_usb_transaction_t *transaction)
 421 {
 422         transaction->flags = 0;
 423         transaction->prev = NULL;
 424         transaction->next = NULL;
 425         if (usb->free_transaction_tail)
 426                 usb->free_transaction_tail->next = transaction;
 427         else
 428                 usb->free_transaction_head = transaction;
 429         usb->free_transaction_tail = transaction;
 430 }
 431
 432
 433 /**
 434  * Add a pipe to the tail of a list
 435  * @list:   List to add pipe to
 436  * @pipe:   Pipe to add
 437  */
 438 static inline void __cvmx_usb_append_pipe(cvmx_usb_pipe_list_t *list, cvmx_usb_pipe_t *pipe)
 439 {
 440         pipe->next = NULL;
 441         pipe->prev = list->tail;
 442         if (list->tail)
 443                 list->tail->next = pipe;
 444         else
 445                 list->head = pipe;
 446         list->tail = pipe;
 447 }
 448
 449
 450 /**
 451  * Remove a pipe from a list
 452  * @list:   List to remove pipe from
 453  * @pipe:   Pipe to remove
 454  */
 455 static inline void __cvmx_usb_remove_pipe(cvmx_usb_pipe_list_t *list, cvmx_usb_pipe_t *pipe)
 456 {
 457         if (list->head == pipe) {
 458                 list->head = pipe->next;
 459                 pipe->next = NULL;
 460                 if (list->head)
 461                         list->head->prev = NULL;
 462                 else
 463                         list->tail = NULL;
 464         } else if (list->tail == pipe) {
 465                 list->tail = pipe->prev;
 466                 list->tail->next = NULL;
 467                 pipe->prev = NULL;
 468         } else {
 469                 pipe->prev->next = pipe->next;
 470                 pipe->next->prev = pipe->prev;
 471                 pipe->prev = NULL;
 472                 pipe->next = NULL;
 473         }
 474 }
 475
 476
 477 /**
 478  * Initialize a USB port for use. This must be called before any
 479  * other access to the Octeon USB port is made. The port starts
 480  * off in the disabled state.
 481  *
 482  * @state:       Pointer to an empty cvmx_usb_state_t structure
 483  *               that will be populated by the initialize call.
 484  *               This structure is then passed to all other USB
 485  *               functions.
 486  * @usb_port_number:
 487  *               Which Octeon USB port to initialize.
 488  * @flags:       Flags to control hardware initialization. See
 489  *               cvmx_usb_initialize_flags_t for the flag
 490  *               definitions. Some flags are mandatory.
 491  *
 492  * Returns: 0 or a negative error code.
 493  */
 494 int cvmx_usb_initialize(cvmx_usb_state_t *state, int usb_port_number,
 495                         cvmx_usb_initialize_flags_t flags)
 496 {
 497         cvmx_usbnx_clk_ctl_t usbn_clk_ctl;
 498         cvmx_usbnx_usbp_ctl_status_t usbn_usbp_ctl_status;
 499         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
 500
 501         usb->init_flags = flags;
 502
 503         /* Make sure that state is large enough to store the internal state */
 504         if (sizeof(*state) < sizeof(*usb))
 505                 return -EINVAL;
 506         /* At first allow 0-1 for the usb port number */
 507         if ((usb_port_number < 0) || (usb_port_number > 1))
 508                 return -EINVAL;
 509         /* For all chips except 52XX there is only one port */
 510         if (!OCTEON_IS_MODEL(OCTEON_CN52XX) && (usb_port_number > 0))
 511                 return -EINVAL;
 512         /* Try to determine clock type automatically */
 513         if ((flags & (CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI |
 514                       CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND)) == 0) {
 515                 if (octeon_usb_get_clock_type() == USB_CLOCK_TYPE_CRYSTAL_12)
 516                         flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI;  /* Only 12 MHZ crystals are supported */
 517                 else
 518                         flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND;
 519         }
 520
 521         if (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND) {
 522                 /* Check for auto ref clock frequency */
 523                 if (!(flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK))
 524                         switch (octeon_usb_get_clock_type()) {
 525                         case USB_CLOCK_TYPE_REF_12:
 526                                 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ;
 527                                 break;
 528                         case USB_CLOCK_TYPE_REF_24:
 529                                 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ;
 530                                 break;
 531                         case USB_CLOCK_TYPE_REF_48:
 532                                 flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ;
 533                                 break;
 534                         default:
 535                                 return -EINVAL;
 536                                 break;
 537                         }
 538         }
 539
 540         memset(usb, 0, sizeof(usb));
 541         usb->init_flags = flags;
 542
 543         /* Initialize the USB state structure */
 544         {
 545                 int i;
 546                 usb->index = usb_port_number;
 547
 548                 /* Initialize the transaction double linked list */
 549                 usb->free_transaction_head = NULL;
 550                 usb->free_transaction_tail = NULL;
 551                 for (i = 0; i < MAX_TRANSACTIONS; i++)
 552                         __cvmx_usb_free_transaction(usb, usb->transaction + i);
 553                 for (i = 0; i < MAX_PIPES; i++)
 554                         __cvmx_usb_append_pipe(&usb->free_pipes, usb->pipe + i);
 555         }
 556
 557         /*
 558          * Power On Reset and PHY Initialization
 559          *
 560          * 1. Wait for DCOK to assert (nothing to do)
 561          *
 562          * 2a. Write USBN0/1_CLK_CTL[POR] = 1 and
 563          *     USBN0/1_CLK_CTL[HRST,PRST,HCLK_RST] = 0
 564          */
 565         usbn_clk_ctl.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index));
 566         usbn_clk_ctl.s.por = 1;
 567         usbn_clk_ctl.s.hrst = 0;
 568         usbn_clk_ctl.s.prst = 0;
 569         usbn_clk_ctl.s.hclk_rst = 0;
 570         usbn_clk_ctl.s.enable = 0;
 571         /*
 572          * 2b. Select the USB reference clock/crystal parameters by writing
 573          *     appropriate values to USBN0/1_CLK_CTL[P_C_SEL, P_RTYPE, P_COM_ON]
 574          */
 575         if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND) {
 576                 /*
 577                  * The USB port uses 12/24/48MHz 2.5V board clock
 578                  * source at USB_XO. USB_XI should be tied to GND.
 579                  * Most Octeon evaluation boards require this setting
 580                  */
 581                 if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
 582                         usbn_clk_ctl.cn31xx.p_rclk  = 1; /* From CN31XX,CN30XX manual */
 583                         usbn_clk_ctl.cn31xx.p_xenbn = 0;
 584                 } else if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN50XX))
 585                         usbn_clk_ctl.cn56xx.p_rtype = 2; /* From CN56XX,CN50XX manual */
 586                 else
 587                         usbn_clk_ctl.cn52xx.p_rtype = 1; /* From CN52XX manual */
 588
 589                 switch (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK) {
 590                 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ:
 591                         usbn_clk_ctl.s.p_c_sel = 0;
 592                         break;
 593                 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ:
 594                         usbn_clk_ctl.s.p_c_sel = 1;
 595                         break;
 596                 case CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ:
 597                         usbn_clk_ctl.s.p_c_sel = 2;
 598                         break;
 599                 }
 600         } else {
 601                 /*
 602                  * The USB port uses a 12MHz crystal as clock source
 603                  * at USB_XO and USB_XI
 604                  */
 605                 if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
 606                         usbn_clk_ctl.cn31xx.p_rclk  = 1; /* From CN31XX,CN30XX manual */
 607                         usbn_clk_ctl.cn31xx.p_xenbn = 1;
 608                 } else if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN50XX))
 609                         usbn_clk_ctl.cn56xx.p_rtype = 0; /* From CN56XX,CN50XX manual */
 610                 else
 611                         usbn_clk_ctl.cn52xx.p_rtype = 0; /* From CN52XX manual */
 612
 613                 usbn_clk_ctl.s.p_c_sel = 0;
 614         }
 615         /*
 616          * 2c. Select the HCLK via writing USBN0/1_CLK_CTL[DIVIDE, DIVIDE2] and
 617          *     setting USBN0/1_CLK_CTL[ENABLE] = 1. Divide the core clock down
 618          *     such that USB is as close as possible to 125Mhz
 619          */
 620         {
 621                 int divisor = (octeon_get_clock_rate()+125000000-1)/125000000;
 622                 if (divisor < 4)  /* Lower than 4 doesn't seem to work properly */
 623                         divisor = 4;
 624                 usbn_clk_ctl.s.divide = divisor;
 625                 usbn_clk_ctl.s.divide2 = 0;
 626         }
 627         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
 628                                usbn_clk_ctl.u64);
 629         /* 2d. Write USBN0/1_CLK_CTL[HCLK_RST] = 1 */
 630         usbn_clk_ctl.s.hclk_rst = 1;
 631         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
 632                                usbn_clk_ctl.u64);
 633         /* 2e.  Wait 64 core-clock cycles for HCLK to stabilize */
 634         cvmx_wait(64);
 635         /*
 636          * 3. Program the power-on reset field in the USBN clock-control
 637          *    register:
 638          *    USBN_CLK_CTL[POR] = 0
 639          */
 640         usbn_clk_ctl.s.por = 0;
 641         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
 642                                usbn_clk_ctl.u64);
 643         /* 4. Wait 1 ms for PHY clock to start */
 644         mdelay(1);
 645         /*
 646          * 5. Program the Reset input from automatic test equipment field in the
 647          *    USBP control and status register:
 648          *    USBN_USBP_CTL_STATUS[ATE_RESET] = 1
 649          */
 650         usbn_usbp_ctl_status.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index));
 651         usbn_usbp_ctl_status.s.ate_reset = 1;
 652         __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
 653                                usbn_usbp_ctl_status.u64);
 654         /* 6. Wait 10 cycles */
 655         cvmx_wait(10);
 656         /*
 657          * 7. Clear ATE_RESET field in the USBN clock-control register:
 658          *    USBN_USBP_CTL_STATUS[ATE_RESET] = 0
 659          */
 660         usbn_usbp_ctl_status.s.ate_reset = 0;
 661         __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
 662                                usbn_usbp_ctl_status.u64);
 663         /*
 664          * 8. Program the PHY reset field in the USBN clock-control register:
 665          *    USBN_CLK_CTL[PRST] = 1
 666          */
 667         usbn_clk_ctl.s.prst = 1;
 668         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
 669                                usbn_clk_ctl.u64);
 670         /*
 671          * 9. Program the USBP control and status register to select host or
 672          *    device mode. USBN_USBP_CTL_STATUS[HST_MODE] = 0 for host, = 1 for
 673          *    device
 674          */
 675         usbn_usbp_ctl_status.s.hst_mode = 0;
 676         __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
 677                                usbn_usbp_ctl_status.u64);
 678         /* 10. Wait 1 us */
 679         udelay(1);
 680         /*
 681          * 11. Program the hreset_n field in the USBN clock-control register:
 682          *     USBN_CLK_CTL[HRST] = 1
 683          */
 684         usbn_clk_ctl.s.hrst = 1;
 685         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
 686                                usbn_clk_ctl.u64);
 687         /* 12. Proceed to USB core initialization */
 688         usbn_clk_ctl.s.enable = 1;
 689         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
 690                                usbn_clk_ctl.u64);
 691         udelay(1);
 692
 693         /*
 694          * USB Core Initialization
 695          *
 696          * 1. Read USBC_GHWCFG1, USBC_GHWCFG2, USBC_GHWCFG3, USBC_GHWCFG4 to
 697          *    determine USB core configuration parameters.
 698          *
 699          *    Nothing needed
 700          *
 701          * 2. Program the following fields in the global AHB configuration
 702          *    register (USBC_GAHBCFG)
 703          *    DMA mode, USBC_GAHBCFG[DMAEn]: 1 = DMA mode, 0 = slave mode
 704          *    Burst length, USBC_GAHBCFG[HBSTLEN] = 0
 705          *    Nonperiodic TxFIFO empty level (slave mode only),
 706          *    USBC_GAHBCFG[NPTXFEMPLVL]
 707          *    Periodic TxFIFO empty level (slave mode only),
 708          *    USBC_GAHBCFG[PTXFEMPLVL]
 709          *    Global interrupt mask, USBC_GAHBCFG[GLBLINTRMSK] = 1
 710          */
 711         {
 712                 cvmx_usbcx_gahbcfg_t usbcx_gahbcfg;
 713                 /* Due to an errata, CN31XX doesn't support DMA */
 714                 if (OCTEON_IS_MODEL(OCTEON_CN31XX))
 715                         usb->init_flags |= CVMX_USB_INITIALIZE_FLAGS_NO_DMA;
 716                 usbcx_gahbcfg.u32 = 0;
 717                 usbcx_gahbcfg.s.dmaen = !(usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA);
 718                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
 719                         usb->idle_hardware_channels = 0x1;  /* Only use one channel with non DMA */
 720                 else if (OCTEON_IS_MODEL(OCTEON_CN5XXX))
 721                         usb->idle_hardware_channels = 0xf7; /* CN5XXX have an errata with channel 3 */
 722                 else
 723                         usb->idle_hardware_channels = 0xff;
 724                 usbcx_gahbcfg.s.hbstlen = 0;
 725                 usbcx_gahbcfg.s.nptxfemplvl = 1;
 726                 usbcx_gahbcfg.s.ptxfemplvl = 1;
 727                 usbcx_gahbcfg.s.glblintrmsk = 1;
 728                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GAHBCFG(usb->index),
 729                                        usbcx_gahbcfg.u32);
 730         }
 731         /*
 732          * 3. Program the following fields in USBC_GUSBCFG register.
 733          *    HS/FS timeout calibration, USBC_GUSBCFG[TOUTCAL] = 0
 734          *    ULPI DDR select, USBC_GUSBCFG[DDRSEL] = 0
 735          *    USB turnaround time, USBC_GUSBCFG[USBTRDTIM] = 0x5
 736          *    PHY low-power clock select, USBC_GUSBCFG[PHYLPWRCLKSEL] = 0
 737          */
 738         {
 739                 cvmx_usbcx_gusbcfg_t usbcx_gusbcfg;
 740                 usbcx_gusbcfg.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index));
 741                 usbcx_gusbcfg.s.toutcal = 0;
 742                 usbcx_gusbcfg.s.ddrsel = 0;
 743                 usbcx_gusbcfg.s.usbtrdtim = 0x5;
 744                 usbcx_gusbcfg.s.phylpwrclksel = 0;
 745                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index),
 746                                        usbcx_gusbcfg.u32);
 747         }
 748         /*
 749          * 4. The software must unmask the following bits in the USBC_GINTMSK
 750          *    register.
 751          *    OTG interrupt mask, USBC_GINTMSK[OTGINTMSK] = 1
 752          *    Mode mismatch interrupt mask, USBC_GINTMSK[MODEMISMSK] = 1
 753          */
 754         {
 755                 cvmx_usbcx_gintmsk_t usbcx_gintmsk;
 756                 int channel;
 757
 758                 usbcx_gintmsk.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GINTMSK(usb->index));
 759                 usbcx_gintmsk.s.otgintmsk = 1;
 760                 usbcx_gintmsk.s.modemismsk = 1;
 761                 usbcx_gintmsk.s.hchintmsk = 1;
 762                 usbcx_gintmsk.s.sofmsk = 0;
 763                 /* We need RX FIFO interrupts if we don't have DMA */
 764                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
 765                         usbcx_gintmsk.s.rxflvlmsk = 1;
 766                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index),
 767                                        usbcx_gintmsk.u32);
 768
 769                 /* Disable all channel interrupts. We'll enable them per channel later */
 770                 for (channel = 0; channel < 8; channel++)
 771                         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
 772         }
 773
 774         {
 775                 /*
 776                  * Host Port Initialization
 777                  *
 778                  * 1. Program the host-port interrupt-mask field to unmask,
 779                  *    USBC_GINTMSK[PRTINT] = 1
 780                  */
 781                 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), cvmx_usbcx_gintmsk_t,
 782                                 prtintmsk, 1);
 783                 USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), cvmx_usbcx_gintmsk_t,
 784                                 disconnintmsk, 1);
 785                 /*
 786                  * 2. Program the USBC_HCFG register to select full-speed host
 787                  *    or high-speed host.
 788                  */
 789                 {
 790                         cvmx_usbcx_hcfg_t usbcx_hcfg;
 791                         usbcx_hcfg.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCFG(usb->index));
 792                         usbcx_hcfg.s.fslssupp = 0;
 793                         usbcx_hcfg.s.fslspclksel = 0;
 794                         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCFG(usb->index), usbcx_hcfg.u32);
 795                 }
 796                 /*
 797                  * 3. Program the port power bit to drive VBUS on the USB,
 798                  *    USBC_HPRT[PRTPWR] = 1
 799                  */
 800                 USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt_t, prtpwr, 1);
 801
 802                 /*
 803                  * Steps 4-15 from the manual are done later in the port enable
 804                  */
 805         }
 806
 807         return 0;
 808 }
 809
 810
 811 /**
 812  * Shutdown a USB port after a call to cvmx_usb_initialize().
 813  * The port should be disabled with all pipes closed when this
 814  * function is called.
 815  *
 816  * @state: USB device state populated by
 817  *         cvmx_usb_initialize().
 818  *
 819  * Returns: 0 or a negative error code.
 820  */
 821 int cvmx_usb_shutdown(cvmx_usb_state_t *state)
 822 {
 823         cvmx_usbnx_clk_ctl_t usbn_clk_ctl;
 824         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
 825
 826         /* Make sure all pipes are closed */
 827         if (usb->idle_pipes.head ||
 828                 usb->active_pipes[CVMX_USB_TRANSFER_ISOCHRONOUS].head ||
 829                 usb->active_pipes[CVMX_USB_TRANSFER_INTERRUPT].head ||
 830                 usb->active_pipes[CVMX_USB_TRANSFER_CONTROL].head ||
 831                 usb->active_pipes[CVMX_USB_TRANSFER_BULK].head)
 832                 return -EBUSY;
 833
 834         /* Disable the clocks and put them in power on reset */
 835         usbn_clk_ctl.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index));
 836         usbn_clk_ctl.s.enable = 1;
 837         usbn_clk_ctl.s.por = 1;
 838         usbn_clk_ctl.s.hclk_rst = 1;
 839         usbn_clk_ctl.s.prst = 0;
 840         usbn_clk_ctl.s.hrst = 0;
 841         __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
 842                                usbn_clk_ctl.u64);
 843         return 0;
 844 }
 845
 846
 847 /**
 848  * Enable a USB port. After this call succeeds, the USB port is
 849  * online and servicing requests.
 850  *
 851  * @state: USB device state populated by
 852  *         cvmx_usb_initialize().
 853  *
 854  * Returns: 0 or a negative error code.
 855  */
 856 int cvmx_usb_enable(cvmx_usb_state_t *state)
 857 {
 858         cvmx_usbcx_ghwcfg3_t usbcx_ghwcfg3;
 859         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
 860
 861         usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
 862
 863         /*
 864          * If the port is already enabled the just return. We don't need to do
 865          * anything
 866          */
 867         if (usb->usbcx_hprt.s.prtena)
 868                 return 0;
 869
 870         /* If there is nothing plugged into the port then fail immediately */
 871         if (!usb->usbcx_hprt.s.prtconnsts) {
 872                 return -ETIMEDOUT;
 873         }
 874
 875         /* Program the port reset bit to start the reset process */
 876         USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt_t, prtrst, 1);
 877
 878         /*
 879          * Wait at least 50ms (high speed), or 10ms (full speed) for the reset
 880          * process to complete.
 881          */
 882         mdelay(50);
 883
 884         /* Program the port reset bit to 0, USBC_HPRT[PRTRST] = 0 */
 885         USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt_t, prtrst, 0);
 886
 887         /* Wait for the USBC_HPRT[PRTENA]. */
 888         if (CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt_t,
 889                                   prtena, ==, 1, 100000))
 890                 return -ETIMEDOUT;
 891
 892         /* Read the port speed field to get the enumerated speed, USBC_HPRT[PRTSPD]. */
 893         usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
 894         usbcx_ghwcfg3.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GHWCFG3(usb->index));
 895
 896         /*
 897          * 13. Program the USBC_GRXFSIZ register to select the size of the
 898          *     receive FIFO (25%).
 899          */
 900         USB_SET_FIELD32(CVMX_USBCX_GRXFSIZ(usb->index), cvmx_usbcx_grxfsiz_t,
 901                         rxfdep, usbcx_ghwcfg3.s.dfifodepth / 4);
 902         /*
 903          * 14. Program the USBC_GNPTXFSIZ register to select the size and the
 904          *     start address of the non- periodic transmit FIFO for nonperiodic
 905          *     transactions (50%).
 906          */
 907         {
 908                 cvmx_usbcx_gnptxfsiz_t siz;
 909                 siz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index));
 910                 siz.s.nptxfdep = usbcx_ghwcfg3.s.dfifodepth / 2;
 911                 siz.s.nptxfstaddr = usbcx_ghwcfg3.s.dfifodepth / 4;
 912                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index), siz.u32);
 913         }
 914         /*
 915          * 15. Program the USBC_HPTXFSIZ register to select the size and start
 916          *     address of the periodic transmit FIFO for periodic transactions
 917          *     (25%).
 918          */
 919         {
 920                 cvmx_usbcx_hptxfsiz_t siz;
 921                 siz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index));
 922                 siz.s.ptxfsize = usbcx_ghwcfg3.s.dfifodepth / 4;
 923                 siz.s.ptxfstaddr = 3 * usbcx_ghwcfg3.s.dfifodepth / 4;
 924                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index), siz.u32);
 925         }
 926         /* Flush all FIFOs */
 927         USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), cvmx_usbcx_grstctl_t, txfnum, 0x10);
 928         USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), cvmx_usbcx_grstctl_t, txfflsh, 1);
 929         CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), cvmx_usbcx_grstctl_t,
 930                               txfflsh, ==, 0, 100);
 931         USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), cvmx_usbcx_grstctl_t, rxfflsh, 1);
 932         CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), cvmx_usbcx_grstctl_t,
 933                               rxfflsh, ==, 0, 100);
 934
 935         return 0;
 936 }
 937
 938
 939 /**
 940  * Disable a USB port. After this call the USB port will not
 941  * generate data transfers and will not generate events.
 942  * Transactions in process will fail and call their
 943  * associated callbacks.
 944  *
 945  * @state: USB device state populated by
 946  *         cvmx_usb_initialize().
 947  *
 948  * Returns: 0 or a negative error code.
 949  */
 950 int cvmx_usb_disable(cvmx_usb_state_t *state)
 951 {
 952         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
 953
 954         /* Disable the port */
 955         USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt_t, prtena, 1);
 956         return 0;
 957 }
 958
 959
 960 /**
 961  * Get the current state of the USB port. Use this call to
 962  * determine if the usb port has anything connected, is enabled,
 963  * or has some sort of error condition. The return value of this
 964  * call has "changed" bits to signal of the value of some fields
 965  * have changed between calls. These "changed" fields are based
 966  * on the last call to cvmx_usb_set_status(). In order to clear
 967  * them, you must update the status through cvmx_usb_set_status().
 968  *
 969  * @state: USB device state populated by
 970  *         cvmx_usb_initialize().
 971  *
 972  * Returns: Port status information
 973  */
 974 cvmx_usb_port_status_t cvmx_usb_get_status(cvmx_usb_state_t *state)
 975 {
 976         cvmx_usbcx_hprt_t usbc_hprt;
 977         cvmx_usb_port_status_t result;
 978         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
 979
 980         memset(&result, 0, sizeof(result));
 981
 982         usbc_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
 983         result.port_enabled = usbc_hprt.s.prtena;
 984         result.port_over_current = usbc_hprt.s.prtovrcurract;
 985         result.port_powered = usbc_hprt.s.prtpwr;
 986         result.port_speed = usbc_hprt.s.prtspd;
 987         result.connected = usbc_hprt.s.prtconnsts;
 988         result.connect_change = (result.connected != usb->port_status.connected);
 989
 990         return result;
 991 }
 992
 993
 994 /**
 995  * Set the current state of the USB port. The status is used as
 996  * a reference for the "changed" bits returned by
 997  * cvmx_usb_get_status(). Other than serving as a reference, the
 998  * status passed to this function is not used. No fields can be
 999  * changed through this call.
1000  *
1001  * @state:       USB device state populated by
1002  *               cvmx_usb_initialize().
1003  * @port_status:
1004  *               Port status to set, most like returned by cvmx_usb_get_status()
1005  */
1006 void cvmx_usb_set_status(cvmx_usb_state_t *state, cvmx_usb_port_status_t port_status)
1007 {
1008         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
1009         usb->port_status = port_status;
1010         return;
1011 }
1012
1013
1014 /**
1015  * Convert a USB transaction into a handle
1016  *
1017  * @usb:         USB device state populated by
1018  *               cvmx_usb_initialize().
1019  * @transaction:
1020  *               Transaction to get handle for
1021  *
1022  * Returns: Handle
1023  */
1024 static inline int __cvmx_usb_get_submit_handle(cvmx_usb_internal_state_t *usb,
1025                                                cvmx_usb_transaction_t *transaction)
1026 {
1027         return ((unsigned long)transaction - (unsigned long)usb->transaction) /
1028                         sizeof(*transaction);
1029 }
1030
1031
1032 /**
1033  * Convert a USB pipe into a handle
1034  *
1035  * @usb:         USB device state populated by
1036  *               cvmx_usb_initialize().
1037  * @pipe:        Pipe to get handle for
1038  *
1039  * Returns: Handle
1040  */
1041 static inline int __cvmx_usb_get_pipe_handle(cvmx_usb_internal_state_t *usb,
1042                                              cvmx_usb_pipe_t *pipe)
1043 {
1044         return ((unsigned long)pipe - (unsigned long)usb->pipe) / sizeof(*pipe);
1045 }
1046
1047
1048 /**
1049  * Open a virtual pipe between the host and a USB device. A pipe
1050  * must be opened before data can be transferred between a device
1051  * and Octeon.
1052  *
1053  * @state:           USB device state populated by
1054  *                   cvmx_usb_initialize().
1055  * @flags:           Optional pipe flags defined in
1056  *                   cvmx_usb_pipe_flags_t.
1057  * @device_addr:
1058  *                   USB device address to open the pipe to
1059  *                   (0-127).
1060  * @endpoint_num:
1061  *                   USB endpoint number to open the pipe to
1062  *                   (0-15).
1063  * @device_speed:
1064  *                   The speed of the device the pipe is going
1065  *                   to. This must match the device's speed,
1066  *                   which may be different than the port speed.
1067  * @max_packet:      The maximum packet length the device can
1068  *                   transmit/receive (low speed=0-8, full
1069  *                   speed=0-1023, high speed=0-1024). This value
1070  *                   comes from the standard endpoint descriptor
1071  *                   field wMaxPacketSize bits <10:0>.
1072  * @transfer_type:
1073  *                   The type of transfer this pipe is for.
1074  * @transfer_dir:
1075  *                   The direction the pipe is in. This is not
1076  *                   used for control pipes.
1077  * @interval:        For ISOCHRONOUS and INTERRUPT transfers,
1078  *                   this is how often the transfer is scheduled
1079  *                   for. All other transfers should specify
1080  *                   zero. The units are in frames (8000/sec at
1081  *                   high speed, 1000/sec for full speed).
1082  * @multi_count:
1083  *                   For high speed devices, this is the maximum
1084  *                   allowed number of packet per microframe.
1085  *                   Specify zero for non high speed devices. This
1086  *                   value comes from the standard endpoint descriptor
1087  *                   field wMaxPacketSize bits <12:11>.
1088  * @hub_device_addr:
1089  *                   Hub device address this device is connected
1090  *                   to. Devices connected directly to Octeon
1091  *                   use zero. This is only used when the device
1092  *                   is full/low speed behind a high speed hub.
1093  *                   The address will be of the high speed hub,
1094  *                   not and full speed hubs after it.
1095  * @hub_port:        Which port on the hub the device is
1096  *                   connected. Use zero for devices connected
1097  *                   directly to Octeon. Like hub_device_addr,
1098  *                   this is only used for full/low speed
1099  *                   devices behind a high speed hub.
1100  *
1101  * Returns: A non negative value is a pipe handle. Negative
1102  *          values are error codes.
1103  */
1104 int cvmx_usb_open_pipe(cvmx_usb_state_t *state, cvmx_usb_pipe_flags_t flags,
1105                        int device_addr, int endpoint_num,
1106                        cvmx_usb_speed_t device_speed, int max_packet,
1107                        cvmx_usb_transfer_t transfer_type,
1108                        cvmx_usb_direction_t transfer_dir, int interval,
1109                        int multi_count, int hub_device_addr, int hub_port)
1110 {
1111         cvmx_usb_pipe_t *pipe;
1112         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
1113
1114         if (unlikely((device_addr < 0) || (device_addr > MAX_USB_ADDRESS)))
1115                 return -EINVAL;
1116         if (unlikely((endpoint_num < 0) || (endpoint_num > MAX_USB_ENDPOINT)))
1117                 return -EINVAL;
1118         if (unlikely(device_speed > CVMX_USB_SPEED_LOW))
1119                 return -EINVAL;
1120         if (unlikely((max_packet <= 0) || (max_packet > 1024)))
1121                 return -EINVAL;
1122         if (unlikely(transfer_type > CVMX_USB_TRANSFER_INTERRUPT))
1123                 return -EINVAL;
1124         if (unlikely((transfer_dir != CVMX_USB_DIRECTION_OUT) &&
1125                 (transfer_dir != CVMX_USB_DIRECTION_IN)))
1126                 return -EINVAL;
1127         if (unlikely(interval < 0))
1128                 return -EINVAL;
1129         if (unlikely((transfer_type == CVMX_USB_TRANSFER_CONTROL) && interval))
1130                 return -EINVAL;
1131         if (unlikely(multi_count < 0))
1132                 return -EINVAL;
1133         if (unlikely((device_speed != CVMX_USB_SPEED_HIGH) &&
1134                 (multi_count != 0)))
1135                 return -EINVAL;
1136         if (unlikely((hub_device_addr < 0) || (hub_device_addr > MAX_USB_ADDRESS)))
1137                 return -EINVAL;
1138         if (unlikely((hub_port < 0) || (hub_port > MAX_USB_HUB_PORT)))
1139                 return -EINVAL;
1140
1141         /* Find a free pipe */
1142         pipe = usb->free_pipes.head;
1143         if (!pipe)
1144                 return -ENOMEM;
1145         __cvmx_usb_remove_pipe(&usb->free_pipes, pipe);
1146         pipe->flags = flags | __CVMX_USB_PIPE_FLAGS_OPEN;
1147         if ((device_speed == CVMX_USB_SPEED_HIGH) &&
1148                 (transfer_dir == CVMX_USB_DIRECTION_OUT) &&
1149                 (transfer_type == CVMX_USB_TRANSFER_BULK))
1150                 pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
1151         pipe->device_addr = device_addr;
1152         pipe->endpoint_num = endpoint_num;
1153         pipe->device_speed = device_speed;
1154         pipe->max_packet = max_packet;
1155         pipe->transfer_type = transfer_type;
1156         pipe->transfer_dir = transfer_dir;
1157         /*
1158          * All pipes use interval to rate limit NAK processing. Force an
1159          * interval if one wasn't supplied
1160          */
1161         if (!interval)
1162                 interval = 1;
1163         if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1164                 pipe->interval = interval*8;
1165                 /* Force start splits to be schedule on uFrame 0 */
1166                 pipe->next_tx_frame = ((usb->frame_number+7)&~7) + pipe->interval;
1167         } else {
1168                 pipe->interval = interval;
1169                 pipe->next_tx_frame = usb->frame_number + pipe->interval;
1170         }
1171         pipe->multi_count = multi_count;
1172         pipe->hub_device_addr = hub_device_addr;
1173         pipe->hub_port = hub_port;
1174         pipe->pid_toggle = 0;
1175         pipe->split_sc_frame = -1;
1176         __cvmx_usb_append_pipe(&usb->idle_pipes, pipe);
1177
1178         /*
1179          * We don't need to tell the hardware about this pipe yet since
1180          * it doesn't have any submitted requests
1181          */
1182
1183         return __cvmx_usb_get_pipe_handle(usb, pipe);
1184 }
1185
1186
1187 /**
1188  * Poll the RX FIFOs and remove data as needed. This function is only used
1189  * in non DMA mode. It is very important that this function be called quickly
1190  * enough to prevent FIFO overflow.
1191  *
1192  * @usb:        USB device state populated by
1193  *              cvmx_usb_initialize().
1194  */
1195 static void __cvmx_usb_poll_rx_fifo(cvmx_usb_internal_state_t *usb)
1196 {
1197         cvmx_usbcx_grxstsph_t rx_status;
1198         int channel;
1199         int bytes;
1200         uint64_t address;
1201         uint32_t *ptr;
1202
1203         rx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GRXSTSPH(usb->index));
1204         /* Only read data if IN data is there */
1205         if (rx_status.s.pktsts != 2)
1206                 return;
1207         /* Check if no data is available */
1208         if (!rx_status.s.bcnt)
1209                 return;
1210
1211         channel = rx_status.s.chnum;
1212         bytes = rx_status.s.bcnt;
1213         if (!bytes)
1214                 return;
1215
1216         /* Get where the DMA engine would have written this data */
1217         address = __cvmx_usb_read_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8);
1218         ptr = cvmx_phys_to_ptr(address);
1219         __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, address + bytes);
1220
1221         /* Loop writing the FIFO data for this packet into memory */
1222         while (bytes > 0) {
1223                 *ptr++ = __cvmx_usb_read_csr32(usb, USB_FIFO_ADDRESS(channel, usb->index));
1224                 bytes -= 4;
1225         }
1226         CVMX_SYNCW;
1227
1228         return;
1229 }
1230
1231
1232 /**
1233  * Fill the TX hardware fifo with data out of the software
1234  * fifos
1235  *
1236  * @usb:            USB device state populated by
1237  *                  cvmx_usb_initialize().
1238  * @fifo:           Software fifo to use
1239  * @available:      Amount of space in the hardware fifo
1240  *
1241  * Returns: Non zero if the hardware fifo was too small and needs
1242  *          to be serviced again.
1243  */
1244 static int __cvmx_usb_fill_tx_hw(cvmx_usb_internal_state_t *usb, cvmx_usb_tx_fifo_t *fifo, int available)
1245 {
1246         /*
1247          * We're done either when there isn't anymore space or the software FIFO
1248          * is empty
1249          */
1250         while (available && (fifo->head != fifo->tail)) {
1251                 int i = fifo->tail;
1252                 const uint32_t *ptr = cvmx_phys_to_ptr(fifo->entry[i].address);
1253                 uint64_t csr_address = USB_FIFO_ADDRESS(fifo->entry[i].channel, usb->index) ^ 4;
1254                 int words = available;
1255
1256                 /* Limit the amount of data to waht the SW fifo has */
1257                 if (fifo->entry[i].size <= available) {
1258                         words = fifo->entry[i].size;
1259                         fifo->tail++;
1260                         if (fifo->tail > MAX_CHANNELS)
1261                                 fifo->tail = 0;
1262                 }
1263
1264                 /* Update the next locations and counts */
1265                 available -= words;
1266                 fifo->entry[i].address += words * 4;
1267                 fifo->entry[i].size -= words;
1268
1269                 /*
1270                  * Write the HW fifo data. The read every three writes is due
1271                  * to an errata on CN3XXX chips
1272                  */
1273                 while (words > 3) {
1274                         cvmx_write64_uint32(csr_address, *ptr++);
1275                         cvmx_write64_uint32(csr_address, *ptr++);
1276                         cvmx_write64_uint32(csr_address, *ptr++);
1277                         cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
1278                         words -= 3;
1279                 }
1280                 cvmx_write64_uint32(csr_address, *ptr++);
1281                 if (--words) {
1282                         cvmx_write64_uint32(csr_address, *ptr++);
1283                         if (--words)
1284                                 cvmx_write64_uint32(csr_address, *ptr++);
1285                 }
1286                 cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
1287         }
1288         return fifo->head != fifo->tail;
1289 }
1290
1291
1292 /**
1293  * Check the hardware FIFOs and fill them as needed
1294  *
1295  * @usb:        USB device state populated by
1296  *              cvmx_usb_initialize().
1297  */
1298 static void __cvmx_usb_poll_tx_fifo(cvmx_usb_internal_state_t *usb)
1299 {
1300         if (usb->periodic.head != usb->periodic.tail) {
1301                 cvmx_usbcx_hptxsts_t tx_status;
1302                 tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXSTS(usb->index));
1303                 if (__cvmx_usb_fill_tx_hw(usb, &usb->periodic, tx_status.s.ptxfspcavail))
1304                         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), cvmx_usbcx_gintmsk_t, ptxfempmsk, 1);
1305                 else
1306                         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), cvmx_usbcx_gintmsk_t, ptxfempmsk, 0);
1307         }
1308
1309         if (usb->nonperiodic.head != usb->nonperiodic.tail) {
1310                 cvmx_usbcx_gnptxsts_t tx_status;
1311                 tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXSTS(usb->index));
1312                 if (__cvmx_usb_fill_tx_hw(usb, &usb->nonperiodic, tx_status.s.nptxfspcavail))
1313                         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), cvmx_usbcx_gintmsk_t, nptxfempmsk, 1);
1314                 else
1315                         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), cvmx_usbcx_gintmsk_t, nptxfempmsk, 0);
1316         }
1317
1318         return;
1319 }
1320
1321
1322 /**
1323  * Fill the TX FIFO with an outgoing packet
1324  *
1325  * @usb:          USB device state populated by
1326  *                cvmx_usb_initialize().
1327  * @channel:      Channel number to get packet from
1328  */
1329 static void __cvmx_usb_fill_tx_fifo(cvmx_usb_internal_state_t *usb, int channel)
1330 {
1331         cvmx_usbcx_hccharx_t hcchar;
1332         cvmx_usbcx_hcspltx_t usbc_hcsplt;
1333         cvmx_usbcx_hctsizx_t usbc_hctsiz;
1334         cvmx_usb_tx_fifo_t *fifo;
1335
1336         /* We only need to fill data on outbound channels */
1337         hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index));
1338         if (hcchar.s.epdir != CVMX_USB_DIRECTION_OUT)
1339                 return;
1340
1341         /* OUT Splits only have data on the start and not the complete */
1342         usbc_hcsplt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCSPLTX(channel, usb->index));
1343         if (usbc_hcsplt.s.spltena && usbc_hcsplt.s.compsplt)
1344                 return;
1345
1346         /* Find out how many bytes we need to fill and convert it into 32bit words */
1347         usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
1348         if (!usbc_hctsiz.s.xfersize)
1349                 return;
1350
1351         if ((hcchar.s.eptype == CVMX_USB_TRANSFER_INTERRUPT) ||
1352                 (hcchar.s.eptype == CVMX_USB_TRANSFER_ISOCHRONOUS))
1353                 fifo = &usb->periodic;
1354         else
1355                 fifo = &usb->nonperiodic;
1356
1357         fifo->entry[fifo->head].channel = channel;
1358         fifo->entry[fifo->head].address = __cvmx_usb_read_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8);
1359         fifo->entry[fifo->head].size = (usbc_hctsiz.s.xfersize+3)>>2;
1360         fifo->head++;
1361         if (fifo->head > MAX_CHANNELS)
1362                 fifo->head = 0;
1363
1364         __cvmx_usb_poll_tx_fifo(usb);
1365
1366         return;
1367 }
1368
1369 /**
1370  * Perform channel specific setup for Control transactions. All
1371  * the generic stuff will already have been done in
1372  * __cvmx_usb_start_channel()
1373  *
1374  * @usb:          USB device state populated by
1375  *                cvmx_usb_initialize().
1376  * @channel:      Channel to setup
1377  * @pipe:         Pipe for control transaction
1378  */
1379 static void __cvmx_usb_start_channel_control(cvmx_usb_internal_state_t *usb,
1380                                              int channel,
1381                                              cvmx_usb_pipe_t *pipe)
1382 {
1383         cvmx_usb_transaction_t *transaction = pipe->head;
1384         cvmx_usb_control_header_t *header = cvmx_phys_to_ptr(transaction->control_header);
1385         int bytes_to_transfer = transaction->buffer_length - transaction->actual_bytes;
1386         int packets_to_transfer;
1387         cvmx_usbcx_hctsizx_t usbc_hctsiz;
1388
1389         usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
1390
1391         switch (transaction->stage) {
1392         case CVMX_USB_STAGE_NON_CONTROL:
1393         case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
1394                 cvmx_dprintf("%s: ERROR - Non control stage\n", __FUNCTION__);
1395                 break;
1396         case CVMX_USB_STAGE_SETUP:
1397                 usbc_hctsiz.s.pid = 3; /* Setup */
1398                 bytes_to_transfer = sizeof(*header);
1399                 /* All Control operations start with a setup going OUT */
1400                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), cvmx_usbcx_hccharx_t, epdir, CVMX_USB_DIRECTION_OUT);
1401                 /*
1402                  * Setup send the control header instead of the buffer data. The
1403                  * buffer data will be used in the next stage
1404                  */
1405                 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, transaction->control_header);
1406                 break;
1407         case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
1408                 usbc_hctsiz.s.pid = 3; /* Setup */
1409                 bytes_to_transfer = 0;
1410                 /* All Control operations start with a setup going OUT */
1411                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), cvmx_usbcx_hccharx_t, epdir, CVMX_USB_DIRECTION_OUT);
1412                 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), cvmx_usbcx_hcspltx_t, compsplt, 1);
1413                 break;
1414         case CVMX_USB_STAGE_DATA:
1415                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1416                 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1417                         if (header->s.request_type & 0x80)
1418                                 bytes_to_transfer = 0;
1419                         else if (bytes_to_transfer > pipe->max_packet)
1420                                 bytes_to_transfer = pipe->max_packet;
1421                 }
1422                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1423                                 cvmx_usbcx_hccharx_t, epdir,
1424                                 ((header->s.request_type & 0x80) ?
1425                                         CVMX_USB_DIRECTION_IN :
1426                                         CVMX_USB_DIRECTION_OUT));
1427                 break;
1428         case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE:
1429                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1430                 if (!(header->s.request_type & 0x80))
1431                         bytes_to_transfer = 0;
1432                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
1433                                 cvmx_usbcx_hccharx_t, epdir,
1434                                 ((header->s.request_type & 0x80) ?
1435                                         CVMX_USB_DIRECTION_IN :
1436                                         CVMX_USB_DIRECTION_OUT));
1437                 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), cvmx_usbcx_hcspltx_t, compsplt, 1);
1438                 break;
1439         case CVMX_USB_STAGE_STATUS:
1440                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1441                 bytes_to_transfer = 0;
1442                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), cvmx_usbcx_hccharx_t, epdir,
1443                                 ((header->s.request_type & 0x80) ?
1444                                         CVMX_USB_DIRECTION_OUT :
1445                                         CVMX_USB_DIRECTION_IN));
1446                 break;
1447         case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
1448                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1449                 bytes_to_transfer = 0;
1450                 USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), cvmx_usbcx_hccharx_t, epdir,
1451                                 ((header->s.request_type & 0x80) ?
1452                                         CVMX_USB_DIRECTION_OUT :
1453                                         CVMX_USB_DIRECTION_IN));
1454                 USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), cvmx_usbcx_hcspltx_t, compsplt, 1);
1455                 break;
1456         }
1457
1458         /*
1459          * Make sure the transfer never exceeds the byte limit of the hardware.
1460          * Further bytes will be sent as continued transactions
1461          */
1462         if (bytes_to_transfer > MAX_TRANSFER_BYTES) {
1463                 /* Round MAX_TRANSFER_BYTES to a multiple of out packet size */
1464                 bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet;
1465                 bytes_to_transfer *= pipe->max_packet;
1466         }
1467
1468         /*
1469          * Calculate the number of packets to transfer. If the length is zero
1470          * we still need to transfer one packet
1471          */
1472         packets_to_transfer = (bytes_to_transfer + pipe->max_packet - 1) / pipe->max_packet;
1473         if (packets_to_transfer == 0)
1474                 packets_to_transfer = 1;
1475         else if ((packets_to_transfer > 1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) {
1476                 /*
1477                  * Limit to one packet when not using DMA. Channels must be
1478                  * restarted between every packet for IN transactions, so there
1479                  * is no reason to do multiple packets in a row
1480                  */
1481                 packets_to_transfer = 1;
1482                 bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1483         } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) {
1484                 /*
1485                  * Limit the number of packet and data transferred to what the
1486                  * hardware can handle
1487                  */
1488                 packets_to_transfer = MAX_TRANSFER_PACKETS;
1489                 bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1490         }
1491
1492         usbc_hctsiz.s.xfersize = bytes_to_transfer;
1493         usbc_hctsiz.s.pktcnt = packets_to_transfer;
1494
1495         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index), usbc_hctsiz.u32);
1496         return;
1497 }
1498
1499
1500 /**
1501  * Start a channel to perform the pipe's head transaction
1502  *
1503  * @usb:          USB device state populated by
1504  *                cvmx_usb_initialize().
1505  * @channel:      Channel to setup
1506  * @pipe:         Pipe to start
1507  */
1508 static void __cvmx_usb_start_channel(cvmx_usb_internal_state_t *usb,
1509                                      int channel,
1510                                      cvmx_usb_pipe_t *pipe)
1511 {
1512         cvmx_usb_transaction_t *transaction = pipe->head;
1513
1514         /* Make sure all writes to the DMA region get flushed */
1515         CVMX_SYNCW;
1516
1517         /* Attach the channel to the pipe */
1518         usb->pipe_for_channel[channel] = pipe;
1519         pipe->channel = channel;
1520         pipe->flags |= __CVMX_USB_PIPE_FLAGS_SCHEDULED;
1521
1522         /* Mark this channel as in use */
1523         usb->idle_hardware_channels &= ~(1<<channel);
1524
1525         /* Enable the channel interrupt bits */
1526         {
1527                 cvmx_usbcx_hcintx_t usbc_hcint;
1528                 cvmx_usbcx_hcintmskx_t usbc_hcintmsk;
1529                 cvmx_usbcx_haintmsk_t usbc_haintmsk;
1530
1531                 /* Clear all channel status bits */
1532                 usbc_hcint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index));
1533                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index), usbc_hcint.u32);
1534
1535                 usbc_hcintmsk.u32 = 0;
1536                 usbc_hcintmsk.s.chhltdmsk = 1;
1537                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
1538                         /* Channels need these extra interrupts when we aren't in DMA mode */
1539                         usbc_hcintmsk.s.datatglerrmsk = 1;
1540                         usbc_hcintmsk.s.frmovrunmsk = 1;
1541                         usbc_hcintmsk.s.bblerrmsk = 1;
1542                         usbc_hcintmsk.s.xacterrmsk = 1;
1543                         if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1544                                 /* Splits don't generate xfercompl, so we need ACK and NYET */
1545                                 usbc_hcintmsk.s.nyetmsk = 1;
1546                                 usbc_hcintmsk.s.ackmsk = 1;
1547                         }
1548                         usbc_hcintmsk.s.nakmsk = 1;
1549                         usbc_hcintmsk.s.stallmsk = 1;
1550                         usbc_hcintmsk.s.xfercomplmsk = 1;
1551                 }
1552                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), usbc_hcintmsk.u32);
1553
1554                 /* Enable the channel interrupt to propagate */
1555                 usbc_haintmsk.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index));
1556                 usbc_haintmsk.s.haintmsk |= 1<<channel;
1557                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index), usbc_haintmsk.u32);
1558         }
1559
1560         /* Setup the locations the DMA engines use  */
1561         {
1562                 uint64_t dma_address = transaction->buffer + transaction->actual_bytes;
1563                 if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
1564                         dma_address = transaction->buffer + transaction->iso_packets[0].offset + transaction->actual_bytes;
1565                 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, dma_address);
1566                 __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, dma_address);
1567         }
1568
1569         /* Setup both the size of the transfer and the SPLIT characteristics */
1570         {
1571                 cvmx_usbcx_hcspltx_t usbc_hcsplt = {.u32 = 0};
1572                 cvmx_usbcx_hctsizx_t usbc_hctsiz = {.u32 = 0};
1573                 int packets_to_transfer;
1574                 int bytes_to_transfer = transaction->buffer_length - transaction->actual_bytes;
1575
1576                 /*
1577                  * ISOCHRONOUS transactions store each individual transfer size
1578                  * in the packet structure, not the global buffer_length
1579                  */
1580                 if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
1581                         bytes_to_transfer = transaction->iso_packets[0].length - transaction->actual_bytes;
1582
1583                 /*
1584                  * We need to do split transactions when we are talking to non
1585                  * high speed devices that are behind a high speed hub
1586                  */
1587                 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
1588                         /*
1589                          * On the start split phase (stage is even) record the
1590                          * frame number we will need to send the split complete.
1591                          * We only store the lower two bits since the time ahead
1592                          * can only be two frames
1593                          */
1594                         if ((transaction->stage&1) == 0) {
1595                                 if (transaction->type == CVMX_USB_TRANSFER_BULK)
1596                                         pipe->split_sc_frame = (usb->frame_number + 1) & 0x7f;
1597                                 else
1598                                         pipe->split_sc_frame = (usb->frame_number + 2) & 0x7f;
1599                         } else
1600                                 pipe->split_sc_frame = -1;
1601
1602                         usbc_hcsplt.s.spltena = 1;
1603                         usbc_hcsplt.s.hubaddr = pipe->hub_device_addr;
1604                         usbc_hcsplt.s.prtaddr = pipe->hub_port;
1605                         usbc_hcsplt.s.compsplt = (transaction->stage == CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE);
1606
1607                         /*
1608                          * SPLIT transactions can only ever transmit one data
1609                          * packet so limit the transfer size to the max packet
1610                          * size
1611                          */
1612                         if (bytes_to_transfer > pipe->max_packet)
1613                                 bytes_to_transfer = pipe->max_packet;
1614
1615                         /*
1616                          * ISOCHRONOUS OUT splits are unique in that they limit
1617                          * data transfers to 188 byte chunks representing the
1618                          * begin/middle/end of the data or all
1619                          */
1620                         if (!usbc_hcsplt.s.compsplt &&
1621                                 (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&
1622                                 (pipe->transfer_type == CVMX_USB_TRANSFER_ISOCHRONOUS)) {
1623                                 /*
1624                                  * Clear the split complete frame number as
1625                                  * there isn't going to be a split complete
1626                                  */
1627                                 pipe->split_sc_frame = -1;
1628                                 /*
1629                                  * See if we've started this transfer and sent
1630                                  * data
1631                                  */
1632                                 if (transaction->actual_bytes == 0) {
1633                                         /*
1634                                          * Nothing sent yet, this is either a
1635                                          * begin or the entire payload
1636                                          */
1637                                         if (bytes_to_transfer <= 188)
1638                                                 usbc_hcsplt.s.xactpos = 3; /* Entire payload in one go */
1639                                         else
1640                                                 usbc_hcsplt.s.xactpos = 2; /* First part of payload */
1641                                 } else {
1642                                         /*
1643                                          * Continuing the previous data, we must
1644                                          * either be in the middle or at the end
1645                                          */
1646                                         if (bytes_to_transfer <= 188)
1647                                                 usbc_hcsplt.s.xactpos = 1; /* End of payload */
1648                                         else
1649                                                 usbc_hcsplt.s.xactpos = 0; /* Middle of payload */
1650                                 }
1651                                 /*
1652                                  * Again, the transfer size is limited to 188
1653                                  * bytes
1654                                  */
1655                                 if (bytes_to_transfer > 188)
1656                                         bytes_to_transfer = 188;
1657                         }
1658                 }
1659
1660                 /*
1661                  * Make sure the transfer never exceeds the byte limit of the
1662                  * hardware. Further bytes will be sent as continued
1663                  * transactions
1664                  */
1665                 if (bytes_to_transfer > MAX_TRANSFER_BYTES) {
1666                         /*
1667                          * Round MAX_TRANSFER_BYTES to a multiple of out packet
1668                          * size
1669                          */
1670                         bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet;
1671                         bytes_to_transfer *= pipe->max_packet;
1672                 }
1673
1674                 /*
1675                  * Calculate the number of packets to transfer. If the length is
1676                  * zero we still need to transfer one packet
1677                  */
1678                 packets_to_transfer = (bytes_to_transfer + pipe->max_packet - 1) / pipe->max_packet;
1679                 if (packets_to_transfer == 0)
1680                         packets_to_transfer = 1;
1681                 else if ((packets_to_transfer > 1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) {
1682                         /*
1683                          * Limit to one packet when not using DMA. Channels must
1684                          * be restarted between every packet for IN
1685                          * transactions, so there is no reason to do multiple
1686                          * packets in a row
1687                          */
1688                         packets_to_transfer = 1;
1689                         bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1690                 } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) {
1691                         /*
1692                          * Limit the number of packet and data transferred to
1693                          * what the hardware can handle
1694                          */
1695                         packets_to_transfer = MAX_TRANSFER_PACKETS;
1696                         bytes_to_transfer = packets_to_transfer * pipe->max_packet;
1697                 }
1698
1699                 usbc_hctsiz.s.xfersize = bytes_to_transfer;
1700                 usbc_hctsiz.s.pktcnt = packets_to_transfer;
1701
1702                 /* Update the DATA0/DATA1 toggle */
1703                 usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
1704                 /*
1705                  * High speed pipes may need a hardware ping before they start
1706                  */
1707                 if (pipe->flags & __CVMX_USB_PIPE_FLAGS_NEED_PING)
1708                         usbc_hctsiz.s.dopng = 1;
1709
1710                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCSPLTX(channel, usb->index), usbc_hcsplt.u32);
1711                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index), usbc_hctsiz.u32);
1712         }
1713
1714         /* Setup the Host Channel Characteristics Register */
1715         {
1716                 cvmx_usbcx_hccharx_t usbc_hcchar = {.u32 = 0};
1717
1718                 /*
1719                  * Set the startframe odd/even properly. This is only used for
1720                  * periodic
1721                  */
1722                 usbc_hcchar.s.oddfrm = usb->frame_number&1;
1723
1724                 /*
1725                  * Set the number of back to back packets allowed by this
1726                  * endpoint. Split transactions interpret "ec" as the number of
1727                  * immediate retries of failure. These retries happen too
1728                  * quickly, so we disable these entirely for splits
1729                  */
1730                 if (__cvmx_usb_pipe_needs_split(usb, pipe))
1731                         usbc_hcchar.s.ec = 1;
1732                 else if (pipe->multi_count < 1)
1733                         usbc_hcchar.s.ec = 1;
1734                 else if (pipe->multi_count > 3)
1735                         usbc_hcchar.s.ec = 3;
1736                 else
1737                         usbc_hcchar.s.ec = pipe->multi_count;
1738
1739                 /* Set the rest of the endpoint specific settings */
1740                 usbc_hcchar.s.devaddr = pipe->device_addr;
1741                 usbc_hcchar.s.eptype = transaction->type;
1742                 usbc_hcchar.s.lspddev = (pipe->device_speed == CVMX_USB_SPEED_LOW);
1743                 usbc_hcchar.s.epdir = pipe->transfer_dir;
1744                 usbc_hcchar.s.epnum = pipe->endpoint_num;
1745                 usbc_hcchar.s.mps = pipe->max_packet;
1746                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
1747         }
1748
1749         /* Do transaction type specific fixups as needed */
1750         switch (transaction->type) {
1751         case CVMX_USB_TRANSFER_CONTROL:
1752                 __cvmx_usb_start_channel_control(usb, channel, pipe);
1753                 break;
1754         case CVMX_USB_TRANSFER_BULK:
1755         case CVMX_USB_TRANSFER_INTERRUPT:
1756                 break;
1757         case CVMX_USB_TRANSFER_ISOCHRONOUS:
1758                 if (!__cvmx_usb_pipe_needs_split(usb, pipe)) {
1759                         /*
1760                          * ISO transactions require different PIDs depending on
1761                          * direction and how many packets are needed
1762                          */
1763                         if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {
1764                                 if (pipe->multi_count < 2) /* Need DATA0 */
1765                                         USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel, usb->index), cvmx_usbcx_hctsizx_t, pid, 0);
1766                                 else /* Need MDATA */
1767                                         USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel, usb->index), cvmx_usbcx_hctsizx_t, pid, 3);
1768                         }
1769                 }
1770                 break;
1771         }
1772         {
1773                 cvmx_usbcx_hctsizx_t usbc_hctsiz = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index))};
1774                 transaction->xfersize = usbc_hctsiz.s.xfersize;
1775                 transaction->pktcnt = usbc_hctsiz.s.pktcnt;
1776         }
1777         /* Remeber when we start a split transaction */
1778         if (__cvmx_usb_pipe_needs_split(usb, pipe))
1779                 usb->active_split = transaction;
1780         USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), cvmx_usbcx_hccharx_t, chena, 1);
1781         if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
1782                 __cvmx_usb_fill_tx_fifo(usb, channel);
1783         return;
1784 }
1785
1786
1787 /**
1788  * Find a pipe that is ready to be scheduled to hardware.
1789  * @usb:         USB device state populated by
1790  *               cvmx_usb_initialize().
1791  * @list:        Pipe list to search
1792  * @current_frame:
1793  *               Frame counter to use as a time reference.
1794  *
1795  * Returns: Pipe or NULL if none are ready
1796  */
1797 static cvmx_usb_pipe_t *__cvmx_usb_find_ready_pipe(cvmx_usb_internal_state_t *usb, cvmx_usb_pipe_list_t *list, uint64_t current_frame)
1798 {
1799         cvmx_usb_pipe_t *pipe = list->head;
1800         while (pipe) {
1801                 if (!(pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED) && pipe->head &&
1802                         (pipe->next_tx_frame <= current_frame) &&
1803                         ((pipe->split_sc_frame == -1) || ((((int)current_frame - (int)pipe->split_sc_frame) & 0x7f) < 0x40)) &&
1804                         (!usb->active_split || (usb->active_split == pipe->head))) {
1805                         CVMX_PREFETCH(pipe, 128);
1806                         CVMX_PREFETCH(pipe->head, 0);
1807                         return pipe;
1808                 }
1809                 pipe = pipe->next;
1810         }
1811         return NULL;
1812 }
1813
1814
1815 /**
1816  * Called whenever a pipe might need to be scheduled to the
1817  * hardware.
1818  *
1819  * @usb:         USB device state populated by
1820  *               cvmx_usb_initialize().
1821  * @is_sof:      True if this schedule was called on a SOF interrupt.
1822  */
1823 static void __cvmx_usb_schedule(cvmx_usb_internal_state_t *usb, int is_sof)
1824 {
1825         int channel;
1826         cvmx_usb_pipe_t *pipe;
1827         int need_sof;
1828         cvmx_usb_transfer_t ttype;
1829
1830         if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
1831                 /* Without DMA we need to be careful to not schedule something at the end of a frame and cause an overrun */
1832                 cvmx_usbcx_hfnum_t hfnum = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index))};
1833                 cvmx_usbcx_hfir_t hfir = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFIR(usb->index))};
1834                 if (hfnum.s.frrem < hfir.s.frint/4)
1835                         goto done;
1836         }
1837
1838         while (usb->idle_hardware_channels) {
1839                 /* Find an idle channel */
1840                 CVMX_CLZ(channel, usb->idle_hardware_channels);
1841                 channel = 31 - channel;
1842                 if (unlikely(channel > 7))
1843                         break;
1844
1845                 /* Find a pipe needing service */
1846                 pipe = NULL;
1847                 if (is_sof) {
1848                         /*
1849                          * Only process periodic pipes on SOF interrupts. This
1850                          * way we are sure that the periodic data is sent in the
1851                          * beginning of the frame
1852                          */
1853                         pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_ISOCHRONOUS, usb->frame_number);
1854                         if (likely(!pipe))
1855                                 pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_INTERRUPT, usb->frame_number);
1856                 }
1857                 if (likely(!pipe)) {
1858                         pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_CONTROL, usb->frame_number);
1859                         if (likely(!pipe))
1860                                 pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_BULK, usb->frame_number);
1861                 }
1862                 if (!pipe)
1863                         break;
1864
1865                 __cvmx_usb_start_channel(usb, channel, pipe);
1866         }
1867
1868 done:
1869         /*
1870          * Only enable SOF interrupts when we have transactions pending in the
1871          * future that might need to be scheduled
1872          */
1873         need_sof = 0;
1874         for (ttype = CVMX_USB_TRANSFER_CONTROL; ttype <= CVMX_USB_TRANSFER_INTERRUPT; ttype++) {
1875                 pipe = usb->active_pipes[ttype].head;
1876                 while (pipe) {
1877                         if (pipe->next_tx_frame > usb->frame_number) {
1878                                 need_sof = 1;
1879                                 break;
1880                         }
1881                         pipe = pipe->next;
1882                 }
1883         }
1884         USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), cvmx_usbcx_gintmsk_t, sofmsk, need_sof);
1885         return;
1886 }
1887
1888
1889 /**
1890  * Call a user's callback for a specific reason.
1891  *
1892  * @usb:         USB device state populated by
1893  *               cvmx_usb_initialize().
1894  * @pipe:        Pipe the callback is for or NULL
1895  * @transaction:
1896  *               Transaction the callback is for or NULL
1897  * @reason:      Reason this callback is being called
1898  * @complete_code:
1899  *               Completion code for the transaction, if any
1900  */
1901 static void __cvmx_usb_perform_callback(cvmx_usb_internal_state_t *usb,
1902                                         cvmx_usb_pipe_t *pipe,
1903                                         cvmx_usb_transaction_t *transaction,
1904                                         cvmx_usb_callback_t reason,
1905                                         cvmx_usb_complete_t complete_code)
1906 {
1907         cvmx_usb_callback_func_t callback = usb->callback[reason];
1908         void *user_data = usb->callback_data[reason];
1909         int submit_handle = -1;
1910         int pipe_handle = -1;
1911         int bytes_transferred = 0;
1912
1913         if (pipe)
1914                 pipe_handle = __cvmx_usb_get_pipe_handle(usb, pipe);
1915
1916         if (transaction) {
1917                 submit_handle = __cvmx_usb_get_submit_handle(usb, transaction);
1918                 bytes_transferred = transaction->actual_bytes;
1919                 /* Transactions are allowed to override the default callback */
1920                 if ((reason == CVMX_USB_CALLBACK_TRANSFER_COMPLETE) && transaction->callback) {
1921                         callback = transaction->callback;
1922                         user_data = transaction->callback_data;
1923                 }
1924         }
1925
1926         if (!callback)
1927                 return;
1928
1929         callback((cvmx_usb_state_t *)usb, reason, complete_code, pipe_handle, submit_handle,
1930                  bytes_transferred, user_data);
1931 }
1932
1933
1934 /**
1935  * Signal the completion of a transaction and free it. The
1936  * transaction will be removed from the pipe transaction list.
1937  *
1938  * @usb:         USB device state populated by
1939  *               cvmx_usb_initialize().
1940  * @pipe:        Pipe the transaction is on
1941  * @transaction:
1942  *               Transaction that completed
1943  * @complete_code:
1944  *               Completion code
1945  */
1946 static void __cvmx_usb_perform_complete(cvmx_usb_internal_state_t *usb,
1947                                         cvmx_usb_pipe_t *pipe,
1948                                         cvmx_usb_transaction_t *transaction,
1949                                         cvmx_usb_complete_t complete_code)
1950 {
1951         /* If this was a split then clear our split in progress marker */
1952         if (usb->active_split == transaction)
1953                 usb->active_split = NULL;
1954
1955         /*
1956          * Isochronous transactions need extra processing as they might not be
1957          * done after a single data transfer
1958          */
1959         if (unlikely(transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)) {
1960                 /* Update the number of bytes transferred in this ISO packet */
1961                 transaction->iso_packets[0].length = transaction->actual_bytes;
1962                 transaction->iso_packets[0].status = complete_code;
1963
1964                 /*
1965                  * If there are more ISOs pending and we succeeded, schedule the
1966                  * next one
1967                  */
1968                 if ((transaction->iso_number_packets > 1) && (complete_code == CVMX_USB_COMPLETE_SUCCESS)) {
1969                         transaction->actual_bytes = 0;     /* No bytes transferred for this packet as of yet */
1970                         transaction->iso_number_packets--; /* One less ISO waiting to transfer */
1971                         transaction->iso_packets++;        /* Increment to the next location in our packet array */
1972                         transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
1973                         goto done;
1974                 }
1975         }
1976
1977         /* Remove the transaction from the pipe list */
1978         if (transaction->next)
1979                 transaction->next->prev = transaction->prev;
1980         else
1981                 pipe->tail = transaction->prev;
1982         if (transaction->prev)
1983                 transaction->prev->next = transaction->next;
1984         else
1985                 pipe->head = transaction->next;
1986         if (!pipe->head) {
1987                 __cvmx_usb_remove_pipe(usb->active_pipes + pipe->transfer_type, pipe);
1988                 __cvmx_usb_append_pipe(&usb->idle_pipes, pipe);
1989
1990         }
1991         __cvmx_usb_perform_callback(usb, pipe, transaction,
1992                                     CVMX_USB_CALLBACK_TRANSFER_COMPLETE,
1993                                     complete_code);
1994         __cvmx_usb_free_transaction(usb, transaction);
1995 done:
1996         return;
1997 }
1998
1999
2000 /**
2001  * Submit a usb transaction to a pipe. Called for all types
2002  * of transactions.
2003  *
2004  * @usb:
2005  * @pipe_handle:
2006  *                  Which pipe to submit to. Will be validated in this function.
2007  * @type:           Transaction type
2008  * @flags:          Flags for the transaction
2009  * @buffer:         User buffer for the transaction
2010  * @buffer_length:
2011  *                  User buffer's length in bytes
2012  * @control_header:
2013  *                  For control transactions, the 8 byte standard header
2014  * @iso_start_frame:
2015  *                  For ISO transactions, the start frame
2016  * @iso_number_packets:
2017  *                  For ISO, the number of packet in the transaction.
2018  * @iso_packets:
2019  *                  A description of each ISO packet
2020  * @callback:       User callback to call when the transaction completes
2021  * @user_data:      User's data for the callback
2022  *
2023  * Returns: Submit handle or negative on failure. Matches the result
2024  *          in the external API.
2025  */
2026 static int __cvmx_usb_submit_transaction(cvmx_usb_internal_state_t *usb,
2027                                          int pipe_handle,
2028                                          cvmx_usb_transfer_t type,
2029                                          int flags,
2030                                          uint64_t buffer,
2031                                          int buffer_length,
2032                                          uint64_t control_header,
2033                                          int iso_start_frame,
2034                                          int iso_number_packets,
2035                                          cvmx_usb_iso_packet_t *iso_packets,
2036                                          cvmx_usb_callback_func_t callback,
2037                                          void *user_data)
2038 {
2039         int submit_handle;
2040         cvmx_usb_transaction_t *transaction;
2041         cvmx_usb_pipe_t *pipe = usb->pipe + pipe_handle;
2042
2043         if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES)))
2044                 return -EINVAL;
2045         /* Fail if the pipe isn't open */
2046         if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0))
2047                 return -EINVAL;
2048         if (unlikely(pipe->transfer_type != type))
2049                 return -EINVAL;
2050
2051         transaction = __cvmx_usb_alloc_transaction(usb);
2052         if (unlikely(!transaction))
2053                 return -ENOMEM;
2054
2055         transaction->type = type;
2056         transaction->flags |= flags;
2057         transaction->buffer = buffer;
2058         transaction->buffer_length = buffer_length;
2059         transaction->control_header = control_header;
2060         transaction->iso_start_frame = iso_start_frame; // FIXME: This is not used, implement it
2061         transaction->iso_number_packets = iso_number_packets;
2062         transaction->iso_packets = iso_packets;
2063         transaction->callback = callback;
2064         transaction->callback_data = user_data;
2065         if (transaction->type == CVMX_USB_TRANSFER_CONTROL)
2066                 transaction->stage = CVMX_USB_STAGE_SETUP;
2067         else
2068                 transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2069
2070         transaction->next = NULL;
2071         if (pipe->tail) {
2072                 transaction->prev = pipe->tail;
2073                 transaction->prev->next = transaction;
2074         } else {
2075                 if (pipe->next_tx_frame < usb->frame_number)
2076                         pipe->next_tx_frame = usb->frame_number + pipe->interval -
2077                                 (usb->frame_number - pipe->next_tx_frame) % pipe->interval;
2078                 transaction->prev = NULL;
2079                 pipe->head = transaction;
2080                 __cvmx_usb_remove_pipe(&usb->idle_pipes, pipe);
2081                 __cvmx_usb_append_pipe(usb->active_pipes + pipe->transfer_type, pipe);
2082         }
2083         pipe->tail = transaction;
2084
2085         submit_handle = __cvmx_usb_get_submit_handle(usb, transaction);
2086
2087         /* We may need to schedule the pipe if this was the head of the pipe */
2088         if (!transaction->prev)
2089                 __cvmx_usb_schedule(usb, 0);
2090
2091         return submit_handle;
2092 }
2093
2094
2095 /**
2096  * Call to submit a USB Bulk transfer to a pipe.
2097  *
2098  * @state:          USB device state populated by
2099  *                  cvmx_usb_initialize().
2100  * @pipe_handle:
2101  *                  Handle to the pipe for the transfer.
2102  * @buffer:         Physical address of the data buffer in
2103  *                  memory. Note that this is NOT A POINTER, but
2104  *                  the full 64bit physical address of the
2105  *                  buffer. This may be zero if buffer_length is
2106  *                  zero.
2107  * @buffer_length:
2108  *                  Length of buffer in bytes.
2109  * @callback:       Function to call when this transaction
2110  *                  completes. If the return value of this
2111  *                  function isn't an error, then this function
2112  *                  is guaranteed to be called when the
2113  *                  transaction completes. If this parameter is
2114  *                  NULL, then the generic callback registered
2115  *                  through cvmx_usb_register_callback is
2116  *                  called. If both are NULL, then there is no
2117  *                  way to know when a transaction completes.
2118  * @user_data:      User supplied data returned when the
2119  *                  callback is called. This is only used if
2120  *                  callback in not NULL.
2121  *
2122  * Returns: A submitted transaction handle or negative on
2123  *          failure. Negative values are error codes.
2124  */
2125 int cvmx_usb_submit_bulk(cvmx_usb_state_t *state, int pipe_handle,
2126                          uint64_t buffer, int buffer_length,
2127                          cvmx_usb_callback_func_t callback,
2128                          void *user_data)
2129 {
2130         int submit_handle;
2131         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
2132
2133         /* Pipe handle checking is done later in a common place */
2134         if (unlikely(!buffer))
2135                 return -EINVAL;
2136         if (unlikely(buffer_length < 0))
2137                 return -EINVAL;
2138
2139         submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle,
2140                                                       CVMX_USB_TRANSFER_BULK,
2141                                                       0, /* flags */
2142                                                       buffer,
2143                                                       buffer_length,
2144                                                       0, /* control_header */
2145                                                       0, /* iso_start_frame */
2146                                                       0, /* iso_number_packets */
2147                                                       NULL, /* iso_packets */
2148                                                       callback,
2149                                                       user_data);
2150         return submit_handle;
2151 }
2152
2153
2154 /**
2155  * Call to submit a USB Interrupt transfer to a pipe.
2156  *
2157  * @state:          USB device state populated by
2158  *                  cvmx_usb_initialize().
2159  * @pipe_handle:
2160  *                  Handle to the pipe for the transfer.
2161  * @buffer:         Physical address of the data buffer in
2162  *                  memory. Note that this is NOT A POINTER, but
2163  *                  the full 64bit physical address of the
2164  *                  buffer. This may be zero if buffer_length is
2165  *                  zero.
2166  * @buffer_length:
2167  *                  Length of buffer in bytes.
2168  * @callback:       Function to call when this transaction
2169  *                  completes. If the return value of this
2170  *                  function isn't an error, then this function
2171  *                  is guaranteed to be called when the
2172  *                  transaction completes. If this parameter is
2173  *                  NULL, then the generic callback registered
2174  *                  through cvmx_usb_register_callback is
2175  *                  called. If both are NULL, then there is no
2176  *                  way to know when a transaction completes.
2177  * @user_data:      User supplied data returned when the
2178  *                  callback is called. This is only used if
2179  *                  callback in not NULL.
2180  *
2181  * Returns: A submitted transaction handle or negative on
2182  *          failure. Negative values are error codes.
2183  */
2184 int cvmx_usb_submit_interrupt(cvmx_usb_state_t *state, int pipe_handle,
2185                               uint64_t buffer, int buffer_length,
2186                               cvmx_usb_callback_func_t callback,
2187                               void *user_data)
2188 {
2189         int submit_handle;
2190         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
2191
2192         /* Pipe handle checking is done later in a common place */
2193         if (unlikely(!buffer))
2194                 return -EINVAL;
2195         if (unlikely(buffer_length < 0))
2196                 return -EINVAL;
2197
2198         submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle,
2199                                                       CVMX_USB_TRANSFER_INTERRUPT,
2200                                                       0, /* flags */
2201                                                       buffer,
2202                                                       buffer_length,
2203                                                       0, /* control_header */
2204                                                       0, /* iso_start_frame */
2205                                                       0, /* iso_number_packets */
2206                                                       NULL, /* iso_packets */
2207                                                       callback,
2208                                                       user_data);
2209         return submit_handle;
2210 }
2211
2212
2213 /**
2214  * Call to submit a USB Control transfer to a pipe.
2215  *
2216  * @state:          USB device state populated by
2217  *                  cvmx_usb_initialize().
2218  * @pipe_handle:
2219  *                  Handle to the pipe for the transfer.
2220  * @control_header:
2221  *                  USB 8 byte control header physical address.
2222  *                  Note that this is NOT A POINTER, but the
2223  *                  full 64bit physical address of the buffer.
2224  * @buffer:         Physical address of the data buffer in
2225  *                  memory. Note that this is NOT A POINTER, but
2226  *                  the full 64bit physical address of the
2227  *                  buffer. This may be zero if buffer_length is
2228  *                  zero.
2229  * @buffer_length:
2230  *                  Length of buffer in bytes.
2231  * @callback:       Function to call when this transaction
2232  *                  completes. If the return value of this
2233  *                  function isn't an error, then this function
2234  *                  is guaranteed to be called when the
2235  *                  transaction completes. If this parameter is
2236  *                  NULL, then the generic callback registered
2237  *                  through cvmx_usb_register_callback is
2238  *                  called. If both are NULL, then there is no
2239  *                  way to know when a transaction completes.
2240  * @user_data:      User supplied data returned when the
2241  *                  callback is called. This is only used if
2242  *                  callback in not NULL.
2243  *
2244  * Returns: A submitted transaction handle or negative on
2245  *          failure. Negative values are error codes.
2246  */
2247 int cvmx_usb_submit_control(cvmx_usb_state_t *state, int pipe_handle,
2248                             uint64_t control_header,
2249                             uint64_t buffer, int buffer_length,
2250                             cvmx_usb_callback_func_t callback,
2251                             void *user_data)
2252 {
2253         int submit_handle;
2254         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
2255         cvmx_usb_control_header_t *header = cvmx_phys_to_ptr(control_header);
2256
2257         /* Pipe handle checking is done later in a common place */
2258         if (unlikely(!control_header))
2259                 return -EINVAL;
2260         /* Some drivers send a buffer with a zero length. God only knows why */
2261         if (unlikely(buffer && (buffer_length < 0)))
2262                 return -EINVAL;
2263         if (unlikely(!buffer && (buffer_length != 0)))
2264                 return -EINVAL;
2265         if ((header->s.request_type & 0x80) == 0)
2266                 buffer_length = le16_to_cpu(header->s.length);
2267
2268         submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle,
2269                                                       CVMX_USB_TRANSFER_CONTROL,
2270                                                       0, /* flags */
2271                                                       buffer,
2272                                                       buffer_length,
2273                                                       control_header,
2274                                                       0, /* iso_start_frame */
2275                                                       0, /* iso_number_packets */
2276                                                       NULL, /* iso_packets */
2277                                                       callback,
2278                                                       user_data);
2279         return submit_handle;
2280 }
2281
2282
2283 /**
2284  * Call to submit a USB Isochronous transfer to a pipe.
2285  *
2286  * @state:          USB device state populated by
2287  *                  cvmx_usb_initialize().
2288  * @pipe_handle:
2289  *                  Handle to the pipe for the transfer.
2290  * @start_frame:
2291  *                  Number of frames into the future to schedule
2292  *                  this transaction.
2293  * @flags:          Flags to control the transfer. See
2294  *                  cvmx_usb_isochronous_flags_t for the flag
2295  *                  definitions.
2296  * @number_packets:
2297  *                  Number of sequential packets to transfer.
2298  *                  "packets" is a pointer to an array of this
2299  *                  many packet structures.
2300  * @packets:        Description of each transfer packet as
2301  *                  defined by cvmx_usb_iso_packet_t. The array
2302  *                  pointed to here must stay valid until the
2303  *                  complete callback is called.
2304  * @buffer:         Physical address of the data buffer in
2305  *                  memory. Note that this is NOT A POINTER, but
2306  *                  the full 64bit physical address of the
2307  *                  buffer. This may be zero if buffer_length is
2308  *                  zero.
2309  * @buffer_length:
2310  *                  Length of buffer in bytes.
2311  * @callback:       Function to call when this transaction
2312  *                  completes. If the return value of this
2313  *                  function isn't an error, then this function
2314  *                  is guaranteed to be called when the
2315  *                  transaction completes. If this parameter is
2316  *                  NULL, then the generic callback registered
2317  *                  through cvmx_usb_register_callback is
2318  *                  called. If both are NULL, then there is no
2319  *                  way to know when a transaction completes.
2320  * @user_data:      User supplied data returned when the
2321  *                  callback is called. This is only used if
2322  *                  callback in not NULL.
2323  *
2324  * Returns: A submitted transaction handle or negative on
2325  *          failure. Negative values are error codes.
2326  */
2327 int cvmx_usb_submit_isochronous(cvmx_usb_state_t *state, int pipe_handle,
2328                                 int start_frame, int flags,
2329                                 int number_packets,
2330                                 cvmx_usb_iso_packet_t packets[],
2331                                 uint64_t buffer, int buffer_length,
2332                                 cvmx_usb_callback_func_t callback,
2333                                 void *user_data)
2334 {
2335         int submit_handle;
2336         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
2337
2338         /* Pipe handle checking is done later in a common place */
2339         if (unlikely(start_frame < 0))
2340                 return -EINVAL;
2341         if (unlikely(flags & ~(CVMX_USB_ISOCHRONOUS_FLAGS_ALLOW_SHORT | CVMX_USB_ISOCHRONOUS_FLAGS_ASAP)))
2342                 return -EINVAL;
2343         if (unlikely(number_packets < 1))
2344                 return -EINVAL;
2345         if (unlikely(!packets))
2346                 return -EINVAL;
2347         if (unlikely(!buffer))
2348                 return -EINVAL;
2349         if (unlikely(buffer_length < 0))
2350                 return -EINVAL;
2351
2352         submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle,
2353                                                       CVMX_USB_TRANSFER_ISOCHRONOUS,
2354                                                       flags,
2355                                                       buffer,
2356                                                       buffer_length,
2357                                                       0, /* control_header */
2358                                                       start_frame,
2359                                                       number_packets,
2360                                                       packets,
2361                                                       callback,
2362                                                       user_data);
2363         return submit_handle;
2364 }
2365
2366
2367 /**
2368  * Cancel one outstanding request in a pipe. Canceling a request
2369  * can fail if the transaction has already completed before cancel
2370  * is called. Even after a successful cancel call, it may take
2371  * a frame or two for the cvmx_usb_poll() function to call the
2372  * associated callback.
2373  *
2374  * @state:       USB device state populated by
2375  *               cvmx_usb_initialize().
2376  * @pipe_handle:
2377  *               Pipe handle to cancel requests in.
2378  * @submit_handle:
2379  *               Handle to transaction to cancel, returned by the submit function.
2380  *
2381  * Returns: 0 or a negative error code.
2382  */
2383 int cvmx_usb_cancel(cvmx_usb_state_t *state, int pipe_handle, int submit_handle)
2384 {
2385         cvmx_usb_transaction_t *transaction;
2386         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
2387         cvmx_usb_pipe_t *pipe = usb->pipe + pipe_handle;
2388
2389         if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES)))
2390                 return -EINVAL;
2391         if (unlikely((submit_handle < 0) || (submit_handle >= MAX_TRANSACTIONS)))
2392                 return -EINVAL;
2393
2394         /* Fail if the pipe isn't open */
2395         if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0))
2396                 return -EINVAL;
2397
2398         transaction = usb->transaction + submit_handle;
2399
2400         /* Fail if this transaction already completed */
2401         if (unlikely((transaction->flags & __CVMX_USB_TRANSACTION_FLAGS_IN_USE) == 0))
2402                 return -EINVAL;
2403
2404         /*
2405          * If the transaction is the HEAD of the queue and scheduled. We need to
2406          * treat it special
2407          */
2408         if ((pipe->head == transaction) &&
2409                 (pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED)) {
2410                 cvmx_usbcx_hccharx_t usbc_hcchar;
2411
2412                 usb->pipe_for_channel[pipe->channel] = NULL;
2413                 pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED;
2414
2415                 CVMX_SYNCW;
2416
2417                 usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index));
2418                 /* If the channel isn't enabled then the transaction already completed */
2419                 if (usbc_hcchar.s.chena) {
2420                         usbc_hcchar.s.chdis = 1;
2421                         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index), usbc_hcchar.u32);
2422                 }
2423         }
2424         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_CANCEL);
2425         return 0;
2426 }
2427
2428
2429 /**
2430  * Cancel all outstanding requests in a pipe. Logically all this
2431  * does is call cvmx_usb_cancel() in a loop.
2432  *
2433  * @state:       USB device state populated by
2434  *               cvmx_usb_initialize().
2435  * @pipe_handle:
2436  *               Pipe handle to cancel requests in.
2437  *
2438  * Returns: 0 or a negative error code.
2439  */
2440 int cvmx_usb_cancel_all(cvmx_usb_state_t *state, int pipe_handle)
2441 {
2442         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
2443         cvmx_usb_pipe_t *pipe = usb->pipe + pipe_handle;
2444
2445         if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES)))
2446                 return -EINVAL;
2447
2448         /* Fail if the pipe isn't open */
2449         if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0))
2450                 return -EINVAL;
2451
2452         /* Simply loop through and attempt to cancel each transaction */
2453         while (pipe->head) {
2454                 int result = cvmx_usb_cancel(state, pipe_handle,
2455                         __cvmx_usb_get_submit_handle(usb, pipe->head));
2456                 if (unlikely(result != 0))
2457                         return result;
2458         }
2459         return 0;
2460 }
2461
2462
2463 /**
2464  * Close a pipe created with cvmx_usb_open_pipe().
2465  *
2466  * @state:       USB device state populated by
2467  *               cvmx_usb_initialize().
2468  * @pipe_handle:
2469  *               Pipe handle to close.
2470  *
2471  * Returns: 0 or a negative error code. EBUSY is returned if the pipe has
2472  *          outstanding transfers.
2473  */
2474 int cvmx_usb_close_pipe(cvmx_usb_state_t *state, int pipe_handle)
2475 {
2476         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
2477         cvmx_usb_pipe_t *pipe = usb->pipe + pipe_handle;
2478
2479         if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES)))
2480                 return -EINVAL;
2481
2482         /* Fail if the pipe isn't open */
2483         if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0))
2484                 return -EINVAL;
2485
2486         /* Fail if the pipe has pending transactions */
2487         if (unlikely(pipe->head))
2488                 return -EBUSY;
2489
2490         pipe->flags = 0;
2491         __cvmx_usb_remove_pipe(&usb->idle_pipes, pipe);
2492         __cvmx_usb_append_pipe(&usb->free_pipes, pipe);
2493
2494         return 0;
2495 }
2496
2497
2498 /**
2499  * Register a function to be called when various USB events occur.
2500  *
2501  * @state:     USB device state populated by
2502  *             cvmx_usb_initialize().
2503  * @reason:    Which event to register for.
2504  * @callback:  Function to call when the event occurs.
2505  * @user_data: User data parameter to the function.
2506  *
2507  * Returns: 0 or a negative error code.
2508  */
2509 int cvmx_usb_register_callback(cvmx_usb_state_t *state,
2510                                cvmx_usb_callback_t reason,
2511                                cvmx_usb_callback_func_t callback,
2512                                void *user_data)
2513 {
2514         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
2515
2516         if (unlikely(reason >= __CVMX_USB_CALLBACK_END))
2517                 return -EINVAL;
2518         if (unlikely(!callback))
2519                 return -EINVAL;
2520
2521         usb->callback[reason] = callback;
2522         usb->callback_data[reason] = user_data;
2523
2524         return 0;
2525 }
2526
2527
2528 /**
2529  * Get the current USB protocol level frame number. The frame
2530  * number is always in the range of 0-0x7ff.
2531  *
2532  * @state: USB device state populated by
2533  *         cvmx_usb_initialize().
2534  *
2535  * Returns: USB frame number
2536  */
2537 int cvmx_usb_get_frame_number(cvmx_usb_state_t *state)
2538 {
2539         int frame_number;
2540         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
2541         cvmx_usbcx_hfnum_t usbc_hfnum;
2542
2543         usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
2544         frame_number = usbc_hfnum.s.frnum;
2545
2546         return frame_number;
2547 }
2548
2549
2550 /**
2551  * Poll a channel for status
2552  *
2553  * @usb:     USB device
2554  * @channel: Channel to poll
2555  *
2556  * Returns: Zero on success
2557  */
2558 static int __cvmx_usb_poll_channel(cvmx_usb_internal_state_t *usb, int channel)
2559 {
2560         cvmx_usbcx_hcintx_t usbc_hcint;
2561         cvmx_usbcx_hctsizx_t usbc_hctsiz;
2562         cvmx_usbcx_hccharx_t usbc_hcchar;
2563         cvmx_usb_pipe_t *pipe;
2564         cvmx_usb_transaction_t *transaction;
2565         int bytes_this_transfer;
2566         int bytes_in_last_packet;
2567         int packets_processed;
2568         int buffer_space_left;
2569
2570         /* Read the interrupt status bits for the channel */
2571         usbc_hcint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index));
2572
2573         if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
2574                 usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index));
2575
2576                 if (usbc_hcchar.s.chena && usbc_hcchar.s.chdis) {
2577                         /*
2578                          * There seems to be a bug in CN31XX which can cause
2579                          * interrupt IN transfers to get stuck until we do a
2580                          * write of HCCHARX without changing things
2581                          */
2582                         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
2583                         return 0;
2584                 }
2585
2586                 /*
2587                  * In non DMA mode the channels don't halt themselves. We need
2588                  * to manually disable channels that are left running
2589                  */
2590                 if (!usbc_hcint.s.chhltd) {
2591                         if (usbc_hcchar.s.chena) {
2592                                 cvmx_usbcx_hcintmskx_t hcintmsk;
2593                                 /* Disable all interrupts except CHHLTD */
2594                                 hcintmsk.u32 = 0;
2595                                 hcintmsk.s.chhltdmsk = 1;
2596                                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), hcintmsk.u32);
2597                                 usbc_hcchar.s.chdis = 1;
2598                                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
2599                                 return 0;
2600                         } else if (usbc_hcint.s.xfercompl) {
2601                                 /* Successful IN/OUT with transfer complete. Channel halt isn't needed */
2602                         } else {
2603                                 cvmx_dprintf("USB%d: Channel %d interrupt without halt\n", usb->index, channel);
2604                                 return 0;
2605                         }
2606                 }
2607         } else {
2608                 /*
2609                  * There is are no interrupts that we need to process when the
2610                  * channel is still running
2611                  */
2612                 if (!usbc_hcint.s.chhltd)
2613                         return 0;
2614         }
2615
2616         /* Disable the channel interrupts now that it is done */
2617         __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
2618         usb->idle_hardware_channels |= (1<<channel);
2619
2620         /* Make sure this channel is tied to a valid pipe */
2621         pipe = usb->pipe_for_channel[channel];
2622         CVMX_PREFETCH(pipe, 0);
2623         CVMX_PREFETCH(pipe, 128);
2624         if (!pipe)
2625                 return 0;
2626         transaction = pipe->head;
2627         CVMX_PREFETCH0(transaction);
2628
2629         /*
2630          * Disconnect this pipe from the HW channel. Later the schedule
2631          * function will figure out which pipe needs to go
2632          */
2633         usb->pipe_for_channel[channel] = NULL;
2634         pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED;
2635
2636         /*
2637          * Read the channel config info so we can figure out how much data
2638          * transfered
2639          */
2640         usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index));
2641         usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
2642
2643         /*
2644          * Calculating the number of bytes successfully transferred is dependent
2645          * on the transfer direction
2646          */
2647         packets_processed = transaction->pktcnt - usbc_hctsiz.s.pktcnt;
2648         if (usbc_hcchar.s.epdir) {
2649                 /*
2650                  * IN transactions are easy. For every byte received the
2651                  * hardware decrements xfersize. All we need to do is subtract
2652                  * the current value of xfersize from its starting value and we
2653                  * know how many bytes were written to the buffer
2654                  */
2655                 bytes_this_transfer = transaction->xfersize - usbc_hctsiz.s.xfersize;
2656         } else {
2657                 /*
2658                  * OUT transaction don't decrement xfersize. Instead pktcnt is
2659                  * decremented on every successful packet send. The hardware
2660                  * does this when it receives an ACK, or NYET. If it doesn't
2661                  * receive one of these responses pktcnt doesn't change
2662                  */
2663                 bytes_this_transfer = packets_processed * usbc_hcchar.s.mps;
2664                 /*
2665                  * The last packet may not be a full transfer if we didn't have
2666                  * enough data
2667                  */
2668                 if (bytes_this_transfer > transaction->xfersize)
2669                         bytes_this_transfer = transaction->xfersize;
2670         }
2671         /* Figure out how many bytes were in the last packet of the transfer */
2672         if (packets_processed)
2673                 bytes_in_last_packet = bytes_this_transfer - (packets_processed-1) * usbc_hcchar.s.mps;
2674         else
2675                 bytes_in_last_packet = bytes_this_transfer;
2676
2677         /*
2678          * As a special case, setup transactions output the setup header, not
2679          * the user's data. For this reason we don't count setup data as bytes
2680          * transferred
2681          */
2682         if ((transaction->stage == CVMX_USB_STAGE_SETUP) ||
2683                 (transaction->stage == CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE))
2684                 bytes_this_transfer = 0;
2685
2686         /*
2687          * Add the bytes transferred to the running total. It is important that
2688          * bytes_this_transfer doesn't count any data that needs to be
2689          * retransmitted
2690          */
2691         transaction->actual_bytes += bytes_this_transfer;
2692         if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
2693                 buffer_space_left = transaction->iso_packets[0].length - transaction->actual_bytes;
2694         else
2695                 buffer_space_left = transaction->buffer_length - transaction->actual_bytes;
2696
2697         /*
2698          * We need to remember the PID toggle state for the next transaction.
2699          * The hardware already updated it for the next transaction
2700          */
2701         pipe->pid_toggle = !(usbc_hctsiz.s.pid == 0);
2702
2703         /*
2704          * For high speed bulk out, assume the next transaction will need to do
2705          * a ping before proceeding. If this isn't true the ACK processing below
2706          * will clear this flag
2707          */
2708         if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&
2709                 (pipe->transfer_type == CVMX_USB_TRANSFER_BULK) &&
2710                 (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT))
2711                 pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
2712
2713         if (usbc_hcint.s.stall) {
2714                 /*
2715                  * STALL as a response means this transaction cannot be
2716                  * completed because the device can't process transactions. Tell
2717                  * the user. Any data that was transferred will be counted on
2718                  * the actual bytes transferred
2719                  */
2720                 pipe->pid_toggle = 0;
2721                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_STALL);
2722         } else if (usbc_hcint.s.xacterr) {
2723                 /*
2724                  * We know at least one packet worked if we get a ACK or NAK.
2725                  * Reset the retry counter
2726                  */
2727                 if (usbc_hcint.s.nak || usbc_hcint.s.ack)
2728                         transaction->retries = 0;
2729                 transaction->retries++;
2730                 if (transaction->retries > MAX_RETRIES) {
2731                         /*
2732                          * XactErr as a response means the device signaled
2733                          * something wrong with the transfer. For example, PID
2734                          * toggle errors cause these
2735                          */
2736                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_XACTERR);
2737                 } else {
2738                         /*
2739                          * If this was a split then clear our split in progress
2740                          * marker
2741                          */
2742                         if (usb->active_split == transaction)
2743                                 usb->active_split = NULL;
2744                         /*
2745                          * Rewind to the beginning of the transaction by anding
2746                          * off the split complete bit
2747                          */
2748                         transaction->stage &= ~1;
2749                         pipe->split_sc_frame = -1;
2750                         pipe->next_tx_frame += pipe->interval;
2751                         if (pipe->next_tx_frame < usb->frame_number)
2752                                 pipe->next_tx_frame = usb->frame_number + pipe->interval -
2753                                                       (usb->frame_number - pipe->next_tx_frame) % pipe->interval;
2754                 }
2755         } else if (usbc_hcint.s.bblerr) {
2756                 /* Babble Error (BblErr) */
2757                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_BABBLEERR);
2758         } else if (usbc_hcint.s.datatglerr) {
2759                 /* We'll retry the exact same transaction again */
2760                 transaction->retries++;
2761         } else if (usbc_hcint.s.nyet) {
2762                 /*
2763                  * NYET as a response is only allowed in three cases: as a
2764                  * response to a ping, as a response to a split transaction, and
2765                  * as a response to a bulk out. The ping case is handled by
2766                  * hardware, so we only have splits and bulk out
2767                  */
2768                 if (!__cvmx_usb_pipe_needs_split(usb, pipe)) {
2769                         transaction->retries = 0;
2770                         /*
2771                          * If there is more data to go then we need to try
2772                          * again. Otherwise this transaction is complete
2773                          */
2774                         if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet))
2775                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2776                 } else {
2777                         /*
2778                          * Split transactions retry the split complete 4 times
2779                          * then rewind to the start split and do the entire
2780                          * transactions again
2781                          */
2782                         transaction->retries++;
2783                         if ((transaction->retries & 0x3) == 0) {
2784                                 /*
2785                                  * Rewind to the beginning of the transaction by
2786                                  * anding off the split complete bit
2787                                  */
2788                                 transaction->stage &= ~1;
2789                                 pipe->split_sc_frame = -1;
2790                         }
2791                 }
2792         } else if (usbc_hcint.s.ack) {
2793                 transaction->retries = 0;
2794                 /*
2795                  * The ACK bit can only be checked after the other error bits.
2796                  * This is because a multi packet transfer may succeed in a
2797                  * number of packets and then get a different response on the
2798                  * last packet. In this case both ACK and the last response bit
2799                  * will be set. If none of the other response bits is set, then
2800                  * the last packet must have been an ACK
2801                  *
2802                  * Since we got an ACK, we know we don't need to do a ping on
2803                  * this pipe
2804                  */
2805                 pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_NEED_PING;
2806
2807                 switch (transaction->type) {
2808                 case CVMX_USB_TRANSFER_CONTROL:
2809                         switch (transaction->stage) {
2810                         case CVMX_USB_STAGE_NON_CONTROL:
2811                         case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
2812                                 /* This should be impossible */
2813                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_ERROR);
2814                                 break;
2815                         case CVMX_USB_STAGE_SETUP:
2816                                 pipe->pid_toggle = 1;
2817                                 if (__cvmx_usb_pipe_needs_split(usb, pipe))
2818                                         transaction->stage = CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE;
2819                                 else {
2820                                         cvmx_usb_control_header_t *header = cvmx_phys_to_ptr(transaction->control_header);
2821                                         if (header->s.length)
2822                                                 transaction->stage = CVMX_USB_STAGE_DATA;
2823                                         else
2824                                                 transaction->stage = CVMX_USB_STAGE_STATUS;
2825                                 }
2826                                 break;
2827                         case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
2828                                 {
2829                                         cvmx_usb_control_header_t *header = cvmx_phys_to_ptr(transaction->control_header);
2830                                         if (header->s.length)
2831                                                 transaction->stage = CVMX_USB_STAGE_DATA;
2832                                         else
2833                                                 transaction->stage = CVMX_USB_STAGE_STATUS;
2834                                 }
2835                                 break;
2836                         case CVMX_USB_STAGE_DATA:
2837                                 if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
2838                                         transaction->stage = CVMX_USB_STAGE_DATA_SPLIT_COMPLETE;
2839                                         /*
2840                                          * For setup OUT data that are splits,
2841                                          * the hardware doesn't appear to count
2842                                          * transferred data. Here we manually
2843                                          * update the data transferred
2844                                          */
2845                                         if (!usbc_hcchar.s.epdir) {
2846                                                 if (buffer_space_left < pipe->max_packet)
2847                                                         transaction->actual_bytes += buffer_space_left;
2848                                                 else
2849                                                         transaction->actual_bytes += pipe->max_packet;
2850                                         }
2851                                 } else if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) {
2852                                         pipe->pid_toggle = 1;
2853                                         transaction->stage = CVMX_USB_STAGE_STATUS;
2854                                 }
2855                                 break;
2856                         case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE:
2857                                 if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) {
2858                                         pipe->pid_toggle = 1;
2859                                         transaction->stage = CVMX_USB_STAGE_STATUS;
2860                                 } else {
2861                                         transaction->stage = CVMX_USB_STAGE_DATA;
2862                                 }
2863                                 break;
2864                         case CVMX_USB_STAGE_STATUS:
2865                                 if (__cvmx_usb_pipe_needs_split(usb, pipe))
2866                                         transaction->stage = CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE;
2867                                 else
2868                                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2869                                 break;
2870                         case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
2871                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2872                                 break;
2873                         }
2874                         break;
2875                 case CVMX_USB_TRANSFER_BULK:
2876                 case CVMX_USB_TRANSFER_INTERRUPT:
2877                         /*
2878                          * The only time a bulk transfer isn't complete when it
2879                          * finishes with an ACK is during a split transaction.
2880                          * For splits we need to continue the transfer if more
2881                          * data is needed
2882                          */
2883                         if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
2884                                 if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL)
2885                                         transaction->stage = CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE;
2886                                 else {
2887                                         if (buffer_space_left && (bytes_in_last_packet == pipe->max_packet))
2888                                                 transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
2889                                         else {
2890                                                 if (transaction->type == CVMX_USB_TRANSFER_INTERRUPT)
2891                                                         pipe->next_tx_frame += pipe->interval;
2892                                                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2893                                         }
2894                                 }
2895                         } else {
2896                                 if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&
2897                                     (pipe->transfer_type == CVMX_USB_TRANSFER_BULK) &&
2898                                     (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&
2899                                     (usbc_hcint.s.nak))
2900                                         pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
2901                                 if (!buffer_space_left || (bytes_in_last_packet < pipe->max_packet)) {
2902                                         if (transaction->type == CVMX_USB_TRANSFER_INTERRUPT)
2903                                                 pipe->next_tx_frame += pipe->interval;
2904                                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2905                                 }
2906                         }
2907                         break;
2908                 case CVMX_USB_TRANSFER_ISOCHRONOUS:
2909                         if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
2910                                 /*
2911                                  * ISOCHRONOUS OUT splits don't require a
2912                                  * complete split stage. Instead they use a
2913                                  * sequence of begin OUT splits to transfer the
2914                                  * data 188 bytes at a time. Once the transfer
2915                                  * is complete, the pipe sleeps until the next
2916                                  * schedule interval
2917                                  */
2918                                 if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {
2919                                         /*
2920                                          * If no space left or this wasn't a max
2921                                          * size packet then this transfer is
2922                                          * complete. Otherwise start it again to
2923                                          * send the next 188 bytes
2924                                          */
2925                                         if (!buffer_space_left || (bytes_this_transfer < 188)) {
2926                                                 pipe->next_tx_frame += pipe->interval;
2927                                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2928                                         }
2929                                 } else {
2930                                         if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE) {
2931                                                 /*
2932                                                  * We are in the incoming data
2933                                                  * phase. Keep getting data
2934                                                  * until we run out of space or
2935                                                  * get a small packet
2936                                                  */
2937                                                 if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) {
2938                                                         pipe->next_tx_frame += pipe->interval;
2939                                                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2940                                                 }
2941                                         } else
2942                                                 transaction->stage = CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE;
2943                                 }
2944                         } else {
2945                                 pipe->next_tx_frame += pipe->interval;
2946                                 __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS);
2947                         }
2948                         break;
2949                 }
2950         } else if (usbc_hcint.s.nak) {
2951                 /* If this was a split then clear our split in progress marker */
2952                 if (usb->active_split == transaction)
2953                         usb->active_split = NULL;
2954                 /*
2955                  * NAK as a response means the device couldn't accept the
2956                  * transaction, but it should be retried in the future. Rewind
2957                  * to the beginning of the transaction by anding off the split
2958                  * complete bit. Retry in the next interval
2959                  */
2960                 transaction->retries = 0;
2961                 transaction->stage &= ~1;
2962                 pipe->next_tx_frame += pipe->interval;
2963                 if (pipe->next_tx_frame < usb->frame_number)
2964                         pipe->next_tx_frame = usb->frame_number + pipe->interval -
2965                                 (usb->frame_number - pipe->next_tx_frame) % pipe->interval;
2966         } else {
2967                 cvmx_usb_port_status_t port;
2968                 port = cvmx_usb_get_status((cvmx_usb_state_t *)usb);
2969                 if (port.port_enabled) {
2970                         /* We'll retry the exact same transaction again */
2971                         transaction->retries++;
2972                 } else {
2973                         /*
2974                          * We get channel halted interrupts with no result bits
2975                          * sets when the cable is unplugged
2976                          */
2977                         __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_ERROR);
2978                 }
2979         }
2980         return 0;
2981 }
2982
2983
2984 /**
2985  * Poll the USB block for status and call all needed callback
2986  * handlers. This function is meant to be called in the interrupt
2987  * handler for the USB controller. It can also be called
2988  * periodically in a loop for non-interrupt based operation.
2989  *
2990  * @state:      USB device state populated by
2991  *              cvmx_usb_initialize().
2992  *
2993  * Returns: 0 or a negative error code.
2994  */
2995 int cvmx_usb_poll(cvmx_usb_state_t *state)
2996 {
2997         cvmx_usbcx_hfnum_t usbc_hfnum;
2998         cvmx_usbcx_gintsts_t usbc_gintsts;
2999         cvmx_usb_internal_state_t *usb = (cvmx_usb_internal_state_t *)state;
3000
3001         CVMX_PREFETCH(usb, 0);
3002         CVMX_PREFETCH(usb, 1*128);
3003         CVMX_PREFETCH(usb, 2*128);
3004         CVMX_PREFETCH(usb, 3*128);
3005         CVMX_PREFETCH(usb, 4*128);
3006
3007         /* Update the frame counter */
3008         usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
3009         if ((usb->frame_number&0x3fff) > usbc_hfnum.s.frnum)
3010                 usb->frame_number += 0x4000;
3011         usb->frame_number &= ~0x3fffull;
3012         usb->frame_number |= usbc_hfnum.s.frnum;
3013
3014         /* Read the pending interrupts */
3015         usbc_gintsts.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GINTSTS(usb->index));
3016
3017         /* Clear the interrupts now that we know about them */
3018         __cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTSTS(usb->index), usbc_gintsts.u32);
3019
3020         if (usbc_gintsts.s.rxflvl) {
3021                 /*
3022                  * RxFIFO Non-Empty (RxFLvl)
3023                  * Indicates that there is at least one packet pending to be
3024                  * read from the RxFIFO.
3025                  *
3026                  * In DMA mode this is handled by hardware
3027                  */
3028                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
3029                         __cvmx_usb_poll_rx_fifo(usb);
3030         }
3031         if (usbc_gintsts.s.ptxfemp || usbc_gintsts.s.nptxfemp) {
3032                 /* Fill the Tx FIFOs when not in DMA mode */
3033                 if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
3034                         __cvmx_usb_poll_tx_fifo(usb);
3035         }
3036         if (usbc_gintsts.s.disconnint || usbc_gintsts.s.prtint) {
3037                 cvmx_usbcx_hprt_t usbc_hprt;
3038                 /*
3039                  * Disconnect Detected Interrupt (DisconnInt)
3040                  * Asserted when a device disconnect is detected.
3041                  *
3042                  * Host Port Interrupt (PrtInt)
3043                  * The core sets this bit to indicate a change in port status of
3044                  * one of the O2P USB core ports in Host mode. The application
3045                  * must read the Host Port Control and Status (HPRT) register to
3046                  * determine the exact event that caused this interrupt. The
3047                  * application must clear the appropriate status bit in the Host
3048                  * Port Control and Status register to clear this bit.
3049                  *
3050                  * Call the user's port callback
3051                  */
3052                 __cvmx_usb_perform_callback(usb, NULL, NULL,
3053                                             CVMX_USB_CALLBACK_PORT_CHANGED,
3054                                             CVMX_USB_COMPLETE_SUCCESS);
3055                 /* Clear the port change bits */
3056                 usbc_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
3057                 usbc_hprt.s.prtena = 0;
3058                 __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPRT(usb->index), usbc_hprt.u32);
3059         }
3060         if (usbc_gintsts.s.hchint) {
3061                 /*
3062                  * Host Channels Interrupt (HChInt)
3063                  * The core sets this bit to indicate that an interrupt is
3064                  * pending on one of the channels of the core (in Host mode).
3065                  * The application must read the Host All Channels Interrupt
3066                  * (HAINT) register to determine the exact number of the channel
3067                  * on which the interrupt occurred, and then read the
3068                  * corresponding Host Channel-n Interrupt (HCINTn) register to
3069                  * determine the exact cause of the interrupt. The application
3070                  * must clear the appropriate status bit in the HCINTn register
3071                  * to clear this bit.
3072                  */
3073                 cvmx_usbcx_haint_t usbc_haint;
3074                 usbc_haint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINT(usb->index));
3075                 while (usbc_haint.u32) {
3076                         int channel;
3077                         CVMX_CLZ(channel, usbc_haint.u32);
3078                         channel = 31 - channel;
3079                         __cvmx_usb_poll_channel(usb, channel);
3080                         usbc_haint.u32 ^= 1<<channel;
3081                 }
3082         }
3083
3084         __cvmx_usb_schedule(usb, usbc_gintsts.s.sof);
3085
3086         return 0;
3087 }