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[media] v4l: omap4iss: csi2: Enable automatic ULP mode transition
[~andy/linux] / drivers / staging / media / omap4iss / iss_resizer.c
1 /*
2  * TI OMAP4 ISS V4L2 Driver - ISP RESIZER module
3  *
4  * Copyright (C) 2012 Texas Instruments, Inc.
5  *
6  * Author: Sergio Aguirre <sergio.a.aguirre@gmail.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  */
13
14 #include <linux/module.h>
15 #include <linux/uaccess.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/mm.h>
20 #include <linux/sched.h>
21
22 #include "iss.h"
23 #include "iss_regs.h"
24 #include "iss_resizer.h"
25
26 static const unsigned int resizer_fmts[] = {
27         V4L2_MBUS_FMT_UYVY8_1X16,
28         V4L2_MBUS_FMT_YUYV8_1X16,
29 };
30
31 /*
32  * resizer_print_status - Print current RESIZER Module register values.
33  * @resizer: Pointer to ISS ISP RESIZER device.
34  *
35  * Also prints other debug information stored in the RESIZER module.
36  */
37 #define RSZ_PRINT_REGISTER(iss, name)\
38         dev_dbg(iss->dev, "###RSZ " #name "=0x%08x\n", \
39                 readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_##name))
40
41 #define RZA_PRINT_REGISTER(iss, name)\
42         dev_dbg(iss->dev, "###RZA " #name "=0x%08x\n", \
43                 readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_##name))
44
45 static void resizer_print_status(struct iss_resizer_device *resizer)
46 {
47         struct iss_device *iss = to_iss_device(resizer);
48
49         dev_dbg(iss->dev, "-------------RESIZER Register dump-------------\n");
50
51         RSZ_PRINT_REGISTER(iss, SYSCONFIG);
52         RSZ_PRINT_REGISTER(iss, IN_FIFO_CTRL);
53         RSZ_PRINT_REGISTER(iss, FRACDIV);
54         RSZ_PRINT_REGISTER(iss, SRC_EN);
55         RSZ_PRINT_REGISTER(iss, SRC_MODE);
56         RSZ_PRINT_REGISTER(iss, SRC_FMT0);
57         RSZ_PRINT_REGISTER(iss, SRC_FMT1);
58         RSZ_PRINT_REGISTER(iss, SRC_VPS);
59         RSZ_PRINT_REGISTER(iss, SRC_VSZ);
60         RSZ_PRINT_REGISTER(iss, SRC_HPS);
61         RSZ_PRINT_REGISTER(iss, SRC_HSZ);
62         RSZ_PRINT_REGISTER(iss, DMA_RZA);
63         RSZ_PRINT_REGISTER(iss, DMA_RZB);
64         RSZ_PRINT_REGISTER(iss, DMA_STA);
65         RSZ_PRINT_REGISTER(iss, GCK_MMR);
66         RSZ_PRINT_REGISTER(iss, GCK_SDR);
67         RSZ_PRINT_REGISTER(iss, IRQ_RZA);
68         RSZ_PRINT_REGISTER(iss, IRQ_RZB);
69         RSZ_PRINT_REGISTER(iss, YUV_Y_MIN);
70         RSZ_PRINT_REGISTER(iss, YUV_Y_MAX);
71         RSZ_PRINT_REGISTER(iss, YUV_C_MIN);
72         RSZ_PRINT_REGISTER(iss, YUV_C_MAX);
73         RSZ_PRINT_REGISTER(iss, SEQ);
74
75         RZA_PRINT_REGISTER(iss, EN);
76         RZA_PRINT_REGISTER(iss, MODE);
77         RZA_PRINT_REGISTER(iss, 420);
78         RZA_PRINT_REGISTER(iss, I_VPS);
79         RZA_PRINT_REGISTER(iss, I_HPS);
80         RZA_PRINT_REGISTER(iss, O_VSZ);
81         RZA_PRINT_REGISTER(iss, O_HSZ);
82         RZA_PRINT_REGISTER(iss, V_PHS_Y);
83         RZA_PRINT_REGISTER(iss, V_PHS_C);
84         RZA_PRINT_REGISTER(iss, V_DIF);
85         RZA_PRINT_REGISTER(iss, V_TYP);
86         RZA_PRINT_REGISTER(iss, V_LPF);
87         RZA_PRINT_REGISTER(iss, H_PHS);
88         RZA_PRINT_REGISTER(iss, H_DIF);
89         RZA_PRINT_REGISTER(iss, H_TYP);
90         RZA_PRINT_REGISTER(iss, H_LPF);
91         RZA_PRINT_REGISTER(iss, DWN_EN);
92         RZA_PRINT_REGISTER(iss, SDR_Y_BAD_H);
93         RZA_PRINT_REGISTER(iss, SDR_Y_BAD_L);
94         RZA_PRINT_REGISTER(iss, SDR_Y_SAD_H);
95         RZA_PRINT_REGISTER(iss, SDR_Y_SAD_L);
96         RZA_PRINT_REGISTER(iss, SDR_Y_OFT);
97         RZA_PRINT_REGISTER(iss, SDR_Y_PTR_S);
98         RZA_PRINT_REGISTER(iss, SDR_Y_PTR_E);
99         RZA_PRINT_REGISTER(iss, SDR_C_BAD_H);
100         RZA_PRINT_REGISTER(iss, SDR_C_BAD_L);
101         RZA_PRINT_REGISTER(iss, SDR_C_SAD_H);
102         RZA_PRINT_REGISTER(iss, SDR_C_SAD_L);
103         RZA_PRINT_REGISTER(iss, SDR_C_OFT);
104         RZA_PRINT_REGISTER(iss, SDR_C_PTR_S);
105         RZA_PRINT_REGISTER(iss, SDR_C_PTR_E);
106
107         dev_dbg(iss->dev, "-----------------------------------------------\n");
108 }
109
110 /*
111  * resizer_enable - Enable/Disable RESIZER.
112  * @enable: enable flag
113  *
114  */
115 static void resizer_enable(struct iss_resizer_device *resizer, u8 enable)
116 {
117         struct iss_device *iss = to_iss_device(resizer);
118
119         writel((readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_EN) &
120                 ~RSZ_SRC_EN_SRC_EN) |
121                 (enable ? RSZ_SRC_EN_SRC_EN : 0),
122                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_EN);
123
124         /* TODO: Enable RSZB */
125         writel((readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_EN) &
126                 ~RSZ_EN_EN) |
127                 (enable ? RSZ_EN_EN : 0),
128                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_EN);
129 }
130
131 /* -----------------------------------------------------------------------------
132  * Format- and pipeline-related configuration helpers
133  */
134
135 /*
136  * resizer_set_outaddr - Set memory address to save output image
137  * @resizer: Pointer to ISP RESIZER device.
138  * @addr: 32-bit memory address aligned on 32 byte boundary.
139  *
140  * Sets the memory address where the output will be saved.
141  */
142 static void resizer_set_outaddr(struct iss_resizer_device *resizer, u32 addr)
143 {
144         struct iss_device *iss = to_iss_device(resizer);
145         struct v4l2_mbus_framefmt *informat, *outformat;
146
147         informat = &resizer->formats[RESIZER_PAD_SINK];
148         outformat = &resizer->formats[RESIZER_PAD_SOURCE_MEM];
149
150         /* Save address splitted in Base Address H & L */
151         writel((addr >> 16) & 0xffff,
152                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_Y_BAD_H);
153         writel(addr & 0xffff,
154                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_Y_BAD_L);
155
156         /* SAD = BAD */
157         writel((addr >> 16) & 0xffff,
158                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_Y_SAD_H);
159         writel(addr & 0xffff,
160                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_Y_SAD_L);
161
162         /* Program UV buffer address... Hardcoded to be contiguous! */
163         if ((informat->code == V4L2_MBUS_FMT_UYVY8_1X16) &&
164             (outformat->code == V4L2_MBUS_FMT_YUYV8_1_5X8)) {
165                 u32 c_addr = addr + (resizer->video_out.bpl_value *
166                                      (outformat->height - 1));
167
168                 /* Ensure Y_BAD_L[6:0] = C_BAD_L[6:0]*/
169                 if ((c_addr ^ addr) & 0x7f) {
170                         c_addr &= ~0x7f;
171                         c_addr += 0x80;
172                         c_addr |= addr & 0x7f;
173                 }
174
175                 /* Save address splitted in Base Address H & L */
176                 writel((c_addr >> 16) & 0xffff,
177                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_C_BAD_H);
178                 writel(c_addr & 0xffff,
179                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_C_BAD_L);
180
181                 /* SAD = BAD */
182                 writel((c_addr >> 16) & 0xffff,
183                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_C_SAD_H);
184                 writel(c_addr & 0xffff,
185                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_C_SAD_L);
186         }
187 }
188
189 static void resizer_configure(struct iss_resizer_device *resizer)
190 {
191         struct iss_device *iss = to_iss_device(resizer);
192         struct v4l2_mbus_framefmt *informat, *outformat;
193
194         informat = &resizer->formats[RESIZER_PAD_SINK];
195         outformat = &resizer->formats[RESIZER_PAD_SOURCE_MEM];
196
197         /* Make sure we don't bypass the resizer */
198         writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_FMT0) &
199                 ~RSZ_SRC_FMT0_BYPASS,
200                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_FMT0);
201
202         /* Select RSZ input */
203         writel((readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_FMT0) &
204                 ~RSZ_SRC_FMT0_SEL) |
205                 (resizer->input == RESIZER_INPUT_IPIPEIF ? RSZ_SRC_FMT0_SEL : 0),
206                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_FMT0);
207
208         /* RSZ ignores WEN signal from IPIPE/IPIPEIF */
209         writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_MODE) &
210                 ~RSZ_SRC_MODE_WRT,
211                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_MODE);
212
213         /* Set Resizer in free-running mode */
214         writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_MODE) &
215                 ~RSZ_SRC_MODE_OST,
216                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_MODE);
217
218         /* Init Resizer A */
219         writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_MODE) &
220                 ~RZA_MODE_ONE_SHOT,
221                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_MODE);
222
223         /* Set size related things now */
224         writel(0, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_VPS);
225         writel(0, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_HPS);
226         writel(informat->height - 2, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_VSZ);
227         writel(informat->width - 1, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SRC_HSZ);
228
229         writel(0, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_I_VPS);
230         writel(0, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_I_HPS);
231
232         writel(outformat->height - 2, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_O_VSZ);
233         writel(outformat->width - 1, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_O_HSZ);
234
235         writel(0x100, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_V_DIF);
236         writel(0x100, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_H_DIF);
237
238         /* Buffer output settings */
239         writel(0, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_Y_PTR_S);
240         writel(outformat->height - 1,
241                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_Y_PTR_E);
242
243         writel(resizer->video_out.bpl_value,
244                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_Y_OFT);
245
246         /* UYVY -> NV12 conversion */
247         if ((informat->code == V4L2_MBUS_FMT_UYVY8_1X16) &&
248             (outformat->code == V4L2_MBUS_FMT_YUYV8_1_5X8)) {
249                 writel(RSZ_420_CEN | RSZ_420_YEN,
250                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_420);
251
252                 /* UV Buffer output settings */
253                 writel(0, iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_C_PTR_S);
254                 writel(outformat->height - 1,
255                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_C_PTR_E);
256
257                 writel(resizer->video_out.bpl_value,
258                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_SDR_C_OFT);
259         } else {
260                 writel(0,
261                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_420);
262         }
263
264         omap4iss_isp_enable_interrupts(iss);
265 }
266
267 /* -----------------------------------------------------------------------------
268  * Interrupt handling
269  */
270
271 static void resizer_isr_buffer(struct iss_resizer_device *resizer)
272 {
273         struct iss_device *iss = to_iss_device(resizer);
274         struct iss_buffer *buffer;
275
276         writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_EN) &
277                 ~RSZ_EN_EN,
278                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_EN);
279
280         buffer = omap4iss_video_buffer_next(&resizer->video_out);
281         if (buffer == NULL)
282                 return;
283
284         resizer_set_outaddr(resizer, buffer->iss_addr);
285
286         writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_EN) |
287                 RSZ_EN_EN,
288                 iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RZA_EN);
289 }
290
291 /*
292  * resizer_isif0_isr - Handle ISIF0 event
293  * @resizer: Pointer to ISP RESIZER device.
294  *
295  * Executes LSC deferred enablement before next frame starts.
296  */
297 static void resizer_int_dma_isr(struct iss_resizer_device *resizer)
298 {
299         struct iss_pipeline *pipe =
300                              to_iss_pipeline(&resizer->subdev.entity);
301         if (pipe->do_propagation)
302                 atomic_inc(&pipe->frame_number);
303
304         resizer_isr_buffer(resizer);
305 }
306
307 /*
308  * omap4iss_resizer_isr - Configure resizer during interframe time.
309  * @resizer: Pointer to ISP RESIZER device.
310  * @events: RESIZER events
311  */
312 void omap4iss_resizer_isr(struct iss_resizer_device *resizer, u32 events)
313 {
314         struct iss_device *iss = to_iss_device(resizer);
315         struct iss_pipeline *pipe =
316                              to_iss_pipeline(&resizer->subdev.entity);
317
318         if (events & (ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR |
319                       ISP5_IRQ_RSZ_FIFO_OVF)) {
320                 dev_dbg(iss->dev, "RSZ Err: FIFO_IN_BLK:%d, FIFO_OVF:%d\n",
321                         events & ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR ? 1 : 0,
322                         events & ISP5_IRQ_RSZ_FIFO_OVF ? 1 : 0);
323                 pipe->error = true;
324         }
325
326         if (omap4iss_module_sync_is_stopping(&resizer->wait,
327                                              &resizer->stopping))
328                 return;
329
330         if (events & ISP5_IRQ_RSZ_INT_DMA)
331                 resizer_int_dma_isr(resizer);
332 }
333
334 /* -----------------------------------------------------------------------------
335  * ISS video operations
336  */
337
338 static int resizer_video_queue(struct iss_video *video,
339                                struct iss_buffer *buffer)
340 {
341         struct iss_resizer_device *resizer = container_of(video,
342                                 struct iss_resizer_device, video_out);
343
344         if (!(resizer->output & RESIZER_OUTPUT_MEMORY))
345                 return -ENODEV;
346
347         resizer_set_outaddr(resizer, buffer->iss_addr);
348
349         /*
350          * If streaming was enabled before there was a buffer queued
351          * or underrun happened in the ISR, the hardware was not enabled
352          * and DMA queue flag ISS_VIDEO_DMAQUEUE_UNDERRUN is still set.
353          * Enable it now.
354          */
355         if (video->dmaqueue_flags & ISS_VIDEO_DMAQUEUE_UNDERRUN) {
356                 resizer_enable(resizer, 1);
357                 iss_video_dmaqueue_flags_clr(video);
358         }
359
360         return 0;
361 }
362
363 static const struct iss_video_operations resizer_video_ops = {
364         .queue = resizer_video_queue,
365 };
366
367 /* -----------------------------------------------------------------------------
368  * V4L2 subdev operations
369  */
370
371 /*
372  * resizer_set_stream - Enable/Disable streaming on the RESIZER module
373  * @sd: ISP RESIZER V4L2 subdevice
374  * @enable: Enable/disable stream
375  */
376 static int resizer_set_stream(struct v4l2_subdev *sd, int enable)
377 {
378         struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd);
379         struct iss_device *iss = to_iss_device(resizer);
380         struct iss_video *video_out = &resizer->video_out;
381         int ret = 0;
382
383         if (resizer->state == ISS_PIPELINE_STREAM_STOPPED) {
384                 if (enable == ISS_PIPELINE_STREAM_STOPPED)
385                         return 0;
386
387                 omap4iss_isp_subclk_enable(iss, OMAP4_ISS_ISP_SUBCLK_RSZ);
388
389                 writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_GCK_MMR) |
390                         RSZ_GCK_MMR_MMR,
391                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_GCK_MMR);
392                 writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_GCK_SDR) |
393                         RSZ_GCK_SDR_CORE,
394                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_GCK_SDR);
395
396                 /* FIXME: Enable RSZB also */
397                 writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SYSCONFIG) |
398                         RSZ_SYSCONFIG_RSZA_CLK_EN,
399                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SYSCONFIG);
400         }
401
402         switch (enable) {
403         case ISS_PIPELINE_STREAM_CONTINUOUS:
404
405                 resizer_configure(resizer);
406                 resizer_print_status(resizer);
407
408                 /*
409                  * When outputting to memory with no buffer available, let the
410                  * buffer queue handler start the hardware. A DMA queue flag
411                  * ISS_VIDEO_DMAQUEUE_QUEUED will be set as soon as there is
412                  * a buffer available.
413                  */
414                 if (resizer->output & RESIZER_OUTPUT_MEMORY &&
415                     !(video_out->dmaqueue_flags & ISS_VIDEO_DMAQUEUE_QUEUED))
416                         break;
417
418                 atomic_set(&resizer->stopping, 0);
419                 resizer_enable(resizer, 1);
420                 iss_video_dmaqueue_flags_clr(video_out);
421                 break;
422
423         case ISS_PIPELINE_STREAM_STOPPED:
424                 if (resizer->state == ISS_PIPELINE_STREAM_STOPPED)
425                         return 0;
426                 if (omap4iss_module_sync_idle(&sd->entity, &resizer->wait,
427                                               &resizer->stopping))
428                         dev_dbg(iss->dev, "%s: module stop timeout.\n",
429                                 sd->name);
430
431                 resizer_enable(resizer, 0);
432                 omap4iss_isp_disable_interrupts(iss);
433                 writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SYSCONFIG) &
434                         ~RSZ_SYSCONFIG_RSZA_CLK_EN,
435                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_SYSCONFIG);
436                 writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_GCK_SDR) &
437                         ~RSZ_GCK_SDR_CORE,
438                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_GCK_SDR);
439                 writel(readl(iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_GCK_MMR) &
440                         ~RSZ_GCK_MMR_MMR,
441                         iss->regs[OMAP4_ISS_MEM_ISP_RESIZER] + RSZ_GCK_MMR);
442                 omap4iss_isp_subclk_disable(iss, OMAP4_ISS_ISP_SUBCLK_RSZ);
443                 iss_video_dmaqueue_flags_clr(video_out);
444                 break;
445         }
446
447         resizer->state = enable;
448         return ret;
449 }
450
451 static struct v4l2_mbus_framefmt *
452 __resizer_get_format(struct iss_resizer_device *resizer,
453                      struct v4l2_subdev_fh *fh, unsigned int pad,
454                      enum v4l2_subdev_format_whence which)
455 {
456         if (which == V4L2_SUBDEV_FORMAT_TRY)
457                 return v4l2_subdev_get_try_format(fh, pad);
458         else
459                 return &resizer->formats[pad];
460 }
461
462 /*
463  * resizer_try_format - Try video format on a pad
464  * @resizer: ISS RESIZER device
465  * @fh : V4L2 subdev file handle
466  * @pad: Pad number
467  * @fmt: Format
468  */
469 static void
470 resizer_try_format(struct iss_resizer_device *resizer,
471                    struct v4l2_subdev_fh *fh, unsigned int pad,
472                    struct v4l2_mbus_framefmt *fmt,
473                    enum v4l2_subdev_format_whence which)
474 {
475         enum v4l2_mbus_pixelcode pixelcode;
476         struct v4l2_mbus_framefmt *format;
477         unsigned int width = fmt->width;
478         unsigned int height = fmt->height;
479         unsigned int i;
480
481         switch (pad) {
482         case RESIZER_PAD_SINK:
483                 for (i = 0; i < ARRAY_SIZE(resizer_fmts); i++) {
484                         if (fmt->code == resizer_fmts[i])
485                                 break;
486                 }
487
488                 /* If not found, use UYVY as default */
489                 if (i >= ARRAY_SIZE(resizer_fmts))
490                         fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
491
492                 /* Clamp the input size. */
493                 fmt->width = clamp_t(u32, width, 1, 8192);
494                 fmt->height = clamp_t(u32, height, 1, 8192);
495                 break;
496
497         case RESIZER_PAD_SOURCE_MEM:
498                 pixelcode = fmt->code;
499                 format = __resizer_get_format(resizer, fh, RESIZER_PAD_SINK,
500                                               which);
501                 memcpy(fmt, format, sizeof(*fmt));
502
503                 if ((pixelcode == V4L2_MBUS_FMT_YUYV8_1_5X8) &&
504                     (fmt->code == V4L2_MBUS_FMT_UYVY8_1X16))
505                         fmt->code = pixelcode;
506
507                 /* The data formatter truncates the number of horizontal output
508                  * pixels to a multiple of 16. To avoid clipping data, allow
509                  * callers to request an output size bigger than the input size
510                  * up to the nearest multiple of 16.
511                  */
512                 fmt->width = clamp_t(u32, width, 32, (fmt->width + 15) & ~15);
513                 fmt->width &= ~15;
514                 fmt->height = clamp_t(u32, height, 32, fmt->height);
515                 break;
516
517         }
518
519         fmt->colorspace = V4L2_COLORSPACE_JPEG;
520         fmt->field = V4L2_FIELD_NONE;
521 }
522
523 /*
524  * resizer_enum_mbus_code - Handle pixel format enumeration
525  * @sd     : pointer to v4l2 subdev structure
526  * @fh : V4L2 subdev file handle
527  * @code   : pointer to v4l2_subdev_mbus_code_enum structure
528  * return -EINVAL or zero on success
529  */
530 static int resizer_enum_mbus_code(struct v4l2_subdev *sd,
531                                struct v4l2_subdev_fh *fh,
532                                struct v4l2_subdev_mbus_code_enum *code)
533 {
534         struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd);
535         struct v4l2_mbus_framefmt *format;
536
537         switch (code->pad) {
538         case RESIZER_PAD_SINK:
539                 if (code->index >= ARRAY_SIZE(resizer_fmts))
540                         return -EINVAL;
541
542                 code->code = resizer_fmts[code->index];
543                 break;
544
545         case RESIZER_PAD_SOURCE_MEM:
546                 format = __resizer_get_format(resizer, fh, RESIZER_PAD_SINK,
547                                               V4L2_SUBDEV_FORMAT_TRY);
548
549                 if (code->index == 0) {
550                         code->code = format->code;
551                         break;
552                 }
553
554                 switch (format->code) {
555                 case V4L2_MBUS_FMT_UYVY8_1X16:
556                         if (code->index == 1)
557                                 code->code = V4L2_MBUS_FMT_YUYV8_1_5X8;
558                         else
559                                 return -EINVAL;
560                         break;
561                 default:
562                         if (code->index != 0)
563                                 return -EINVAL;
564                 }
565
566                 break;
567
568         default:
569                 return -EINVAL;
570         }
571
572         return 0;
573 }
574
575 static int resizer_enum_frame_size(struct v4l2_subdev *sd,
576                                 struct v4l2_subdev_fh *fh,
577                                 struct v4l2_subdev_frame_size_enum *fse)
578 {
579         struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd);
580         struct v4l2_mbus_framefmt format;
581
582         if (fse->index != 0)
583                 return -EINVAL;
584
585         format.code = fse->code;
586         format.width = 1;
587         format.height = 1;
588         resizer_try_format(resizer, fh, fse->pad, &format,
589                            V4L2_SUBDEV_FORMAT_TRY);
590         fse->min_width = format.width;
591         fse->min_height = format.height;
592
593         if (format.code != fse->code)
594                 return -EINVAL;
595
596         format.code = fse->code;
597         format.width = -1;
598         format.height = -1;
599         resizer_try_format(resizer, fh, fse->pad, &format,
600                            V4L2_SUBDEV_FORMAT_TRY);
601         fse->max_width = format.width;
602         fse->max_height = format.height;
603
604         return 0;
605 }
606
607 /*
608  * resizer_get_format - Retrieve the video format on a pad
609  * @sd : ISP RESIZER V4L2 subdevice
610  * @fh : V4L2 subdev file handle
611  * @fmt: Format
612  *
613  * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
614  * to the format type.
615  */
616 static int resizer_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
617                            struct v4l2_subdev_format *fmt)
618 {
619         struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd);
620         struct v4l2_mbus_framefmt *format;
621
622         format = __resizer_get_format(resizer, fh, fmt->pad, fmt->which);
623         if (format == NULL)
624                 return -EINVAL;
625
626         fmt->format = *format;
627         return 0;
628 }
629
630 /*
631  * resizer_set_format - Set the video format on a pad
632  * @sd : ISP RESIZER V4L2 subdevice
633  * @fh : V4L2 subdev file handle
634  * @fmt: Format
635  *
636  * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
637  * to the format type.
638  */
639 static int resizer_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
640                               struct v4l2_subdev_format *fmt)
641 {
642         struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd);
643         struct v4l2_mbus_framefmt *format;
644
645         format = __resizer_get_format(resizer, fh, fmt->pad, fmt->which);
646         if (format == NULL)
647                 return -EINVAL;
648
649         resizer_try_format(resizer, fh, fmt->pad, &fmt->format, fmt->which);
650         *format = fmt->format;
651
652         /* Propagate the format from sink to source */
653         if (fmt->pad == RESIZER_PAD_SINK) {
654                 format = __resizer_get_format(resizer, fh,
655                                               RESIZER_PAD_SOURCE_MEM,
656                                               fmt->which);
657                 *format = fmt->format;
658                 resizer_try_format(resizer, fh, RESIZER_PAD_SOURCE_MEM, format,
659                                 fmt->which);
660         }
661
662         return 0;
663 }
664
665 static int resizer_link_validate(struct v4l2_subdev *sd,
666                                  struct media_link *link,
667                                  struct v4l2_subdev_format *source_fmt,
668                                  struct v4l2_subdev_format *sink_fmt)
669 {
670         /* Check if the two ends match */
671         if (source_fmt->format.width != sink_fmt->format.width ||
672             source_fmt->format.height != sink_fmt->format.height)
673                 return -EPIPE;
674
675         if (source_fmt->format.code != sink_fmt->format.code)
676                 return -EPIPE;
677
678         return 0;
679 }
680
681 /*
682  * resizer_init_formats - Initialize formats on all pads
683  * @sd: ISP RESIZER V4L2 subdevice
684  * @fh: V4L2 subdev file handle
685  *
686  * Initialize all pad formats with default values. If fh is not NULL, try
687  * formats are initialized on the file handle. Otherwise active formats are
688  * initialized on the device.
689  */
690 static int resizer_init_formats(struct v4l2_subdev *sd,
691                                 struct v4l2_subdev_fh *fh)
692 {
693         struct v4l2_subdev_format format;
694
695         memset(&format, 0, sizeof(format));
696         format.pad = RESIZER_PAD_SINK;
697         format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
698         format.format.code = V4L2_MBUS_FMT_UYVY8_1X16;
699         format.format.width = 4096;
700         format.format.height = 4096;
701         resizer_set_format(sd, fh, &format);
702
703         return 0;
704 }
705
706 /* V4L2 subdev video operations */
707 static const struct v4l2_subdev_video_ops resizer_v4l2_video_ops = {
708         .s_stream = resizer_set_stream,
709 };
710
711 /* V4L2 subdev pad operations */
712 static const struct v4l2_subdev_pad_ops resizer_v4l2_pad_ops = {
713         .enum_mbus_code = resizer_enum_mbus_code,
714         .enum_frame_size = resizer_enum_frame_size,
715         .get_fmt = resizer_get_format,
716         .set_fmt = resizer_set_format,
717         .link_validate = resizer_link_validate,
718 };
719
720 /* V4L2 subdev operations */
721 static const struct v4l2_subdev_ops resizer_v4l2_ops = {
722         .video = &resizer_v4l2_video_ops,
723         .pad = &resizer_v4l2_pad_ops,
724 };
725
726 /* V4L2 subdev internal operations */
727 static const struct v4l2_subdev_internal_ops resizer_v4l2_internal_ops = {
728         .open = resizer_init_formats,
729 };
730
731 /* -----------------------------------------------------------------------------
732  * Media entity operations
733  */
734
735 /*
736  * resizer_link_setup - Setup RESIZER connections
737  * @entity: RESIZER media entity
738  * @local: Pad at the local end of the link
739  * @remote: Pad at the remote end of the link
740  * @flags: Link flags
741  *
742  * return -EINVAL or zero on success
743  */
744 static int resizer_link_setup(struct media_entity *entity,
745                            const struct media_pad *local,
746                            const struct media_pad *remote, u32 flags)
747 {
748         struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
749         struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd);
750         struct iss_device *iss = to_iss_device(resizer);
751
752         switch (local->index | media_entity_type(remote->entity)) {
753         case RESIZER_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
754                 /* Read from IPIPE or IPIPEIF. */
755                 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
756                         resizer->input = RESIZER_INPUT_NONE;
757                         break;
758                 }
759
760                 if (resizer->input != RESIZER_INPUT_NONE)
761                         return -EBUSY;
762
763                 if (remote->entity == &iss->ipipeif.subdev.entity)
764                         resizer->input = RESIZER_INPUT_IPIPEIF;
765                 else if (remote->entity == &iss->ipipe.subdev.entity)
766                         resizer->input = RESIZER_INPUT_IPIPE;
767
768
769                 break;
770
771         case RESIZER_PAD_SOURCE_MEM | MEDIA_ENT_T_DEVNODE:
772                 /* Write to memory */
773                 if (flags & MEDIA_LNK_FL_ENABLED) {
774                         if (resizer->output & ~RESIZER_OUTPUT_MEMORY)
775                                 return -EBUSY;
776                         resizer->output |= RESIZER_OUTPUT_MEMORY;
777                 } else {
778                         resizer->output &= ~RESIZER_OUTPUT_MEMORY;
779                 }
780                 break;
781
782         default:
783                 return -EINVAL;
784         }
785
786         return 0;
787 }
788
789 /* media operations */
790 static const struct media_entity_operations resizer_media_ops = {
791         .link_setup = resizer_link_setup,
792         .link_validate = v4l2_subdev_link_validate,
793 };
794
795 /*
796  * resizer_init_entities - Initialize V4L2 subdev and media entity
797  * @resizer: ISS ISP RESIZER module
798  *
799  * Return 0 on success and a negative error code on failure.
800  */
801 static int resizer_init_entities(struct iss_resizer_device *resizer)
802 {
803         struct v4l2_subdev *sd = &resizer->subdev;
804         struct media_pad *pads = resizer->pads;
805         struct media_entity *me = &sd->entity;
806         int ret;
807
808         resizer->input = RESIZER_INPUT_NONE;
809
810         v4l2_subdev_init(sd, &resizer_v4l2_ops);
811         sd->internal_ops = &resizer_v4l2_internal_ops;
812         strlcpy(sd->name, "OMAP4 ISS ISP resizer", sizeof(sd->name));
813         sd->grp_id = 1 << 16;   /* group ID for iss subdevs */
814         v4l2_set_subdevdata(sd, resizer);
815         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
816
817         pads[RESIZER_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
818         pads[RESIZER_PAD_SOURCE_MEM].flags = MEDIA_PAD_FL_SOURCE;
819
820         me->ops = &resizer_media_ops;
821         ret = media_entity_init(me, RESIZER_PADS_NUM, pads, 0);
822         if (ret < 0)
823                 return ret;
824
825         resizer_init_formats(sd, NULL);
826
827         resizer->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
828         resizer->video_out.ops = &resizer_video_ops;
829         resizer->video_out.iss = to_iss_device(resizer);
830         resizer->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
831         resizer->video_out.bpl_alignment = 32;
832         resizer->video_out.bpl_zero_padding = 1;
833         resizer->video_out.bpl_max = 0x1ffe0;
834
835         ret = omap4iss_video_init(&resizer->video_out, "ISP resizer a");
836         if (ret < 0)
837                 return ret;
838
839         /* Connect the RESIZER subdev to the video node. */
840         ret = media_entity_create_link(&resizer->subdev.entity,
841                                        RESIZER_PAD_SOURCE_MEM,
842                                        &resizer->video_out.video.entity, 0, 0);
843         if (ret < 0)
844                 return ret;
845
846         return 0;
847 }
848
849 void omap4iss_resizer_unregister_entities(struct iss_resizer_device *resizer)
850 {
851         media_entity_cleanup(&resizer->subdev.entity);
852
853         v4l2_device_unregister_subdev(&resizer->subdev);
854         omap4iss_video_unregister(&resizer->video_out);
855 }
856
857 int omap4iss_resizer_register_entities(struct iss_resizer_device *resizer,
858         struct v4l2_device *vdev)
859 {
860         int ret;
861
862         /* Register the subdev and video node. */
863         ret = v4l2_device_register_subdev(vdev, &resizer->subdev);
864         if (ret < 0)
865                 goto error;
866
867         ret = omap4iss_video_register(&resizer->video_out, vdev);
868         if (ret < 0)
869                 goto error;
870
871         return 0;
872
873 error:
874         omap4iss_resizer_unregister_entities(resizer);
875         return ret;
876 }
877
878 /* -----------------------------------------------------------------------------
879  * ISP RESIZER initialisation and cleanup
880  */
881
882 /*
883  * omap4iss_resizer_init - RESIZER module initialization.
884  * @iss: Device pointer specific to the OMAP4 ISS.
885  *
886  * TODO: Get the initialisation values from platform data.
887  *
888  * Return 0 on success or a negative error code otherwise.
889  */
890 int omap4iss_resizer_init(struct iss_device *iss)
891 {
892         struct iss_resizer_device *resizer = &iss->resizer;
893
894         resizer->state = ISS_PIPELINE_STREAM_STOPPED;
895         init_waitqueue_head(&resizer->wait);
896
897         return resizer_init_entities(resizer);
898 }
899
900 /*
901  * omap4iss_resizer_cleanup - RESIZER module cleanup.
902  * @iss: Device pointer specific to the OMAP4 ISS.
903  */
904 void omap4iss_resizer_cleanup(struct iss_device *iss)
905 {
906         /* FIXME: are you sure there's nothing to do? */
907 }