4 * lirc_serial - Device driver that records pulse- and pause-lengths
5 * (space-lengths) between DDCD event on a serial port.
7 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
8 * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
9 * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
10 * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
11 * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 * Steve's changes to improve transmission fidelity:
30 * - for systems with the rdtsc instruction and the clock counter, a
31 * send_pule that times the pulses directly using the counter.
32 * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
33 * not needed. Measurement shows very stable waveform, even where
34 * PCI activity slows the access to the UART, which trips up other
36 * - For other system, non-integer-microsecond pulse/space lengths,
37 * done using fixed point binary. So, much more accurate carrier
39 * - fine tuned transmitter latency, taking advantage of fractional
40 * microseconds in previous change
41 * - Fixed bug in the way transmitter latency was accounted for by
42 * tuning the pulse lengths down - the send_pulse routine ignored
43 * this overhead as it timed the overall pulse length - so the
44 * pulse frequency was right but overall pulse length was too
45 * long. Fixed by accounting for latency on each pulse/space
48 * Steve Davies <steve@daviesfam.org> July 2001
51 #include <linux/module.h>
52 #include <linux/errno.h>
53 #include <linux/signal.h>
54 #include <linux/sched.h>
56 #include <linux/interrupt.h>
57 #include <linux/ioport.h>
58 #include <linux/kernel.h>
59 #include <linux/serial_reg.h>
60 #include <linux/time.h>
61 #include <linux/string.h>
62 #include <linux/types.h>
63 #include <linux/wait.h>
65 #include <linux/delay.h>
66 #include <linux/poll.h>
67 #include <linux/platform_device.h>
70 #include <linux/irq.h>
71 #include <linux/fcntl.h>
72 #include <linux/spinlock.h>
74 #ifdef CONFIG_LIRC_SERIAL_NSLU2
75 #include <asm/hardware.h>
77 /* From Intel IXP42X Developer's Manual (#252480-005): */
78 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
79 #define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */
80 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
82 #include <media/lirc.h>
83 #include <media/lirc_dev.h>
85 #define LIRC_DRIVER_NAME "lirc_serial"
89 int signal_pin_change;
92 long (*send_pulse)(unsigned long length);
93 void (*send_space)(long length);
98 #define LIRC_HOMEBREW 0
100 #define LIRC_IRDEO_REMOTE 2
101 #define LIRC_ANIMAX 3
105 /*** module parameters ***/
111 static bool softcarrier = 1;
112 static bool share_irq;
114 static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
115 static bool txsense; /* 0 = active high, 1 = active low */
117 #define dprintk(fmt, args...) \
120 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
124 /* forward declarations */
125 static long send_pulse_irdeo(unsigned long length);
126 static long send_pulse_homebrew(unsigned long length);
127 static void send_space_irdeo(long length);
128 static void send_space_homebrew(long length);
130 static struct lirc_serial hardware[] = {
132 .signal_pin = UART_MSR_DCD,
133 .signal_pin_change = UART_MSR_DDCD,
134 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
135 .off = (UART_MCR_RTS | UART_MCR_OUT2),
136 .send_pulse = send_pulse_homebrew,
137 .send_space = send_space_homebrew,
138 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
139 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
140 LIRC_CAN_SET_SEND_CARRIER |
141 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
143 .features = LIRC_CAN_REC_MODE2
148 .signal_pin = UART_MSR_DSR,
149 .signal_pin_change = UART_MSR_DDSR,
151 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
152 .send_pulse = send_pulse_irdeo,
153 .send_space = send_space_irdeo,
154 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
155 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
158 [LIRC_IRDEO_REMOTE] = {
159 .signal_pin = UART_MSR_DSR,
160 .signal_pin_change = UART_MSR_DDSR,
161 .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
162 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
163 .send_pulse = send_pulse_irdeo,
164 .send_space = send_space_irdeo,
165 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
166 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
170 .signal_pin = UART_MSR_DCD,
171 .signal_pin_change = UART_MSR_DDCD,
173 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
176 .features = LIRC_CAN_REC_MODE2
180 .signal_pin = UART_MSR_DSR,
181 .signal_pin_change = UART_MSR_DDSR,
182 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
183 .off = (UART_MCR_RTS | UART_MCR_OUT2),
184 .send_pulse = send_pulse_homebrew,
185 .send_space = send_space_homebrew,
186 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
187 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
188 LIRC_CAN_SET_SEND_CARRIER |
189 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
191 .features = LIRC_CAN_REC_MODE2
195 #ifdef CONFIG_LIRC_SERIAL_NSLU2
197 * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
198 * We receive on CTS of the 2nd serial port (R142,LHS), we
199 * transmit with a IR diode between GPIO[1] (green status LED),
200 * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
201 * See also http://www.nslu2-linux.org for this device
204 .signal_pin = UART_MSR_CTS,
205 .signal_pin_change = UART_MSR_DCTS,
206 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
207 .off = (UART_MCR_RTS | UART_MCR_OUT2),
208 .send_pulse = send_pulse_homebrew,
209 .send_space = send_space_homebrew,
210 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
211 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
212 LIRC_CAN_SET_SEND_CARRIER |
213 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
215 .features = LIRC_CAN_REC_MODE2
222 #define RS_ISR_PASS_LIMIT 256
225 * A long pulse code from a remote might take up to 300 bytes. The
226 * daemon should read the bytes as soon as they are generated, so take
227 * the number of keys you think you can push before the daemon runs
228 * and multiply by 300. The driver will warn you if you overrun this
229 * buffer. If you have a slow computer or non-busmastering IDE disks,
230 * maybe you will need to increase this.
233 /* This MUST be a power of two! It has to be larger than 1 as well. */
237 static struct timeval lasttv = {0, 0};
239 static struct lirc_buffer rbuf;
241 static unsigned int freq = 38000;
242 static unsigned int duty_cycle = 50;
244 /* Initialized in init_timing_params() */
245 static unsigned long period;
246 static unsigned long pulse_width;
247 static unsigned long space_width;
249 #if defined(__i386__)
252 * Linux I/O port programming mini-HOWTO
253 * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
254 * v, 28 December 1997
257 * Actually, a port I/O instruction on most ports in the 0-0x3ff range
258 * takes almost exactly 1 microsecond, so if you're, for example, using
259 * the parallel port directly, just do additional inb()s from that port
263 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
264 * comment above plus trimming to match actual measured frequency.
265 * This will be sensitive to cpu speed, though hopefully most of the 1.5us
266 * is spent in the uart access. Still - for reference test machine was a
267 * 1.13GHz Athlon system - Steve
271 * changed from 400 to 450 as this works better on slower machines;
272 * faster machines will use the rdtsc code anyway
274 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
278 /* does anybody have information on other platforms ? */
280 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
282 #endif /* __i386__ */
284 * FIXME: should we be using hrtimers instead of this
285 * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
288 /* fetch serial input packet (1 byte) from register offset */
289 static u8 sinp(int offset)
292 /* the register is memory-mapped */
295 return inb(io + offset);
298 /* write serial output packet (1 byte) of value to register offset */
299 static void soutp(int offset, u8 value)
302 /* the register is memory-mapped */
305 outb(value, io + offset);
310 #ifdef CONFIG_LIRC_SERIAL_NSLU2
312 * On NSLU2, we put the transmit diode between the output of the green
313 * status LED and ground
315 if (type == LIRC_NSLU2) {
316 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW);
321 soutp(UART_MCR, hardware[type].off);
323 soutp(UART_MCR, hardware[type].on);
326 static void off(void)
328 #ifdef CONFIG_LIRC_SERIAL_NSLU2
329 if (type == LIRC_NSLU2) {
330 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH);
335 soutp(UART_MCR, hardware[type].on);
337 soutp(UART_MCR, hardware[type].off);
340 #ifndef MAX_UDELAY_MS
341 #define MAX_UDELAY_US 5000
343 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
346 static void safe_udelay(unsigned long usecs)
348 while (usecs > MAX_UDELAY_US) {
349 udelay(MAX_UDELAY_US);
350 usecs -= MAX_UDELAY_US;
357 * This is an overflow/precision juggle, complicated in that we can't
358 * do long long divide in the kernel
362 * When we use the rdtsc instruction to measure clocks, we keep the
363 * pulse and space widths as clock cycles. As this is CPU speed
364 * dependent, the widths must be calculated in init_port and ioctl
368 /* So send_pulse can quickly convert microseconds to clocks */
369 static unsigned long conv_us_to_clocks;
371 static int init_timing_params(unsigned int new_duty_cycle,
372 unsigned int new_freq)
374 __u64 loops_per_sec, work;
376 duty_cycle = new_duty_cycle;
379 loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
382 /* How many clocks in a microsecond?, avoiding long long divide */
383 work = loops_per_sec;
384 work *= 4295; /* 4295 = 2^32 / 1e6 */
385 conv_us_to_clocks = (work >> 32);
388 * Carrier period in clocks, approach good up to 32GHz clock,
389 * gets carrier frequency within 8Hz
391 period = loops_per_sec >> 3;
392 period /= (freq >> 3);
394 /* Derive pulse and space from the period */
395 pulse_width = period * duty_cycle / 100;
396 space_width = period - pulse_width;
397 dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
398 "clk/jiffy=%ld, pulse=%ld, space=%ld, "
399 "conv_us_to_clocks=%ld\n",
400 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
401 pulse_width, space_width, conv_us_to_clocks);
404 #else /* ! USE_RDTSC */
405 static int init_timing_params(unsigned int new_duty_cycle,
406 unsigned int new_freq)
409 * period, pulse/space width are kept with 8 binary places -
410 * IE multiplied by 256.
412 if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
413 LIRC_SERIAL_TRANSMITTER_LATENCY)
415 if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
416 LIRC_SERIAL_TRANSMITTER_LATENCY)
418 duty_cycle = new_duty_cycle;
420 period = 256 * 1000000L / freq;
421 pulse_width = period * duty_cycle / 100;
422 space_width = period - pulse_width;
423 dprintk("in init_timing_params, freq=%d pulse=%ld, "
424 "space=%ld\n", freq, pulse_width, space_width);
427 #endif /* USE_RDTSC */
430 /* return value: space length delta */
432 static long send_pulse_irdeo(unsigned long length)
436 unsigned char output;
437 unsigned char chunk, shifted;
439 /* how many bits have to be sent ? */
440 rawbits = length * 1152 / 10000;
445 for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
446 shifted = chunk << (i * 3);
448 output &= (~shifted);
451 soutp(UART_TX, output);
452 while (!(sinp(UART_LSR) & UART_LSR_THRE))
459 soutp(UART_TX, output);
460 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
465 ret = (-rawbits) * 10000 / 1152;
467 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
473 /* Version that uses Pentium rdtsc instruction to measure clocks */
476 * This version does sub-microsecond timing using rdtsc instruction,
477 * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
478 * Implicitly i586 architecture... - Steve
481 static long send_pulse_homebrew_softcarrier(unsigned long length)
484 unsigned long target, start, now;
486 /* Get going quick as we can */
489 /* Convert length from microseconds to clocks */
490 length *= conv_us_to_clocks;
491 /* And loop till time is up - flipping at right intervals */
493 target = pulse_width;
496 * FIXME: This looks like a hard busy wait, without even an occasional,
497 * polite, cpu_relax() call. There's got to be a better way?
499 * The i2c code has the result of a lot of bit-banging work, I wonder if
500 * there's something there which could be helpful here.
502 while ((now - start) < length) {
503 /* Delay till flip time */
506 } while ((now - start) < target);
512 target += space_width;
515 target += pulse_width;
520 return ((now - start) - length) / conv_us_to_clocks;
522 #else /* ! USE_RDTSC */
523 /* Version using udelay() */
526 * here we use fixed point arithmetic, with 8
527 * fractional bits. that gets us within 0.1% or so of the right average
528 * frequency, albeit with some jitter in pulse length - Steve
531 /* To match 8 fractional bits used for pulse/space length */
533 static long send_pulse_homebrew_softcarrier(unsigned long length)
536 unsigned long actual, target, d;
539 actual = 0; target = 0; flag = 0;
540 while (actual < length) {
543 target += space_width;
546 target += pulse_width;
548 d = (target - actual -
549 LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
551 * Note - we've checked in ioctl that the pulse/space
552 * widths are big enough so that d is > 0
555 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
558 return (actual-length) >> 8;
560 #endif /* USE_RDTSC */
562 static long send_pulse_homebrew(unsigned long length)
568 return send_pulse_homebrew_softcarrier(length);
576 static void send_space_irdeo(long length)
584 static void send_space_homebrew(long length)
592 static void rbwrite(int l)
594 if (lirc_buffer_full(&rbuf)) {
595 /* no new signals will be accepted */
596 dprintk("Buffer overrun\n");
599 lirc_buffer_write(&rbuf, (void *)&l);
602 static void frbwrite(int l)
604 /* simple noise filter */
605 static int pulse, space;
606 static unsigned int ptr;
608 if (ptr > 0 && (l & PULSE_BIT)) {
609 pulse += l & PULSE_MASK;
612 rbwrite(pulse | PULSE_BIT);
618 if (!(l & PULSE_BIT)) {
628 if (space > PULSE_MASK)
631 if (space > PULSE_MASK)
637 rbwrite(pulse | PULSE_BIT);
645 static irqreturn_t irq_handler(int i, void *blah)
652 static int last_dcd = -1;
654 if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
655 /* not our interrupt */
662 status = sinp(UART_MSR);
663 if (counter > RS_ISR_PASS_LIMIT) {
664 printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: "
668 if ((status & hardware[type].signal_pin_change)
670 /* get current time */
671 do_gettimeofday(&tv);
673 /* New mode, written by Trent Piepho
674 <xyzzy@u.washington.edu>. */
677 * The old format was not very portable.
678 * We now use an int to pass pulses
679 * and spaces to user space.
681 * If PULSE_BIT is set a pulse has been
682 * received, otherwise a space has been
683 * received. The driver needs to know if your
684 * receiver is active high or active low, or
685 * the space/pulse sense could be
686 * inverted. The bits denoted by PULSE_MASK are
687 * the length in microseconds. Lengths greater
688 * than or equal to 16 seconds are clamped to
689 * PULSE_MASK. All other bits are unused.
690 * This is a much simpler interface for user
691 * programs, as well as eliminating "out of
692 * phase" errors with space/pulse
696 /* calc time since last interrupt in microseconds */
697 dcd = (status & hardware[type].signal_pin) ? 1 : 0;
699 if (dcd == last_dcd) {
700 printk(KERN_WARNING LIRC_DRIVER_NAME
701 ": ignoring spike: %d %d %lx %lx %lx %lx\n",
703 tv.tv_sec, lasttv.tv_sec,
704 tv.tv_usec, lasttv.tv_usec);
708 deltv = tv.tv_sec-lasttv.tv_sec;
709 if (tv.tv_sec < lasttv.tv_sec ||
710 (tv.tv_sec == lasttv.tv_sec &&
711 tv.tv_usec < lasttv.tv_usec)) {
712 printk(KERN_WARNING LIRC_DRIVER_NAME
713 ": AIEEEE: your clock just jumped "
715 printk(KERN_WARNING LIRC_DRIVER_NAME
716 ": %d %d %lx %lx %lx %lx\n",
718 tv.tv_sec, lasttv.tv_sec,
719 tv.tv_usec, lasttv.tv_usec);
721 } else if (deltv > 15) {
722 data = PULSE_MASK; /* really long time */
725 printk(KERN_WARNING LIRC_DRIVER_NAME
727 "%d %d %lx %lx %lx %lx\n",
729 tv.tv_sec, lasttv.tv_sec,
730 tv.tv_usec, lasttv.tv_usec);
732 * detecting pulse while this
735 sense = sense ? 0 : 1;
738 data = (int) (deltv*1000000 +
741 frbwrite(dcd^sense ? data : (data|PULSE_BIT));
744 wake_up_interruptible(&rbuf.wait_poll);
746 } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
751 static int hardware_init_port(void)
753 u8 scratch, scratch2, scratch3;
756 * This is a simple port existence test, borrowed from the autoconfig
757 * function in drivers/serial/8250.c
759 scratch = sinp(UART_IER);
764 scratch2 = sinp(UART_IER) & 0x0f;
765 soutp(UART_IER, 0x0f);
769 scratch3 = sinp(UART_IER) & 0x0f;
770 soutp(UART_IER, scratch);
771 if (scratch2 != 0 || scratch3 != 0x0f) {
772 /* we fail, there's nothing here */
773 printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test "
774 "failed, cannot continue\n");
781 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
783 /* First of all, disable all interrupts */
784 soutp(UART_IER, sinp(UART_IER) &
785 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
787 /* Clear registers. */
793 #ifdef CONFIG_LIRC_SERIAL_NSLU2
794 if (type == LIRC_NSLU2) {
795 /* Setup NSLU2 UART */
798 soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE);
799 /* Disable Receiver data Time out interrupt */
800 soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE);
801 /* set out2 = interrupt unmask; off() doesn't set MCR
803 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
807 /* Set line for power source */
810 /* Clear registers again to be sure. */
818 case LIRC_IRDEO_REMOTE:
819 /* setup port to 7N1 @ 115200 Baud */
820 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
823 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
824 /* Set divisor to 1 => 115200 Baud */
827 /* Set DLAB 0 + 7N1 */
828 soutp(UART_LCR, UART_LCR_WLEN7);
829 /* THR interrupt already disabled at this point */
838 static int __devinit lirc_serial_probe(struct platform_device *dev)
840 int i, nlow, nhigh, result;
842 result = request_irq(irq, irq_handler,
843 (share_irq ? IRQF_SHARED : 0),
844 LIRC_DRIVER_NAME, (void *)&hardware);
846 if (result == -EBUSY)
847 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n",
849 else if (result == -EINVAL)
850 printk(KERN_ERR LIRC_DRIVER_NAME
851 ": Bad irq number or handler\n");
855 /* Reserve io region. */
857 * Future MMAP-Developers: Attention!
858 * For memory mapped I/O you *might* need to use ioremap() first,
859 * for the NSLU2 it's done in boot code.
862 && (request_mem_region(iommap, 8 << ioshift,
863 LIRC_DRIVER_NAME) == NULL))
865 && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) {
866 printk(KERN_ERR LIRC_DRIVER_NAME
867 ": port %04x already in use\n", io);
868 printk(KERN_WARNING LIRC_DRIVER_NAME
869 ": use 'setserial /dev/ttySX uart none'\n");
870 printk(KERN_WARNING LIRC_DRIVER_NAME
871 ": or compile the serial port driver as module and\n");
872 printk(KERN_WARNING LIRC_DRIVER_NAME
873 ": make sure this module is loaded first\n");
878 result = hardware_init_port();
880 goto exit_release_region;
882 /* Initialize pulse/space widths */
883 init_timing_params(duty_cycle, freq);
885 /* If pin is high, then this must be an active low receiver. */
887 /* wait 1/2 sec for the power supply */
891 * probe 9 times every 0.04s, collect "votes" for
896 for (i = 0; i < 9; i++) {
897 if (sinp(UART_MSR) & hardware[type].signal_pin)
903 sense = (nlow >= nhigh ? 1 : 0);
904 printk(KERN_INFO LIRC_DRIVER_NAME ": auto-detected active "
905 "%s receiver\n", sense ? "low" : "high");
907 printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active "
908 "%s receiver\n", sense ? "low" : "high");
910 dprintk("Interrupt %d, port %04x obtained\n", irq, io);
915 release_mem_region(iommap, 8 << ioshift);
917 release_region(io, 8);
919 free_irq(irq, (void *)&hardware);
924 static int __devexit lirc_serial_remove(struct platform_device *dev)
926 free_irq(irq, (void *)&hardware);
929 release_mem_region(iommap, 8 << ioshift);
931 release_region(io, 8);
936 static int set_use_inc(void *data)
940 /* initialize timestamp */
941 do_gettimeofday(&lasttv);
943 spin_lock_irqsave(&hardware[type].lock, flags);
946 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
948 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
950 spin_unlock_irqrestore(&hardware[type].lock, flags);
955 static void set_use_dec(void *data)
956 { unsigned long flags;
958 spin_lock_irqsave(&hardware[type].lock, flags);
961 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
963 /* First of all, disable all interrupts */
964 soutp(UART_IER, sinp(UART_IER) &
965 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
966 spin_unlock_irqrestore(&hardware[type].lock, flags);
969 static ssize_t lirc_write(struct file *file, const char *buf,
970 size_t n, loff_t *ppos)
977 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
980 count = n / sizeof(int);
981 if (n % sizeof(int) || count % 2 == 0)
983 wbuf = memdup_user(buf, n);
985 return PTR_ERR(wbuf);
986 spin_lock_irqsave(&hardware[type].lock, flags);
987 if (type == LIRC_IRDEO) {
991 for (i = 0; i < count; i++) {
993 hardware[type].send_space(wbuf[i] - delta);
995 delta = hardware[type].send_pulse(wbuf[i]);
998 spin_unlock_irqrestore(&hardware[type].lock, flags);
1003 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
1009 case LIRC_GET_SEND_MODE:
1010 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1011 return -ENOIOCTLCMD;
1013 result = put_user(LIRC_SEND2MODE
1014 (hardware[type].features&LIRC_CAN_SEND_MASK),
1020 case LIRC_SET_SEND_MODE:
1021 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1022 return -ENOIOCTLCMD;
1024 result = get_user(value, (__u32 *) arg);
1027 /* only LIRC_MODE_PULSE supported */
1028 if (value != LIRC_MODE_PULSE)
1032 case LIRC_GET_LENGTH:
1033 return -ENOIOCTLCMD;
1036 case LIRC_SET_SEND_DUTY_CYCLE:
1037 dprintk("SET_SEND_DUTY_CYCLE\n");
1038 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
1039 return -ENOIOCTLCMD;
1041 result = get_user(value, (__u32 *) arg);
1044 if (value <= 0 || value > 100)
1046 return init_timing_params(value, freq);
1049 case LIRC_SET_SEND_CARRIER:
1050 dprintk("SET_SEND_CARRIER\n");
1051 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
1052 return -ENOIOCTLCMD;
1054 result = get_user(value, (__u32 *) arg);
1057 if (value > 500000 || value < 20000)
1059 return init_timing_params(duty_cycle, value);
1063 return lirc_dev_fop_ioctl(filep, cmd, arg);
1068 static const struct file_operations lirc_fops = {
1069 .owner = THIS_MODULE,
1070 .write = lirc_write,
1071 .unlocked_ioctl = lirc_ioctl,
1072 #ifdef CONFIG_COMPAT
1073 .compat_ioctl = lirc_ioctl,
1075 .read = lirc_dev_fop_read,
1076 .poll = lirc_dev_fop_poll,
1077 .open = lirc_dev_fop_open,
1078 .release = lirc_dev_fop_close,
1079 .llseek = no_llseek,
1082 static struct lirc_driver driver = {
1083 .name = LIRC_DRIVER_NAME,
1090 .set_use_inc = set_use_inc,
1091 .set_use_dec = set_use_dec,
1094 .owner = THIS_MODULE,
1097 static struct platform_device *lirc_serial_dev;
1099 static int lirc_serial_suspend(struct platform_device *dev,
1103 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1105 /* Disable all interrupts */
1106 soutp(UART_IER, sinp(UART_IER) &
1107 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
1109 /* Clear registers. */
1118 /* twisty maze... need a forward-declaration here... */
1119 static void lirc_serial_exit(void);
1121 static int lirc_serial_resume(struct platform_device *dev)
1123 unsigned long flags;
1126 result = hardware_init_port();
1130 spin_lock_irqsave(&hardware[type].lock, flags);
1131 /* Enable Interrupt */
1132 do_gettimeofday(&lasttv);
1133 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
1136 lirc_buffer_clear(&rbuf);
1138 spin_unlock_irqrestore(&hardware[type].lock, flags);
1143 static struct platform_driver lirc_serial_driver = {
1144 .probe = lirc_serial_probe,
1145 .remove = __devexit_p(lirc_serial_remove),
1146 .suspend = lirc_serial_suspend,
1147 .resume = lirc_serial_resume,
1149 .name = "lirc_serial",
1150 .owner = THIS_MODULE,
1154 static int __init lirc_serial_init(void)
1158 /* Init read buffer. */
1159 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1163 result = platform_driver_register(&lirc_serial_driver);
1165 printk("lirc register returned %d\n", result);
1166 goto exit_buffer_free;
1169 lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1170 if (!lirc_serial_dev) {
1172 goto exit_driver_unregister;
1175 result = platform_device_add(lirc_serial_dev);
1177 goto exit_device_put;
1182 platform_device_put(lirc_serial_dev);
1183 exit_driver_unregister:
1184 platform_driver_unregister(&lirc_serial_driver);
1186 lirc_buffer_free(&rbuf);
1190 static void lirc_serial_exit(void)
1192 platform_device_unregister(lirc_serial_dev);
1193 platform_driver_unregister(&lirc_serial_driver);
1194 lirc_buffer_free(&rbuf);
1197 static int __init lirc_serial_init_module(void)
1204 case LIRC_IRDEO_REMOTE:
1207 /* if nothing specified, use ttyS0/com1 and irq 4 */
1208 io = io ? io : 0x3f8;
1209 irq = irq ? irq : 4;
1211 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1213 io = io ? io : IRQ_IXP4XX_UART2;
1214 irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET);
1215 iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS;
1216 ioshift = ioshift ? ioshift : 2;
1226 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1229 hardware[type].features &=
1230 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1231 LIRC_CAN_SET_SEND_CARRIER);
1236 result = lirc_serial_init();
1240 driver.features = hardware[type].features;
1241 driver.dev = &lirc_serial_dev->dev;
1242 driver.minor = lirc_register_driver(&driver);
1243 if (driver.minor < 0) {
1244 printk(KERN_ERR LIRC_DRIVER_NAME
1245 ": register_chrdev failed!\n");
1247 return driver.minor;
1252 static void __exit lirc_serial_exit_module(void)
1254 lirc_unregister_driver(driver.minor);
1256 dprintk("cleaned up module\n");
1260 module_init(lirc_serial_init_module);
1261 module_exit(lirc_serial_exit_module);
1263 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1264 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1265 "Christoph Bartelmus, Andrei Tanas");
1266 MODULE_LICENSE("GPL");
1268 module_param(type, int, S_IRUGO);
1269 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1270 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1271 " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1273 module_param(io, int, S_IRUGO);
1274 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1276 /* some architectures (e.g. intel xscale) have memory mapped registers */
1277 module_param(iommap, bool, S_IRUGO);
1278 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1279 " (0 = no memory mapped io)");
1282 * some architectures (e.g. intel xscale) align the 8bit serial registers
1283 * on 32bit word boundaries.
1284 * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
1286 module_param(ioshift, int, S_IRUGO);
1287 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1289 module_param(irq, int, S_IRUGO);
1290 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1292 module_param(share_irq, bool, S_IRUGO);
1293 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1295 module_param(sense, bool, S_IRUGO);
1296 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1297 " (0 = active high, 1 = active low )");
1299 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1300 module_param(txsense, bool, S_IRUGO);
1301 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1302 " (0 = active high, 1 = active low )");
1305 module_param(softcarrier, bool, S_IRUGO);
1306 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
1308 module_param(debug, bool, S_IRUGO | S_IWUSR);
1309 MODULE_PARM_DESC(debug, "Enable debugging messages");