Pileus Git - ~andy/linux/blob - drivers/staging/iio/meter/ade7758_core.c

   1 /*
   2  * ADE7758 Poly Phase Multifunction Energy Metering IC driver
   3  *
   4  * Copyright 2010-2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/irq.h>
  11 #include <linux/delay.h>
  12 #include <linux/mutex.h>
  13 #include <linux/device.h>
  14 #include <linux/kernel.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/slab.h>
  17 #include <linux/sysfs.h>
  18 #include <linux/list.h>
  19 #include <linux/module.h>
  20
  21 #include <linux/iio/iio.h>
  22 #include <linux/iio/sysfs.h>
  23 #include <linux/iio/buffer.h>
  24 #include "meter.h"
  25 #include "ade7758.h"
  26
  27 int ade7758_spi_write_reg_8(struct device *dev,
  28                 u8 reg_address,
  29                 u8 val)
  30 {
  31         int ret;
  32         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  33         struct ade7758_state *st = iio_priv(indio_dev);
  34
  35         mutex_lock(&st->buf_lock);
  36         st->tx[0] = ADE7758_WRITE_REG(reg_address);
  37         st->tx[1] = val;
  38
  39         ret = spi_write(st->us, st->tx, 2);
  40         mutex_unlock(&st->buf_lock);
  41
  42         return ret;
  43 }
  44
  45 static int ade7758_spi_write_reg_16(struct device *dev,
  46                 u8 reg_address,
  47                 u16 value)
  48 {
  49         int ret;
  50         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  51         struct ade7758_state *st = iio_priv(indio_dev);
  52         struct spi_transfer xfers[] = {
  53                 {
  54                         .tx_buf = st->tx,
  55                         .bits_per_word = 8,
  56                         .len = 3,
  57                 }
  58         };
  59
  60         mutex_lock(&st->buf_lock);
  61         st->tx[0] = ADE7758_WRITE_REG(reg_address);
  62         st->tx[1] = (value >> 8) & 0xFF;
  63         st->tx[2] = value & 0xFF;
  64
  65         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
  66         mutex_unlock(&st->buf_lock);
  67
  68         return ret;
  69 }
  70
  71 static int ade7758_spi_write_reg_24(struct device *dev,
  72                 u8 reg_address,
  73                 u32 value)
  74 {
  75         int ret;
  76         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  77         struct ade7758_state *st = iio_priv(indio_dev);
  78         struct spi_transfer xfers[] = {
  79                 {
  80                         .tx_buf = st->tx,
  81                         .bits_per_word = 8,
  82                         .len = 4,
  83                 }
  84         };
  85
  86         mutex_lock(&st->buf_lock);
  87         st->tx[0] = ADE7758_WRITE_REG(reg_address);
  88         st->tx[1] = (value >> 16) & 0xFF;
  89         st->tx[2] = (value >> 8) & 0xFF;
  90         st->tx[3] = value & 0xFF;
  91
  92         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
  93         mutex_unlock(&st->buf_lock);
  94
  95         return ret;
  96 }
  97
  98 int ade7758_spi_read_reg_8(struct device *dev,
  99                 u8 reg_address,
 100                 u8 *val)
 101 {
 102         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 103         struct ade7758_state *st = iio_priv(indio_dev);
 104         int ret;
 105         struct spi_transfer xfers[] = {
 106                 {
 107                         .tx_buf = st->tx,
 108                         .bits_per_word = 8,
 109                         .len = 1,
 110                         .delay_usecs = 4,
 111                 },
 112                 {
 113                         .tx_buf = &st->tx[1],
 114                         .rx_buf = st->rx,
 115                         .bits_per_word = 8,
 116                         .len = 1,
 117                 },
 118         };
 119
 120         mutex_lock(&st->buf_lock);
 121         st->tx[0] = ADE7758_READ_REG(reg_address);
 122         st->tx[1] = 0;
 123
 124         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
 125         if (ret) {
 126                 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
 127                                 reg_address);
 128                 goto error_ret;
 129         }
 130         *val = st->rx[0];
 131
 132 error_ret:
 133         mutex_unlock(&st->buf_lock);
 134         return ret;
 135 }
 136
 137 static int ade7758_spi_read_reg_16(struct device *dev,
 138                 u8 reg_address,
 139                 u16 *val)
 140 {
 141         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 142         struct ade7758_state *st = iio_priv(indio_dev);
 143         int ret;
 144         struct spi_transfer xfers[] = {
 145                 {
 146                         .tx_buf = st->tx,
 147                         .bits_per_word = 8,
 148                         .len = 1,
 149                         .delay_usecs = 4,
 150                 },
 151                 {
 152                         .tx_buf = &st->tx[1],
 153                         .rx_buf = st->rx,
 154                         .bits_per_word = 8,
 155                         .len = 2,
 156                 },
 157         };
 158
 159
 160         mutex_lock(&st->buf_lock);
 161         st->tx[0] = ADE7758_READ_REG(reg_address);
 162         st->tx[1] = 0;
 163         st->tx[2] = 0;
 164
 165         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
 166         if (ret) {
 167                 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
 168                                 reg_address);
 169                 goto error_ret;
 170         }
 171
 172         *val = (st->rx[0] << 8) | st->rx[1];
 173
 174 error_ret:
 175         mutex_unlock(&st->buf_lock);
 176         return ret;
 177 }
 178
 179 static int ade7758_spi_read_reg_24(struct device *dev,
 180                 u8 reg_address,
 181                 u32 *val)
 182 {
 183         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 184         struct ade7758_state *st = iio_priv(indio_dev);
 185         int ret;
 186         struct spi_transfer xfers[] = {
 187                 {
 188                         .tx_buf = st->tx,
 189                         .bits_per_word = 8,
 190                         .len = 1,
 191                         .delay_usecs = 4,
 192                 },
 193                 {
 194                         .tx_buf = &st->tx[1],
 195                         .rx_buf = st->rx,
 196                         .bits_per_word = 8,
 197                         .len = 3,
 198                 },
 199         };
 200
 201         mutex_lock(&st->buf_lock);
 202         st->tx[0] = ADE7758_READ_REG(reg_address);
 203         st->tx[1] = 0;
 204         st->tx[2] = 0;
 205         st->tx[3] = 0;
 206
 207         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
 208         if (ret) {
 209                 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
 210                                 reg_address);
 211                 goto error_ret;
 212         }
 213         *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
 214
 215 error_ret:
 216         mutex_unlock(&st->buf_lock);
 217         return ret;
 218 }
 219
 220 static ssize_t ade7758_read_8bit(struct device *dev,
 221                 struct device_attribute *attr,
 222                 char *buf)
 223 {
 224         int ret;
 225         u8 val = 0;
 226         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 227
 228         ret = ade7758_spi_read_reg_8(dev, this_attr->address, &val);
 229         if (ret)
 230                 return ret;
 231
 232         return sprintf(buf, "%u\n", val);
 233 }
 234
 235 static ssize_t ade7758_read_16bit(struct device *dev,
 236                 struct device_attribute *attr,
 237                 char *buf)
 238 {
 239         int ret;
 240         u16 val = 0;
 241         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 242
 243         ret = ade7758_spi_read_reg_16(dev, this_attr->address, &val);
 244         if (ret)
 245                 return ret;
 246
 247         return sprintf(buf, "%u\n", val);
 248 }
 249
 250 static ssize_t ade7758_read_24bit(struct device *dev,
 251                 struct device_attribute *attr,
 252                 char *buf)
 253 {
 254         int ret;
 255         u32 val = 0;
 256         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 257
 258         ret = ade7758_spi_read_reg_24(dev, this_attr->address, &val);
 259         if (ret)
 260                 return ret;
 261
 262         return sprintf(buf, "%u\n", val & 0xFFFFFF);
 263 }
 264
 265 static ssize_t ade7758_write_8bit(struct device *dev,
 266                 struct device_attribute *attr,
 267                 const char *buf,
 268                 size_t len)
 269 {
 270         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 271         int ret;
 272         long val;
 273
 274         ret = strict_strtol(buf, 10, &val);
 275         if (ret)
 276                 goto error_ret;
 277         ret = ade7758_spi_write_reg_8(dev, this_attr->address, val);
 278
 279 error_ret:
 280         return ret ? ret : len;
 281 }
 282
 283 static ssize_t ade7758_write_16bit(struct device *dev,
 284                 struct device_attribute *attr,
 285                 const char *buf,
 286                 size_t len)
 287 {
 288         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 289         int ret;
 290         long val;
 291
 292         ret = strict_strtol(buf, 10, &val);
 293         if (ret)
 294                 goto error_ret;
 295         ret = ade7758_spi_write_reg_16(dev, this_attr->address, val);
 296
 297 error_ret:
 298         return ret ? ret : len;
 299 }
 300
 301 static int ade7758_reset(struct device *dev)
 302 {
 303         int ret;
 304         u8 val;
 305         ade7758_spi_read_reg_8(dev,
 306                         ADE7758_OPMODE,
 307                         &val);
 308         val |= 1 << 6; /* Software Chip Reset */
 309         ret = ade7758_spi_write_reg_8(dev,
 310                         ADE7758_OPMODE,
 311                         val);
 312
 313         return ret;
 314 }
 315
 316 static ssize_t ade7758_write_reset(struct device *dev,
 317                 struct device_attribute *attr,
 318                 const char *buf, size_t len)
 319 {
 320         if (len < 1)
 321                 return -1;
 322         switch (buf[0]) {
 323         case '1':
 324         case 'y':
 325         case 'Y':
 326                 return ade7758_reset(dev);
 327         }
 328         return len;
 329 }
 330
 331 static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
 332                 ade7758_read_8bit,
 333                 ade7758_write_8bit,
 334                 ADE7758_VPEAK);
 335 static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
 336                 ade7758_read_8bit,
 337                 ade7758_write_8bit,
 338                 ADE7758_VPEAK);
 339 static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
 340                 ade7758_read_8bit,
 341                 ade7758_write_8bit,
 342                 ADE7758_APHCAL);
 343 static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
 344                 ade7758_read_8bit,
 345                 ade7758_write_8bit,
 346                 ADE7758_BPHCAL);
 347 static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
 348                 ade7758_read_8bit,
 349                 ade7758_write_8bit,
 350                 ADE7758_CPHCAL);
 351 static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
 352                 ade7758_read_8bit,
 353                 ade7758_write_8bit,
 354                 ADE7758_WDIV);
 355 static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
 356                 ade7758_read_8bit,
 357                 ade7758_write_8bit,
 358                 ADE7758_VADIV);
 359 static IIO_DEV_ATTR_AIRMS(S_IRUGO,
 360                 ade7758_read_24bit,
 361                 NULL,
 362                 ADE7758_AIRMS);
 363 static IIO_DEV_ATTR_BIRMS(S_IRUGO,
 364                 ade7758_read_24bit,
 365                 NULL,
 366                 ADE7758_BIRMS);
 367 static IIO_DEV_ATTR_CIRMS(S_IRUGO,
 368                 ade7758_read_24bit,
 369                 NULL,
 370                 ADE7758_CIRMS);
 371 static IIO_DEV_ATTR_AVRMS(S_IRUGO,
 372                 ade7758_read_24bit,
 373                 NULL,
 374                 ADE7758_AVRMS);
 375 static IIO_DEV_ATTR_BVRMS(S_IRUGO,
 376                 ade7758_read_24bit,
 377                 NULL,
 378                 ADE7758_BVRMS);
 379 static IIO_DEV_ATTR_CVRMS(S_IRUGO,
 380                 ade7758_read_24bit,
 381                 NULL,
 382                 ADE7758_CVRMS);
 383 static IIO_DEV_ATTR_AIRMSOS(S_IWUSR | S_IRUGO,
 384                 ade7758_read_16bit,
 385                 ade7758_write_16bit,
 386                 ADE7758_AIRMSOS);
 387 static IIO_DEV_ATTR_BIRMSOS(S_IWUSR | S_IRUGO,
 388                 ade7758_read_16bit,
 389                 ade7758_write_16bit,
 390                 ADE7758_BIRMSOS);
 391 static IIO_DEV_ATTR_CIRMSOS(S_IWUSR | S_IRUGO,
 392                 ade7758_read_16bit,
 393                 ade7758_write_16bit,
 394                 ADE7758_CIRMSOS);
 395 static IIO_DEV_ATTR_AVRMSOS(S_IWUSR | S_IRUGO,
 396                 ade7758_read_16bit,
 397                 ade7758_write_16bit,
 398                 ADE7758_AVRMSOS);
 399 static IIO_DEV_ATTR_BVRMSOS(S_IWUSR | S_IRUGO,
 400                 ade7758_read_16bit,
 401                 ade7758_write_16bit,
 402                 ADE7758_BVRMSOS);
 403 static IIO_DEV_ATTR_CVRMSOS(S_IWUSR | S_IRUGO,
 404                 ade7758_read_16bit,
 405                 ade7758_write_16bit,
 406                 ADE7758_CVRMSOS);
 407 static IIO_DEV_ATTR_AIGAIN(S_IWUSR | S_IRUGO,
 408                 ade7758_read_16bit,
 409                 ade7758_write_16bit,
 410                 ADE7758_AIGAIN);
 411 static IIO_DEV_ATTR_BIGAIN(S_IWUSR | S_IRUGO,
 412                 ade7758_read_16bit,
 413                 ade7758_write_16bit,
 414                 ADE7758_BIGAIN);
 415 static IIO_DEV_ATTR_CIGAIN(S_IWUSR | S_IRUGO,
 416                 ade7758_read_16bit,
 417                 ade7758_write_16bit,
 418                 ADE7758_CIGAIN);
 419 static IIO_DEV_ATTR_AVRMSGAIN(S_IWUSR | S_IRUGO,
 420                 ade7758_read_16bit,
 421                 ade7758_write_16bit,
 422                 ADE7758_AVRMSGAIN);
 423 static IIO_DEV_ATTR_BVRMSGAIN(S_IWUSR | S_IRUGO,
 424                 ade7758_read_16bit,
 425                 ade7758_write_16bit,
 426                 ADE7758_BVRMSGAIN);
 427 static IIO_DEV_ATTR_CVRMSGAIN(S_IWUSR | S_IRUGO,
 428                 ade7758_read_16bit,
 429                 ade7758_write_16bit,
 430                 ADE7758_CVRMSGAIN);
 431
 432 int ade7758_set_irq(struct device *dev, bool enable)
 433 {
 434         int ret;
 435         u32 irqen;
 436         ret = ade7758_spi_read_reg_24(dev, ADE7758_MASK, &irqen);
 437         if (ret)
 438                 goto error_ret;
 439
 440         if (enable)
 441                 irqen |= 1 << 16; /* Enables an interrupt when a data is
 442                                      present in the waveform register */
 443         else
 444                 irqen &= ~(1 << 16);
 445
 446         ret = ade7758_spi_write_reg_24(dev, ADE7758_MASK, irqen);
 447         if (ret)
 448                 goto error_ret;
 449
 450 error_ret:
 451         return ret;
 452 }
 453
 454 /* Power down the device */
 455 static int ade7758_stop_device(struct device *dev)
 456 {
 457         int ret;
 458         u8 val;
 459         ade7758_spi_read_reg_8(dev,
 460                         ADE7758_OPMODE,
 461                         &val);
 462         val |= 7 << 3;  /* ADE7758 powered down */
 463         ret = ade7758_spi_write_reg_8(dev,
 464                         ADE7758_OPMODE,
 465                         val);
 466
 467         return ret;
 468 }
 469
 470 static int ade7758_initial_setup(struct iio_dev *indio_dev)
 471 {
 472         struct ade7758_state *st = iio_priv(indio_dev);
 473         struct device *dev = &indio_dev->dev;
 474         int ret;
 475
 476         /* use low spi speed for init */
 477         st->us->mode = SPI_MODE_1;
 478         spi_setup(st->us);
 479
 480         /* Disable IRQ */
 481         ret = ade7758_set_irq(dev, false);
 482         if (ret) {
 483                 dev_err(dev, "disable irq failed");
 484                 goto err_ret;
 485         }
 486
 487         ade7758_reset(dev);
 488         msleep(ADE7758_STARTUP_DELAY);
 489
 490 err_ret:
 491         return ret;
 492 }
 493
 494 static ssize_t ade7758_read_frequency(struct device *dev,
 495                 struct device_attribute *attr,
 496                 char *buf)
 497 {
 498         int ret, len = 0;
 499         u8 t;
 500         int sps;
 501         ret = ade7758_spi_read_reg_8(dev,
 502                         ADE7758_WAVMODE,
 503                         &t);
 504         if (ret)
 505                 return ret;
 506
 507         t = (t >> 5) & 0x3;
 508         sps = 26040 / (1 << t);
 509
 510         len = sprintf(buf, "%d SPS\n", sps);
 511         return len;
 512 }
 513
 514 static ssize_t ade7758_write_frequency(struct device *dev,
 515                 struct device_attribute *attr,
 516                 const char *buf,
 517                 size_t len)
 518 {
 519         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 520         unsigned long val;
 521         int ret;
 522         u8 reg, t;
 523
 524         ret = strict_strtol(buf, 10, &val);
 525         if (ret)
 526                 return ret;
 527
 528         mutex_lock(&indio_dev->mlock);
 529
 530         switch (val) {
 531         case 26040:
 532                 t = 0;
 533                 break;
 534         case 13020:
 535                 t = 1;
 536                 break;
 537         case 6510:
 538                 t = 2;
 539                 break;
 540         case 3255:
 541                 t = 3;
 542                 break;
 543         default:
 544                 ret = -EINVAL;
 545                 goto out;
 546         }
 547
 548         ret = ade7758_spi_read_reg_8(dev,
 549                         ADE7758_WAVMODE,
 550                         &reg);
 551         if (ret)
 552                 goto out;
 553
 554         reg &= ~(5 << 3);
 555         reg |= t << 5;
 556
 557         ret = ade7758_spi_write_reg_8(dev,
 558                         ADE7758_WAVMODE,
 559                         reg);
 560
 561 out:
 562         mutex_unlock(&indio_dev->mlock);
 563
 564         return ret ? ret : len;
 565 }
 566
 567 static IIO_DEV_ATTR_TEMP_RAW(ade7758_read_8bit);
 568 static IIO_CONST_ATTR(in_temp_offset, "129 C");
 569 static IIO_CONST_ATTR(in_temp_scale, "4 C");
 570
 571 static IIO_DEV_ATTR_AWATTHR(ade7758_read_16bit,
 572                 ADE7758_AWATTHR);
 573 static IIO_DEV_ATTR_BWATTHR(ade7758_read_16bit,
 574                 ADE7758_BWATTHR);
 575 static IIO_DEV_ATTR_CWATTHR(ade7758_read_16bit,
 576                 ADE7758_CWATTHR);
 577 static IIO_DEV_ATTR_AVARHR(ade7758_read_16bit,
 578                 ADE7758_AVARHR);
 579 static IIO_DEV_ATTR_BVARHR(ade7758_read_16bit,
 580                 ADE7758_BVARHR);
 581 static IIO_DEV_ATTR_CVARHR(ade7758_read_16bit,
 582                 ADE7758_CVARHR);
 583 static IIO_DEV_ATTR_AVAHR(ade7758_read_16bit,
 584                 ADE7758_AVAHR);
 585 static IIO_DEV_ATTR_BVAHR(ade7758_read_16bit,
 586                 ADE7758_BVAHR);
 587 static IIO_DEV_ATTR_CVAHR(ade7758_read_16bit,
 588                 ADE7758_CVAHR);
 589
 590 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
 591                 ade7758_read_frequency,
 592                 ade7758_write_frequency);
 593
 594 static IIO_DEV_ATTR_RESET(ade7758_write_reset);
 595
 596 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26040 13020 6510 3255");
 597
 598 static struct attribute *ade7758_attributes[] = {
 599         &iio_dev_attr_in_temp_raw.dev_attr.attr,
 600         &iio_const_attr_in_temp_offset.dev_attr.attr,
 601         &iio_const_attr_in_temp_scale.dev_attr.attr,
 602         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 603         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 604         &iio_dev_attr_reset.dev_attr.attr,
 605         &iio_dev_attr_awatthr.dev_attr.attr,
 606         &iio_dev_attr_bwatthr.dev_attr.attr,
 607         &iio_dev_attr_cwatthr.dev_attr.attr,
 608         &iio_dev_attr_avarhr.dev_attr.attr,
 609         &iio_dev_attr_bvarhr.dev_attr.attr,
 610         &iio_dev_attr_cvarhr.dev_attr.attr,
 611         &iio_dev_attr_avahr.dev_attr.attr,
 612         &iio_dev_attr_bvahr.dev_attr.attr,
 613         &iio_dev_attr_cvahr.dev_attr.attr,
 614         &iio_dev_attr_vpeak.dev_attr.attr,
 615         &iio_dev_attr_ipeak.dev_attr.attr,
 616         &iio_dev_attr_aphcal.dev_attr.attr,
 617         &iio_dev_attr_bphcal.dev_attr.attr,
 618         &iio_dev_attr_cphcal.dev_attr.attr,
 619         &iio_dev_attr_wdiv.dev_attr.attr,
 620         &iio_dev_attr_vadiv.dev_attr.attr,
 621         &iio_dev_attr_airms.dev_attr.attr,
 622         &iio_dev_attr_birms.dev_attr.attr,
 623         &iio_dev_attr_cirms.dev_attr.attr,
 624         &iio_dev_attr_avrms.dev_attr.attr,
 625         &iio_dev_attr_bvrms.dev_attr.attr,
 626         &iio_dev_attr_cvrms.dev_attr.attr,
 627         &iio_dev_attr_aigain.dev_attr.attr,
 628         &iio_dev_attr_bigain.dev_attr.attr,
 629         &iio_dev_attr_cigain.dev_attr.attr,
 630         &iio_dev_attr_avrmsgain.dev_attr.attr,
 631         &iio_dev_attr_bvrmsgain.dev_attr.attr,
 632         &iio_dev_attr_cvrmsgain.dev_attr.attr,
 633         &iio_dev_attr_airmsos.dev_attr.attr,
 634         &iio_dev_attr_birmsos.dev_attr.attr,
 635         &iio_dev_attr_cirmsos.dev_attr.attr,
 636         &iio_dev_attr_avrmsos.dev_attr.attr,
 637         &iio_dev_attr_bvrmsos.dev_attr.attr,
 638         &iio_dev_attr_cvrmsos.dev_attr.attr,
 639         NULL,
 640 };
 641
 642 static const struct attribute_group ade7758_attribute_group = {
 643         .attrs = ade7758_attributes,
 644 };
 645
 646 static const struct iio_chan_spec ade7758_channels[] = {
 647         {
 648                 .type = IIO_VOLTAGE,
 649                 .indexed = 1,
 650                 .channel = 0,
 651                 .extend_name = "raw",
 652                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 653                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 654                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_VOLTAGE),
 655                 .scan_index = 0,
 656                 .scan_type = {
 657                         .sign = 's',
 658                         .realbits = 24,
 659                         .storagebits = 32,
 660                 },
 661         }, {
 662                 .type = IIO_CURRENT,
 663                 .indexed = 1,
 664                 .channel = 0,
 665                 .extend_name = "raw",
 666                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 667                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 668                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_CURRENT),
 669                 .scan_index = 1,
 670                 .scan_type = {
 671                         .sign = 's',
 672                         .realbits = 24,
 673                         .storagebits = 32,
 674                 },
 675         }, {
 676                 .type = IIO_POWER,
 677                 .indexed = 1,
 678                 .channel = 0,
 679                 .extend_name = "apparent_raw",
 680                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 681                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 682                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_APP_PWR),
 683                 .scan_index = 2,
 684                 .scan_type = {
 685                         .sign = 's',
 686                         .realbits = 24,
 687                         .storagebits = 32,
 688                 },
 689         }, {
 690                 .type = IIO_POWER,
 691                 .indexed = 1,
 692                 .channel = 0,
 693                 .extend_name = "active_raw",
 694                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 695                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 696                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_ACT_PWR),
 697                 .scan_index = 3,
 698                 .scan_type = {
 699                         .sign = 's',
 700                         .realbits = 24,
 701                         .storagebits = 32,
 702                 },
 703         }, {
 704                 .type = IIO_POWER,
 705                 .indexed = 1,
 706                 .channel = 0,
 707                 .extend_name = "reactive_raw",
 708                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 709                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 710                 .address = AD7758_WT(AD7758_PHASE_A, AD7758_REACT_PWR),
 711                 .scan_index = 4,
 712                 .scan_type = {
 713                         .sign = 's',
 714                         .realbits = 24,
 715                         .storagebits = 32,
 716                 },
 717         }, {
 718                 .type = IIO_VOLTAGE,
 719                 .indexed = 1,
 720                 .channel = 1,
 721                 .extend_name = "raw",
 722                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 723                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 724                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_VOLTAGE),
 725                 .scan_index = 5,
 726                 .scan_type = {
 727                         .sign = 's',
 728                         .realbits = 24,
 729                         .storagebits = 32,
 730                 },
 731         }, {
 732                 .type = IIO_CURRENT,
 733                 .indexed = 1,
 734                 .channel = 1,
 735                 .extend_name = "raw",
 736                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 737                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 738                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_CURRENT),
 739                 .scan_index = 6,
 740                 .scan_type = {
 741                         .sign = 's',
 742                         .realbits = 24,
 743                         .storagebits = 32,
 744                 },
 745         }, {
 746                 .type = IIO_POWER,
 747                 .indexed = 1,
 748                 .channel = 1,
 749                 .extend_name = "apparent_raw",
 750                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 751                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 752                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_APP_PWR),
 753                 .scan_index = 7,
 754                 .scan_type = {
 755                         .sign = 's',
 756                         .realbits = 24,
 757                         .storagebits = 32,
 758                 },
 759         }, {
 760                 .type = IIO_POWER,
 761                 .indexed = 1,
 762                 .channel = 1,
 763                 .extend_name = "active_raw",
 764                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 765                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 766                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_ACT_PWR),
 767                 .scan_index = 8,
 768                 .scan_type = {
 769                         .sign = 's',
 770                         .realbits = 24,
 771                         .storagebits = 32,
 772                 },
 773         }, {
 774                 .type = IIO_POWER,
 775                 .indexed = 1,
 776                 .channel = 1,
 777                 .extend_name = "reactive_raw",
 778                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 779                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 780                 .address = AD7758_WT(AD7758_PHASE_B, AD7758_REACT_PWR),
 781                 .scan_index = 9,
 782                 .scan_type = {
 783                         .sign = 's',
 784                         .realbits = 24,
 785                         .storagebits = 32,
 786                 },
 787         }, {
 788                 .type = IIO_VOLTAGE,
 789                 .indexed = 1,
 790                 .channel = 2,
 791                 .extend_name = "raw",
 792                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 793                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 794                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_VOLTAGE),
 795                 .scan_index = 10,
 796                 .scan_type = {
 797                         .sign = 's',
 798                         .realbits = 24,
 799                         .storagebits = 32,
 800                 },
 801         }, {
 802                 .type = IIO_CURRENT,
 803                 .indexed = 1,
 804                 .channel = 2,
 805                 .extend_name = "raw",
 806                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 807                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 808                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_CURRENT),
 809                 .scan_index = 11,
 810                 .scan_type = {
 811                         .sign = 's',
 812                         .realbits = 24,
 813                         .storagebits = 32,
 814                 },
 815         }, {
 816                 .type = IIO_POWER,
 817                 .indexed = 1,
 818                 .channel = 2,
 819                 .extend_name = "apparent_raw",
 820                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 821                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 822                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_APP_PWR),
 823                 .scan_index = 12,
 824                 .scan_type = {
 825                         .sign = 's',
 826                         .realbits = 24,
 827                         .storagebits = 32,
 828                 },
 829         }, {
 830                 .type = IIO_POWER,
 831                 .indexed = 1,
 832                 .channel = 2,
 833                 .extend_name = "active_raw",
 834                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 835                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 836                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_ACT_PWR),
 837                 .scan_index = 13,
 838                 .scan_type = {
 839                         .sign = 's',
 840                         .realbits = 24,
 841                         .storagebits = 32,
 842                 },
 843         }, {
 844                 .type = IIO_POWER,
 845                 .indexed = 1,
 846                 .channel = 2,
 847                 .extend_name = "reactive_raw",
 848                 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 849                              IIO_CHAN_INFO_SCALE_SHARED_BIT,
 850                 .address = AD7758_WT(AD7758_PHASE_C, AD7758_REACT_PWR),
 851                 .scan_index = 14,
 852                 .scan_type = {
 853                         .sign = 's',
 854                         .realbits = 24,
 855                         .storagebits = 32,
 856                 },
 857         },
 858         IIO_CHAN_SOFT_TIMESTAMP(15),
 859 };
 860
 861 static const struct iio_info ade7758_info = {
 862         .attrs = &ade7758_attribute_group,
 863         .driver_module = THIS_MODULE,
 864 };
 865
 866 static int ade7758_probe(struct spi_device *spi)
 867 {
 868         int ret;
 869         struct ade7758_state *st;
 870         struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
 871
 872         if (indio_dev == NULL) {
 873                 ret = -ENOMEM;
 874                 goto error_ret;
 875         }
 876
 877         st = iio_priv(indio_dev);
 878         /* this is only used for removal purposes */
 879         spi_set_drvdata(spi, indio_dev);
 880
 881         /* Allocate the comms buffers */
 882         st->rx = kcalloc(ADE7758_MAX_RX, sizeof(*st->rx), GFP_KERNEL);
 883         if (st->rx == NULL) {
 884                 ret = -ENOMEM;
 885                 goto error_free_dev;
 886         }
 887         st->tx = kcalloc(ADE7758_MAX_TX, sizeof(*st->tx), GFP_KERNEL);
 888         if (st->tx == NULL) {
 889                 ret = -ENOMEM;
 890                 goto error_free_rx;
 891         }
 892         st->us = spi;
 893         st->ade7758_ring_channels = &ade7758_channels[0];
 894         mutex_init(&st->buf_lock);
 895
 896         indio_dev->name = spi->dev.driver->name;
 897         indio_dev->dev.parent = &spi->dev;
 898         indio_dev->info = &ade7758_info;
 899         indio_dev->modes = INDIO_DIRECT_MODE;
 900
 901         ret = ade7758_configure_ring(indio_dev);
 902         if (ret)
 903                 goto error_free_tx;
 904
 905         ret = iio_buffer_register(indio_dev,
 906                                   &ade7758_channels[0],
 907                                   ARRAY_SIZE(ade7758_channels));
 908         if (ret) {
 909                 dev_err(&spi->dev, "failed to initialize the ring\n");
 910                 goto error_unreg_ring_funcs;
 911         }
 912
 913         /* Get the device into a sane initial state */
 914         ret = ade7758_initial_setup(indio_dev);
 915         if (ret)
 916                 goto error_uninitialize_ring;
 917
 918         if (spi->irq) {
 919                 ret = ade7758_probe_trigger(indio_dev);
 920                 if (ret)
 921                         goto error_uninitialize_ring;
 922         }
 923
 924         ret = iio_device_register(indio_dev);
 925         if (ret)
 926                 goto error_remove_trigger;
 927
 928         return 0;
 929
 930 error_remove_trigger:
 931         if (spi->irq)
 932                 ade7758_remove_trigger(indio_dev);
 933 error_uninitialize_ring:
 934         ade7758_uninitialize_ring(indio_dev);
 935 error_unreg_ring_funcs:
 936         ade7758_unconfigure_ring(indio_dev);
 937 error_free_tx:
 938         kfree(st->tx);
 939 error_free_rx:
 940         kfree(st->rx);
 941 error_free_dev:
 942         iio_device_free(indio_dev);
 943 error_ret:
 944         return ret;
 945 }
 946
 947 static int ade7758_remove(struct spi_device *spi)
 948 {
 949         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 950         struct ade7758_state *st = iio_priv(indio_dev);
 951
 952         iio_device_unregister(indio_dev);
 953         ade7758_stop_device(&indio_dev->dev);
 954         ade7758_remove_trigger(indio_dev);
 955         ade7758_uninitialize_ring(indio_dev);
 956         ade7758_unconfigure_ring(indio_dev);
 957         kfree(st->tx);
 958         kfree(st->rx);
 959
 960         iio_device_free(indio_dev);
 961
 962         return 0;
 963 }
 964
 965 static const struct spi_device_id ade7758_id[] = {
 966         {"ade7758", 0},
 967         {}
 968 };
 969 MODULE_DEVICE_TABLE(spi, ade7758_id);
 970
 971 static struct spi_driver ade7758_driver = {
 972         .driver = {
 973                 .name = "ade7758",
 974                 .owner = THIS_MODULE,
 975         },
 976         .probe = ade7758_probe,
 977         .remove = ade7758_remove,
 978         .id_table = ade7758_id,
 979 };
 980 module_spi_driver(ade7758_driver);
 981
 982 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
 983 MODULE_DESCRIPTION("Analog Devices ADE7758 Polyphase Multifunction Energy Metering IC Driver");
 984 MODULE_LICENSE("GPL v2");