Pileus Git - ~andy/linux/blob - drivers/staging/iio/meter/ade7753.c

   1 /*
   2  * ADE7753 Single-Phase Multifunction Metering IC with di/dt Sensor Interface
   3  *
   4  * Copyright 2010 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/irq.h>
  11 #include <linux/delay.h>
  12 #include <linux/mutex.h>
  13 #include <linux/device.h>
  14 #include <linux/kernel.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/slab.h>
  17 #include <linux/sysfs.h>
  18 #include <linux/list.h>
  19 #include <linux/module.h>
  20
  21 #include <linux/iio/iio.h>
  22 #include <linux/iio/sysfs.h>
  23 #include "meter.h"
  24 #include "ade7753.h"
  25
  26 static int ade7753_spi_write_reg_8(struct device *dev,
  27                                    u8 reg_address,
  28                                    u8 val)
  29 {
  30         int ret;
  31         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  32         struct ade7753_state *st = iio_priv(indio_dev);
  33
  34         mutex_lock(&st->buf_lock);
  35         st->tx[0] = ADE7753_WRITE_REG(reg_address);
  36         st->tx[1] = val;
  37
  38         ret = spi_write(st->us, st->tx, 2);
  39         mutex_unlock(&st->buf_lock);
  40
  41         return ret;
  42 }
  43
  44 static int ade7753_spi_write_reg_16(struct device *dev,
  45                 u8 reg_address,
  46                 u16 value)
  47 {
  48         int ret;
  49         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  50         struct ade7753_state *st = iio_priv(indio_dev);
  51
  52         mutex_lock(&st->buf_lock);
  53         st->tx[0] = ADE7753_WRITE_REG(reg_address);
  54         st->tx[1] = (value >> 8) & 0xFF;
  55         st->tx[2] = value & 0xFF;
  56         ret = spi_write(st->us, st->tx, 3);
  57         mutex_unlock(&st->buf_lock);
  58
  59         return ret;
  60 }
  61
  62 static int ade7753_spi_read_reg_8(struct device *dev,
  63                 u8 reg_address,
  64                 u8 *val)
  65 {
  66         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  67         struct ade7753_state *st = iio_priv(indio_dev);
  68         ssize_t ret;
  69
  70         ret = spi_w8r8(st->us, ADE7753_READ_REG(reg_address));
  71         if (ret < 0) {
  72                 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
  73                                 reg_address);
  74                 return ret;
  75         }
  76         *val = ret;
  77
  78         return 0;
  79 }
  80
  81 static int ade7753_spi_read_reg_16(struct device *dev,
  82                 u8 reg_address,
  83                 u16 *val)
  84 {
  85         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  86         struct ade7753_state *st = iio_priv(indio_dev);
  87         ssize_t ret;
  88
  89         ret = spi_w8r16(st->us, ADE7753_READ_REG(reg_address));
  90         if (ret < 0) {
  91                 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
  92                         reg_address);
  93                 return ret;
  94         }
  95
  96         *val = ret;
  97         *val = be16_to_cpup(val);
  98
  99         return 0;
 100 }
 101
 102 static int ade7753_spi_read_reg_24(struct device *dev,
 103                 u8 reg_address,
 104                 u32 *val)
 105 {
 106         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 107         struct ade7753_state *st = iio_priv(indio_dev);
 108         int ret;
 109         struct spi_transfer xfers[] = {
 110                 {
 111                         .tx_buf = st->tx,
 112                         .bits_per_word = 8,
 113                         .len = 1,
 114                 }, {
 115                         .rx_buf = st->tx,
 116                         .bits_per_word = 8,
 117                         .len = 3,
 118                 }
 119         };
 120
 121         mutex_lock(&st->buf_lock);
 122         st->tx[0] = ADE7753_READ_REG(reg_address);
 123
 124         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
 125         if (ret) {
 126                 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
 127                                 reg_address);
 128                 goto error_ret;
 129         }
 130         *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
 131
 132 error_ret:
 133         mutex_unlock(&st->buf_lock);
 134         return ret;
 135 }
 136
 137 static ssize_t ade7753_read_8bit(struct device *dev,
 138                 struct device_attribute *attr,
 139                 char *buf)
 140 {
 141         int ret;
 142         u8 val;
 143         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 144
 145         ret = ade7753_spi_read_reg_8(dev, this_attr->address, &val);
 146         if (ret)
 147                 return ret;
 148
 149         return sprintf(buf, "%u\n", val);
 150 }
 151
 152 static ssize_t ade7753_read_16bit(struct device *dev,
 153                 struct device_attribute *attr,
 154                 char *buf)
 155 {
 156         int ret;
 157         u16 val;
 158         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 159
 160         ret = ade7753_spi_read_reg_16(dev, this_attr->address, &val);
 161         if (ret)
 162                 return ret;
 163
 164         return sprintf(buf, "%u\n", val);
 165 }
 166
 167 static ssize_t ade7753_read_24bit(struct device *dev,
 168                 struct device_attribute *attr,
 169                 char *buf)
 170 {
 171         int ret;
 172         u32 val;
 173         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 174
 175         ret = ade7753_spi_read_reg_24(dev, this_attr->address, &val);
 176         if (ret)
 177                 return ret;
 178
 179         return sprintf(buf, "%u\n", val);
 180 }
 181
 182 static ssize_t ade7753_write_8bit(struct device *dev,
 183                 struct device_attribute *attr,
 184                 const char *buf,
 185                 size_t len)
 186 {
 187         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 188         int ret;
 189         long val;
 190
 191         ret = strict_strtol(buf, 10, &val);
 192         if (ret)
 193                 goto error_ret;
 194         ret = ade7753_spi_write_reg_8(dev, this_attr->address, val);
 195
 196 error_ret:
 197         return ret ? ret : len;
 198 }
 199
 200 static ssize_t ade7753_write_16bit(struct device *dev,
 201                 struct device_attribute *attr,
 202                 const char *buf,
 203                 size_t len)
 204 {
 205         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 206         int ret;
 207         long val;
 208
 209         ret = strict_strtol(buf, 10, &val);
 210         if (ret)
 211                 goto error_ret;
 212         ret = ade7753_spi_write_reg_16(dev, this_attr->address, val);
 213
 214 error_ret:
 215         return ret ? ret : len;
 216 }
 217
 218 static int ade7753_reset(struct device *dev)
 219 {
 220         u16 val;
 221
 222         ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
 223         val |= 1 << 6; /* Software Chip Reset */
 224
 225         return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
 226 }
 227
 228 static ssize_t ade7753_write_reset(struct device *dev,
 229                 struct device_attribute *attr,
 230                 const char *buf, size_t len)
 231 {
 232         if (len < 1)
 233                 return -1;
 234         switch (buf[0]) {
 235         case '1':
 236         case 'y':
 237         case 'Y':
 238                 return ade7753_reset(dev);
 239         }
 240         return -1;
 241 }
 242
 243 static IIO_DEV_ATTR_AENERGY(ade7753_read_24bit, ADE7753_AENERGY);
 244 static IIO_DEV_ATTR_LAENERGY(ade7753_read_24bit, ADE7753_LAENERGY);
 245 static IIO_DEV_ATTR_VAENERGY(ade7753_read_24bit, ADE7753_VAENERGY);
 246 static IIO_DEV_ATTR_LVAENERGY(ade7753_read_24bit, ADE7753_LVAENERGY);
 247 static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
 248                 ade7753_read_16bit,
 249                 ade7753_write_16bit,
 250                 ADE7753_CFDEN);
 251 static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
 252                 ade7753_read_8bit,
 253                 ade7753_write_8bit,
 254                 ADE7753_CFNUM);
 255 static IIO_DEV_ATTR_CHKSUM(ade7753_read_8bit, ADE7753_CHKSUM);
 256 static IIO_DEV_ATTR_PHCAL(S_IWUSR | S_IRUGO,
 257                 ade7753_read_16bit,
 258                 ade7753_write_16bit,
 259                 ADE7753_PHCAL);
 260 static IIO_DEV_ATTR_APOS(S_IWUSR | S_IRUGO,
 261                 ade7753_read_16bit,
 262                 ade7753_write_16bit,
 263                 ADE7753_APOS);
 264 static IIO_DEV_ATTR_SAGCYC(S_IWUSR | S_IRUGO,
 265                 ade7753_read_8bit,
 266                 ade7753_write_8bit,
 267                 ADE7753_SAGCYC);
 268 static IIO_DEV_ATTR_SAGLVL(S_IWUSR | S_IRUGO,
 269                 ade7753_read_8bit,
 270                 ade7753_write_8bit,
 271                 ADE7753_SAGLVL);
 272 static IIO_DEV_ATTR_LINECYC(S_IWUSR | S_IRUGO,
 273                 ade7753_read_8bit,
 274                 ade7753_write_8bit,
 275                 ADE7753_LINECYC);
 276 static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
 277                 ade7753_read_8bit,
 278                 ade7753_write_8bit,
 279                 ADE7753_WDIV);
 280 static IIO_DEV_ATTR_IRMS(S_IWUSR | S_IRUGO,
 281                 ade7753_read_24bit,
 282                 NULL,
 283                 ADE7753_IRMS);
 284 static IIO_DEV_ATTR_VRMS(S_IRUGO,
 285                 ade7753_read_24bit,
 286                 NULL,
 287                 ADE7753_VRMS);
 288 static IIO_DEV_ATTR_IRMSOS(S_IWUSR | S_IRUGO,
 289                 ade7753_read_16bit,
 290                 ade7753_write_16bit,
 291                 ADE7753_IRMSOS);
 292 static IIO_DEV_ATTR_VRMSOS(S_IWUSR | S_IRUGO,
 293                 ade7753_read_16bit,
 294                 ade7753_write_16bit,
 295                 ADE7753_VRMSOS);
 296 static IIO_DEV_ATTR_WGAIN(S_IWUSR | S_IRUGO,
 297                 ade7753_read_16bit,
 298                 ade7753_write_16bit,
 299                 ADE7753_WGAIN);
 300 static IIO_DEV_ATTR_VAGAIN(S_IWUSR | S_IRUGO,
 301                 ade7753_read_16bit,
 302                 ade7753_write_16bit,
 303                 ADE7753_VAGAIN);
 304 static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR | S_IRUGO,
 305                 ade7753_read_16bit,
 306                 ade7753_write_16bit,
 307                 ADE7753_GAIN);
 308 static IIO_DEV_ATTR_IPKLVL(S_IWUSR | S_IRUGO,
 309                 ade7753_read_8bit,
 310                 ade7753_write_8bit,
 311                 ADE7753_IPKLVL);
 312 static IIO_DEV_ATTR_VPKLVL(S_IWUSR | S_IRUGO,
 313                 ade7753_read_8bit,
 314                 ade7753_write_8bit,
 315                 ADE7753_VPKLVL);
 316 static IIO_DEV_ATTR_IPEAK(S_IRUGO,
 317                 ade7753_read_24bit,
 318                 NULL,
 319                 ADE7753_IPEAK);
 320 static IIO_DEV_ATTR_VPEAK(S_IRUGO,
 321                 ade7753_read_24bit,
 322                 NULL,
 323                 ADE7753_VPEAK);
 324 static IIO_DEV_ATTR_VPERIOD(S_IRUGO,
 325                 ade7753_read_16bit,
 326                 NULL,
 327                 ADE7753_PERIOD);
 328 static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR | S_IRUGO,
 329                 ade7753_read_8bit,
 330                 ade7753_write_8bit,
 331                 ADE7753_CH1OS);
 332 static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR | S_IRUGO,
 333                 ade7753_read_8bit,
 334                 ade7753_write_8bit,
 335                 ADE7753_CH2OS);
 336
 337 static int ade7753_set_irq(struct device *dev, bool enable)
 338 {
 339         int ret;
 340         u8 irqen;
 341         ret = ade7753_spi_read_reg_8(dev, ADE7753_IRQEN, &irqen);
 342         if (ret)
 343                 goto error_ret;
 344
 345         if (enable)
 346                 irqen |= 1 << 3; /* Enables an interrupt when a data is
 347                                     present in the waveform register */
 348         else
 349                 irqen &= ~(1 << 3);
 350
 351         ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
 352
 353 error_ret:
 354         return ret;
 355 }
 356
 357 /* Power down the device */
 358 static int ade7753_stop_device(struct device *dev)
 359 {
 360         u16 val;
 361
 362         ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
 363         val |= 1 << 4;  /* AD converters can be turned off */
 364
 365         return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
 366 }
 367
 368 static int ade7753_initial_setup(struct iio_dev *indio_dev)
 369 {
 370         int ret;
 371         struct device *dev = &indio_dev->dev;
 372         struct ade7753_state *st = iio_priv(indio_dev);
 373
 374         /* use low spi speed for init */
 375         st->us->mode = SPI_MODE_3;
 376         spi_setup(st->us);
 377
 378         /* Disable IRQ */
 379         ret = ade7753_set_irq(dev, false);
 380         if (ret) {
 381                 dev_err(dev, "disable irq failed");
 382                 goto err_ret;
 383         }
 384
 385         ade7753_reset(dev);
 386         msleep(ADE7753_STARTUP_DELAY);
 387
 388 err_ret:
 389         return ret;
 390 }
 391
 392 static ssize_t ade7753_read_frequency(struct device *dev,
 393                 struct device_attribute *attr,
 394                 char *buf)
 395 {
 396         int ret, len = 0;
 397         u16 t;
 398         int sps;
 399         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &t);
 400         if (ret)
 401                 return ret;
 402
 403         t = (t >> 11) & 0x3;
 404         sps = 27900 / (1 + t);
 405
 406         len = sprintf(buf, "%d\n", sps);
 407         return len;
 408 }
 409
 410 static ssize_t ade7753_write_frequency(struct device *dev,
 411                 struct device_attribute *attr,
 412                 const char *buf,
 413                 size_t len)
 414 {
 415         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 416         struct ade7753_state *st = iio_priv(indio_dev);
 417         unsigned long val;
 418         int ret;
 419         u16 reg, t;
 420
 421         ret = strict_strtol(buf, 10, &val);
 422         if (ret)
 423                 return ret;
 424         if (val == 0)
 425                 return -EINVAL;
 426
 427         mutex_lock(&indio_dev->mlock);
 428
 429         t = (27900 / val);
 430         if (t > 0)
 431                 t--;
 432
 433         if (t > 1)
 434                 st->us->max_speed_hz = ADE7753_SPI_SLOW;
 435         else
 436                 st->us->max_speed_hz = ADE7753_SPI_FAST;
 437
 438         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &reg);
 439         if (ret)
 440                 goto out;
 441
 442         reg &= ~(3 << 11);
 443         reg |= t << 11;
 444
 445         ret = ade7753_spi_write_reg_16(dev, ADE7753_MODE, reg);
 446
 447 out:
 448         mutex_unlock(&indio_dev->mlock);
 449
 450         return ret ? ret : len;
 451 }
 452
 453 static IIO_DEV_ATTR_TEMP_RAW(ade7753_read_8bit);
 454 static IIO_CONST_ATTR(in_temp_offset, "-25 C");
 455 static IIO_CONST_ATTR(in_temp_scale, "0.67 C");
 456
 457 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
 458                 ade7753_read_frequency,
 459                 ade7753_write_frequency);
 460
 461 static IIO_DEV_ATTR_RESET(ade7753_write_reset);
 462
 463 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");
 464
 465 static struct attribute *ade7753_attributes[] = {
 466         &iio_dev_attr_in_temp_raw.dev_attr.attr,
 467         &iio_const_attr_in_temp_offset.dev_attr.attr,
 468         &iio_const_attr_in_temp_scale.dev_attr.attr,
 469         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 470         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 471         &iio_dev_attr_reset.dev_attr.attr,
 472         &iio_dev_attr_phcal.dev_attr.attr,
 473         &iio_dev_attr_cfden.dev_attr.attr,
 474         &iio_dev_attr_aenergy.dev_attr.attr,
 475         &iio_dev_attr_laenergy.dev_attr.attr,
 476         &iio_dev_attr_vaenergy.dev_attr.attr,
 477         &iio_dev_attr_lvaenergy.dev_attr.attr,
 478         &iio_dev_attr_cfnum.dev_attr.attr,
 479         &iio_dev_attr_apos.dev_attr.attr,
 480         &iio_dev_attr_sagcyc.dev_attr.attr,
 481         &iio_dev_attr_saglvl.dev_attr.attr,
 482         &iio_dev_attr_linecyc.dev_attr.attr,
 483         &iio_dev_attr_chksum.dev_attr.attr,
 484         &iio_dev_attr_pga_gain.dev_attr.attr,
 485         &iio_dev_attr_wgain.dev_attr.attr,
 486         &iio_dev_attr_choff_1.dev_attr.attr,
 487         &iio_dev_attr_choff_2.dev_attr.attr,
 488         &iio_dev_attr_wdiv.dev_attr.attr,
 489         &iio_dev_attr_irms.dev_attr.attr,
 490         &iio_dev_attr_vrms.dev_attr.attr,
 491         &iio_dev_attr_irmsos.dev_attr.attr,
 492         &iio_dev_attr_vrmsos.dev_attr.attr,
 493         &iio_dev_attr_vagain.dev_attr.attr,
 494         &iio_dev_attr_ipklvl.dev_attr.attr,
 495         &iio_dev_attr_vpklvl.dev_attr.attr,
 496         &iio_dev_attr_ipeak.dev_attr.attr,
 497         &iio_dev_attr_vpeak.dev_attr.attr,
 498         &iio_dev_attr_vperiod.dev_attr.attr,
 499         NULL,
 500 };
 501
 502 static const struct attribute_group ade7753_attribute_group = {
 503         .attrs = ade7753_attributes,
 504 };
 505
 506 static const struct iio_info ade7753_info = {
 507         .attrs = &ade7753_attribute_group,
 508         .driver_module = THIS_MODULE,
 509 };
 510
 511 static int ade7753_probe(struct spi_device *spi)
 512 {
 513         int ret;
 514         struct ade7753_state *st;
 515         struct iio_dev *indio_dev;
 516
 517         /* setup the industrialio driver allocated elements */
 518         indio_dev = iio_device_alloc(sizeof(*st));
 519         if (indio_dev == NULL) {
 520                 ret = -ENOMEM;
 521                 goto error_ret;
 522         }
 523         /* this is only used for removal purposes */
 524         spi_set_drvdata(spi, indio_dev);
 525
 526         st = iio_priv(indio_dev);
 527         st->us = spi;
 528         mutex_init(&st->buf_lock);
 529
 530         indio_dev->name = spi->dev.driver->name;
 531         indio_dev->dev.parent = &spi->dev;
 532         indio_dev->info = &ade7753_info;
 533         indio_dev->modes = INDIO_DIRECT_MODE;
 534
 535         /* Get the device into a sane initial state */
 536         ret = ade7753_initial_setup(indio_dev);
 537         if (ret)
 538                 goto error_free_dev;
 539
 540         ret = iio_device_register(indio_dev);
 541         if (ret)
 542                 goto error_free_dev;
 543
 544         return 0;
 545
 546 error_free_dev:
 547         iio_device_free(indio_dev);
 548
 549 error_ret:
 550         return ret;
 551 }
 552
 553 /* fixme, confirm ordering in this function */
 554 static int ade7753_remove(struct spi_device *spi)
 555 {
 556         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 557
 558         iio_device_unregister(indio_dev);
 559         ade7753_stop_device(&indio_dev->dev);
 560         iio_device_free(indio_dev);
 561
 562         return 0;
 563 }
 564
 565 static struct spi_driver ade7753_driver = {
 566         .driver = {
 567                 .name = "ade7753",
 568                 .owner = THIS_MODULE,
 569         },
 570         .probe = ade7753_probe,
 571         .remove = ade7753_remove,
 572 };
 573 module_spi_driver(ade7753_driver);
 574
 575 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
 576 MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter");
 577 MODULE_LICENSE("GPL v2");
 578 MODULE_ALIAS("spi:ade7753");