]> Pileus Git - ~andy/linux/blob - drivers/staging/iio/imu/adis16400_ring.c
Merge tag 'irqdomain-for-linus' of git://git.secretlab.ca/git/linux-2.6
[~andy/linux] / drivers / staging / iio / imu / adis16400_ring.c
1 #include <linux/interrupt.h>
2 #include <linux/mutex.h>
3 #include <linux/kernel.h>
4 #include <linux/spi/spi.h>
5 #include <linux/slab.h>
6 #include <linux/bitops.h>
7 #include <linux/export.h>
8
9 #include <linux/iio/iio.h>
10 #include "../ring_sw.h"
11 #include <linux/iio/trigger_consumer.h>
12 #include "adis16400.h"
13
14 /**
15  * adis16400_spi_read_burst() - read all data registers
16  * @indio_dev: the IIO device
17  * @rx: somewhere to pass back the value read (min size is 24 bytes)
18  **/
19 static int adis16400_spi_read_burst(struct iio_dev *indio_dev, u8 *rx)
20 {
21         struct spi_message msg;
22         struct adis16400_state *st = iio_priv(indio_dev);
23         u32 old_speed_hz = st->us->max_speed_hz;
24         int ret;
25
26         struct spi_transfer xfers[] = {
27                 {
28                         .tx_buf = st->tx,
29                         .bits_per_word = 8,
30                         .len = 2,
31                 }, {
32                         .rx_buf = rx,
33                         .bits_per_word = 8,
34                         .len = 24,
35                 },
36         };
37
38         mutex_lock(&st->buf_lock);
39         st->tx[0] = ADIS16400_READ_REG(ADIS16400_GLOB_CMD);
40         st->tx[1] = 0;
41
42         spi_message_init(&msg);
43         spi_message_add_tail(&xfers[0], &msg);
44         spi_message_add_tail(&xfers[1], &msg);
45
46         st->us->max_speed_hz = min(ADIS16400_SPI_BURST, old_speed_hz);
47         spi_setup(st->us);
48
49         ret = spi_sync(st->us, &msg);
50         if (ret)
51                 dev_err(&st->us->dev, "problem when burst reading");
52
53         st->us->max_speed_hz = old_speed_hz;
54         spi_setup(st->us);
55         mutex_unlock(&st->buf_lock);
56         return ret;
57 }
58
59 static const u16 read_all_tx_array[] = {
60         cpu_to_be16(ADIS16400_READ_REG(ADIS16400_SUPPLY_OUT)),
61         cpu_to_be16(ADIS16400_READ_REG(ADIS16400_XGYRO_OUT)),
62         cpu_to_be16(ADIS16400_READ_REG(ADIS16400_YGYRO_OUT)),
63         cpu_to_be16(ADIS16400_READ_REG(ADIS16400_ZGYRO_OUT)),
64         cpu_to_be16(ADIS16400_READ_REG(ADIS16400_XACCL_OUT)),
65         cpu_to_be16(ADIS16400_READ_REG(ADIS16400_YACCL_OUT)),
66         cpu_to_be16(ADIS16400_READ_REG(ADIS16400_ZACCL_OUT)),
67         cpu_to_be16(ADIS16400_READ_REG(ADIS16350_XTEMP_OUT)),
68         cpu_to_be16(ADIS16400_READ_REG(ADIS16350_YTEMP_OUT)),
69         cpu_to_be16(ADIS16400_READ_REG(ADIS16350_ZTEMP_OUT)),
70         cpu_to_be16(ADIS16400_READ_REG(ADIS16400_AUX_ADC)),
71 };
72
73 static int adis16350_spi_read_all(struct iio_dev *indio_dev, u8 *rx)
74 {
75         struct adis16400_state *st = iio_priv(indio_dev);
76
77         struct spi_message msg;
78         int i, j = 0, ret;
79         struct spi_transfer *xfers;
80         int scan_count = bitmap_weight(indio_dev->active_scan_mask,
81                                        indio_dev->masklength);
82
83         xfers = kzalloc(sizeof(*xfers)*(scan_count + 1),
84                         GFP_KERNEL);
85         if (xfers == NULL)
86                 return -ENOMEM;
87
88         for (i = 0; i < ARRAY_SIZE(read_all_tx_array); i++)
89                 if (test_bit(i, indio_dev->active_scan_mask)) {
90                         xfers[j].tx_buf = &read_all_tx_array[i];
91                         xfers[j].bits_per_word = 16;
92                         xfers[j].len = 2;
93                         xfers[j + 1].rx_buf = rx + j*2;
94                         j++;
95                 }
96         xfers[j].bits_per_word = 16;
97         xfers[j].len = 2;
98
99         spi_message_init(&msg);
100         for (j = 0; j < scan_count + 1; j++)
101                 spi_message_add_tail(&xfers[j], &msg);
102
103         ret = spi_sync(st->us, &msg);
104         kfree(xfers);
105
106         return ret;
107 }
108
109 /* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
110  * specific to be rolled into the core.
111  */
112 static irqreturn_t adis16400_trigger_handler(int irq, void *p)
113 {
114         struct iio_poll_func *pf = p;
115         struct iio_dev *indio_dev = pf->indio_dev;
116         struct adis16400_state *st = iio_priv(indio_dev);
117         struct iio_buffer *ring = indio_dev->buffer;
118         int i = 0, j, ret = 0;
119         s16 *data;
120
121         /* Asumption that long is enough for maximum channels */
122         unsigned long mask = *indio_dev->active_scan_mask;
123         int scan_count = bitmap_weight(indio_dev->active_scan_mask,
124                                        indio_dev->masklength);
125         data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
126         if (data == NULL) {
127                 dev_err(&st->us->dev, "memory alloc failed in ring bh");
128                 return -ENOMEM;
129         }
130
131         if (scan_count) {
132                 if (st->variant->flags & ADIS16400_NO_BURST) {
133                         ret = adis16350_spi_read_all(indio_dev, st->rx);
134                         if (ret < 0)
135                                 goto err;
136                         for (; i < scan_count; i++)
137                                 data[i] = *(s16 *)(st->rx + i*2);
138                 } else {
139                         ret = adis16400_spi_read_burst(indio_dev, st->rx);
140                         if (ret < 0)
141                                 goto err;
142                         for (; i < scan_count; i++) {
143                                 j = __ffs(mask);
144                                 mask &= ~(1 << j);
145                                 data[i] = be16_to_cpup(
146                                         (__be16 *)&(st->rx[j*2]));
147                         }
148                 }
149         }
150         /* Guaranteed to be aligned with 8 byte boundary */
151         if (ring->scan_timestamp)
152                 *((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp;
153         ring->access->store_to(indio_dev->buffer, (u8 *) data, pf->timestamp);
154
155         iio_trigger_notify_done(indio_dev->trig);
156
157         kfree(data);
158         return IRQ_HANDLED;
159
160 err:
161         kfree(data);
162         return ret;
163 }
164
165 void adis16400_unconfigure_ring(struct iio_dev *indio_dev)
166 {
167         iio_dealloc_pollfunc(indio_dev->pollfunc);
168         iio_sw_rb_free(indio_dev->buffer);
169 }
170
171 static const struct iio_buffer_setup_ops adis16400_ring_setup_ops = {
172         .preenable = &iio_sw_buffer_preenable,
173         .postenable = &iio_triggered_buffer_postenable,
174         .predisable = &iio_triggered_buffer_predisable,
175 };
176
177 int adis16400_configure_ring(struct iio_dev *indio_dev)
178 {
179         int ret = 0;
180         struct iio_buffer *ring;
181
182         ring = iio_sw_rb_allocate(indio_dev);
183         if (!ring) {
184                 ret = -ENOMEM;
185                 return ret;
186         }
187         indio_dev->buffer = ring;
188         ring->scan_timestamp = true;
189         indio_dev->setup_ops = &adis16400_ring_setup_ops;
190
191         indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
192                                                  &adis16400_trigger_handler,
193                                                  IRQF_ONESHOT,
194                                                  indio_dev,
195                                                  "%s_consumer%d",
196                                                  indio_dev->name,
197                                                  indio_dev->id);
198         if (indio_dev->pollfunc == NULL) {
199                 ret = -ENOMEM;
200                 goto error_iio_sw_rb_free;
201         }
202
203         indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
204         return 0;
205 error_iio_sw_rb_free:
206         iio_sw_rb_free(indio_dev->buffer);
207         return ret;
208 }