Pileus Git - ~andy/linux/blob - drivers/staging/iio/dac/ad5064.c

   1 /*
   2  * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5648,
   3  * AD5666, AD5668 Digital to analog converters driver
   4  *
   5  * Copyright 2011 Analog Devices Inc.
   6  *
   7  * Licensed under the GPL-2.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/err.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/slab.h>
  16 #include <linux/sysfs.h>
  17 #include <linux/regulator/consumer.h>
  18
  19 #include "../iio.h"
  20 #include "../sysfs.h"
  21 #include "dac.h"
  22
  23 #define AD5064_MAX_DAC_CHANNELS                 8
  24 #define AD5064_MAX_VREFS                        4
  25
  26 #define AD5064_ADDR(x)                          ((x) << 20)
  27 #define AD5064_CMD(x)                           ((x) << 24)
  28
  29 #define AD5064_ADDR_DAC(chan)                   (chan)
  30 #define AD5064_ADDR_ALL_DAC                     0xF
  31
  32 #define AD5064_CMD_WRITE_INPUT_N                0x0
  33 #define AD5064_CMD_UPDATE_DAC_N                 0x1
  34 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL     0x2
  35 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N       0x3
  36 #define AD5064_CMD_POWERDOWN_DAC                0x4
  37 #define AD5064_CMD_CLEAR                        0x5
  38 #define AD5064_CMD_LDAC_MASK                    0x6
  39 #define AD5064_CMD_RESET                        0x7
  40 #define AD5064_CMD_CONFIG                       0x8
  41
  42 #define AD5064_CONFIG_DAISY_CHAIN_ENABLE        BIT(1)
  43 #define AD5064_CONFIG_INT_VREF_ENABLE           BIT(0)
  44
  45 #define AD5064_LDAC_PWRDN_NONE                  0x0
  46 #define AD5064_LDAC_PWRDN_1K                    0x1
  47 #define AD5064_LDAC_PWRDN_100K                  0x2
  48 #define AD5064_LDAC_PWRDN_3STATE                0x3
  49
  50 /**
  51  * struct ad5064_chip_info - chip specific information
  52  * @shared_vref:        whether the vref supply is shared between channels
  53  * @internal_vref:      internal reference voltage. 0 if the chip has no internal
  54  *                      vref.
  55  * @channel:            channel specification
  56  * @num_channels:       number of channels
  57  */
  58
  59 struct ad5064_chip_info {
  60         bool shared_vref;
  61         unsigned long internal_vref;
  62         const struct iio_chan_spec *channels;
  63         unsigned int num_channels;
  64 };
  65
  66 /**
  67  * struct ad5064_state - driver instance specific data
  68  * @spi:                spi_device
  69  * @chip_info:          chip model specific constants, available modes etc
  70  * @vref_reg:           vref supply regulators
  71  * @pwr_down:           whether channel is powered down
  72  * @pwr_down_mode:      channel's current power down mode
  73  * @dac_cache:          current DAC raw value (chip does not support readback)
  74  * @use_internal_vref:  set to true if the internal reference voltage should be
  75  *                      used.
  76  * @data:               spi transfer buffers
  77  */
  78
  79 struct ad5064_state {
  80         struct spi_device               *spi;
  81         const struct ad5064_chip_info   *chip_info;
  82         struct regulator_bulk_data      vref_reg[AD5064_MAX_VREFS];
  83         bool                            pwr_down[AD5064_MAX_DAC_CHANNELS];
  84         u8                              pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
  85         unsigned int                    dac_cache[AD5064_MAX_DAC_CHANNELS];
  86         bool                            use_internal_vref;
  87
  88         /*
  89          * DMA (thus cache coherency maintenance) requires the
  90          * transfer buffers to live in their own cache lines.
  91          */
  92         __be32 data ____cacheline_aligned;
  93 };
  94
  95 enum ad5064_type {
  96         ID_AD5024,
  97         ID_AD5025,
  98         ID_AD5044,
  99         ID_AD5045,
 100         ID_AD5064,
 101         ID_AD5064_1,
 102         ID_AD5065,
 103         ID_AD5628_1,
 104         ID_AD5628_2,
 105         ID_AD5648_1,
 106         ID_AD5648_2,
 107         ID_AD5666_1,
 108         ID_AD5666_2,
 109         ID_AD5668_1,
 110         ID_AD5668_2,
 111 };
 112
 113 static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
 114         unsigned int addr, unsigned int val, unsigned int shift)
 115 {
 116         val <<= shift;
 117
 118         st->data = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
 119
 120         return spi_write(st->spi, &st->data, sizeof(st->data));
 121 }
 122
 123 static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
 124         unsigned int channel)
 125 {
 126         unsigned int val;
 127         int ret;
 128
 129         val = (0x1 << channel);
 130
 131         if (st->pwr_down[channel])
 132                 val |= st->pwr_down_mode[channel] << 8;
 133
 134         ret = ad5064_spi_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
 135
 136         return ret;
 137 }
 138
 139 static const char ad5064_powerdown_modes[][15] = {
 140         [AD5064_LDAC_PWRDN_NONE]        = "",
 141         [AD5064_LDAC_PWRDN_1K]          = "1kohm_to_gnd",
 142         [AD5064_LDAC_PWRDN_100K]        = "100kohm_to_gnd",
 143         [AD5064_LDAC_PWRDN_3STATE]      = "three_state",
 144 };
 145
 146 static ssize_t ad5064_read_powerdown_mode_available(struct iio_dev *indio_dev,
 147         const struct iio_chan_spec *chan, char *buf)
 148 {
 149         return sprintf(buf, "%s %s %s\n", ad5064_powerdown_modes[1],
 150                 ad5064_powerdown_modes[2], ad5064_powerdown_modes[3]);
 151 }
 152
 153 static ssize_t ad5064_read_powerdown_mode(struct iio_dev *indio_dev,
 154         const struct iio_chan_spec *chan, char *buf)
 155 {
 156         struct ad5064_state *st = iio_priv(indio_dev);
 157
 158         return sprintf(buf, "%s\n",
 159                 ad5064_powerdown_modes[st->pwr_down_mode[chan->channel]]);
 160 }
 161
 162 static ssize_t ad5064_write_powerdown_mode(struct iio_dev *indio_dev,
 163         const struct iio_chan_spec *chan, const char *buf, size_t len)
 164 {
 165         struct ad5064_state *st = iio_priv(indio_dev);
 166         unsigned int mode, i;
 167         int ret;
 168
 169         mode = 0;
 170
 171         for (i = 1; i < ARRAY_SIZE(ad5064_powerdown_modes); ++i) {
 172                 if (sysfs_streq(buf, ad5064_powerdown_modes[i])) {
 173                         mode = i;
 174                         break;
 175                 }
 176         }
 177         if (mode == 0)
 178                 return  -EINVAL;
 179
 180         mutex_lock(&indio_dev->mlock);
 181         st->pwr_down_mode[chan->channel] = mode;
 182
 183         ret = ad5064_sync_powerdown_mode(st, chan->channel);
 184         mutex_unlock(&indio_dev->mlock);
 185
 186         return ret ? ret : len;
 187 }
 188
 189 static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
 190         const struct iio_chan_spec *chan, char *buf)
 191 {
 192         struct ad5064_state *st = iio_priv(indio_dev);
 193
 194         return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
 195 }
 196
 197 static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
 198         const struct iio_chan_spec *chan, const char *buf, size_t len)
 199 {
 200         struct ad5064_state *st = iio_priv(indio_dev);
 201         bool pwr_down;
 202         int ret;
 203
 204         ret = strtobool(buf, &pwr_down);
 205         if (ret)
 206                 return ret;
 207
 208         mutex_lock(&indio_dev->mlock);
 209         st->pwr_down[chan->channel] = pwr_down;
 210
 211         ret = ad5064_sync_powerdown_mode(st, chan->channel);
 212         mutex_unlock(&indio_dev->mlock);
 213         return ret ? ret : len;
 214 }
 215
 216 static int ad5064_get_vref(struct ad5064_state *st,
 217         struct iio_chan_spec const *chan)
 218 {
 219         unsigned int i;
 220
 221         if (st->use_internal_vref)
 222                 return st->chip_info->internal_vref;
 223
 224         i = st->chip_info->shared_vref ? 0 : chan->channel;
 225         return regulator_get_voltage(st->vref_reg[i].consumer);
 226 }
 227
 228 static int ad5064_read_raw(struct iio_dev *indio_dev,
 229                            struct iio_chan_spec const *chan,
 230                            int *val,
 231                            int *val2,
 232                            long m)
 233 {
 234         struct ad5064_state *st = iio_priv(indio_dev);
 235         int scale_uv;
 236
 237         switch (m) {
 238         case 0:
 239                 *val = st->dac_cache[chan->channel];
 240                 return IIO_VAL_INT;
 241         case IIO_CHAN_INFO_SCALE:
 242                 scale_uv = ad5064_get_vref(st, chan);
 243                 if (scale_uv < 0)
 244                         return scale_uv;
 245
 246                 scale_uv = (scale_uv * 100) >> chan->scan_type.realbits;
 247                 *val =  scale_uv / 100000;
 248                 *val2 = (scale_uv % 100000) * 10;
 249                 return IIO_VAL_INT_PLUS_MICRO;
 250         default:
 251                 break;
 252         }
 253         return -EINVAL;
 254 }
 255
 256 static int ad5064_write_raw(struct iio_dev *indio_dev,
 257         struct iio_chan_spec const *chan, int val, int val2, long mask)
 258 {
 259         struct ad5064_state *st = iio_priv(indio_dev);
 260         int ret;
 261
 262         switch (mask) {
 263         case 0:
 264                 if (val > (1 << chan->scan_type.realbits) || val < 0)
 265                         return -EINVAL;
 266
 267                 mutex_lock(&indio_dev->mlock);
 268                 ret = ad5064_spi_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
 269                                 chan->address, val, chan->scan_type.shift);
 270                 if (ret == 0)
 271                         st->dac_cache[chan->channel] = val;
 272                 mutex_unlock(&indio_dev->mlock);
 273                 break;
 274         default:
 275                 ret = -EINVAL;
 276         }
 277
 278         return ret;
 279 }
 280
 281 static const struct iio_info ad5064_info = {
 282         .read_raw = ad5064_read_raw,
 283         .write_raw = ad5064_write_raw,
 284         .driver_module = THIS_MODULE,
 285 };
 286
 287 static struct iio_chan_spec_ext_info ad5064_ext_info[] = {
 288         {
 289                 .name = "powerdown",
 290                 .read = ad5064_read_dac_powerdown,
 291                 .write = ad5064_write_dac_powerdown,
 292         },
 293         {
 294                 .name = "powerdown_mode",
 295                 .read = ad5064_read_powerdown_mode,
 296                 .write = ad5064_write_powerdown_mode,
 297         },
 298         {
 299                 .name = "powerdown_mode_available",
 300                 .shared = true,
 301                 .read = ad5064_read_powerdown_mode_available,
 302         },
 303         { },
 304 };
 305
 306 #define AD5064_CHANNEL(chan, bits) {                            \
 307         .type = IIO_VOLTAGE,                                    \
 308         .indexed = 1,                                           \
 309         .output = 1,                                            \
 310         .channel = (chan),                                      \
 311         .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,  \
 312         .address = AD5064_ADDR_DAC(chan),                       \
 313         .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)),      \
 314         .ext_info = ad5064_ext_info,                            \
 315 }
 316
 317 #define DECLARE_AD5064_CHANNELS(name, bits) \
 318 const struct iio_chan_spec name[] = { \
 319         AD5064_CHANNEL(0, bits), \
 320         AD5064_CHANNEL(1, bits), \
 321         AD5064_CHANNEL(2, bits), \
 322         AD5064_CHANNEL(3, bits), \
 323         AD5064_CHANNEL(4, bits), \
 324         AD5064_CHANNEL(5, bits), \
 325         AD5064_CHANNEL(6, bits), \
 326         AD5064_CHANNEL(7, bits), \
 327 }
 328
 329 static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
 330 static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
 331 static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
 332
 333 static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
 334         [ID_AD5024] = {
 335                 .shared_vref = false,
 336                 .channels = ad5024_channels,
 337                 .num_channels = 4,
 338         },
 339         [ID_AD5025] = {
 340                 .shared_vref = false,
 341                 .channels = ad5024_channels,
 342                 .num_channels = 2,
 343         },
 344         [ID_AD5044] = {
 345                 .shared_vref = false,
 346                 .channels = ad5044_channels,
 347                 .num_channels = 4,
 348         },
 349         [ID_AD5045] = {
 350                 .shared_vref = false,
 351                 .channels = ad5044_channels,
 352                 .num_channels = 2,
 353         },
 354         [ID_AD5064] = {
 355                 .shared_vref = false,
 356                 .channels = ad5064_channels,
 357                 .num_channels = 4,
 358         },
 359         [ID_AD5064_1] = {
 360                 .shared_vref = true,
 361                 .channels = ad5064_channels,
 362                 .num_channels = 4,
 363         },
 364         [ID_AD5065] = {
 365                 .shared_vref = false,
 366                 .channels = ad5064_channels,
 367                 .num_channels = 2,
 368         },
 369         [ID_AD5628_1] = {
 370                 .shared_vref = true,
 371                 .internal_vref = 2500000,
 372                 .channels = ad5024_channels,
 373                 .num_channels = 8,
 374         },
 375         [ID_AD5628_2] = {
 376                 .shared_vref = true,
 377                 .internal_vref = 5000000,
 378                 .channels = ad5024_channels,
 379                 .num_channels = 8,
 380         },
 381         [ID_AD5648_1] = {
 382                 .shared_vref = true,
 383                 .internal_vref = 2500000,
 384                 .channels = ad5044_channels,
 385                 .num_channels = 8,
 386         },
 387         [ID_AD5648_2] = {
 388                 .shared_vref = true,
 389                 .internal_vref = 5000000,
 390                 .channels = ad5044_channels,
 391                 .num_channels = 8,
 392         },
 393         [ID_AD5666_1] = {
 394                 .shared_vref = true,
 395                 .internal_vref = 2500000,
 396                 .channels = ad5064_channels,
 397                 .num_channels = 4,
 398         },
 399         [ID_AD5666_2] = {
 400                 .shared_vref = true,
 401                 .internal_vref = 5000000,
 402                 .channels = ad5064_channels,
 403                 .num_channels = 4,
 404         },
 405         [ID_AD5668_1] = {
 406                 .shared_vref = true,
 407                 .internal_vref = 2500000,
 408                 .channels = ad5064_channels,
 409                 .num_channels = 8,
 410         },
 411         [ID_AD5668_2] = {
 412                 .shared_vref = true,
 413                 .internal_vref = 5000000,
 414                 .channels = ad5064_channels,
 415                 .num_channels = 8,
 416         },
 417 };
 418
 419 static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
 420 {
 421         return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
 422 }
 423
 424 static const char * const ad5064_vref_names[] = {
 425         "vrefA",
 426         "vrefB",
 427         "vrefC",
 428         "vrefD",
 429 };
 430
 431 static const char * const ad5064_vref_name(struct ad5064_state *st,
 432         unsigned int vref)
 433 {
 434         return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
 435 }
 436
 437 static int __devinit ad5064_probe(struct spi_device *spi)
 438 {
 439         enum ad5064_type type = spi_get_device_id(spi)->driver_data;
 440         struct iio_dev *indio_dev;
 441         struct ad5064_state *st;
 442         unsigned int i;
 443         int ret;
 444
 445         indio_dev = iio_allocate_device(sizeof(*st));
 446         if (indio_dev == NULL)
 447                 return  -ENOMEM;
 448
 449         st = iio_priv(indio_dev);
 450         spi_set_drvdata(spi, indio_dev);
 451
 452         st->chip_info = &ad5064_chip_info_tbl[type];
 453         st->spi = spi;
 454
 455         for (i = 0; i < ad5064_num_vref(st); ++i)
 456                 st->vref_reg[i].supply = ad5064_vref_name(st, i);
 457
 458         ret = regulator_bulk_get(&st->spi->dev, ad5064_num_vref(st),
 459                 st->vref_reg);
 460         if (ret) {
 461                 if (!st->chip_info->internal_vref)
 462                         goto error_free;
 463                 st->use_internal_vref = true;
 464                 ret = ad5064_spi_write(st, AD5064_CMD_CONFIG, 0,
 465                         AD5064_CONFIG_INT_VREF_ENABLE, 0);
 466                 if (ret) {
 467                         dev_err(&spi->dev, "Failed to enable internal vref: %d\n",
 468                                 ret);
 469                         goto error_free;
 470                 }
 471         } else {
 472                 ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
 473                 if (ret)
 474                         goto error_free_reg;
 475         }
 476
 477         for (i = 0; i < st->chip_info->num_channels; ++i) {
 478                 st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
 479                 st->dac_cache[i] = 0x8000;
 480         }
 481
 482         indio_dev->dev.parent = &spi->dev;
 483         indio_dev->name = spi_get_device_id(spi)->name;
 484         indio_dev->info = &ad5064_info;
 485         indio_dev->modes = INDIO_DIRECT_MODE;
 486         indio_dev->channels = st->chip_info->channels;
 487         indio_dev->num_channels = st->chip_info->num_channels;
 488
 489         ret = iio_device_register(indio_dev);
 490         if (ret)
 491                 goto error_disable_reg;
 492
 493         return 0;
 494
 495 error_disable_reg:
 496         if (!st->use_internal_vref)
 497                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
 498 error_free_reg:
 499         if (!st->use_internal_vref)
 500                 regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
 501 error_free:
 502         iio_free_device(indio_dev);
 503
 504         return ret;
 505 }
 506
 507
 508 static int __devexit ad5064_remove(struct spi_device *spi)
 509 {
 510         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 511         struct ad5064_state *st = iio_priv(indio_dev);
 512
 513         iio_device_unregister(indio_dev);
 514
 515         if (!st->use_internal_vref) {
 516                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
 517                 regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
 518         }
 519
 520         iio_free_device(indio_dev);
 521
 522         return 0;
 523 }
 524
 525 static const struct spi_device_id ad5064_id[] = {
 526         {"ad5024", ID_AD5024},
 527         {"ad5025", ID_AD5025},
 528         {"ad5044", ID_AD5044},
 529         {"ad5045", ID_AD5045},
 530         {"ad5064", ID_AD5064},
 531         {"ad5064-1", ID_AD5064_1},
 532         {"ad5065", ID_AD5065},
 533         {"ad5628-1", ID_AD5628_1},
 534         {"ad5628-2", ID_AD5628_2},
 535         {"ad5648-1", ID_AD5648_1},
 536         {"ad5648-2", ID_AD5648_2},
 537         {"ad5666-1", ID_AD5666_1},
 538         {"ad5666-2", ID_AD5666_2},
 539         {"ad5668-1", ID_AD5668_1},
 540         {"ad5668-2", ID_AD5668_2},
 541         {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
 542         {}
 543 };
 544 MODULE_DEVICE_TABLE(spi, ad5064_id);
 545
 546 static struct spi_driver ad5064_driver = {
 547         .driver = {
 548                    .name = "ad5064",
 549                    .owner = THIS_MODULE,
 550         },
 551         .probe = ad5064_probe,
 552         .remove = __devexit_p(ad5064_remove),
 553         .id_table = ad5064_id,
 554 };
 555 module_spi_driver(ad5064_driver);
 556
 557 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 558 MODULE_DESCRIPTION("Analog Devices AD5024/25/44/45/64/64-1/65, AD5628/48/66/68 DAC");
 559 MODULE_LICENSE("GPL v2");