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[~andy/linux] / drivers / staging / iio / adc / ad7793.c
1 /*
2  * AD7792/AD7793 SPI ADC driver
3  *
4  * Copyright 2011 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/err.h>
17 #include <linux/sched.h>
18 #include <linux/delay.h>
19
20 #include "../iio.h"
21 #include "../sysfs.h"
22 #include "../ring_generic.h"
23 #include "../ring_sw.h"
24 #include "../trigger.h"
25
26 #include "ad7793.h"
27
28 /* NOTE:
29  * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
30  * In order to avoid contentions on the SPI bus, it's therefore necessary
31  * to use spi bus locking.
32  *
33  * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
34  */
35
36 struct ad7793_chip_info {
37         struct iio_chan_spec            channel[7];
38 };
39
40 struct ad7793_state {
41         struct spi_device               *spi;
42         struct iio_trigger              *trig;
43         const struct ad7793_chip_info   *chip_info;
44         struct regulator                *reg;
45         struct ad7793_platform_data     *pdata;
46         wait_queue_head_t               wq_data_avail;
47         bool                            done;
48         bool                            irq_dis;
49         u16                             int_vref_mv;
50         u16                             mode;
51         u16                             conf;
52         u32                             scale_avail[8][2];
53         u32                             available_scan_masks[7];
54         /*
55          * DMA (thus cache coherency maintenance) requires the
56          * transfer buffers to live in their own cache lines.
57          */
58         u8                              data[4] ____cacheline_aligned;
59 };
60
61 enum ad7793_supported_device_ids {
62         ID_AD7792,
63         ID_AD7793,
64 };
65
66 static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
67                               bool cs_change, unsigned char reg,
68                               unsigned size, unsigned val)
69 {
70         u8 *data = st->data;
71         struct spi_transfer t = {
72                 .tx_buf         = data,
73                 .len            = size + 1,
74                 .cs_change      = cs_change,
75         };
76         struct spi_message m;
77
78         data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
79
80         switch (size) {
81         case 3:
82                 data[1] = val >> 16;
83                 data[2] = val >> 8;
84                 data[3] = val;
85                 break;
86         case 2:
87                 data[1] = val >> 8;
88                 data[2] = val;
89                 break;
90         case 1:
91                 data[1] = val;
92                 break;
93         default:
94                 return -EINVAL;
95         }
96
97         spi_message_init(&m);
98         spi_message_add_tail(&t, &m);
99
100         if (locked)
101                 return spi_sync_locked(st->spi, &m);
102         else
103                 return spi_sync(st->spi, &m);
104 }
105
106 static int ad7793_write_reg(struct ad7793_state *st,
107                             unsigned reg, unsigned size, unsigned val)
108 {
109         return __ad7793_write_reg(st, false, false, reg, size, val);
110 }
111
112 static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
113                              bool cs_change, unsigned char reg,
114                              int *val, unsigned size)
115 {
116         u8 *data = st->data;
117         int ret;
118         struct spi_transfer t[] = {
119                 {
120                         .tx_buf = data,
121                         .len = 1,
122                 }, {
123                         .rx_buf = data,
124                         .len = size,
125                         .cs_change = cs_change,
126                 },
127         };
128         struct spi_message m;
129
130         data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
131
132         spi_message_init(&m);
133         spi_message_add_tail(&t[0], &m);
134         spi_message_add_tail(&t[1], &m);
135
136         if (locked)
137                 ret = spi_sync_locked(st->spi, &m);
138         else
139                 ret = spi_sync(st->spi, &m);
140
141         if (ret < 0)
142                 return ret;
143
144         switch (size) {
145         case 3:
146                 *val = data[0] << 16 | data[1] << 8 | data[2];
147                 break;
148         case 2:
149                 *val = data[0] << 8 | data[1];
150                 break;
151         case 1:
152                 *val = data[0];
153                 break;
154         default:
155                 return -EINVAL;
156         }
157
158         return 0;
159 }
160
161 static int ad7793_read_reg(struct ad7793_state *st,
162                            unsigned reg, int *val, unsigned size)
163 {
164         return __ad7793_read_reg(st, 0, 0, reg, val, size);
165 }
166
167 static int ad7793_read(struct ad7793_state *st, unsigned ch,
168                        unsigned len, int *val)
169 {
170         int ret;
171         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
172         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
173                 AD7793_MODE_SEL(AD7793_MODE_SINGLE);
174
175         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
176
177         spi_bus_lock(st->spi->master);
178         st->done = false;
179
180         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
181                                  sizeof(st->mode), st->mode);
182         if (ret < 0)
183                 goto out;
184
185         st->irq_dis = false;
186         enable_irq(st->spi->irq);
187         wait_event_interruptible(st->wq_data_avail, st->done);
188
189         ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
190 out:
191         spi_bus_unlock(st->spi->master);
192
193         return ret;
194 }
195
196 static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
197 {
198         int ret;
199
200         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
201         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
202
203         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
204
205         spi_bus_lock(st->spi->master);
206         st->done = false;
207
208         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
209                                  sizeof(st->mode), st->mode);
210         if (ret < 0)
211                 goto out;
212
213         st->irq_dis = false;
214         enable_irq(st->spi->irq);
215         wait_event_interruptible(st->wq_data_avail, st->done);
216
217         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
218                 AD7793_MODE_SEL(AD7793_MODE_IDLE);
219
220         ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
221                                  sizeof(st->mode), st->mode);
222 out:
223         spi_bus_unlock(st->spi->master);
224
225         return ret;
226 }
227
228 static const u8 ad7793_calib_arr[6][2] = {
229         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
230         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
231         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
232         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
233         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
234         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
235 };
236
237 static int ad7793_calibrate_all(struct ad7793_state *st)
238 {
239         int i, ret;
240
241         for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
242                 ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
243                                        ad7793_calib_arr[i][1]);
244                 if (ret)
245                         goto out;
246         }
247
248         return 0;
249 out:
250         dev_err(&st->spi->dev, "Calibration failed\n");
251         return ret;
252 }
253
254 static int ad7793_setup(struct ad7793_state *st)
255 {
256         int i, ret = -1;
257         unsigned long long scale_uv;
258         u32 id;
259
260         /* reset the serial interface */
261         ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
262         if (ret < 0)
263                 goto out;
264         msleep(1); /* Wait for at least 500us */
265
266         /* write/read test for device presence */
267         ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
268         if (ret)
269                 goto out;
270
271         id &= AD7793_ID_MASK;
272
273         if (!((id == AD7792_ID) || (id == AD7793_ID))) {
274                 dev_err(&st->spi->dev, "device ID query failed\n");
275                 goto out;
276         }
277
278         st->mode  = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
279                         AD7793_MODE_SEL(AD7793_MODE_IDLE);
280         st->conf  = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
281
282         ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
283         if (ret)
284                 goto out;
285
286         ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
287         if (ret)
288                 goto out;
289
290         ret = ad7793_write_reg(st, AD7793_REG_IO,
291                                sizeof(st->pdata->io), st->pdata->io);
292         if (ret)
293                 goto out;
294
295         ret = ad7793_calibrate_all(st);
296         if (ret)
297                 goto out;
298
299         /* Populate available ADC input ranges */
300         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
301                 scale_uv = ((u64)st->int_vref_mv * 100000000)
302                         >> (st->chip_info->channel[0].scan_type.realbits -
303                         (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
304                 scale_uv >>= i;
305
306                 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
307                 st->scale_avail[i][0] = scale_uv;
308         }
309
310         return 0;
311 out:
312         dev_err(&st->spi->dev, "setup failed\n");
313         return ret;
314 }
315
316 static int ad7793_scan_from_ring(struct ad7793_state *st, unsigned ch, int *val)
317 {
318         struct iio_ring_buffer *ring = iio_priv_to_dev(st)->ring;
319         int ret;
320         s64 dat64[2];
321         u32 *dat32 = (u32 *)dat64;
322
323         if (!(ring->scan_mask & (1 << ch)))
324                 return  -EBUSY;
325
326         ret = ring->access->read_last(ring, (u8 *) &dat64);
327         if (ret)
328                 return ret;
329
330         *val = *dat32;
331
332         return 0;
333 }
334
335 static int ad7793_ring_preenable(struct iio_dev *indio_dev)
336 {
337         struct ad7793_state *st = iio_priv(indio_dev);
338         struct iio_ring_buffer *ring = indio_dev->ring;
339         size_t d_size;
340         unsigned channel;
341
342         if (!ring->scan_count)
343                 return -EINVAL;
344
345         channel = __ffs(ring->scan_mask);
346
347         d_size = ring->scan_count *
348                  indio_dev->channels[0].scan_type.storagebits / 8;
349
350         if (ring->scan_timestamp) {
351                 d_size += sizeof(s64);
352
353                 if (d_size % sizeof(s64))
354                         d_size += sizeof(s64) - (d_size % sizeof(s64));
355         }
356
357         if (indio_dev->ring->access->set_bytes_per_datum)
358                 indio_dev->ring->access->set_bytes_per_datum(indio_dev->ring,
359                                                              d_size);
360
361         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
362                     AD7793_MODE_SEL(AD7793_MODE_CONT);
363         st->conf  = (st->conf & ~AD7793_CONF_CHAN(-1)) |
364                     AD7793_CONF_CHAN(indio_dev->channels[channel].address);
365
366         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
367
368         spi_bus_lock(st->spi->master);
369         __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
370                            sizeof(st->mode), st->mode);
371
372         st->irq_dis = false;
373         enable_irq(st->spi->irq);
374
375         return 0;
376 }
377
378 static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
379 {
380         struct ad7793_state *st = iio_priv(indio_dev);
381
382         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
383                     AD7793_MODE_SEL(AD7793_MODE_IDLE);
384
385         st->done = false;
386         wait_event_interruptible(st->wq_data_avail, st->done);
387
388         if (!st->irq_dis)
389                 disable_irq_nosync(st->spi->irq);
390
391         __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
392                            sizeof(st->mode), st->mode);
393
394         return spi_bus_unlock(st->spi->master);
395 }
396
397 /**
398  * ad7793_trigger_handler() bh of trigger launched polling to ring buffer
399  **/
400
401 static irqreturn_t ad7793_trigger_handler(int irq, void *p)
402 {
403         struct iio_poll_func *pf = p;
404         struct iio_dev *indio_dev = pf->private_data;
405         struct iio_ring_buffer *ring = indio_dev->ring;
406         struct ad7793_state *st = iio_priv(indio_dev);
407         s64 dat64[2];
408         s32 *dat32 = (s32 *)dat64;
409
410         if (ring->scan_count)
411                 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
412                                   dat32,
413                                   indio_dev->channels[0].scan_type.realbits/8);
414
415         /* Guaranteed to be aligned with 8 byte boundary */
416         if (ring->scan_timestamp)
417                 dat64[1] = pf->timestamp;
418
419         ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
420
421         iio_trigger_notify_done(indio_dev->trig);
422         st->irq_dis = false;
423         enable_irq(st->spi->irq);
424
425         return IRQ_HANDLED;
426 }
427
428 static const struct iio_ring_setup_ops ad7793_ring_setup_ops = {
429         .preenable = &ad7793_ring_preenable,
430         .postenable = &iio_triggered_ring_postenable,
431         .predisable = &iio_triggered_ring_predisable,
432         .postdisable = &ad7793_ring_postdisable,
433 };
434
435 static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
436 {
437         int ret;
438
439         indio_dev->ring = iio_sw_rb_allocate(indio_dev);
440         if (!indio_dev->ring) {
441                 ret = -ENOMEM;
442                 goto error_ret;
443         }
444         /* Effectively select the ring buffer implementation */
445         indio_dev->ring->access = &ring_sw_access_funcs;
446         indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
447                                                  &ad7793_trigger_handler,
448                                                  IRQF_ONESHOT,
449                                                  indio_dev,
450                                                  "ad7793_consumer%d",
451                                                  indio_dev->id);
452         if (indio_dev->pollfunc == NULL) {
453                 ret = -ENOMEM;
454                 goto error_deallocate_sw_rb;
455         }
456
457         /* Ring buffer functions - here trigger setup related */
458         indio_dev->ring->setup_ops = &ad7793_ring_setup_ops;
459
460         /* Flag that polled ring buffering is possible */
461         indio_dev->modes |= INDIO_RING_TRIGGERED;
462         return 0;
463
464 error_deallocate_sw_rb:
465         iio_sw_rb_free(indio_dev->ring);
466 error_ret:
467         return ret;
468 }
469
470 static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
471 {
472         /* ensure that the trigger has been detached */
473         if (indio_dev->trig) {
474                 iio_put_trigger(indio_dev->trig);
475                 iio_trigger_dettach_poll_func(indio_dev->trig,
476                                               indio_dev->pollfunc);
477         }
478         iio_dealloc_pollfunc(indio_dev->pollfunc);
479         iio_sw_rb_free(indio_dev->ring);
480 }
481
482 /**
483  * ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
484  **/
485 static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
486 {
487         struct ad7793_state *st = iio_priv(private);
488
489         st->done = true;
490         wake_up_interruptible(&st->wq_data_avail);
491         disable_irq_nosync(irq);
492         st->irq_dis = true;
493         iio_trigger_poll(st->trig, iio_get_time_ns());
494
495         return IRQ_HANDLED;
496 }
497
498 static int ad7793_probe_trigger(struct iio_dev *indio_dev)
499 {
500         struct ad7793_state *st = iio_priv(indio_dev);
501         int ret;
502
503         st->trig = iio_allocate_trigger("%s-dev%d",
504                                         spi_get_device_id(st->spi)->name,
505                                         indio_dev->id);
506         if (st->trig == NULL) {
507                 ret = -ENOMEM;
508                 goto error_ret;
509         }
510
511         ret = request_irq(st->spi->irq,
512                           ad7793_data_rdy_trig_poll,
513                           IRQF_TRIGGER_LOW,
514                           spi_get_device_id(st->spi)->name,
515                           indio_dev);
516         if (ret)
517                 goto error_free_trig;
518
519         disable_irq_nosync(st->spi->irq);
520         st->irq_dis = true;
521         st->trig->dev.parent = &st->spi->dev;
522         st->trig->owner = THIS_MODULE;
523         st->trig->private_data = indio_dev;
524
525         ret = iio_trigger_register(st->trig);
526
527         /* select default trigger */
528         indio_dev->trig = st->trig;
529         if (ret)
530                 goto error_free_irq;
531
532         return 0;
533
534 error_free_irq:
535         free_irq(st->spi->irq, indio_dev);
536 error_free_trig:
537         iio_free_trigger(st->trig);
538 error_ret:
539         return ret;
540 }
541
542 static void ad7793_remove_trigger(struct iio_dev *indio_dev)
543 {
544         struct ad7793_state *st = iio_priv(indio_dev);
545
546         iio_trigger_unregister(st->trig);
547         free_irq(st->spi->irq, indio_dev);
548         iio_free_trigger(st->trig);
549 }
550
551 static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
552                                           17, 16, 12, 10, 8, 6, 4};
553
554 static ssize_t ad7793_read_frequency(struct device *dev,
555                 struct device_attribute *attr,
556                 char *buf)
557 {
558         struct iio_dev *indio_dev = dev_get_drvdata(dev);
559         struct ad7793_state *st = iio_priv(indio_dev);
560
561         return sprintf(buf, "%d\n",
562                        sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
563 }
564
565 static ssize_t ad7793_write_frequency(struct device *dev,
566                 struct device_attribute *attr,
567                 const char *buf,
568                 size_t len)
569 {
570         struct iio_dev *indio_dev = dev_get_drvdata(dev);
571         struct ad7793_state *st = iio_priv(indio_dev);
572         long lval;
573         int i, ret;
574
575         mutex_lock(&indio_dev->mlock);
576         if (iio_ring_enabled(indio_dev)) {
577                 mutex_unlock(&indio_dev->mlock);
578                 return -EBUSY;
579         }
580         mutex_unlock(&indio_dev->mlock);
581
582         ret = strict_strtol(buf, 10, &lval);
583         if (ret)
584                 return ret;
585
586         ret = -EINVAL;
587
588         for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
589                 if (lval == sample_freq_avail[i]) {
590                         mutex_lock(&indio_dev->mlock);
591                         st->mode &= ~AD7793_MODE_RATE(-1);
592                         st->mode |= AD7793_MODE_RATE(i);
593                         ad7793_write_reg(st, AD7793_REG_MODE,
594                                          sizeof(st->mode), st->mode);
595                         mutex_unlock(&indio_dev->mlock);
596                         ret = 0;
597                 }
598
599         return ret ? ret : len;
600 }
601
602 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
603                 ad7793_read_frequency,
604                 ad7793_write_frequency);
605
606 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
607         "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
608
609 static ssize_t ad7793_show_scale_available(struct device *dev,
610                         struct device_attribute *attr, char *buf)
611 {
612         struct iio_dev *indio_dev = dev_get_drvdata(dev);
613         struct ad7793_state *st = iio_priv(indio_dev);
614         int i, len = 0;
615
616         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
617                 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
618                                st->scale_avail[i][1]);
619
620         len += sprintf(buf + len, "\n");
621
622         return len;
623 }
624
625 static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
626                              S_IRUGO, ad7793_show_scale_available, NULL, 0);
627
628 static struct attribute *ad7793_attributes[] = {
629         &iio_dev_attr_sampling_frequency.dev_attr.attr,
630         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
631         &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
632         NULL
633 };
634
635 static const struct attribute_group ad7793_attribute_group = {
636         .attrs = ad7793_attributes,
637 };
638
639 static int ad7793_read_raw(struct iio_dev *indio_dev,
640                            struct iio_chan_spec const *chan,
641                            int *val,
642                            int *val2,
643                            long m)
644 {
645         struct ad7793_state *st = iio_priv(indio_dev);
646         int ret, smpl = 0;
647         unsigned long long scale_uv;
648         bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
649
650         switch (m) {
651         case 0:
652                 mutex_lock(&indio_dev->mlock);
653                 if (iio_ring_enabled(indio_dev))
654                         ret = ad7793_scan_from_ring(st,
655                                         chan->scan_index, &smpl);
656                 else
657                         ret = ad7793_read(st, chan->address,
658                                         chan->scan_type.realbits / 8, &smpl);
659                 mutex_unlock(&indio_dev->mlock);
660
661                 if (ret < 0)
662                         return ret;
663
664                 *val = (smpl >> chan->scan_type.shift) &
665                         ((1 << (chan->scan_type.realbits)) - 1);
666
667                 if (!unipolar)
668                         *val -= (1 << (chan->scan_type.realbits - 1));
669
670                 return IIO_VAL_INT;
671
672         case (1 << IIO_CHAN_INFO_SCALE_SHARED):
673                 *val = st->scale_avail[(st->conf >> 8) & 0x7][0];
674                 *val2 = st->scale_avail[(st->conf >> 8) & 0x7][1];
675
676                 return IIO_VAL_INT_PLUS_NANO;
677
678         case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
679                 switch (chan->type) {
680                 case IIO_IN:
681                         /* 1170mV / 2^23 * 6 */
682                         scale_uv = (1170ULL * 100000000ULL * 6ULL)
683                                 >> (chan->scan_type.realbits -
684                                 (unipolar ? 0 : 1));
685                         break;
686                 case IIO_TEMP:
687                         /* Always uses unity gain and internal ref */
688                         scale_uv = (2500ULL * 100000000ULL)
689                                 >> (chan->scan_type.realbits -
690                                 (unipolar ? 0 : 1));
691                         break;
692                 default:
693                         return -EINVAL;
694                 }
695
696                 *val2 = do_div(scale_uv, 100000000) * 10;
697                 *val =  scale_uv;
698
699                 return IIO_VAL_INT_PLUS_NANO;
700         }
701         return -EINVAL;
702 }
703
704 static int ad7793_write_raw(struct iio_dev *indio_dev,
705                                struct iio_chan_spec const *chan,
706                                int val,
707                                int val2,
708                                long mask)
709 {
710         struct ad7793_state *st = iio_priv(indio_dev);
711         int ret, i;
712         unsigned int tmp;
713
714         mutex_lock(&indio_dev->mlock);
715         if (iio_ring_enabled(indio_dev)) {
716                 mutex_unlock(&indio_dev->mlock);
717                 return -EBUSY;
718         }
719
720         switch (mask) {
721         case (1 << IIO_CHAN_INFO_SCALE_SHARED):
722                 ret = -EINVAL;
723                 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
724                         if (val2 == st->scale_avail[i][1]) {
725                                 tmp = st->conf;
726                                 st->conf &= ~AD7793_CONF_GAIN(-1);
727                                 st->conf |= AD7793_CONF_GAIN(i);
728
729                                 if (tmp != st->conf) {
730                                         ad7793_write_reg(st, AD7793_REG_CONF,
731                                                          sizeof(st->conf),
732                                                          st->conf);
733                                         ad7793_calibrate_all(st);
734                                 }
735                                 ret = 0;
736                         }
737
738         default:
739                 ret = -EINVAL;
740         }
741
742         mutex_unlock(&indio_dev->mlock);
743         return ret;
744 }
745
746 static int ad7793_validate_trigger(struct iio_dev *indio_dev,
747                                    struct iio_trigger *trig)
748 {
749         if (indio_dev->trig != trig)
750                 return -EINVAL;
751
752         return 0;
753 }
754
755 static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
756                                struct iio_chan_spec const *chan,
757                                long mask)
758 {
759         return IIO_VAL_INT_PLUS_NANO;
760 }
761
762 static const struct iio_info ad7793_info = {
763         .read_raw = &ad7793_read_raw,
764         .write_raw = &ad7793_write_raw,
765         .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
766         .attrs = &ad7793_attribute_group,
767         .validate_trigger = ad7793_validate_trigger,
768         .driver_module = THIS_MODULE,
769 };
770
771 static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
772         [ID_AD7793] = {
773                 .channel[0] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 0, 0,
774                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
775                                     AD7793_CH_AIN1P_AIN1M,
776                                     0, IIO_ST('s', 24, 32, 0), 0),
777                 .channel[1] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 1, 1,
778                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
779                                     AD7793_CH_AIN2P_AIN2M,
780                                     1, IIO_ST('s', 24, 32, 0), 0),
781                 .channel[2] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 2, 2,
782                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
783                                     AD7793_CH_AIN3P_AIN3M,
784                                     2, IIO_ST('s', 24, 32, 0), 0),
785                 .channel[3] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, "shorted", 0, 0,
786                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
787                                     AD7793_CH_AIN1M_AIN1M,
788                                     3, IIO_ST('s', 24, 32, 0), 0),
789                 .channel[4] = IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
790                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
791                                     AD7793_CH_TEMP,
792                                     4, IIO_ST('s', 24, 32, 0), 0),
793                 .channel[5] = IIO_CHAN(IIO_IN, 0, 1, 0, "supply", 4, 0,
794                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
795                                     AD7793_CH_AVDD_MONITOR,
796                                     5, IIO_ST('s', 24, 32, 0), 0),
797                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
798         },
799         [ID_AD7792] = {
800                 .channel[0] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 0, 0,
801                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
802                                     AD7793_CH_AIN1P_AIN1M,
803                                     0, IIO_ST('s', 16, 32, 0), 0),
804                 .channel[1] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 1, 1,
805                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
806                                     AD7793_CH_AIN2P_AIN2M,
807                                     1, IIO_ST('s', 16, 32, 0), 0),
808                 .channel[2] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 2, 2,
809                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
810                                     AD7793_CH_AIN3P_AIN3M,
811                                     2, IIO_ST('s', 16, 32, 0), 0),
812                 .channel[3] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, "shorted", 0, 0,
813                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
814                                     AD7793_CH_AIN1M_AIN1M,
815                                     3, IIO_ST('s', 16, 32, 0), 0),
816                 .channel[4] = IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
817                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
818                                     AD7793_CH_TEMP,
819                                     4, IIO_ST('s', 16, 32, 0), 0),
820                 .channel[5] = IIO_CHAN(IIO_IN, 0, 1, 0, "supply", 4, 0,
821                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
822                                     AD7793_CH_AVDD_MONITOR,
823                                     5, IIO_ST('s', 16, 32, 0), 0),
824                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
825         },
826 };
827
828 static int __devinit ad7793_probe(struct spi_device *spi)
829 {
830         struct ad7793_platform_data *pdata = spi->dev.platform_data;
831         struct ad7793_state *st;
832         struct iio_dev *indio_dev;
833         int ret, i, voltage_uv = 0, regdone = 0;
834
835         if (!pdata) {
836                 dev_err(&spi->dev, "no platform data?\n");
837                 return -ENODEV;
838         }
839
840         if (!spi->irq) {
841                 dev_err(&spi->dev, "no IRQ?\n");
842                 return -ENODEV;
843         }
844
845         indio_dev = iio_allocate_device(sizeof(*st));
846         if (indio_dev == NULL)
847                 return -ENOMEM;
848
849         st = iio_priv(indio_dev);
850
851         st->reg = regulator_get(&spi->dev, "vcc");
852         if (!IS_ERR(st->reg)) {
853                 ret = regulator_enable(st->reg);
854                 if (ret)
855                         goto error_put_reg;
856
857                 voltage_uv = regulator_get_voltage(st->reg);
858         }
859
860         st->chip_info =
861                 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
862
863         st->pdata = pdata;
864
865         if (pdata && pdata->vref_mv)
866                 st->int_vref_mv = pdata->vref_mv;
867         else if (voltage_uv)
868                 st->int_vref_mv = voltage_uv / 1000;
869         else
870                 st->int_vref_mv = 2500; /* Build-in ref */
871
872         spi_set_drvdata(spi, indio_dev);
873         st->spi = spi;
874
875         indio_dev->dev.parent = &spi->dev;
876         indio_dev->name = spi_get_device_id(spi)->name;
877         indio_dev->modes = INDIO_DIRECT_MODE;
878         indio_dev->channels = st->chip_info->channel;
879         indio_dev->available_scan_masks = st->available_scan_masks;
880         indio_dev->num_channels = 7;
881         indio_dev->info = &ad7793_info;
882
883         for (i = 0; i < indio_dev->num_channels; i++)
884                 st->available_scan_masks[i] = (1 << i) | (1 <<
885                         indio_dev->channels[indio_dev->num_channels - 1].
886                         scan_index);
887
888         init_waitqueue_head(&st->wq_data_avail);
889
890         ret = ad7793_register_ring_funcs_and_init(indio_dev);
891         if (ret)
892                 goto error_disable_reg;
893
894         ret = iio_device_register(indio_dev);
895         if (ret)
896                 goto error_unreg_ring;
897         regdone = 1;
898
899         ret = ad7793_probe_trigger(indio_dev);
900         if (ret)
901                 goto error_unreg_ring;
902
903         ret = iio_ring_buffer_register_ex(indio_dev->ring, 0,
904                                           indio_dev->channels,
905                                           indio_dev->num_channels);
906         if (ret)
907                 goto error_remove_trigger;
908
909         ret = ad7793_setup(st);
910         if (ret)
911                 goto error_uninitialize_ring;
912
913         return 0;
914
915 error_uninitialize_ring:
916         iio_ring_buffer_unregister(indio_dev->ring);
917 error_remove_trigger:
918         ad7793_remove_trigger(indio_dev);
919 error_unreg_ring:
920         ad7793_ring_cleanup(indio_dev);
921 error_disable_reg:
922         if (!IS_ERR(st->reg))
923                 regulator_disable(st->reg);
924 error_put_reg:
925         if (!IS_ERR(st->reg))
926                 regulator_put(st->reg);
927
928         if (regdone)
929                 iio_device_unregister(indio_dev);
930         else
931                 iio_free_device(indio_dev);
932
933         return ret;
934 }
935
936 static int ad7793_remove(struct spi_device *spi)
937 {
938         struct iio_dev *indio_dev = spi_get_drvdata(spi);
939         struct ad7793_state *st = iio_priv(indio_dev);
940
941         iio_ring_buffer_unregister(indio_dev->ring);
942         ad7793_remove_trigger(indio_dev);
943         ad7793_ring_cleanup(indio_dev);
944
945         if (!IS_ERR(st->reg)) {
946                 regulator_disable(st->reg);
947                 regulator_put(st->reg);
948         }
949
950         iio_device_unregister(indio_dev);
951
952         return 0;
953 }
954
955 static const struct spi_device_id ad7793_id[] = {
956         {"ad7792", ID_AD7792},
957         {"ad7793", ID_AD7793},
958         {}
959 };
960
961 static struct spi_driver ad7793_driver = {
962         .driver = {
963                 .name   = "ad7793",
964                 .bus    = &spi_bus_type,
965                 .owner  = THIS_MODULE,
966         },
967         .probe          = ad7793_probe,
968         .remove         = __devexit_p(ad7793_remove),
969         .id_table       = ad7793_id,
970 };
971
972 static int __init ad7793_init(void)
973 {
974         return spi_register_driver(&ad7793_driver);
975 }
976 module_init(ad7793_init);
977
978 static void __exit ad7793_exit(void)
979 {
980         spi_unregister_driver(&ad7793_driver);
981 }
982 module_exit(ad7793_exit);
983
984 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
985 MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
986 MODULE_LICENSE("GPL v2");