3 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
5 * Copyright © 2005 Agere Systems Inc.
9 *------------------------------------------------------------------------------
11 * et131x_adapter.h - Header which includes the private adapter structure, along
12 * with related support structures, macros, definitions, etc.
14 *------------------------------------------------------------------------------
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59 #ifndef __ET131X_ADAPTER_H__
60 #define __ET131X_ADAPTER_H__
62 #include "et1310_address_map.h"
63 #include "et1310_tx.h"
64 #include "et1310_rx.h"
67 * Do not change these values: if changed, then change also in respective
68 * TXdma and Rxdma engines
70 #define NUM_DESC_PER_RING_TX 512 /* TX Do not change these values */
74 * These values are all superseded by registry entries to facilitate tuning.
75 * Once the desired performance has been achieved, the optimal registry values
76 * should be re-populated to these #defines:
78 #define NUM_TRAFFIC_CLASSES 1
81 * There are three ways of counting errors - if there are more than X errors
82 * in Y packets (represented by the "SAMPLE" macros), if there are more than
83 * N errors in a S mSec time period (the "PERIOD" macros), or if there are
84 * consecutive packets with errors (CONSEC_ERRORED_THRESH). This last covers
85 * for "Bursty" errors, and the errored packets may well not be contiguous,
86 * but several errors where the packet counter has changed by less than a
87 * small amount will cause this count to increment.
89 #define TX_PACKETS_IN_SAMPLE 10000
90 #define TX_MAX_ERRORS_IN_SAMPLE 50
92 #define TX_ERROR_PERIOD 1000
93 #define TX_MAX_ERRORS_IN_PERIOD 10
95 #define LINK_DETECTION_TIMER 5000
97 #define TX_CONSEC_RANGE 5
98 #define TX_CONSEC_ERRORED_THRESH 10
100 #define LO_MARK_PERCENT_FOR_PSR 15
101 #define LO_MARK_PERCENT_FOR_RX 15
103 /* Macros for flag and ref count operations */
104 #define MP_SET_FLAG(_M, _F) ((_M)->Flags |= (_F))
105 #define MP_CLEAR_FLAG(_M, _F) ((_M)->Flags &= ~(_F))
106 #define MP_CLEAR_FLAGS(_M) ((_M)->Flags = 0)
107 #define MP_TEST_FLAG(_M, _F) (((_M)->Flags & (_F)) != 0)
108 #define MP_TEST_FLAGS(_M, _F) (((_M)->Flags & (_F)) == (_F))
109 #define MP_IS_FLAG_CLEAR(_M, _F) (((_M)->Flags & (_F)) == 0)
111 #define MP_GET_RCV_REF(_A) atomic_read(&(_A)->RcvRefCount)
113 /* Macros specific to the private adapter structure */
114 #define MP_TCB_RESOURCES_AVAILABLE(_M) ((_M)->TxRing.nBusySend < NUM_TCB)
115 #define MP_TCB_RESOURCES_NOT_AVAILABLE(_M) ((_M)->TxRing.nBusySend >= NUM_TCB)
117 #define MP_SHOULD_FAIL_SEND(_M) ((_M)->Flags & fMP_ADAPTER_FAIL_SEND_MASK)
118 #define MP_IS_NOT_READY(_M) ((_M)->Flags & fMP_ADAPTER_NOT_READY_MASK)
119 #define MP_IS_READY(_M) (!((_M)->Flags & fMP_ADAPTER_NOT_READY_MASK))
121 #define MP_HAS_CABLE(_M) (!((_M)->Flags & fMP_ADAPTER_NO_CABLE))
122 #define MP_LINK_DETECTED(_M) (!((_M)->Flags & fMP_ADAPTER_LINK_DETECTION))
124 /* Counters for error rate monitoring */
125 typedef struct _MP_ERR_COUNTERS {
126 u32 PktCountTxPackets;
127 u32 PktCountTxErrors;
128 u32 TimerBasedTxErrors;
129 u32 PktCountLastError;
130 u32 ErredConsecPackets;
131 } MP_ERR_COUNTERS, *PMP_ERR_COUNTERS;
133 /* RFD (Receive Frame Descriptor) */
134 typedef struct _MP_RFD {
135 struct list_head list_node;
136 struct sk_buff *Packet;
137 u32 PacketSize; /* total size of receive frame */
142 /* Enum for Flow Control */
143 typedef enum _eflow_control_t {
148 } eFLOW_CONTROL_t, *PeFLOW_CONTROL_t;
150 /* Struct to define some device statistics */
151 typedef struct _ce_stats_t {
152 /* Link Input/Output stats */
153 uint64_t ipackets; /* # of in packets */
154 uint64_t opackets; /* # of out packets */
158 * NOTE: atomic_t types are only guaranteed to store 24-bits; if we
159 * MUST have 32, then we'll need another way to perform atomic
162 u32 unircv; /* # multicast packets received */
163 atomic_t unixmt; /* # multicast packets for Tx */
164 u32 multircv; /* # multicast packets received */
165 atomic_t multixmt; /* # multicast packets for Tx */
166 u32 brdcstrcv; /* # broadcast packets received */
167 atomic_t brdcstxmt; /* # broadcast packets for Tx */
168 u32 norcvbuf; /* # Rx packets discarded */
169 u32 noxmtbuf; /* # Tx packets discarded */
171 /* Transciever state informations. */
176 u32 tx_uflo; /* Tx Underruns */
179 u32 excessive_collisions;
186 u32 rx_ov_flow; /* Rx Over Flow */
194 #ifdef CONFIG_ET131X_DEBUG
195 u32 UnhandledInterruptsPerSec;
196 u32 RxDmaInterruptsPerSec;
197 u32 TxDmaInterruptsPerSec;
198 u32 WatchDogInterruptsPerSec;
199 #endif /* CONFIG_ET131X_DEBUG */
201 u32 SynchrounousIterations;
202 INTERRUPT_t InterruptStatus;
203 } CE_STATS_t, *PCE_STATS_t;
205 /* The private adapter structure */
206 struct et131x_adapter {
207 struct net_device *netdev;
208 struct pci_dev *pdev;
210 struct work_struct task;
212 /* Flags that indicate current state of the adapter */
217 u8 PermanentAddress[ETH_ALEN];
218 u8 CurrentAddress[ETH_ALEN];
219 bool bOverrideAddress;
226 spinlock_t TCBSendQLock;
227 spinlock_t TCBReadyQLock;
228 spinlock_t SendHWLock;
229 spinlock_t SendWaitLock;
232 spinlock_t RcvPendLock;
237 /* Packet Filter and look ahead size */
247 u8 MCList[NIC_MAX_MCAST_LIST][ETH_ALEN];
250 TXMAC_TXTEST_t TxMacTest;
252 /* Pointer to the device's PCI register space */
253 ADDRESS_MAP_t __iomem *CSRAddress;
255 /* PCI config space info, for debug purposes only. */
266 u32 pci_cfg_state[64 / sizeof(u32)];
268 /* Registry parameters */
269 u8 SpeedDuplex; /* speed/duplex */
270 eFLOW_CONTROL_t RegistryFlowControl; /* for 802.3x flow control */
271 u8 RegistryWOLMatch; /* Enable WOL pattern-matching */
272 u8 RegistryWOLLink; /* Link state change is independant */
273 u8 RegistryPhyComa; /* Phy Coma mode enable/disable */
275 u32 RegistryRxMemEnd; /* Size of internal rx memory */
276 u8 RegistryMACStat; /* If set, read MACSTAT, else don't */
277 u32 RegistryVlanTag; /* 802.1q Vlan TAG */
278 u32 RegistryJumboPacket; /* Max supported ethernet packet size */
280 u32 RegistryTxNumBuffers;
281 u32 RegistryTxTimeInterval;
283 u32 RegistryRxNumBuffers;
284 u32 RegistryRxTimeInterval;
286 /* Validation helpers */
288 u8 RegistryNMIDisable;
289 u32 RegistryDMACache;
291 u8 RegistryPhyLoopbk; /* Enable Phy loopback */
293 /* Derived from the registry: */
294 u8 AiForceDpx; /* duplex setting */
295 u16 AiForceSpeed; /* 'Speed', user over-ride of line speed */
296 eFLOW_CONTROL_t FlowControl; /* flow control validated by the far-end */
298 NETIF_STATUS_INVALID = 0,
299 NETIF_STATUS_MEDIA_CONNECT,
300 NETIF_STATUS_MEDIA_DISCONNECT,
303 u8 DriverNoPhyAccess;
305 /* Minimize init-time */
309 struct timer_list ErrorTimer;
310 bool bLinkTimerActive;
311 MP_POWER_MGMT PoMgmt;
312 INTERRUPT_t CachedMaskValue;
314 atomic_t RcvRefCount; /* Num packets not yet returned */
316 /* Xcvr status at last poll */
319 /* Tx Memory Variables */
322 /* Rx Memory Variables */
325 /* ET1310 register Access */
326 JAGCORE_ACCESS_REGS JagCoreRegs;
327 PCI_CFG_SPACE_REGS PciCfgRegs;
329 /* Loopback specifics */
330 u8 ReplicaPhyLoopbk; /* Replica Enable */
331 u8 ReplicaPhyLoopbkPF; /* Replica Enable Pass/Fail */
336 struct net_device_stats net_stats;
337 struct net_device_stats net_stats_prev;
340 #define MPSendPacketsHandler MPSendPackets
341 #define MP_FREE_SEND_PACKET_FUN(Adapter, pMpTcb) \
342 et131x_free_send_packet(Adapter, pMpTcb)
343 #define MpSendPacketFun(Adapter, Packet) MpSendPacket(Adapter, Packet)
345 #endif /* __ET131X_ADAPTER_H__ */