Pileus Git - ~andy/linux/blob - drivers/staging/comedi/drivers/ni_65xx.c

   1 /*
   2     comedi/drivers/ni_6514.c
   3     driver for National Instruments PCI-6514
   4
   5     Copyright (C) 2006 Jon Grierson <jd@renko.co.uk>
   6     Copyright (C) 2006 Frank Mori Hess <fmhess@users.sourceforge.net>
   7
   8     COMEDI - Linux Control and Measurement Device Interface
   9     Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
  10
  11     This program is free software; you can redistribute it and/or modify
  12     it under the terms of the GNU General Public License as published by
  13     the Free Software Foundation; either version 2 of the License, or
  14     (at your option) any later version.
  15
  16     This program is distributed in the hope that it will be useful,
  17     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19     GNU General Public License for more details.
  20
  21     You should have received a copy of the GNU General Public License
  22     along with this program; if not, write to the Free Software
  23     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24
  25 */
  26 /*
  27 Driver: ni_65xx
  28 Description: National Instruments 65xx static dio boards
  29 Author: Jon Grierson <jd@renko.co.uk>,
  30         Frank Mori Hess <fmhess@users.sourceforge.net>
  31 Status: testing
  32 Devices: [National Instruments] PCI-6509 (ni_65xx), PXI-6509, PCI-6510,
  33   PCI-6511, PXI-6511, PCI-6512, PXI-6512, PCI-6513, PXI-6513, PCI-6514,
  34   PXI-6514, PCI-6515, PXI-6515, PCI-6516, PCI-6517, PCI-6518, PCI-6519,
  35   PCI-6520, PCI-6521, PXI-6521, PCI-6528, PXI-6528
  36 Updated: Wed Oct 18 08:59:11 EDT 2006
  37
  38 Based on the PCI-6527 driver by ds.
  39 The interrupt subdevice (subdevice 3) is probably broken for all boards
  40 except maybe the 6514.
  41
  42 */
  43
  44 /*
  45    Manuals (available from ftp://ftp.natinst.com/support/manuals)
  46
  47         370106b.pdf     6514 Register Level Programmer Manual
  48
  49  */
  50
  51 #define _GNU_SOURCE
  52 #define DEBUG 1
  53 #define DEBUG_FLAGS
  54 #include <linux/interrupt.h>
  55 #include <linux/slab.h>
  56 #include "../comedidev.h"
  57
  58 #include "comedi_fc.h"
  59 #include "mite.h"
  60
  61 #define NI6514_DIO_SIZE 4096
  62 #define NI6514_MITE_SIZE 4096
  63
  64 #define NI_65XX_MAX_NUM_PORTS 12
  65 static const unsigned ni_65xx_channels_per_port = 8;
  66 static const unsigned ni_65xx_port_offset = 0x10;
  67
  68 static inline unsigned Port_Data(unsigned port)
  69 {
  70         return 0x40 + port * ni_65xx_port_offset;
  71 }
  72
  73 static inline unsigned Port_Select(unsigned port)
  74 {
  75         return 0x41 + port * ni_65xx_port_offset;
  76 }
  77
  78 static inline unsigned Rising_Edge_Detection_Enable(unsigned port)
  79 {
  80         return 0x42 + port * ni_65xx_port_offset;
  81 }
  82
  83 static inline unsigned Falling_Edge_Detection_Enable(unsigned port)
  84 {
  85         return 0x43 + port * ni_65xx_port_offset;
  86 }
  87
  88 static inline unsigned Filter_Enable(unsigned port)
  89 {
  90         return 0x44 + port * ni_65xx_port_offset;
  91 }
  92
  93 #define ID_Register                             0x00
  94
  95 #define Clear_Register                          0x01
  96 #define ClrEdge                         0x08
  97 #define ClrOverflow                     0x04
  98
  99 #define Filter_Interval                 0x08
 100
 101 #define Change_Status                           0x02
 102 #define MasterInterruptStatus           0x04
 103 #define Overflow                        0x02
 104 #define EdgeStatus                      0x01
 105
 106 #define Master_Interrupt_Control                0x03
 107 #define FallingEdgeIntEnable            0x10
 108 #define RisingEdgeIntEnable             0x08
 109 #define MasterInterruptEnable           0x04
 110 #define OverflowIntEnable               0x02
 111 #define EdgeIntEnable                   0x01
 112
 113 struct ni_65xx_board {
 114         int dev_id;
 115         const char *name;
 116         unsigned num_dio_ports;
 117         unsigned num_di_ports;
 118         unsigned num_do_ports;
 119         unsigned invert_outputs:1;
 120 };
 121
 122 static const struct ni_65xx_board ni_65xx_boards[] = {
 123         {
 124          .dev_id = 0x7085,
 125          .name = "pci-6509",
 126          .num_dio_ports = 12,
 127          .invert_outputs = 0},
 128         {
 129          .dev_id = 0x1710,
 130          .name = "pxi-6509",
 131          .num_dio_ports = 12,
 132          .invert_outputs = 0},
 133         {
 134          .dev_id = 0x7124,
 135          .name = "pci-6510",
 136          .num_di_ports = 4},
 137         {
 138          .dev_id = 0x70c3,
 139          .name = "pci-6511",
 140          .num_di_ports = 8},
 141         {
 142          .dev_id = 0x70d3,
 143          .name = "pxi-6511",
 144          .num_di_ports = 8},
 145         {
 146          .dev_id = 0x70cc,
 147          .name = "pci-6512",
 148          .num_do_ports = 8},
 149         {
 150          .dev_id = 0x70d2,
 151          .name = "pxi-6512",
 152          .num_do_ports = 8},
 153         {
 154          .dev_id = 0x70c8,
 155          .name = "pci-6513",
 156          .num_do_ports = 8,
 157          .invert_outputs = 1},
 158         {
 159          .dev_id = 0x70d1,
 160          .name = "pxi-6513",
 161          .num_do_ports = 8,
 162          .invert_outputs = 1},
 163         {
 164          .dev_id = 0x7088,
 165          .name = "pci-6514",
 166          .num_di_ports = 4,
 167          .num_do_ports = 4,
 168          .invert_outputs = 1},
 169         {
 170          .dev_id = 0x70CD,
 171          .name = "pxi-6514",
 172          .num_di_ports = 4,
 173          .num_do_ports = 4,
 174          .invert_outputs = 1},
 175         {
 176          .dev_id = 0x7087,
 177          .name = "pci-6515",
 178          .num_di_ports = 4,
 179          .num_do_ports = 4,
 180          .invert_outputs = 1},
 181         {
 182          .dev_id = 0x70c9,
 183          .name = "pxi-6515",
 184          .num_di_ports = 4,
 185          .num_do_ports = 4,
 186          .invert_outputs = 1},
 187         {
 188          .dev_id = 0x7125,
 189          .name = "pci-6516",
 190          .num_do_ports = 4,
 191          .invert_outputs = 1},
 192         {
 193          .dev_id = 0x7126,
 194          .name = "pci-6517",
 195          .num_do_ports = 4,
 196          .invert_outputs = 1},
 197         {
 198          .dev_id = 0x7127,
 199          .name = "pci-6518",
 200          .num_di_ports = 2,
 201          .num_do_ports = 2,
 202          .invert_outputs = 1},
 203         {
 204          .dev_id = 0x7128,
 205          .name = "pci-6519",
 206          .num_di_ports = 2,
 207          .num_do_ports = 2,
 208          .invert_outputs = 1},
 209         {
 210          .dev_id = 0x71c5,
 211          .name = "pci-6520",
 212          .num_di_ports = 1,
 213          .num_do_ports = 1,
 214          },
 215         {
 216          .dev_id = 0x718b,
 217          .name = "pci-6521",
 218          .num_di_ports = 1,
 219          .num_do_ports = 1,
 220          },
 221         {
 222          .dev_id = 0x718c,
 223          .name = "pxi-6521",
 224          .num_di_ports = 1,
 225          .num_do_ports = 1,
 226          },
 227         {
 228          .dev_id = 0x70a9,
 229          .name = "pci-6528",
 230          .num_di_ports = 3,
 231          .num_do_ports = 3,
 232          },
 233         {
 234          .dev_id = 0x7086,
 235          .name = "pxi-6528",
 236          .num_di_ports = 3,
 237          .num_do_ports = 3,
 238          },
 239 };
 240
 241 #define n_ni_65xx_boards ARRAY_SIZE(ni_65xx_boards)
 242 static inline const struct ni_65xx_board *board(struct comedi_device *dev)
 243 {
 244         return dev->board_ptr;
 245 }
 246
 247 static inline unsigned ni_65xx_port_by_channel(unsigned channel)
 248 {
 249         return channel / ni_65xx_channels_per_port;
 250 }
 251
 252 static inline unsigned ni_65xx_total_num_ports(const struct ni_65xx_board
 253                                                *board)
 254 {
 255         return board->num_dio_ports + board->num_di_ports + board->num_do_ports;
 256 }
 257
 258 static DEFINE_PCI_DEVICE_TABLE(ni_65xx_pci_table) = {
 259         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1710)},
 260         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7085)},
 261         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7086)},
 262         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7087)},
 263         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7088)},
 264         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70a9)},
 265         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70c3)},
 266         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70c8)},
 267         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70c9)},
 268         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70cc)},
 269         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70CD)},
 270         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70d1)},
 271         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70d2)},
 272         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70d3)},
 273         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7124)},
 274         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7125)},
 275         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7126)},
 276         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7127)},
 277         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7128)},
 278         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x718b)},
 279         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x718c)},
 280         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x71c5)},
 281         {0}
 282 };
 283
 284 MODULE_DEVICE_TABLE(pci, ni_65xx_pci_table);
 285
 286 struct ni_65xx_private {
 287         struct mite_struct *mite;
 288         unsigned int filter_interval;
 289         unsigned short filter_enable[NI_65XX_MAX_NUM_PORTS];
 290         unsigned short output_bits[NI_65XX_MAX_NUM_PORTS];
 291         unsigned short dio_direction[NI_65XX_MAX_NUM_PORTS];
 292 };
 293
 294 struct ni_65xx_subdevice_private {
 295         unsigned base_port;
 296 };
 297
 298 static inline struct ni_65xx_subdevice_private *sprivate(struct comedi_subdevice
 299                                                          *subdev)
 300 {
 301         return subdev->private;
 302 }
 303
 304 static struct ni_65xx_subdevice_private *ni_65xx_alloc_subdevice_private(void)
 305 {
 306         struct ni_65xx_subdevice_private *subdev_private =
 307             kzalloc(sizeof(struct ni_65xx_subdevice_private), GFP_KERNEL);
 308         if (subdev_private == NULL)
 309                 return NULL;
 310         return subdev_private;
 311 }
 312
 313 static int ni_65xx_config_filter(struct comedi_device *dev,
 314                                  struct comedi_subdevice *s,
 315                                  struct comedi_insn *insn, unsigned int *data)
 316 {
 317         struct ni_65xx_private *devpriv = dev->private;
 318         const unsigned chan = CR_CHAN(insn->chanspec);
 319         const unsigned port =
 320             sprivate(s)->base_port + ni_65xx_port_by_channel(chan);
 321
 322         if (data[0] != INSN_CONFIG_FILTER)
 323                 return -EINVAL;
 324         if (data[1]) {
 325                 static const unsigned filter_resolution_ns = 200;
 326                 static const unsigned max_filter_interval = 0xfffff;
 327                 unsigned interval =
 328                     (data[1] +
 329                      (filter_resolution_ns / 2)) / filter_resolution_ns;
 330                 if (interval > max_filter_interval)
 331                         interval = max_filter_interval;
 332                 data[1] = interval * filter_resolution_ns;
 333
 334                 if (interval != devpriv->filter_interval) {
 335                         writeb(interval,
 336                                devpriv->mite->daq_io_addr +
 337                                Filter_Interval);
 338                         devpriv->filter_interval = interval;
 339                 }
 340
 341                 devpriv->filter_enable[port] |=
 342                     1 << (chan % ni_65xx_channels_per_port);
 343         } else {
 344                 devpriv->filter_enable[port] &=
 345                     ~(1 << (chan % ni_65xx_channels_per_port));
 346         }
 347
 348         writeb(devpriv->filter_enable[port],
 349                devpriv->mite->daq_io_addr + Filter_Enable(port));
 350
 351         return 2;
 352 }
 353
 354 static int ni_65xx_dio_insn_config(struct comedi_device *dev,
 355                                    struct comedi_subdevice *s,
 356                                    struct comedi_insn *insn, unsigned int *data)
 357 {
 358         struct ni_65xx_private *devpriv = dev->private;
 359         unsigned port;
 360
 361         if (insn->n < 1)
 362                 return -EINVAL;
 363         port = sprivate(s)->base_port +
 364             ni_65xx_port_by_channel(CR_CHAN(insn->chanspec));
 365         switch (data[0]) {
 366         case INSN_CONFIG_FILTER:
 367                 return ni_65xx_config_filter(dev, s, insn, data);
 368                 break;
 369         case INSN_CONFIG_DIO_OUTPUT:
 370                 if (s->type != COMEDI_SUBD_DIO)
 371                         return -EINVAL;
 372                 devpriv->dio_direction[port] = COMEDI_OUTPUT;
 373                 writeb(0, devpriv->mite->daq_io_addr + Port_Select(port));
 374                 return 1;
 375                 break;
 376         case INSN_CONFIG_DIO_INPUT:
 377                 if (s->type != COMEDI_SUBD_DIO)
 378                         return -EINVAL;
 379                 devpriv->dio_direction[port] = COMEDI_INPUT;
 380                 writeb(1, devpriv->mite->daq_io_addr + Port_Select(port));
 381                 return 1;
 382                 break;
 383         case INSN_CONFIG_DIO_QUERY:
 384                 if (s->type != COMEDI_SUBD_DIO)
 385                         return -EINVAL;
 386                 data[1] = devpriv->dio_direction[port];
 387                 return insn->n;
 388                 break;
 389         default:
 390                 break;
 391         }
 392         return -EINVAL;
 393 }
 394
 395 static int ni_65xx_dio_insn_bits(struct comedi_device *dev,
 396                                  struct comedi_subdevice *s,
 397                                  struct comedi_insn *insn, unsigned int *data)
 398 {
 399         struct ni_65xx_private *devpriv = dev->private;
 400         unsigned base_bitfield_channel;
 401         const unsigned max_ports_per_bitfield = 5;
 402         unsigned read_bits = 0;
 403         unsigned j;
 404
 405         base_bitfield_channel = CR_CHAN(insn->chanspec);
 406         for (j = 0; j < max_ports_per_bitfield; ++j) {
 407                 const unsigned port_offset =
 408                         ni_65xx_port_by_channel(base_bitfield_channel) + j;
 409                 const unsigned port =
 410                         sprivate(s)->base_port + port_offset;
 411                 unsigned base_port_channel;
 412                 unsigned port_mask, port_data, port_read_bits;
 413                 int bitshift;
 414                 if (port >= ni_65xx_total_num_ports(board(dev)))
 415                         break;
 416                 base_port_channel = port_offset * ni_65xx_channels_per_port;
 417                 port_mask = data[0];
 418                 port_data = data[1];
 419                 bitshift = base_port_channel - base_bitfield_channel;
 420                 if (bitshift >= 32 || bitshift <= -32)
 421                         break;
 422                 if (bitshift > 0) {
 423                         port_mask >>= bitshift;
 424                         port_data >>= bitshift;
 425                 } else {
 426                         port_mask <<= -bitshift;
 427                         port_data <<= -bitshift;
 428                 }
 429                 port_mask &= 0xff;
 430                 port_data &= 0xff;
 431                 if (port_mask) {
 432                         unsigned bits;
 433                         devpriv->output_bits[port] &= ~port_mask;
 434                         devpriv->output_bits[port] |=
 435                             port_data & port_mask;
 436                         bits = devpriv->output_bits[port];
 437                         if (board(dev)->invert_outputs)
 438                                 bits = ~bits;
 439                         writeb(bits,
 440                                devpriv->mite->daq_io_addr +
 441                                Port_Data(port));
 442                 }
 443                 port_read_bits =
 444                     readb(devpriv->mite->daq_io_addr + Port_Data(port));
 445                 if (s->type == COMEDI_SUBD_DO && board(dev)->invert_outputs) {
 446                         /* Outputs inverted, so invert value read back from
 447                          * DO subdevice.  (Does not apply to boards with DIO
 448                          * subdevice.) */
 449                         port_read_bits ^= 0xFF;
 450                 }
 451                 if (bitshift > 0)
 452                         port_read_bits <<= bitshift;
 453                 else
 454                         port_read_bits >>= -bitshift;
 455
 456                 read_bits |= port_read_bits;
 457         }
 458         data[1] = read_bits;
 459         return insn->n;
 460 }
 461
 462 static irqreturn_t ni_65xx_interrupt(int irq, void *d)
 463 {
 464         struct comedi_device *dev = d;
 465         struct ni_65xx_private *devpriv = dev->private;
 466         struct comedi_subdevice *s = &dev->subdevices[2];
 467         unsigned int status;
 468
 469         status = readb(devpriv->mite->daq_io_addr + Change_Status);
 470         if ((status & MasterInterruptStatus) == 0)
 471                 return IRQ_NONE;
 472         if ((status & EdgeStatus) == 0)
 473                 return IRQ_NONE;
 474
 475         writeb(ClrEdge | ClrOverflow,
 476                devpriv->mite->daq_io_addr + Clear_Register);
 477
 478         comedi_buf_put(s->async, 0);
 479         s->async->events |= COMEDI_CB_EOS;
 480         comedi_event(dev, s);
 481         return IRQ_HANDLED;
 482 }
 483
 484 static int ni_65xx_intr_cmdtest(struct comedi_device *dev,
 485                                 struct comedi_subdevice *s,
 486                                 struct comedi_cmd *cmd)
 487 {
 488         int err = 0;
 489
 490         /* Step 1 : check if triggers are trivially valid */
 491
 492         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
 493         err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
 494         err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
 495         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 496         err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
 497
 498         if (err)
 499                 return 1;
 500
 501         /* Step 2a : make sure trigger sources are unique */
 502         /* Step 2b : and mutually compatible */
 503
 504         if (err)
 505                 return 2;
 506
 507         /* step 3: make sure arguments are trivially compatible */
 508
 509         if (cmd->start_arg != 0) {
 510                 cmd->start_arg = 0;
 511                 err++;
 512         }
 513         if (cmd->scan_begin_arg != 0) {
 514                 cmd->scan_begin_arg = 0;
 515                 err++;
 516         }
 517         if (cmd->convert_arg != 0) {
 518                 cmd->convert_arg = 0;
 519                 err++;
 520         }
 521
 522         if (cmd->scan_end_arg != 1) {
 523                 cmd->scan_end_arg = 1;
 524                 err++;
 525         }
 526         if (cmd->stop_arg != 0) {
 527                 cmd->stop_arg = 0;
 528                 err++;
 529         }
 530
 531         if (err)
 532                 return 3;
 533
 534         /* step 4: fix up any arguments */
 535
 536         if (err)
 537                 return 4;
 538
 539         return 0;
 540 }
 541
 542 static int ni_65xx_intr_cmd(struct comedi_device *dev,
 543                             struct comedi_subdevice *s)
 544 {
 545         struct ni_65xx_private *devpriv = dev->private;
 546         /* struct comedi_cmd *cmd = &s->async->cmd; */
 547
 548         writeb(ClrEdge | ClrOverflow,
 549                devpriv->mite->daq_io_addr + Clear_Register);
 550         writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
 551                MasterInterruptEnable | EdgeIntEnable,
 552                devpriv->mite->daq_io_addr + Master_Interrupt_Control);
 553
 554         return 0;
 555 }
 556
 557 static int ni_65xx_intr_cancel(struct comedi_device *dev,
 558                                struct comedi_subdevice *s)
 559 {
 560         struct ni_65xx_private *devpriv = dev->private;
 561
 562         writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
 563
 564         return 0;
 565 }
 566
 567 static int ni_65xx_intr_insn_bits(struct comedi_device *dev,
 568                                   struct comedi_subdevice *s,
 569                                   struct comedi_insn *insn, unsigned int *data)
 570 {
 571         data[1] = 0;
 572         return insn->n;
 573 }
 574
 575 static int ni_65xx_intr_insn_config(struct comedi_device *dev,
 576                                     struct comedi_subdevice *s,
 577                                     struct comedi_insn *insn,
 578                                     unsigned int *data)
 579 {
 580         struct ni_65xx_private *devpriv = dev->private;
 581
 582         if (insn->n < 1)
 583                 return -EINVAL;
 584         if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
 585                 return -EINVAL;
 586
 587         writeb(data[1],
 588                devpriv->mite->daq_io_addr +
 589                Rising_Edge_Detection_Enable(0));
 590         writeb(data[1] >> 8,
 591                devpriv->mite->daq_io_addr +
 592                Rising_Edge_Detection_Enable(0x10));
 593         writeb(data[1] >> 16,
 594                devpriv->mite->daq_io_addr +
 595                Rising_Edge_Detection_Enable(0x20));
 596         writeb(data[1] >> 24,
 597                devpriv->mite->daq_io_addr +
 598                Rising_Edge_Detection_Enable(0x30));
 599
 600         writeb(data[2],
 601                devpriv->mite->daq_io_addr +
 602                Falling_Edge_Detection_Enable(0));
 603         writeb(data[2] >> 8,
 604                devpriv->mite->daq_io_addr +
 605                Falling_Edge_Detection_Enable(0x10));
 606         writeb(data[2] >> 16,
 607                devpriv->mite->daq_io_addr +
 608                Falling_Edge_Detection_Enable(0x20));
 609         writeb(data[2] >> 24,
 610                devpriv->mite->daq_io_addr +
 611                Falling_Edge_Detection_Enable(0x30));
 612
 613         return 2;
 614 }
 615
 616 static const struct ni_65xx_board *
 617 ni_65xx_find_boardinfo(struct pci_dev *pcidev)
 618 {
 619         unsigned int dev_id = pcidev->device;
 620         unsigned int n;
 621
 622         for (n = 0; n < ARRAY_SIZE(ni_65xx_boards); n++) {
 623                 const struct ni_65xx_board *board = &ni_65xx_boards[n];
 624                 if (board->dev_id == dev_id)
 625                         return board;
 626         }
 627         return NULL;
 628 }
 629
 630 static int __devinit ni_65xx_attach_pci(struct comedi_device *dev,
 631                                         struct pci_dev *pcidev)
 632 {
 633         struct ni_65xx_private *devpriv;
 634         struct comedi_subdevice *s;
 635         unsigned i;
 636         int ret;
 637
 638         ret = alloc_private(dev, sizeof(*devpriv));
 639         if (ret)
 640                 return ret;
 641         devpriv = dev->private;
 642
 643         dev->board_ptr = ni_65xx_find_boardinfo(pcidev);
 644         if (!dev->board_ptr)
 645                 return -ENODEV;
 646
 647         devpriv->mite = mite_alloc(pcidev);
 648         if (!devpriv->mite)
 649                 return -ENOMEM;
 650
 651         ret = mite_setup(devpriv->mite);
 652         if (ret < 0) {
 653                 dev_warn(dev->class_dev, "error setting up mite\n");
 654                 return ret;
 655         }
 656
 657         dev->board_name = board(dev)->name;
 658         dev->irq = mite_irq(devpriv->mite);
 659         dev_info(dev->class_dev, "board: %s, ID=0x%02x", dev->board_name,
 660                readb(devpriv->mite->daq_io_addr + ID_Register));
 661
 662         ret = comedi_alloc_subdevices(dev, 4);
 663         if (ret)
 664                 return ret;
 665
 666         s = &dev->subdevices[0];
 667         if (board(dev)->num_di_ports) {
 668                 s->type = COMEDI_SUBD_DI;
 669                 s->subdev_flags = SDF_READABLE;
 670                 s->n_chan =
 671                     board(dev)->num_di_ports * ni_65xx_channels_per_port;
 672                 s->range_table = &range_digital;
 673                 s->maxdata = 1;
 674                 s->insn_config = ni_65xx_dio_insn_config;
 675                 s->insn_bits = ni_65xx_dio_insn_bits;
 676                 s->private = ni_65xx_alloc_subdevice_private();
 677                 if (s->private == NULL)
 678                         return -ENOMEM;
 679                 sprivate(s)->base_port = 0;
 680         } else {
 681                 s->type = COMEDI_SUBD_UNUSED;
 682         }
 683
 684         s = &dev->subdevices[1];
 685         if (board(dev)->num_do_ports) {
 686                 s->type = COMEDI_SUBD_DO;
 687                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
 688                 s->n_chan =
 689                     board(dev)->num_do_ports * ni_65xx_channels_per_port;
 690                 s->range_table = &range_digital;
 691                 s->maxdata = 1;
 692                 s->insn_bits = ni_65xx_dio_insn_bits;
 693                 s->private = ni_65xx_alloc_subdevice_private();
 694                 if (s->private == NULL)
 695                         return -ENOMEM;
 696                 sprivate(s)->base_port = board(dev)->num_di_ports;
 697         } else {
 698                 s->type = COMEDI_SUBD_UNUSED;
 699         }
 700
 701         s = &dev->subdevices[2];
 702         if (board(dev)->num_dio_ports) {
 703                 s->type = COMEDI_SUBD_DIO;
 704                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
 705                 s->n_chan =
 706                     board(dev)->num_dio_ports * ni_65xx_channels_per_port;
 707                 s->range_table = &range_digital;
 708                 s->maxdata = 1;
 709                 s->insn_config = ni_65xx_dio_insn_config;
 710                 s->insn_bits = ni_65xx_dio_insn_bits;
 711                 s->private = ni_65xx_alloc_subdevice_private();
 712                 if (s->private == NULL)
 713                         return -ENOMEM;
 714                 sprivate(s)->base_port = 0;
 715                 for (i = 0; i < board(dev)->num_dio_ports; ++i) {
 716                         /*  configure all ports for input */
 717                         writeb(0x1,
 718                                devpriv->mite->daq_io_addr +
 719                                Port_Select(i));
 720                 }
 721         } else {
 722                 s->type = COMEDI_SUBD_UNUSED;
 723         }
 724
 725         s = &dev->subdevices[3];
 726         dev->read_subdev = s;
 727         s->type = COMEDI_SUBD_DI;
 728         s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
 729         s->n_chan = 1;
 730         s->range_table = &range_unknown;
 731         s->maxdata = 1;
 732         s->do_cmdtest = ni_65xx_intr_cmdtest;
 733         s->do_cmd = ni_65xx_intr_cmd;
 734         s->cancel = ni_65xx_intr_cancel;
 735         s->insn_bits = ni_65xx_intr_insn_bits;
 736         s->insn_config = ni_65xx_intr_insn_config;
 737
 738         for (i = 0; i < ni_65xx_total_num_ports(board(dev)); ++i) {
 739                 writeb(0x00,
 740                        devpriv->mite->daq_io_addr + Filter_Enable(i));
 741                 if (board(dev)->invert_outputs)
 742                         writeb(0x01,
 743                                devpriv->mite->daq_io_addr + Port_Data(i));
 744                 else
 745                         writeb(0x00,
 746                                devpriv->mite->daq_io_addr + Port_Data(i));
 747         }
 748         writeb(ClrEdge | ClrOverflow,
 749                devpriv->mite->daq_io_addr + Clear_Register);
 750         writeb(0x00,
 751                devpriv->mite->daq_io_addr + Master_Interrupt_Control);
 752
 753         /* Set filter interval to 0  (32bit reg) */
 754         writeb(0x00000000, devpriv->mite->daq_io_addr + Filter_Interval);
 755
 756         ret = request_irq(dev->irq, ni_65xx_interrupt, IRQF_SHARED,
 757                           "ni_65xx", dev);
 758         if (ret < 0) {
 759                 dev->irq = 0;
 760                 dev_warn(dev->class_dev, "irq not available\n");
 761         }
 762
 763         return 0;
 764 }
 765
 766 static void ni_65xx_detach(struct comedi_device *dev)
 767 {
 768         struct ni_65xx_private *devpriv = dev->private;
 769
 770         if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr) {
 771                 writeb(0x00,
 772                        devpriv->mite->daq_io_addr +
 773                        Master_Interrupt_Control);
 774         }
 775         if (dev->irq)
 776                 free_irq(dev->irq, dev);
 777         if (devpriv) {
 778                 struct comedi_subdevice *s;
 779                 unsigned i;
 780
 781                 for (i = 0; i < dev->n_subdevices; ++i) {
 782                         s = &dev->subdevices[i];
 783                         kfree(s->private);
 784                         s->private = NULL;
 785                 }
 786                 if (devpriv->mite) {
 787                         mite_unsetup(devpriv->mite);
 788                         mite_free(devpriv->mite);
 789                 }
 790         }
 791 }
 792
 793 static struct comedi_driver ni_65xx_driver = {
 794         .driver_name = "ni_65xx",
 795         .module = THIS_MODULE,
 796         .attach_pci = ni_65xx_attach_pci,
 797         .detach = ni_65xx_detach,
 798 };
 799
 800 static int __devinit ni_65xx_pci_probe(struct pci_dev *dev,
 801                                        const struct pci_device_id *ent)
 802 {
 803         return comedi_pci_auto_config(dev, &ni_65xx_driver);
 804 }
 805
 806 static void __devexit ni_65xx_pci_remove(struct pci_dev *dev)
 807 {
 808         comedi_pci_auto_unconfig(dev);
 809 }
 810
 811 static struct pci_driver ni_65xx_pci_driver = {
 812         .name = "ni_65xx",
 813         .id_table = ni_65xx_pci_table,
 814         .probe = ni_65xx_pci_probe,
 815         .remove = __devexit_p(ni_65xx_pci_remove)
 816 };
 817 module_comedi_pci_driver(ni_65xx_driver, ni_65xx_pci_driver);
 818
 819 MODULE_AUTHOR("Comedi http://www.comedi.org");
 820 MODULE_DESCRIPTION("Comedi low-level driver");
 821 MODULE_LICENSE("GPL");