]> Pileus Git - ~andy/linux/blob - drivers/staging/comedi/drivers/adl_pci9118.c
Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
[~andy/linux] / drivers / staging / comedi / drivers / adl_pci9118.c
1 /*
2  *  comedi/drivers/adl_pci9118.c
3  *
4  *  hardware driver for ADLink cards:
5  *   card:   PCI-9118DG, PCI-9118HG, PCI-9118HR
6  *   driver: pci9118dg,  pci9118hg,  pci9118hr
7  *
8  * Author: Michal Dobes <dobes@tesnet.cz>
9  *
10 */
11 /*
12 Driver: adl_pci9118
13 Description: Adlink PCI-9118DG, PCI-9118HG, PCI-9118HR
14 Author: Michal Dobes <dobes@tesnet.cz>
15 Devices: [ADLink] PCI-9118DG (pci9118dg), PCI-9118HG (pci9118hg),
16   PCI-9118HR (pci9118hr)
17 Status: works
18
19 This driver supports AI, AO, DI and DO subdevices.
20 AI subdevice supports cmd and insn interface,
21 other subdevices support only insn interface.
22 For AI:
23 - If cmd->scan_begin_src=TRIG_EXT then trigger input is TGIN (pin 46).
24 - If cmd->convert_src=TRIG_EXT then trigger input is EXTTRG (pin 44).
25 - If cmd->start_src/stop_src=TRIG_EXT then trigger input is TGIN (pin 46).
26 - It is not necessary to have cmd.scan_end_arg=cmd.chanlist_len but
27   cmd.scan_end_arg modulo cmd.chanlist_len must by 0.
28 - If return value of cmdtest is 5 then you've bad channel list
29   (it isn't possible mixture S.E. and DIFF inputs or bipolar and unipolar
30   ranges).
31
32 There are some hardware limitations:
33 a) You cann't use mixture of unipolar/bipoar ranges or differencial/single
34    ended inputs.
35 b) DMA transfers must have the length aligned to two samples (32 bit),
36    so there is some problems if cmd->chanlist_len is odd. This driver tries
37    bypass this with adding one sample to the end of the every scan and discard
38    it on output but this cann't be used if cmd->scan_begin_src=TRIG_FOLLOW
39    and is used flag TRIG_WAKE_EOS, then driver switch to interrupt driven mode
40    with interrupt after every sample.
41 c) If isn't used DMA then you can use only mode where
42    cmd->scan_begin_src=TRIG_FOLLOW.
43
44 Configuration options:
45   [0] - PCI bus of device (optional)
46   [1] - PCI slot of device (optional)
47         If bus/slot is not specified, then first available PCI
48         card will be used.
49   [2] - 0= standard 8 DIFF/16 SE channels configuration
50         n = external multiplexer connected, 1 <= n <= 256
51   [3] - 0=autoselect DMA or EOC interrupts operation
52         1 = disable DMA mode
53         3 = disable DMA and INT, only insn interface will work
54   [4] - sample&hold signal - card can generate signal for external S&H board
55         0 = use SSHO(pin 45) signal is generated in onboard hardware S&H logic
56         0 != use ADCHN7(pin 23) signal is generated from driver, number say how
57                 long delay is requested in ns and sign polarity of the hold
58                 (in this case external multiplexor can serve only 128 channels)
59   [5] - 0=stop measure on all hardware errors
60         2 | = ignore ADOR - A/D Overrun status
61         8|=ignore Bover - A/D Burst Mode Overrun status
62         256|=ignore nFull - A/D FIFO Full status
63
64 */
65
66 /*
67  * FIXME
68  *
69  * All the supported boards have the same PCI vendor and device IDs, so
70  * auto-attachment of PCI devices will always find the first board type.
71  *
72  * Perhaps the boards have different subdevice IDs that we could use to
73  * distinguish them?
74  *
75  * Need some device attributes so the board type can be corrected after
76  * attachment if necessary, and possibly to set other options supported by
77  * manual attachment.
78  */
79
80 #include <linux/module.h>
81 #include <linux/pci.h>
82 #include <linux/delay.h>
83 #include <linux/gfp.h>
84 #include <linux/interrupt.h>
85 #include <linux/io.h>
86
87 #include "../comedidev.h"
88
89 #include "amcc_s5933.h"
90 #include "8253.h"
91 #include "comedi_fc.h"
92
93 /* paranoid checks are broken */
94 #undef PCI9118_PARANOIDCHECK    /*
95                                  * if defined, then is used code which control
96                                  * correct channel number on every 12 bit sample
97                                  */
98
99 #define IORANGE_9118    64      /* I hope */
100 #define PCI9118_CHANLEN 255     /*
101                                  * len of chanlist, some source say 256,
102                                  * but reality looks like 255 :-(
103                                  */
104
105 #define PCI9118_CNT0    0x00    /* R/W: 8254 counter 0 */
106 #define PCI9118_CNT1    0x04    /* R/W: 8254 counter 0 */
107 #define PCI9118_CNT2    0x08    /* R/W: 8254 counter 0 */
108 #define PCI9118_CNTCTRL 0x0c    /* W:   8254 counter control */
109 #define PCI9118_AD_DATA 0x10    /* R:   A/D data */
110 #define PCI9118_DA1     0x10    /* W:   D/A registers */
111 #define PCI9118_DA2     0x14
112 #define PCI9118_ADSTAT  0x18    /* R:   A/D status register */
113 #define PCI9118_ADCNTRL 0x18    /* W:   A/D control register */
114 #define PCI9118_DI      0x1c    /* R:   digi input register */
115 #define PCI9118_DO      0x1c    /* W:   digi output register */
116 #define PCI9118_SOFTTRG 0x20    /* W:   soft trigger for A/D */
117 #define PCI9118_GAIN    0x24    /* W:   A/D gain/channel register */
118 #define PCI9118_BURST   0x28    /* W:   A/D burst number register */
119 #define PCI9118_SCANMOD 0x2c    /* W:   A/D auto scan mode */
120 #define PCI9118_ADFUNC  0x30    /* W:   A/D function register */
121 #define PCI9118_DELFIFO 0x34    /* W:   A/D data FIFO reset */
122 #define PCI9118_INTSRC  0x38    /* R:   interrupt reason register */
123 #define PCI9118_INTCTRL 0x38    /* W:   interrupt control register */
124
125 /* bits from A/D control register (PCI9118_ADCNTRL) */
126 #define AdControl_UniP  0x80    /* 1=bipolar, 0=unipolar */
127 #define AdControl_Diff  0x40    /* 1=differential, 0= single end inputs */
128 #define AdControl_SoftG 0x20    /* 1=8254 counter works, 0=counter stops */
129 #define AdControl_ExtG  0x10    /*
130                                  * 1=8254 countrol controlled by TGIN(pin 46),
131                                  * 0=controlled by SoftG
132                                  */
133 #define AdControl_ExtM  0x08    /*
134                                  * 1=external hardware trigger (pin 44),
135                                  * 0=internal trigger
136                                  */
137 #define AdControl_TmrTr 0x04    /*
138                                  * 1=8254 is iternal trigger source,
139                                  * 0=software trigger is source
140                                  * (register PCI9118_SOFTTRG)
141                                  */
142 #define AdControl_Int   0x02    /* 1=enable INT, 0=disable */
143 #define AdControl_Dma   0x01    /* 1=enable DMA, 0=disable */
144
145 /* bits from A/D function register (PCI9118_ADFUNC) */
146 #define AdFunction_PDTrg        0x80    /*
147                                          * 1=positive,
148                                          * 0=negative digital trigger
149                                          * (only positive is correct)
150                                          */
151 #define AdFunction_PETrg        0x40    /*
152                                          * 1=positive,
153                                          * 0=negative external trigger
154                                          * (only positive is correct)
155                                          */
156 #define AdFunction_BSSH         0x20    /* 1=with sample&hold, 0=without */
157 #define AdFunction_BM           0x10    /* 1=burst mode, 0=normal mode */
158 #define AdFunction_BS           0x08    /*
159                                          * 1=burst mode start,
160                                          * 0=burst mode stop
161                                          */
162 #define AdFunction_PM           0x04    /*
163                                          * 1=post trigger mode,
164                                          * 0=not post trigger
165                                          */
166 #define AdFunction_AM           0x02    /*
167                                          * 1=about trigger mode,
168                                          * 0=not about trigger
169                                          */
170 #define AdFunction_Start        0x01    /* 1=trigger start, 0=trigger stop */
171
172 /* bits from A/D status register (PCI9118_ADSTAT) */
173 #define AdStatus_nFull  0x100   /* 0=FIFO full (fatal), 1=not full */
174 #define AdStatus_nHfull 0x080   /* 0=FIFO half full, 1=FIFO not half full */
175 #define AdStatus_nEpty  0x040   /* 0=FIFO empty, 1=FIFO not empty */
176 #define AdStatus_Acmp   0x020   /*  */
177 #define AdStatus_DTH    0x010   /* 1=external digital trigger */
178 #define AdStatus_Bover  0x008   /* 1=burst mode overrun (fatal) */
179 #define AdStatus_ADOS   0x004   /* 1=A/D over speed (warning) */
180 #define AdStatus_ADOR   0x002   /* 1=A/D overrun (fatal) */
181 #define AdStatus_ADrdy  0x001   /* 1=A/D already ready, 0=not ready */
182
183 /* bits for interrupt reason and control (PCI9118_INTSRC, PCI9118_INTCTRL) */
184 /* 1=interrupt occur, enable source,  0=interrupt not occur, disable source */
185 #define Int_Timer       0x08    /* timer interrupt */
186 #define Int_About       0x04    /* about trigger complete */
187 #define Int_Hfull       0x02    /* A/D FIFO hlaf full */
188 #define Int_DTrg        0x01    /* external digital trigger */
189
190 #define START_AI_EXT    0x01    /* start measure on external trigger */
191 #define STOP_AI_EXT     0x02    /* stop measure on external trigger */
192 #define START_AI_INT    0x04    /* start measure on internal trigger */
193 #define STOP_AI_INT     0x08    /* stop measure on internal trigger */
194
195 #define EXTTRG_AI       0       /* ext trg is used by AI */
196
197 static const struct comedi_lrange range_pci9118dg_hr = {
198         8, {
199                 BIP_RANGE(5),
200                 BIP_RANGE(2.5),
201                 BIP_RANGE(1.25),
202                 BIP_RANGE(0.625),
203                 UNI_RANGE(10),
204                 UNI_RANGE(5),
205                 UNI_RANGE(2.5),
206                 UNI_RANGE(1.25)
207         }
208 };
209
210 static const struct comedi_lrange range_pci9118hg = {
211         8, {
212                 BIP_RANGE(5),
213                 BIP_RANGE(0.5),
214                 BIP_RANGE(0.05),
215                 BIP_RANGE(0.005),
216                 UNI_RANGE(10),
217                 UNI_RANGE(1),
218                 UNI_RANGE(0.1),
219                 UNI_RANGE(0.01)
220         }
221 };
222
223 #define PCI9118_BIPOLAR_RANGES  4       /*
224                                          * used for test on mixture
225                                          * of BIP/UNI ranges
226                                          */
227
228 struct boardtype {
229         const char *name;               /* board name */
230         int device_id;                  /* PCI device ID of card */
231         int iorange_amcc;               /* iorange for own S5933 region */
232         int iorange_9118;               /* pass thru card region size */
233         int n_aichan;                   /* num of A/D chans */
234         int n_aichand;                  /* num of A/D chans in diff mode */
235         int mux_aichan;                 /*
236                                          * num of A/D chans with
237                                          * external multiplexor
238                                          */
239         int n_aichanlist;               /* len of chanlist */
240         int n_aochan;                   /* num of D/A chans */
241         int ai_maxdata;                 /* resolution of A/D */
242         int ao_maxdata;                 /* resolution of D/A */
243         const struct comedi_lrange *rangelist_ai;       /* rangelist for A/D */
244         const struct comedi_lrange *rangelist_ao;       /* rangelist for D/A */
245         unsigned int ai_ns_min;         /* max sample speed of card v ns */
246         unsigned int ai_pacer_min;      /*
247                                          * minimal pacer value
248                                          * (c1*c2 or c1 in burst)
249                                          */
250         int half_fifo_size;             /* size of FIFO/2 */
251
252 };
253
254 static const struct boardtype boardtypes[] = {
255         {
256                 .name           = "pci9118dg",
257                 .device_id      = 0x80d9,
258                 .iorange_amcc   = AMCC_OP_REG_SIZE,
259                 .iorange_9118   = IORANGE_9118,
260                 .n_aichan       = 16,
261                 .n_aichand      = 8,
262                 .mux_aichan     = 256,
263                 .n_aichanlist   = PCI9118_CHANLEN,
264                 .n_aochan       = 2,
265                 .ai_maxdata     = 0x0fff,
266                 .ao_maxdata     = 0x0fff,
267                 .rangelist_ai   = &range_pci9118dg_hr,
268                 .rangelist_ao   = &range_bipolar10,
269                 .ai_ns_min      = 3000,
270                 .ai_pacer_min   = 12,
271                 .half_fifo_size = 512,
272         }, {
273                 .name           = "pci9118hg",
274                 .device_id      = 0x80d9,
275                 .iorange_amcc   = AMCC_OP_REG_SIZE,
276                 .iorange_9118   = IORANGE_9118,
277                 .n_aichan       = 16,
278                 .n_aichand      = 8,
279                 .mux_aichan     = 256,
280                 .n_aichanlist   = PCI9118_CHANLEN,
281                 .n_aochan       = 2,
282                 .ai_maxdata     = 0x0fff,
283                 .ao_maxdata     = 0x0fff,
284                 .rangelist_ai   = &range_pci9118hg,
285                 .rangelist_ao   = &range_bipolar10,
286                 .ai_ns_min      = 3000,
287                 .ai_pacer_min   = 12,
288                 .half_fifo_size = 512,
289         }, {
290                 .name           = "pci9118hr",
291                 .device_id      = 0x80d9,
292                 .iorange_amcc   = AMCC_OP_REG_SIZE,
293                 .iorange_9118   = IORANGE_9118,
294                 .n_aichan       = 16,
295                 .n_aichand      = 8,
296                 .mux_aichan     = 256,
297                 .n_aichanlist   = PCI9118_CHANLEN,
298                 .n_aochan       = 2,
299                 .ai_maxdata     = 0xffff,
300                 .ao_maxdata     = 0x0fff,
301                 .rangelist_ai   = &range_pci9118dg_hr,
302                 .rangelist_ao   = &range_bipolar10,
303                 .ai_ns_min      = 10000,
304                 .ai_pacer_min   = 40,
305                 .half_fifo_size = 512,
306         },
307 };
308
309 struct pci9118_private {
310         unsigned long iobase_a; /* base+size for AMCC chip */
311         unsigned int master;    /* master capable */
312         unsigned int usemux;    /* we want to use external multiplexor! */
313 #ifdef PCI9118_PARANOIDCHECK
314         unsigned short chanlist[PCI9118_CHANLEN + 1];   /*
315                                                          * list of
316                                                          * scanned channel
317                                                          */
318         unsigned char chanlistlen;      /* number of scanlist */
319 #endif
320         unsigned char AdControlReg;     /* A/D control register */
321         unsigned char IntControlReg;    /* Interrupt control register */
322         unsigned char AdFunctionReg;    /* A/D function register */
323         char valid;                     /* driver is ok */
324         char ai_neverending;            /* we do unlimited AI */
325         unsigned int i8254_osc_base;    /* frequence of onboard oscilator */
326         unsigned int ai_do;             /* what do AI? 0=nothing, 1 to 4 mode */
327         unsigned int ai_act_scan;       /* how many scans we finished */
328         unsigned int ai_buf_ptr;        /* data buffer ptr in samples */
329         unsigned int ai_n_chan;         /* how many channels is measured */
330         unsigned int ai_n_scanlen;      /* len of actual scanlist */
331         unsigned int ai_n_realscanlen;  /*
332                                          * what we must transfer for one
333                                          * outgoing scan include front/back adds
334                                          */
335         unsigned int ai_act_dmapos;     /* position in actual real stream */
336         unsigned int ai_add_front;      /*
337                                          * how many channels we must add
338                                          * before scan to satisfy S&H?
339                                          */
340         unsigned int ai_add_back;       /*
341                                          * how many channels we must add
342                                          * before scan to satisfy DMA?
343                                          */
344         unsigned int *ai_chanlist;      /* actual chanlist */
345         unsigned int ai_timer1;
346         unsigned int ai_timer2;
347         unsigned int ai_flags;
348         char ai12_startstop;            /*
349                                          * measure can start/stop
350                                          * on external trigger
351                                          */
352         unsigned int ai_divisor1, ai_divisor2;  /*
353                                                  * divisors for start of measure
354                                                  * on external start
355                                                  */
356         unsigned int ai_data_len;
357         unsigned short ao_data[2];              /* data output buffer */
358         unsigned int ai_scans;                  /* number of scans to do */
359         char dma_doublebuf;                     /* we can use double buffering */
360         unsigned int dma_actbuf;                /* which buffer is used now */
361         unsigned short *dmabuf_virt[2];         /*
362                                                  * pointers to begin of
363                                                  * DMA buffer
364                                                  */
365         unsigned long dmabuf_hw[2];             /* hw address of DMA buff */
366         unsigned int dmabuf_size[2];            /*
367                                                  * size of dma buffer in bytes
368                                                  */
369         unsigned int dmabuf_use_size[2];        /*
370                                                  * which size we may now use
371                                                  * for transfer
372                                                  */
373         unsigned int dmabuf_used_size[2];       /* which size was truly used */
374         unsigned int dmabuf_panic_size[2];
375         unsigned int dmabuf_samples[2];         /* size in samples */
376         int dmabuf_pages[2];                    /* number of pages in buffer */
377         unsigned char cnt0_users;               /*
378                                                  * bit field of 8254 CNT0 users
379                                                  * (0-unused, 1-AO, 2-DI, 3-DO)
380                                                  */
381         unsigned char exttrg_users;             /*
382                                                  * bit field of external trigger
383                                                  * users(0-AI, 1-AO, 2-DI, 3-DO)
384                                                  */
385         unsigned int cnt0_divisor;              /* actual CNT0 divisor */
386         void (*int_ai_func) (struct comedi_device *, struct comedi_subdevice *,
387                 unsigned short,
388                 unsigned int,
389                 unsigned short);        /*
390                                          * ptr to actual interrupt
391                                          * AI function
392                                          */
393         unsigned char ai16bits;         /* =1 16 bit card */
394         unsigned char usedma;           /* =1 use DMA transfer and not INT */
395         unsigned char useeoshandle;     /*
396                                          * =1 change WAKE_EOS DMA transfer
397                                          * to fit on every second
398                                          */
399         unsigned char usessh;           /* =1 turn on S&H support */
400         int softsshdelay;               /*
401                                          * >0 use software S&H,
402                                          * numer is requested delay in ns
403                                          */
404         unsigned char softsshsample;    /*
405                                          * polarity of S&H signal
406                                          * in sample state
407                                          */
408         unsigned char softsshhold;      /*
409                                          * polarity of S&H signal
410                                          * in hold state
411                                          */
412         unsigned int ai_maskerr;        /* which warning was printed */
413         unsigned int ai_maskharderr;    /* on which error bits stops */
414         unsigned int ai_inttrig_start;  /* TRIG_INT for start */
415 };
416
417 static int check_channel_list(struct comedi_device *dev,
418                               struct comedi_subdevice *s, int n_chan,
419                               unsigned int *chanlist, int frontadd, int backadd)
420 {
421         const struct boardtype *this_board = comedi_board(dev);
422         struct pci9118_private *devpriv = dev->private;
423         unsigned int i, differencial = 0, bipolar = 0;
424
425         /* correct channel and range number check itself comedi/range.c */
426         if (n_chan < 1) {
427                 comedi_error(dev, "range/channel list is empty!");
428                 return 0;
429         }
430         if ((frontadd + n_chan + backadd) > s->len_chanlist) {
431                 comedi_error(dev,
432                             "range/channel list is too long for actual configuration!\n");
433                 return 0;
434         }
435
436         if (CR_AREF(chanlist[0]) == AREF_DIFF)
437                 differencial = 1;       /* all input must be diff */
438         if (CR_RANGE(chanlist[0]) < PCI9118_BIPOLAR_RANGES)
439                 bipolar = 1;    /* all input must be bipolar */
440         if (n_chan > 1)
441                 for (i = 1; i < n_chan; i++) {  /* check S.E/diff */
442                         if ((CR_AREF(chanlist[i]) == AREF_DIFF) !=
443                             (differencial)) {
444                                 comedi_error(dev,
445                                              "Differencial and single ended "
446                                                 "inputs can't be mixtured!");
447                                 return 0;
448                         }
449                         if ((CR_RANGE(chanlist[i]) < PCI9118_BIPOLAR_RANGES) !=
450                             (bipolar)) {
451                                 comedi_error(dev,
452                                              "Bipolar and unipolar ranges "
453                                                         "can't be mixtured!");
454                                 return 0;
455                         }
456                         if (!devpriv->usemux && differencial &&
457                             (CR_CHAN(chanlist[i]) >= this_board->n_aichand)) {
458                                 comedi_error(dev,
459                                              "If AREF_DIFF is used then is "
460                                         "available only first 8 channels!");
461                                 return 0;
462                         }
463                 }
464
465         return 1;
466 }
467
468 static int setup_channel_list(struct comedi_device *dev,
469                               struct comedi_subdevice *s, int n_chan,
470                               unsigned int *chanlist, int rot, int frontadd,
471                               int backadd, int usedma, char useeos)
472 {
473         struct pci9118_private *devpriv = dev->private;
474         unsigned int i, differencial = 0, bipolar = 0;
475         unsigned int scanquad, gain, ssh = 0x00;
476
477         if (usedma == 1) {
478                 rot = 8;
479                 usedma = 0;
480         }
481
482         if (CR_AREF(chanlist[0]) == AREF_DIFF)
483                 differencial = 1;       /* all input must be diff */
484         if (CR_RANGE(chanlist[0]) < PCI9118_BIPOLAR_RANGES)
485                 bipolar = 1;    /* all input must be bipolar */
486
487         /* All is ok, so we can setup channel/range list */
488
489         if (!bipolar) {
490                 devpriv->AdControlReg |= AdControl_UniP;
491                                                         /* set unibipolar */
492         } else {
493                 devpriv->AdControlReg &= ((~AdControl_UniP) & 0xff);
494                                                         /* enable bipolar */
495         }
496
497         if (differencial) {
498                 devpriv->AdControlReg |= AdControl_Diff;
499                                                         /* enable diff inputs */
500         } else {
501                 devpriv->AdControlReg &= ((~AdControl_Diff) & 0xff);
502                                                 /* set single ended inputs */
503         }
504
505         outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
506                                                                 /* setup mode */
507
508         outl(2, dev->iobase + PCI9118_SCANMOD);
509                                         /* gods know why this sequence! */
510         outl(0, dev->iobase + PCI9118_SCANMOD);
511         outl(1, dev->iobase + PCI9118_SCANMOD);
512
513 #ifdef PCI9118_PARANOIDCHECK
514         devpriv->chanlistlen = n_chan;
515         for (i = 0; i < (PCI9118_CHANLEN + 1); i++)
516                 devpriv->chanlist[i] = 0x55aa;
517 #endif
518
519         if (frontadd) {         /* insert channels for S&H */
520                 ssh = devpriv->softsshsample;
521                 for (i = 0; i < frontadd; i++) {
522                                                 /* store range list to card */
523                         scanquad = CR_CHAN(chanlist[0]);
524                                                 /* get channel number; */
525                         gain = CR_RANGE(chanlist[0]);
526                                                 /* get gain number */
527                         scanquad |= ((gain & 0x03) << 8);
528                         outl(scanquad | ssh, dev->iobase + PCI9118_GAIN);
529                         ssh = devpriv->softsshhold;
530                 }
531         }
532
533         for (i = 0; i < n_chan; i++) {  /* store range list to card */
534                 scanquad = CR_CHAN(chanlist[i]);        /* get channel number */
535 #ifdef PCI9118_PARANOIDCHECK
536                 devpriv->chanlist[i ^ usedma] = (scanquad & 0xf) << rot;
537 #endif
538                 gain = CR_RANGE(chanlist[i]);           /* get gain number */
539                 scanquad |= ((gain & 0x03) << 8);
540                 outl(scanquad | ssh, dev->iobase + PCI9118_GAIN);
541         }
542
543         if (backadd) {          /* insert channels for fit onto 32bit DMA */
544                 for (i = 0; i < backadd; i++) { /* store range list to card */
545                         scanquad = CR_CHAN(chanlist[0]);
546                                                         /* get channel number */
547                         gain = CR_RANGE(chanlist[0]);   /* get gain number */
548                         scanquad |= ((gain & 0x03) << 8);
549                         outl(scanquad | ssh, dev->iobase + PCI9118_GAIN);
550                 }
551         }
552 #ifdef PCI9118_PARANOIDCHECK
553         devpriv->chanlist[n_chan ^ usedma] = devpriv->chanlist[0 ^ usedma];
554                                                 /* for 32bit operations */
555         if (useeos) {
556                 for (i = 1; i < n_chan; i++) {  /* store range list to card */
557                         devpriv->chanlist[(n_chan + i) ^ usedma] =
558                             (CR_CHAN(chanlist[i]) & 0xf) << rot;
559                 }
560                 devpriv->chanlist[(2 * n_chan) ^ usedma] =
561                                                 devpriv->chanlist[0 ^ usedma];
562                                                 /* for 32bit operations */
563                 useeos = 2;
564         } else {
565                 useeos = 1;
566         }
567 #endif
568         outl(0, dev->iobase + PCI9118_SCANMOD); /* close scan queue */
569         /* udelay(100); important delay, or first sample will be crippled */
570
571         return 1;               /* we can serve this with scan logic */
572 }
573
574 static int pci9118_insn_read_ai(struct comedi_device *dev,
575                                 struct comedi_subdevice *s,
576                                 struct comedi_insn *insn, unsigned int *data)
577 {
578         struct pci9118_private *devpriv = dev->private;
579         int n, timeout;
580
581         devpriv->AdControlReg = AdControl_Int & 0xff;
582         devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg;
583         outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
584                                                 /*
585                                                  * positive triggers, no S&H,
586                                                  * no burst, burst stop,
587                                                  * no post trigger,
588                                                  * no about trigger,
589                                                  * trigger stop
590                                                  */
591
592         if (!setup_channel_list(dev, s, 1, &insn->chanspec, 0, 0, 0, 0, 0))
593                 return -EINVAL;
594
595         outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
596
597         for (n = 0; n < insn->n; n++) {
598                 outw(0, dev->iobase + PCI9118_SOFTTRG); /* start conversion */
599                 udelay(2);
600                 timeout = 100;
601                 while (timeout--) {
602                         if (inl(dev->iobase + PCI9118_ADSTAT) & AdStatus_ADrdy)
603                                 goto conv_finish;
604                         udelay(1);
605                 }
606
607                 comedi_error(dev, "A/D insn timeout");
608                 data[n] = 0;
609                 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
610                 return -ETIME;
611
612 conv_finish:
613                 if (devpriv->ai16bits) {
614                         data[n] =
615                             (inl(dev->iobase +
616                                  PCI9118_AD_DATA) & 0xffff) ^ 0x8000;
617                 } else {
618                         data[n] =
619                             (inw(dev->iobase + PCI9118_AD_DATA) >> 4) & 0xfff;
620                 }
621         }
622
623         outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
624         return n;
625
626 }
627
628 static int pci9118_insn_write_ao(struct comedi_device *dev,
629                                  struct comedi_subdevice *s,
630                                  struct comedi_insn *insn, unsigned int *data)
631 {
632         struct pci9118_private *devpriv = dev->private;
633         int n, chanreg, ch;
634
635         ch = CR_CHAN(insn->chanspec);
636         if (ch)
637                 chanreg = PCI9118_DA2;
638         else
639                 chanreg = PCI9118_DA1;
640
641
642         for (n = 0; n < insn->n; n++) {
643                 outl(data[n], dev->iobase + chanreg);
644                 devpriv->ao_data[ch] = data[n];
645         }
646
647         return n;
648 }
649
650 static int pci9118_insn_read_ao(struct comedi_device *dev,
651                                 struct comedi_subdevice *s,
652                                 struct comedi_insn *insn, unsigned int *data)
653 {
654         struct pci9118_private *devpriv = dev->private;
655         int n, chan;
656
657         chan = CR_CHAN(insn->chanspec);
658         for (n = 0; n < insn->n; n++)
659                 data[n] = devpriv->ao_data[chan];
660
661         return n;
662 }
663
664 static int pci9118_insn_bits_di(struct comedi_device *dev,
665                                 struct comedi_subdevice *s,
666                                 struct comedi_insn *insn, unsigned int *data)
667 {
668         data[1] = inl(dev->iobase + PCI9118_DI) & 0xf;
669
670         return insn->n;
671 }
672
673 static int pci9118_insn_bits_do(struct comedi_device *dev,
674                                 struct comedi_subdevice *s,
675                                 struct comedi_insn *insn,
676                                 unsigned int *data)
677 {
678         if (comedi_dio_update_state(s, data))
679                 outl(s->state & 0x0f, dev->iobase + PCI9118_DO);
680
681         data[1] = s->state;
682
683         return insn->n;
684 }
685
686 static void interrupt_pci9118_ai_mode4_switch(struct comedi_device *dev)
687 {
688         struct pci9118_private *devpriv = dev->private;
689
690         devpriv->AdFunctionReg =
691             AdFunction_PDTrg | AdFunction_PETrg | AdFunction_AM;
692         outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
693         outl(0x30, dev->iobase + PCI9118_CNTCTRL);
694         outl((devpriv->dmabuf_hw[1 - devpriv->dma_actbuf] >> 1) & 0xff,
695              dev->iobase + PCI9118_CNT0);
696         outl((devpriv->dmabuf_hw[1 - devpriv->dma_actbuf] >> 9) & 0xff,
697              dev->iobase + PCI9118_CNT0);
698         devpriv->AdFunctionReg |= AdFunction_Start;
699         outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
700 }
701
702 static unsigned int defragment_dma_buffer(struct comedi_device *dev,
703                                           struct comedi_subdevice *s,
704                                           unsigned short *dma_buffer,
705                                           unsigned int num_samples)
706 {
707         struct pci9118_private *devpriv = dev->private;
708         unsigned int i = 0, j = 0;
709         unsigned int start_pos = devpriv->ai_add_front,
710             stop_pos = devpriv->ai_add_front + devpriv->ai_n_chan;
711         unsigned int raw_scanlen = devpriv->ai_add_front + devpriv->ai_n_chan +
712             devpriv->ai_add_back;
713
714         for (i = 0; i < num_samples; i++) {
715                 if (devpriv->ai_act_dmapos >= start_pos &&
716                     devpriv->ai_act_dmapos < stop_pos) {
717                         dma_buffer[j++] = dma_buffer[i];
718                 }
719                 devpriv->ai_act_dmapos++;
720                 devpriv->ai_act_dmapos %= raw_scanlen;
721         }
722
723         return j;
724 }
725
726 static int move_block_from_dma(struct comedi_device *dev,
727                                         struct comedi_subdevice *s,
728                                         unsigned short *dma_buffer,
729                                         unsigned int num_samples)
730 {
731         struct pci9118_private *devpriv = dev->private;
732         unsigned int num_bytes;
733
734         num_samples = defragment_dma_buffer(dev, s, dma_buffer, num_samples);
735         devpriv->ai_act_scan +=
736             (s->async->cur_chan + num_samples) / devpriv->ai_n_scanlen;
737         s->async->cur_chan += num_samples;
738         s->async->cur_chan %= devpriv->ai_n_scanlen;
739         num_bytes =
740             cfc_write_array_to_buffer(s, dma_buffer,
741                                       num_samples * sizeof(short));
742         if (num_bytes < num_samples * sizeof(short))
743                 return -1;
744         return 0;
745 }
746
747 static int pci9118_exttrg_add(struct comedi_device *dev, unsigned char source)
748 {
749         struct pci9118_private *devpriv = dev->private;
750
751         if (source > 3)
752                 return -1;                              /* incorrect source */
753         devpriv->exttrg_users |= (1 << source);
754         devpriv->IntControlReg |= Int_DTrg;
755         outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
756         outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00,
757                                         devpriv->iobase_a + AMCC_OP_REG_INTCSR);
758                                                         /* allow INT in AMCC */
759         return 0;
760 }
761
762 static int pci9118_exttrg_del(struct comedi_device *dev, unsigned char source)
763 {
764         struct pci9118_private *devpriv = dev->private;
765
766         if (source > 3)
767                 return -1;                      /* incorrect source */
768         devpriv->exttrg_users &= ~(1 << source);
769         if (!devpriv->exttrg_users) {   /* shutdown ext trg intterrupts */
770                 devpriv->IntControlReg &= ~Int_DTrg;
771                 if (!devpriv->IntControlReg)    /* all IRQ disabled */
772                         outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) &
773                                         (~0x00001f00),
774                                         devpriv->iobase_a + AMCC_OP_REG_INTCSR);
775                                                 /* disable int in AMCC */
776                 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
777         }
778         return 0;
779 }
780
781 static void pci9118_calc_divisors(char mode, struct comedi_device *dev,
782                                   struct comedi_subdevice *s,
783                                   unsigned int *tim1, unsigned int *tim2,
784                                   unsigned int flags, int chans,
785                                   unsigned int *div1, unsigned int *div2,
786                                   char usessh, unsigned int chnsshfront)
787 {
788         const struct boardtype *this_board = comedi_board(dev);
789         struct pci9118_private *devpriv = dev->private;
790
791         switch (mode) {
792         case 1:
793         case 4:
794                 if (*tim2 < this_board->ai_ns_min)
795                         *tim2 = this_board->ai_ns_min;
796                 i8253_cascade_ns_to_timer(devpriv->i8254_osc_base,
797                                           div1, div2,
798                                           tim2, flags & TRIG_ROUND_NEAREST);
799                 break;
800         case 2:
801                 if (*tim2 < this_board->ai_ns_min)
802                         *tim2 = this_board->ai_ns_min;
803                 *div1 = *tim2 / devpriv->i8254_osc_base;
804                                                 /* convert timer (burst) */
805                 if (*div1 < this_board->ai_pacer_min)
806                         *div1 = this_board->ai_pacer_min;
807                 *div2 = *tim1 / devpriv->i8254_osc_base;        /* scan timer */
808                 *div2 = *div2 / *div1;          /* major timer is c1*c2 */
809                 if (*div2 < chans)
810                         *div2 = chans;
811
812                 *tim2 = *div1 * devpriv->i8254_osc_base;
813                                                         /* real convert timer */
814
815                 if (usessh && (chnsshfront == 0))       /* use BSSH signal */
816                         if (*div2 < (chans + 2))
817                                 *div2 = chans + 2;
818
819                 *tim1 = *div1 * *div2 * devpriv->i8254_osc_base;
820                 break;
821         }
822 }
823
824 static void start_pacer(struct comedi_device *dev, int mode,
825                         unsigned int divisor1, unsigned int divisor2)
826 {
827         outl(0x74, dev->iobase + PCI9118_CNTCTRL);
828         outl(0xb4, dev->iobase + PCI9118_CNTCTRL);
829 /* outl(0x30, dev->iobase + PCI9118_CNTCTRL); */
830         udelay(1);
831
832         if ((mode == 1) || (mode == 2) || (mode == 4)) {
833                 outl(divisor2 & 0xff, dev->iobase + PCI9118_CNT2);
834                 outl((divisor2 >> 8) & 0xff, dev->iobase + PCI9118_CNT2);
835                 outl(divisor1 & 0xff, dev->iobase + PCI9118_CNT1);
836                 outl((divisor1 >> 8) & 0xff, dev->iobase + PCI9118_CNT1);
837         }
838 }
839
840 static int pci9118_ai_cancel(struct comedi_device *dev,
841                              struct comedi_subdevice *s)
842 {
843         struct pci9118_private *devpriv = dev->private;
844
845         if (devpriv->usedma)
846                 outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) &
847                         (~EN_A2P_TRANSFERS),
848                         devpriv->iobase_a + AMCC_OP_REG_MCSR);  /* stop DMA */
849         pci9118_exttrg_del(dev, EXTTRG_AI);
850         start_pacer(dev, 0, 0, 0);      /* stop 8254 counters */
851         devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg;
852         outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
853                                         /*
854                                          * positive triggers, no S&H, no burst,
855                                          * burst stop, no post trigger,
856                                          * no about trigger, trigger stop
857                                          */
858         devpriv->AdControlReg = 0x00;
859         outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
860                                         /*
861                                          * bipolar, S.E., use 8254, stop 8354,
862                                          * internal trigger, soft trigger,
863                                          * disable INT and DMA
864                                          */
865         outl(0, dev->iobase + PCI9118_BURST);
866         outl(1, dev->iobase + PCI9118_SCANMOD);
867         outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */
868         outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
869
870         devpriv->ai_do = 0;
871         devpriv->usedma = 0;
872
873         devpriv->ai_act_scan = 0;
874         devpriv->ai_act_dmapos = 0;
875         s->async->cur_chan = 0;
876         s->async->inttrig = NULL;
877         devpriv->ai_buf_ptr = 0;
878         devpriv->ai_neverending = 0;
879         devpriv->dma_actbuf = 0;
880
881         if (!devpriv->IntControlReg)
882                 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00,
883                                         devpriv->iobase_a + AMCC_OP_REG_INTCSR);
884                                                         /* allow INT in AMCC */
885
886         return 0;
887 }
888
889 static char pci9118_decode_error_status(struct comedi_device *dev,
890                                         struct comedi_subdevice *s,
891                                         unsigned char m)
892 {
893         struct pci9118_private *devpriv = dev->private;
894
895         if (m & 0x100) {
896                 comedi_error(dev, "A/D FIFO Full status (Fatal Error!)");
897                 devpriv->ai_maskerr &= ~0x100L;
898         }
899         if (m & 0x008) {
900                 comedi_error(dev,
901                              "A/D Burst Mode Overrun Status (Fatal Error!)");
902                 devpriv->ai_maskerr &= ~0x008L;
903         }
904         if (m & 0x004) {
905                 comedi_error(dev, "A/D Over Speed Status (Warning!)");
906                 devpriv->ai_maskerr &= ~0x004L;
907         }
908         if (m & 0x002) {
909                 comedi_error(dev, "A/D Overrun Status (Fatal Error!)");
910                 devpriv->ai_maskerr &= ~0x002L;
911         }
912         if (m & devpriv->ai_maskharderr) {
913                 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
914                 pci9118_ai_cancel(dev, s);
915                 comedi_event(dev, s);
916                 return 1;
917         }
918
919         return 0;
920 }
921
922 static void pci9118_ai_munge(struct comedi_device *dev,
923                              struct comedi_subdevice *s, void *data,
924                              unsigned int num_bytes,
925                              unsigned int start_chan_index)
926 {
927         struct pci9118_private *devpriv = dev->private;
928         unsigned int i, num_samples = num_bytes / sizeof(short);
929         unsigned short *array = data;
930
931         for (i = 0; i < num_samples; i++) {
932                 if (devpriv->usedma)
933                         array[i] = be16_to_cpu(array[i]);
934                 if (devpriv->ai16bits)
935                         array[i] ^= 0x8000;
936                 else
937                         array[i] = (array[i] >> 4) & 0x0fff;
938
939         }
940 }
941
942 static void interrupt_pci9118_ai_onesample(struct comedi_device *dev,
943                                            struct comedi_subdevice *s,
944                                            unsigned short int_adstat,
945                                            unsigned int int_amcc,
946                                            unsigned short int_daq)
947 {
948         struct pci9118_private *devpriv = dev->private;
949         unsigned short sampl;
950
951         s->async->events = 0;
952
953         if (int_adstat & devpriv->ai_maskerr)
954                 if (pci9118_decode_error_status(dev, s, int_adstat))
955                         return;
956
957         sampl = inw(dev->iobase + PCI9118_AD_DATA);
958
959 #ifdef PCI9118_PARANOIDCHECK
960         if (devpriv->ai16bits == 0) {
961                 if ((sampl & 0x000f) != devpriv->chanlist[s->async->cur_chan]) {
962                                                         /* data dropout! */
963                         dev_info(dev->class_dev,
964                                  "A/D  SAMPL - data dropout: received channel %d, expected %d!\n",
965                                  sampl & 0x000f,
966                                  devpriv->chanlist[s->async->cur_chan]);
967                         s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
968                         pci9118_ai_cancel(dev, s);
969                         comedi_event(dev, s);
970                         return;
971                 }
972         }
973 #endif
974         cfc_write_to_buffer(s, sampl);
975         s->async->cur_chan++;
976         if (s->async->cur_chan >= devpriv->ai_n_scanlen) {
977                                                         /* one scan done */
978                 s->async->cur_chan %= devpriv->ai_n_scanlen;
979                 devpriv->ai_act_scan++;
980                 if (!(devpriv->ai_neverending))
981                         if (devpriv->ai_act_scan >= devpriv->ai_scans) {
982                                                         /* all data sampled */
983                                 pci9118_ai_cancel(dev, s);
984                                 s->async->events |= COMEDI_CB_EOA;
985                         }
986         }
987
988         if (s->async->events)
989                 comedi_event(dev, s);
990 }
991
992 static void interrupt_pci9118_ai_dma(struct comedi_device *dev,
993                                      struct comedi_subdevice *s,
994                                      unsigned short int_adstat,
995                                      unsigned int int_amcc,
996                                      unsigned short int_daq)
997 {
998         struct pci9118_private *devpriv = dev->private;
999         unsigned int next_dma_buf, samplesinbuf, sampls, m;
1000
1001         if (int_amcc & MASTER_ABORT_INT) {
1002                 comedi_error(dev, "AMCC IRQ - MASTER DMA ABORT!");
1003                 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1004                 pci9118_ai_cancel(dev, s);
1005                 comedi_event(dev, s);
1006                 return;
1007         }
1008
1009         if (int_amcc & TARGET_ABORT_INT) {
1010                 comedi_error(dev, "AMCC IRQ - TARGET DMA ABORT!");
1011                 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1012                 pci9118_ai_cancel(dev, s);
1013                 comedi_event(dev, s);
1014                 return;
1015         }
1016         if (int_adstat & devpriv->ai_maskerr)
1017                                         /* if (int_adstat & 0x106) */
1018                 if (pci9118_decode_error_status(dev, s, int_adstat))
1019                         return;
1020
1021         samplesinbuf = devpriv->dmabuf_use_size[devpriv->dma_actbuf] >> 1;
1022                                         /* number of received real samples */
1023
1024         if (devpriv->dma_doublebuf) {   /*
1025                                          * switch DMA buffers if is used
1026                                          * double buffering
1027                                          */
1028                 next_dma_buf = 1 - devpriv->dma_actbuf;
1029                 outl(devpriv->dmabuf_hw[next_dma_buf],
1030                      devpriv->iobase_a + AMCC_OP_REG_MWAR);
1031                 outl(devpriv->dmabuf_use_size[next_dma_buf],
1032                      devpriv->iobase_a + AMCC_OP_REG_MWTC);
1033                 devpriv->dmabuf_used_size[next_dma_buf] =
1034                     devpriv->dmabuf_use_size[next_dma_buf];
1035                 if (devpriv->ai_do == 4)
1036                         interrupt_pci9118_ai_mode4_switch(dev);
1037         }
1038
1039         if (samplesinbuf) {
1040                 m = devpriv->ai_data_len >> 1;  /*
1041                                                  * how many samples is to
1042                                                  * end of buffer
1043                                                  */
1044                 sampls = m;
1045                 move_block_from_dma(dev, s,
1046                                     devpriv->dmabuf_virt[devpriv->dma_actbuf],
1047                                     samplesinbuf);
1048                 m = m - sampls;         /* m= how many samples was transferred */
1049         }
1050
1051         if (!devpriv->ai_neverending)
1052                 if (devpriv->ai_act_scan >= devpriv->ai_scans) {
1053                                                         /* all data sampled */
1054                         pci9118_ai_cancel(dev, s);
1055                         s->async->events |= COMEDI_CB_EOA;
1056                 }
1057
1058         if (devpriv->dma_doublebuf) {   /* switch dma buffers */
1059                 devpriv->dma_actbuf = 1 - devpriv->dma_actbuf;
1060         } else {        /* restart DMA if is not used double buffering */
1061                 outl(devpriv->dmabuf_hw[0],
1062                      devpriv->iobase_a + AMCC_OP_REG_MWAR);
1063                 outl(devpriv->dmabuf_use_size[0],
1064                      devpriv->iobase_a + AMCC_OP_REG_MWTC);
1065                 if (devpriv->ai_do == 4)
1066                         interrupt_pci9118_ai_mode4_switch(dev);
1067         }
1068
1069         comedi_event(dev, s);
1070 }
1071
1072 static irqreturn_t interrupt_pci9118(int irq, void *d)
1073 {
1074         struct comedi_device *dev = d;
1075         struct pci9118_private *devpriv = dev->private;
1076         unsigned int int_daq = 0, int_amcc, int_adstat;
1077
1078         if (!dev->attached)
1079                 return IRQ_NONE;        /* not fully initialized */
1080
1081         int_daq = inl(dev->iobase + PCI9118_INTSRC) & 0xf;
1082                                         /* get IRQ reasons from card */
1083         int_amcc = inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR);
1084                                         /* get INT register from AMCC chip */
1085
1086         if ((!int_daq) && (!(int_amcc & ANY_S593X_INT)))
1087                 return IRQ_NONE;        /* interrupt from other source */
1088
1089         outl(int_amcc | 0x00ff0000, devpriv->iobase_a + AMCC_OP_REG_INTCSR);
1090                                         /* shutdown IRQ reasons in AMCC */
1091
1092         int_adstat = inw(dev->iobase + PCI9118_ADSTAT) & 0x1ff;
1093                                         /* get STATUS register */
1094
1095         if (devpriv->ai_do) {
1096                 if (devpriv->ai12_startstop)
1097                         if ((int_adstat & AdStatus_DTH) &&
1098                                                         (int_daq & Int_DTrg)) {
1099                                                 /* start stop of measure */
1100                                 if (devpriv->ai12_startstop & START_AI_EXT) {
1101                                         devpriv->ai12_startstop &=
1102                                             ~START_AI_EXT;
1103                                         if (!(devpriv->ai12_startstop &
1104                                                         STOP_AI_EXT))
1105                                                         pci9118_exttrg_del
1106                                                         (dev, EXTTRG_AI);
1107                                                 /* deactivate EXT trigger */
1108                                         start_pacer(dev, devpriv->ai_do,
1109                                                 devpriv->ai_divisor1,
1110                                                 devpriv->ai_divisor2);
1111                                                 /* start pacer */
1112                                         outl(devpriv->AdControlReg,
1113                                                 dev->iobase + PCI9118_ADCNTRL);
1114                                 } else {
1115                                         if (devpriv->ai12_startstop &
1116                                                 STOP_AI_EXT) {
1117                                                 devpriv->ai12_startstop &=
1118                                                         ~STOP_AI_EXT;
1119                                                 pci9118_exttrg_del
1120                                                         (dev, EXTTRG_AI);
1121                                                 /* deactivate EXT trigger */
1122                                                 devpriv->ai_neverending = 0;
1123                                                 /*
1124                                                  * well, on next interrupt from
1125                                                  * DMA/EOC measure will stop
1126                                                  */
1127                                         }
1128                                 }
1129                         }
1130
1131                 (devpriv->int_ai_func) (dev, dev->read_subdev, int_adstat,
1132                                         int_amcc, int_daq);
1133
1134         }
1135         return IRQ_HANDLED;
1136 }
1137
1138 static int pci9118_ai_inttrig(struct comedi_device *dev,
1139                               struct comedi_subdevice *s, unsigned int trignum)
1140 {
1141         struct pci9118_private *devpriv = dev->private;
1142
1143         if (trignum != devpriv->ai_inttrig_start)
1144                 return -EINVAL;
1145
1146         devpriv->ai12_startstop &= ~START_AI_INT;
1147         s->async->inttrig = NULL;
1148
1149         outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
1150         outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
1151         if (devpriv->ai_do != 3) {
1152                 start_pacer(dev, devpriv->ai_do, devpriv->ai_divisor1,
1153                             devpriv->ai_divisor2);
1154                 devpriv->AdControlReg |= AdControl_SoftG;
1155         }
1156         outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
1157
1158         return 1;
1159 }
1160
1161 static int pci9118_ai_cmdtest(struct comedi_device *dev,
1162                               struct comedi_subdevice *s,
1163                               struct comedi_cmd *cmd)
1164 {
1165         const struct boardtype *this_board = comedi_board(dev);
1166         struct pci9118_private *devpriv = dev->private;
1167         int err = 0;
1168         unsigned int flags;
1169         int tmp;
1170         unsigned int divisor1 = 0, divisor2 = 0;
1171
1172         /* Step 1 : check if triggers are trivially valid */
1173
1174         err |= cfc_check_trigger_src(&cmd->start_src,
1175                                         TRIG_NOW | TRIG_EXT | TRIG_INT);
1176
1177         flags = TRIG_FOLLOW;
1178         if (devpriv->master)
1179                 flags |= TRIG_TIMER | TRIG_EXT;
1180         err |= cfc_check_trigger_src(&cmd->scan_begin_src, flags);
1181
1182         flags = TRIG_TIMER | TRIG_EXT;
1183         if (devpriv->master)
1184                 flags |= TRIG_NOW;
1185         err |= cfc_check_trigger_src(&cmd->convert_src, flags);
1186
1187         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
1188         err |= cfc_check_trigger_src(&cmd->stop_src,
1189                                         TRIG_COUNT | TRIG_NONE | TRIG_EXT);
1190
1191         if (err)
1192                 return 1;
1193
1194         /* Step 2a : make sure trigger sources are unique */
1195
1196         err |= cfc_check_trigger_is_unique(cmd->start_src);
1197         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
1198         err |= cfc_check_trigger_is_unique(cmd->convert_src);
1199         err |= cfc_check_trigger_is_unique(cmd->stop_src);
1200
1201         /* Step 2b : and mutually compatible */
1202
1203         if (cmd->start_src == TRIG_EXT && cmd->scan_begin_src == TRIG_EXT)
1204                 err |= -EINVAL;
1205
1206         if (cmd->start_src == TRIG_INT && cmd->scan_begin_src == TRIG_INT)
1207                 err |= -EINVAL;
1208
1209         if ((cmd->scan_begin_src & (TRIG_TIMER | TRIG_EXT)) &&
1210             (!(cmd->convert_src & (TRIG_TIMER | TRIG_NOW))))
1211                 err |= -EINVAL;
1212
1213         if ((cmd->scan_begin_src == TRIG_FOLLOW) &&
1214             (!(cmd->convert_src & (TRIG_TIMER | TRIG_EXT))))
1215                 err |= -EINVAL;
1216
1217         if (cmd->stop_src == TRIG_EXT && cmd->scan_begin_src == TRIG_EXT)
1218                 err |= -EINVAL;
1219
1220         if (err)
1221                 return 2;
1222
1223         /* Step 3: check if arguments are trivially valid */
1224
1225         if (cmd->start_src & (TRIG_NOW | TRIG_EXT))
1226                 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1227
1228         if (cmd->scan_begin_src & (TRIG_FOLLOW | TRIG_EXT))
1229                 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1230
1231         if ((cmd->scan_begin_src == TRIG_TIMER) &&
1232             (cmd->convert_src == TRIG_TIMER) && (cmd->scan_end_arg == 1)) {
1233                 cmd->scan_begin_src = TRIG_FOLLOW;
1234                 cmd->convert_arg = cmd->scan_begin_arg;
1235                 cmd->scan_begin_arg = 0;
1236         }
1237
1238         if (cmd->scan_begin_src == TRIG_TIMER)
1239                 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1240                                                  this_board->ai_ns_min);
1241
1242         if (cmd->scan_begin_src == TRIG_EXT)
1243                 if (cmd->scan_begin_arg) {
1244                         cmd->scan_begin_arg = 0;
1245                         err |= -EINVAL;
1246                         err |= cfc_check_trigger_arg_max(&cmd->scan_end_arg,
1247                                                          65535);
1248                 }
1249
1250         if (cmd->convert_src & (TRIG_TIMER | TRIG_NOW))
1251                 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
1252                                                  this_board->ai_ns_min);
1253
1254         if (cmd->convert_src == TRIG_EXT)
1255                 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
1256
1257         if (cmd->stop_src == TRIG_COUNT)
1258                 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
1259         else    /* TRIG_NONE */
1260                 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1261
1262         err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
1263         err |= cfc_check_trigger_arg_max(&cmd->chanlist_len,
1264                                          this_board->n_aichanlist);
1265
1266         err |= cfc_check_trigger_arg_min(&cmd->scan_end_arg,
1267                                          cmd->chanlist_len);
1268
1269         if ((cmd->scan_end_arg % cmd->chanlist_len)) {
1270                 cmd->scan_end_arg =
1271                     cmd->chanlist_len * (cmd->scan_end_arg / cmd->chanlist_len);
1272                 err |= -EINVAL;
1273         }
1274
1275         if (err)
1276                 return 3;
1277
1278         /* step 4: fix up any arguments */
1279
1280         if (cmd->scan_begin_src == TRIG_TIMER) {
1281                 tmp = cmd->scan_begin_arg;
1282                 i8253_cascade_ns_to_timer(devpriv->i8254_osc_base,
1283                                           &divisor1, &divisor2,
1284                                           &cmd->scan_begin_arg, cmd->flags);
1285                 if (cmd->scan_begin_arg < this_board->ai_ns_min)
1286                         cmd->scan_begin_arg = this_board->ai_ns_min;
1287                 if (tmp != cmd->scan_begin_arg)
1288                         err++;
1289         }
1290
1291         if (cmd->convert_src & (TRIG_TIMER | TRIG_NOW)) {
1292                 tmp = cmd->convert_arg;
1293                 i8253_cascade_ns_to_timer(devpriv->i8254_osc_base,
1294                                           &divisor1, &divisor2,
1295                                           &cmd->convert_arg, cmd->flags);
1296                 if (cmd->convert_arg < this_board->ai_ns_min)
1297                         cmd->convert_arg = this_board->ai_ns_min;
1298                 if (tmp != cmd->convert_arg)
1299                         err++;
1300                 if (cmd->scan_begin_src == TRIG_TIMER
1301                     && cmd->convert_src == TRIG_NOW) {
1302                         if (cmd->convert_arg == 0) {
1303                                 if (cmd->scan_begin_arg <
1304                                     this_board->ai_ns_min *
1305                                     (cmd->scan_end_arg + 2)) {
1306                                         cmd->scan_begin_arg =
1307                                             this_board->ai_ns_min *
1308                                             (cmd->scan_end_arg + 2);
1309                                         err++;
1310                                 }
1311                         } else {
1312                                 if (cmd->scan_begin_arg <
1313                                     cmd->convert_arg * cmd->chanlist_len) {
1314                                         cmd->scan_begin_arg =
1315                                             cmd->convert_arg *
1316                                             cmd->chanlist_len;
1317                                         err++;
1318                                 }
1319                         }
1320                 }
1321         }
1322
1323         if (err)
1324                 return 4;
1325
1326         if (cmd->chanlist)
1327                 if (!check_channel_list(dev, s, cmd->chanlist_len,
1328                                         cmd->chanlist, 0, 0))
1329                         return 5;       /* incorrect channels list */
1330
1331         return 0;
1332 }
1333
1334 static int Compute_and_setup_dma(struct comedi_device *dev)
1335 {
1336         struct pci9118_private *devpriv = dev->private;
1337         unsigned int dmalen0, dmalen1, i;
1338
1339         dmalen0 = devpriv->dmabuf_size[0];
1340         dmalen1 = devpriv->dmabuf_size[1];
1341         /* isn't output buff smaller that our DMA buff? */
1342         if (dmalen0 > (devpriv->ai_data_len)) {
1343                 dmalen0 = devpriv->ai_data_len & ~3L;   /*
1344                                                          * align to 32bit down
1345                                                          */
1346         }
1347         if (dmalen1 > (devpriv->ai_data_len)) {
1348                 dmalen1 = devpriv->ai_data_len & ~3L;   /*
1349                                                          * align to 32bit down
1350                                                          */
1351         }
1352
1353         /* we want wake up every scan? */
1354         if (devpriv->ai_flags & TRIG_WAKE_EOS) {
1355                 if (dmalen0 < (devpriv->ai_n_realscanlen << 1)) {
1356                         /* uff, too short DMA buffer, disable EOS support! */
1357                         devpriv->ai_flags &= (~TRIG_WAKE_EOS);
1358                         dev_info(dev->class_dev,
1359                                  "WAR: DMA0 buf too short, can't support TRIG_WAKE_EOS (%d<%d)\n",
1360                                   dmalen0, devpriv->ai_n_realscanlen << 1);
1361                 } else {
1362                         /* short first DMA buffer to one scan */
1363                         dmalen0 = devpriv->ai_n_realscanlen << 1;
1364                         if (devpriv->useeoshandle)
1365                                 dmalen0 += 2;
1366                         if (dmalen0 < 4) {
1367                                 dev_info(dev->class_dev,
1368                                          "ERR: DMA0 buf len bug? (%d<4)\n",
1369                                          dmalen0);
1370                                 dmalen0 = 4;
1371                         }
1372                 }
1373         }
1374         if (devpriv->ai_flags & TRIG_WAKE_EOS) {
1375                 if (dmalen1 < (devpriv->ai_n_realscanlen << 1)) {
1376                         /* uff, too short DMA buffer, disable EOS support! */
1377                         devpriv->ai_flags &= (~TRIG_WAKE_EOS);
1378                         dev_info(dev->class_dev,
1379                                  "WAR: DMA1 buf too short, can't support TRIG_WAKE_EOS (%d<%d)\n",
1380                                  dmalen1, devpriv->ai_n_realscanlen << 1);
1381                 } else {
1382                         /* short second DMA buffer to one scan */
1383                         dmalen1 = devpriv->ai_n_realscanlen << 1;
1384                         if (devpriv->useeoshandle)
1385                                 dmalen1 -= 2;
1386                         if (dmalen1 < 4) {
1387                                 dev_info(dev->class_dev,
1388                                          "ERR: DMA1 buf len bug? (%d<4)\n",
1389                                          dmalen1);
1390                                 dmalen1 = 4;
1391                         }
1392                 }
1393         }
1394
1395         /* transfer without TRIG_WAKE_EOS */
1396         if (!(devpriv->ai_flags & TRIG_WAKE_EOS)) {
1397                 /* if it's possible then align DMA buffers to length of scan */
1398                 i = dmalen0;
1399                 dmalen0 =
1400                     (dmalen0 / (devpriv->ai_n_realscanlen << 1)) *
1401                     (devpriv->ai_n_realscanlen << 1);
1402                 dmalen0 &= ~3L;
1403                 if (!dmalen0)
1404                         dmalen0 = i;    /* uff. very long scan? */
1405                 i = dmalen1;
1406                 dmalen1 =
1407                     (dmalen1 / (devpriv->ai_n_realscanlen << 1)) *
1408                     (devpriv->ai_n_realscanlen << 1);
1409                 dmalen1 &= ~3L;
1410                 if (!dmalen1)
1411                         dmalen1 = i;    /* uff. very long scan? */
1412                 /*
1413                  * if measure isn't neverending then test, if it fits whole
1414                  * into one or two DMA buffers
1415                  */
1416                 if (!devpriv->ai_neverending) {
1417                         /* fits whole measure into one DMA buffer? */
1418                         if (dmalen0 >
1419                             ((devpriv->ai_n_realscanlen << 1) *
1420                              devpriv->ai_scans)) {
1421                                 dmalen0 =
1422                                     (devpriv->ai_n_realscanlen << 1) *
1423                                     devpriv->ai_scans;
1424                                 dmalen0 &= ~3L;
1425                         } else {        /*
1426                                          * fits whole measure into
1427                                          * two DMA buffer?
1428                                          */
1429                                 if (dmalen1 >
1430                                     ((devpriv->ai_n_realscanlen << 1) *
1431                                      devpriv->ai_scans - dmalen0))
1432                                         dmalen1 =
1433                                             (devpriv->ai_n_realscanlen << 1) *
1434                                             devpriv->ai_scans - dmalen0;
1435                                 dmalen1 &= ~3L;
1436                         }
1437                 }
1438         }
1439
1440         /* these DMA buffer size will be used */
1441         devpriv->dma_actbuf = 0;
1442         devpriv->dmabuf_use_size[0] = dmalen0;
1443         devpriv->dmabuf_use_size[1] = dmalen1;
1444
1445 #if 0
1446         if (devpriv->ai_n_scanlen < this_board->half_fifo_size) {
1447                 devpriv->dmabuf_panic_size[0] =
1448                     (this_board->half_fifo_size / devpriv->ai_n_scanlen +
1449                      1) * devpriv->ai_n_scanlen * sizeof(short);
1450                 devpriv->dmabuf_panic_size[1] =
1451                     (this_board->half_fifo_size / devpriv->ai_n_scanlen +
1452                      1) * devpriv->ai_n_scanlen * sizeof(short);
1453         } else {
1454                 devpriv->dmabuf_panic_size[0] =
1455                     (devpriv->ai_n_scanlen << 1) % devpriv->dmabuf_size[0];
1456                 devpriv->dmabuf_panic_size[1] =
1457                     (devpriv->ai_n_scanlen << 1) % devpriv->dmabuf_size[1];
1458         }
1459 #endif
1460
1461         outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) & (~EN_A2P_TRANSFERS),
1462                         devpriv->iobase_a + AMCC_OP_REG_MCSR);  /* stop DMA */
1463         outl(devpriv->dmabuf_hw[0], devpriv->iobase_a + AMCC_OP_REG_MWAR);
1464         outl(devpriv->dmabuf_use_size[0], devpriv->iobase_a + AMCC_OP_REG_MWTC);
1465         /* init DMA transfer */
1466         outl(0x00000000 | AINT_WRITE_COMPL,
1467              devpriv->iobase_a + AMCC_OP_REG_INTCSR);
1468 /* outl(0x02000000|AINT_WRITE_COMPL, devpriv->iobase_a+AMCC_OP_REG_INTCSR); */
1469
1470         outl(inl(devpriv->iobase_a +
1471                  AMCC_OP_REG_MCSR) | RESET_A2P_FLAGS | A2P_HI_PRIORITY |
1472              EN_A2P_TRANSFERS, devpriv->iobase_a + AMCC_OP_REG_MCSR);
1473         outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | EN_A2P_TRANSFERS,
1474                         devpriv->iobase_a + AMCC_OP_REG_INTCSR);
1475                                                 /* allow bus mastering */
1476
1477         return 0;
1478 }
1479
1480 static int pci9118_ai_docmd_sampl(struct comedi_device *dev,
1481                                   struct comedi_subdevice *s)
1482 {
1483         struct pci9118_private *devpriv = dev->private;
1484
1485         switch (devpriv->ai_do) {
1486         case 1:
1487                 devpriv->AdControlReg |= AdControl_TmrTr;
1488                 break;
1489         case 2:
1490                 comedi_error(dev, "pci9118_ai_docmd_sampl() mode 2 bug!\n");
1491                 return -EIO;
1492         case 3:
1493                 devpriv->AdControlReg |= AdControl_ExtM;
1494                 break;
1495         case 4:
1496                 comedi_error(dev, "pci9118_ai_docmd_sampl() mode 4 bug!\n");
1497                 return -EIO;
1498         default:
1499                 comedi_error(dev,
1500                              "pci9118_ai_docmd_sampl() mode number bug!\n");
1501                 return -EIO;
1502         }
1503
1504         devpriv->int_ai_func = interrupt_pci9118_ai_onesample;
1505                                                 /* transfer function */
1506
1507         if (devpriv->ai12_startstop)
1508                 pci9118_exttrg_add(dev, EXTTRG_AI);
1509                                                 /* activate EXT trigger */
1510
1511         if ((devpriv->ai_do == 1) || (devpriv->ai_do == 2))
1512                 devpriv->IntControlReg |= Int_Timer;
1513
1514         devpriv->AdControlReg |= AdControl_Int;
1515
1516         outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00,
1517                         devpriv->iobase_a + AMCC_OP_REG_INTCSR);
1518                                                         /* allow INT in AMCC */
1519
1520         if (!(devpriv->ai12_startstop & (START_AI_EXT | START_AI_INT))) {
1521                 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
1522                 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
1523                 if (devpriv->ai_do != 3) {
1524                         start_pacer(dev, devpriv->ai_do, devpriv->ai_divisor1,
1525                                     devpriv->ai_divisor2);
1526                         devpriv->AdControlReg |= AdControl_SoftG;
1527                 }
1528                 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
1529         }
1530
1531         return 0;
1532 }
1533
1534 static int pci9118_ai_docmd_dma(struct comedi_device *dev,
1535                                 struct comedi_subdevice *s)
1536 {
1537         struct pci9118_private *devpriv = dev->private;
1538
1539         Compute_and_setup_dma(dev);
1540
1541         switch (devpriv->ai_do) {
1542         case 1:
1543                 devpriv->AdControlReg |=
1544                     ((AdControl_TmrTr | AdControl_Dma) & 0xff);
1545                 break;
1546         case 2:
1547                 devpriv->AdControlReg |=
1548                     ((AdControl_TmrTr | AdControl_Dma) & 0xff);
1549                 devpriv->AdFunctionReg =
1550                     AdFunction_PDTrg | AdFunction_PETrg | AdFunction_BM |
1551                     AdFunction_BS;
1552                 if (devpriv->usessh && (!devpriv->softsshdelay))
1553                         devpriv->AdFunctionReg |= AdFunction_BSSH;
1554                 outl(devpriv->ai_n_realscanlen, dev->iobase + PCI9118_BURST);
1555                 break;
1556         case 3:
1557                 devpriv->AdControlReg |=
1558                     ((AdControl_ExtM | AdControl_Dma) & 0xff);
1559                 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg;
1560                 break;
1561         case 4:
1562                 devpriv->AdControlReg |=
1563                     ((AdControl_TmrTr | AdControl_Dma) & 0xff);
1564                 devpriv->AdFunctionReg =
1565                     AdFunction_PDTrg | AdFunction_PETrg | AdFunction_AM;
1566                 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
1567                 outl(0x30, dev->iobase + PCI9118_CNTCTRL);
1568                 outl((devpriv->dmabuf_hw[0] >> 1) & 0xff,
1569                      dev->iobase + PCI9118_CNT0);
1570                 outl((devpriv->dmabuf_hw[0] >> 9) & 0xff,
1571                      dev->iobase + PCI9118_CNT0);
1572                 devpriv->AdFunctionReg |= AdFunction_Start;
1573                 break;
1574         default:
1575                 comedi_error(dev, "pci9118_ai_docmd_dma() mode number bug!\n");
1576                 return -EIO;
1577         }
1578
1579         if (devpriv->ai12_startstop) {
1580                 pci9118_exttrg_add(dev, EXTTRG_AI);
1581                                                 /* activate EXT trigger */
1582         }
1583
1584         devpriv->int_ai_func = interrupt_pci9118_ai_dma;
1585                                                 /* transfer function */
1586
1587         outl(0x02000000 | AINT_WRITE_COMPL,
1588              devpriv->iobase_a + AMCC_OP_REG_INTCSR);
1589
1590         if (!(devpriv->ai12_startstop & (START_AI_EXT | START_AI_INT))) {
1591                 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
1592                 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
1593                 if (devpriv->ai_do != 3) {
1594                         start_pacer(dev, devpriv->ai_do, devpriv->ai_divisor1,
1595                                     devpriv->ai_divisor2);
1596                         devpriv->AdControlReg |= AdControl_SoftG;
1597                 }
1598                 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
1599         }
1600
1601         return 0;
1602 }
1603
1604 static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1605 {
1606         const struct boardtype *this_board = comedi_board(dev);
1607         struct pci9118_private *devpriv = dev->private;
1608         struct comedi_cmd *cmd = &s->async->cmd;
1609         unsigned int addchans = 0;
1610         int ret = 0;
1611
1612         devpriv->ai12_startstop = 0;
1613         devpriv->ai_flags = cmd->flags;
1614         devpriv->ai_n_chan = cmd->chanlist_len;
1615         devpriv->ai_n_scanlen = cmd->scan_end_arg;
1616         devpriv->ai_chanlist = cmd->chanlist;
1617         devpriv->ai_data_len = s->async->prealloc_bufsz;
1618         devpriv->ai_timer1 = 0;
1619         devpriv->ai_timer2 = 0;
1620         devpriv->ai_add_front = 0;
1621         devpriv->ai_add_back = 0;
1622         devpriv->ai_maskerr = 0x10e;
1623
1624         /* prepare for start/stop conditions */
1625         if (cmd->start_src == TRIG_EXT)
1626                 devpriv->ai12_startstop |= START_AI_EXT;
1627         if (cmd->stop_src == TRIG_EXT) {
1628                 devpriv->ai_neverending = 1;
1629                 devpriv->ai12_startstop |= STOP_AI_EXT;
1630         }
1631         if (cmd->start_src == TRIG_INT) {
1632                 devpriv->ai12_startstop |= START_AI_INT;
1633                 devpriv->ai_inttrig_start = cmd->start_arg;
1634                 s->async->inttrig = pci9118_ai_inttrig;
1635         }
1636 #if 0
1637         if (cmd->stop_src == TRIG_INT) {
1638                 devpriv->ai_neverending = 1;
1639                 devpriv->ai12_startstop |= STOP_AI_INT;
1640         }
1641 #endif
1642         if (cmd->stop_src == TRIG_NONE)
1643                 devpriv->ai_neverending = 1;
1644         if (cmd->stop_src == TRIG_COUNT) {
1645                 devpriv->ai_scans = cmd->stop_arg;
1646                 devpriv->ai_neverending = 0;
1647         } else {
1648                 devpriv->ai_scans = 0;
1649         }
1650
1651         /* use sample&hold signal? */
1652         if (cmd->convert_src == TRIG_NOW)
1653                 devpriv->usessh = 1;
1654         /* yes */
1655         else
1656                 devpriv->usessh = 0;
1657                                 /*  no */
1658
1659         /*
1660          * use additional sample at end of every scan
1661          * to satisty DMA 32 bit transfer?
1662          */
1663         devpriv->ai_add_front = 0;
1664         devpriv->ai_add_back = 0;
1665         devpriv->useeoshandle = 0;
1666         if (devpriv->master) {
1667                 devpriv->usedma = 1;
1668                 if ((cmd->flags & TRIG_WAKE_EOS) &&
1669                     (devpriv->ai_n_scanlen == 1)) {
1670                         if (cmd->convert_src == TRIG_NOW)
1671                                 devpriv->ai_add_back = 1;
1672                         if (cmd->convert_src == TRIG_TIMER) {
1673                                 devpriv->usedma = 0;
1674                                         /*
1675                                          * use INT transfer if scanlist
1676                                          * have only one channel
1677                                          */
1678                         }
1679                 }
1680                 if ((cmd->flags & TRIG_WAKE_EOS) &&
1681                     (devpriv->ai_n_scanlen & 1) &&
1682                     (devpriv->ai_n_scanlen > 1)) {
1683                         if (cmd->scan_begin_src == TRIG_FOLLOW) {
1684                                 /*
1685                                  * vpriv->useeoshandle=1; // change DMA transfer
1686                                  * block to fit EOS on every second call
1687                                  */
1688                                 devpriv->usedma = 0;
1689                                 /*
1690                                  * XXX maybe can be corrected to use 16 bit DMA
1691                                  */
1692                         } else {        /*
1693                                          * well, we must insert one sample
1694                                          * to end of EOS to meet 32 bit transfer
1695                                          */
1696                                 devpriv->ai_add_back = 1;
1697                         }
1698                 }
1699         } else {        /* interrupt transfer don't need any correction */
1700                 devpriv->usedma = 0;
1701         }
1702
1703         /*
1704          * we need software S&H signal?
1705          * It adds two samples before every scan as minimum
1706          */
1707         if (devpriv->usessh && devpriv->softsshdelay) {
1708                 devpriv->ai_add_front = 2;
1709                 if ((devpriv->usedma == 1) && (devpriv->ai_add_back == 1)) {
1710                                                         /* move it to front */
1711                         devpriv->ai_add_front++;
1712                         devpriv->ai_add_back = 0;
1713                 }
1714                 if (cmd->convert_arg < this_board->ai_ns_min)
1715                         cmd->convert_arg = this_board->ai_ns_min;
1716                 addchans = devpriv->softsshdelay / cmd->convert_arg;
1717                 if (devpriv->softsshdelay % cmd->convert_arg)
1718                         addchans++;
1719                 if (addchans > (devpriv->ai_add_front - 1)) {
1720                                                         /* uff, still short */
1721                         devpriv->ai_add_front = addchans + 1;
1722                         if (devpriv->usedma == 1)
1723                                 if ((devpriv->ai_add_front +
1724                                      devpriv->ai_n_chan +
1725                                      devpriv->ai_add_back) & 1)
1726                                         devpriv->ai_add_front++;
1727                                                         /* round up to 32 bit */
1728                 }
1729         }
1730         /* well, we now know what must be all added */
1731         devpriv->ai_n_realscanlen =     /*
1732                                          * what we must take from card in real
1733                                          * to have ai_n_scanlen on output?
1734                                          */
1735             (devpriv->ai_add_front + devpriv->ai_n_chan +
1736              devpriv->ai_add_back) * (devpriv->ai_n_scanlen /
1737                                       devpriv->ai_n_chan);
1738
1739         /* check and setup channel list */
1740         if (!check_channel_list(dev, s, devpriv->ai_n_chan,
1741                                 devpriv->ai_chanlist, devpriv->ai_add_front,
1742                                 devpriv->ai_add_back))
1743                 return -EINVAL;
1744         if (!setup_channel_list(dev, s, devpriv->ai_n_chan,
1745                                 devpriv->ai_chanlist, 0, devpriv->ai_add_front,
1746                                 devpriv->ai_add_back, devpriv->usedma,
1747                                 devpriv->useeoshandle))
1748                 return -EINVAL;
1749
1750         /* compute timers settings */
1751         /*
1752          * simplest way, fr=4Mhz/(tim1*tim2),
1753          * channel manipulation without timers effect
1754          */
1755         if (((cmd->scan_begin_src == TRIG_FOLLOW) ||
1756                 (cmd->scan_begin_src == TRIG_EXT) ||
1757                 (cmd->scan_begin_src == TRIG_INT)) &&
1758                 (cmd->convert_src == TRIG_TIMER)) {
1759                                         /* both timer is used for one time */
1760                 if (cmd->scan_begin_src == TRIG_EXT)
1761                         devpriv->ai_do = 4;
1762                 else
1763                         devpriv->ai_do = 1;
1764                 pci9118_calc_divisors(devpriv->ai_do, dev, s,
1765                                       &cmd->scan_begin_arg, &cmd->convert_arg,
1766                                       devpriv->ai_flags,
1767                                       devpriv->ai_n_realscanlen,
1768                                       &devpriv->ai_divisor1,
1769                                       &devpriv->ai_divisor2, devpriv->usessh,
1770                                       devpriv->ai_add_front);
1771                 devpriv->ai_timer2 = cmd->convert_arg;
1772         }
1773
1774         if ((cmd->scan_begin_src == TRIG_TIMER) &&
1775                 ((cmd->convert_src == TRIG_TIMER) ||
1776                 (cmd->convert_src == TRIG_NOW))) {
1777                                                 /* double timed action */
1778                 if (!devpriv->usedma) {
1779                         comedi_error(dev,
1780                                      "cmd->scan_begin_src=TRIG_TIMER works "
1781                                                 "only with bus mastering!");
1782                         return -EIO;
1783                 }
1784
1785                 devpriv->ai_do = 2;
1786                 pci9118_calc_divisors(devpriv->ai_do, dev, s,
1787                                       &cmd->scan_begin_arg, &cmd->convert_arg,
1788                                       devpriv->ai_flags,
1789                                       devpriv->ai_n_realscanlen,
1790                                       &devpriv->ai_divisor1,
1791                                       &devpriv->ai_divisor2, devpriv->usessh,
1792                                       devpriv->ai_add_front);
1793                 devpriv->ai_timer1 = cmd->scan_begin_arg;
1794                 devpriv->ai_timer2 = cmd->convert_arg;
1795         }
1796
1797         if ((cmd->scan_begin_src == TRIG_FOLLOW)
1798             && (cmd->convert_src == TRIG_EXT)) {
1799                 devpriv->ai_do = 3;
1800         }
1801
1802         start_pacer(dev, -1, 0, 0);     /* stop pacer */
1803
1804         devpriv->AdControlReg = 0;      /*
1805                                          * bipolar, S.E., use 8254, stop 8354,
1806                                          * internal trigger, soft trigger,
1807                                          * disable DMA
1808                                          */
1809         outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
1810         devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg;
1811                                         /*
1812                                          * positive triggers, no S&H, no burst,
1813                                          * burst stop, no post trigger,
1814                                          * no about trigger, trigger stop
1815                                          */
1816         outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
1817         udelay(1);
1818         outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
1819         inl(dev->iobase + PCI9118_ADSTAT);      /*
1820                                                  * flush A/D and INT
1821                                                  * status register
1822                                                  */
1823         inl(dev->iobase + PCI9118_INTSRC);
1824
1825         devpriv->ai_act_scan = 0;
1826         devpriv->ai_act_dmapos = 0;
1827         s->async->cur_chan = 0;
1828         devpriv->ai_buf_ptr = 0;
1829
1830         if (devpriv->usedma)
1831                 ret = pci9118_ai_docmd_dma(dev, s);
1832         else
1833                 ret = pci9118_ai_docmd_sampl(dev, s);
1834
1835         return ret;
1836 }
1837
1838 static int pci9118_reset(struct comedi_device *dev)
1839 {
1840         struct pci9118_private *devpriv = dev->private;
1841
1842         devpriv->IntControlReg = 0;
1843         devpriv->exttrg_users = 0;
1844         inl(dev->iobase + PCI9118_INTCTRL);
1845         outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
1846                                                 /* disable interrupts source */
1847         outl(0x30, dev->iobase + PCI9118_CNTCTRL);
1848 /* outl(0xb4, dev->iobase + PCI9118_CNTCTRL); */
1849         start_pacer(dev, 0, 0, 0);              /* stop 8254 counters */
1850         devpriv->AdControlReg = 0;
1851         outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
1852                                                 /*
1853                                                  * bipolar, S.E., use 8254,
1854                                                  * stop 8354, internal trigger,
1855                                                  * soft trigger,
1856                                                  * disable INT and DMA
1857                                                  */
1858         outl(0, dev->iobase + PCI9118_BURST);
1859         outl(1, dev->iobase + PCI9118_SCANMOD);
1860         outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */
1861         devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg;
1862         outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
1863                                                 /*
1864                                                  * positive triggers, no S&H,
1865                                                  * no burst, burst stop,
1866                                                  * no post trigger,
1867                                                  * no about trigger,
1868                                                  * trigger stop
1869                                                  */
1870
1871         devpriv->ao_data[0] = 2047;
1872         devpriv->ao_data[1] = 2047;
1873         outl(devpriv->ao_data[0], dev->iobase + PCI9118_DA1);
1874                                                 /* reset A/D outs to 0V */
1875         outl(devpriv->ao_data[1], dev->iobase + PCI9118_DA2);
1876         outl(0, dev->iobase + PCI9118_DO);      /* reset digi outs to L */
1877         udelay(10);
1878         inl(dev->iobase + PCI9118_AD_DATA);
1879         outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
1880         outl(0, dev->iobase + PCI9118_INTSRC);  /* remove INT requests */
1881         inl(dev->iobase + PCI9118_ADSTAT);      /* flush A/D status register */
1882         inl(dev->iobase + PCI9118_INTSRC);      /* flush INT requests */
1883         devpriv->AdControlReg = 0;
1884         outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
1885                                                 /*
1886                                                  * bipolar, S.E., use 8254,
1887                                                  * stop 8354, internal trigger,
1888                                                  * soft trigger,
1889                                                  * disable INT and DMA
1890                                                  */
1891
1892         devpriv->cnt0_users = 0;
1893         devpriv->exttrg_users = 0;
1894
1895         return 0;
1896 }
1897
1898 /*
1899  * FIXME - this is pretty ineffective because all the supported board types
1900  * have the same device ID!
1901  */
1902 static const struct boardtype *pci9118_find_boardinfo(struct pci_dev *pcidev)
1903 {
1904         unsigned int i;
1905
1906         for (i = 0; i < ARRAY_SIZE(boardtypes); i++)
1907                 if (pcidev->device == boardtypes[i].device_id)
1908                         return &boardtypes[i];
1909         return NULL;
1910 }
1911
1912 static struct pci_dev *pci9118_find_pci(struct comedi_device *dev,
1913                                         struct comedi_devconfig *it)
1914 {
1915         const struct boardtype *this_board = comedi_board(dev);
1916         struct pci_dev *pcidev = NULL;
1917         int bus = it->options[0];
1918         int slot = it->options[1];
1919
1920         for_each_pci_dev(pcidev) {
1921                 if (pcidev->vendor != PCI_VENDOR_ID_AMCC)
1922                         continue;
1923                 if (pcidev->device != this_board->device_id)
1924                         continue;
1925                 if (bus || slot) {
1926                         /* requested particular bus/slot */
1927                         if (pcidev->bus->number != bus ||
1928                             PCI_SLOT(pcidev->devfn) != slot)
1929                                 continue;
1930                 }
1931                 return pcidev;
1932         }
1933         dev_err(dev->class_dev,
1934                 "no supported board found! (req. bus/slot : %d/%d)\n",
1935                 bus, slot);
1936         return NULL;
1937 }
1938
1939 static void pci9118_report_attach(struct comedi_device *dev, unsigned int irq)
1940 {
1941         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1942         struct pci9118_private *devpriv = dev->private;
1943         char irqbuf[30];
1944         char muxbuf[30];
1945
1946         if (irq)
1947                 snprintf(irqbuf, sizeof(irqbuf), "irq %u%s", irq,
1948                          (dev->irq ? "" : " UNAVAILABLE"));
1949         else
1950                 snprintf(irqbuf, sizeof(irqbuf), "irq DISABLED");
1951         if (devpriv->usemux)
1952                 snprintf(muxbuf, sizeof(muxbuf), "ext mux %u chans",
1953                          devpriv->usemux);
1954         else
1955                 snprintf(muxbuf, sizeof(muxbuf), "no ext mux");
1956         dev_info(dev->class_dev, "%s (pci %s, %s, %sbus master, %s) attached\n",
1957                  dev->board_name, pci_name(pcidev), irqbuf,
1958                  (devpriv->master ? "" : "no "), muxbuf);
1959 }
1960
1961 static int pci9118_common_attach(struct comedi_device *dev, int disable_irq,
1962                                  int master, int ext_mux, int softsshdelay,
1963                                  int hw_err_mask)
1964 {
1965         const struct boardtype *this_board = comedi_board(dev);
1966         struct pci9118_private *devpriv = dev->private;
1967         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1968         struct comedi_subdevice *s;
1969         int ret, pages, i;
1970         u16 u16w;
1971
1972         dev->board_name = this_board->name;
1973         ret = comedi_pci_enable(dev);
1974         if (ret)
1975                 return ret;
1976         if (master)
1977                 pci_set_master(pcidev);
1978
1979         devpriv->iobase_a = pci_resource_start(pcidev, 0);
1980         dev->iobase = pci_resource_start(pcidev, 2);
1981
1982         pci9118_reset(dev);
1983
1984         if (master) {           /* alloc DMA buffers */
1985                 devpriv->dma_doublebuf = 0;
1986                 for (i = 0; i < 2; i++) {
1987                         for (pages = 4; pages >= 0; pages--) {
1988                                 devpriv->dmabuf_virt[i] =
1989                                     (unsigned short *)
1990                                     __get_free_pages(GFP_KERNEL, pages);
1991                                 if (devpriv->dmabuf_virt[i])
1992                                         break;
1993                         }
1994                         if (devpriv->dmabuf_virt[i]) {
1995                                 devpriv->dmabuf_pages[i] = pages;
1996                                 devpriv->dmabuf_size[i] = PAGE_SIZE * pages;
1997                                 devpriv->dmabuf_samples[i] =
1998                                     devpriv->dmabuf_size[i] >> 1;
1999                                 devpriv->dmabuf_hw[i] =
2000                                     virt_to_bus((void *)
2001                                                 devpriv->dmabuf_virt[i]);
2002                         }
2003                 }
2004                 if (!devpriv->dmabuf_virt[0]) {
2005                         dev_warn(dev->class_dev,
2006                                  "Can't allocate DMA buffer, DMA disabled!\n");
2007                         master = 0;
2008                 }
2009                 if (devpriv->dmabuf_virt[1])
2010                         devpriv->dma_doublebuf = 1;
2011         }
2012         devpriv->master = master;
2013
2014         if (ext_mux > 0) {
2015                 if (ext_mux > 256)
2016                         ext_mux = 256;  /* max 256 channels! */
2017                 if (softsshdelay > 0)
2018                         if (ext_mux > 128)
2019                                 ext_mux = 128;
2020                 devpriv->usemux = ext_mux;
2021         } else {
2022                 devpriv->usemux = 0;
2023         }
2024
2025         if (softsshdelay < 0) {
2026                 /* select sample&hold signal polarity */
2027                 devpriv->softsshdelay = -softsshdelay;
2028                 devpriv->softsshsample = 0x80;
2029                 devpriv->softsshhold = 0x00;
2030         } else {
2031                 devpriv->softsshdelay = softsshdelay;
2032                 devpriv->softsshsample = 0x00;
2033                 devpriv->softsshhold = 0x80;
2034         }
2035
2036         pci_read_config_word(pcidev, PCI_COMMAND, &u16w);
2037         pci_write_config_word(pcidev, PCI_COMMAND, u16w | 64);
2038                                 /* Enable parity check for parity error */
2039
2040         if (!disable_irq && pcidev->irq) {
2041                 ret = request_irq(pcidev->irq, interrupt_pci9118, IRQF_SHARED,
2042                                   dev->board_name, dev);
2043                 if (ret == 0)
2044                         dev->irq = pcidev->irq;
2045         }
2046
2047         ret = comedi_alloc_subdevices(dev, 4);
2048         if (ret)
2049                 return ret;
2050
2051         s = &dev->subdevices[0];
2052         s->type = COMEDI_SUBD_AI;
2053         s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_GROUND | SDF_DIFF;
2054         if (devpriv->usemux)
2055                 s->n_chan = devpriv->usemux;
2056         else
2057                 s->n_chan = this_board->n_aichan;
2058
2059         s->maxdata = this_board->ai_maxdata;
2060         s->range_table = this_board->rangelist_ai;
2061         s->insn_read = pci9118_insn_read_ai;
2062         if (dev->irq) {
2063                 dev->read_subdev = s;
2064                 s->subdev_flags |= SDF_CMD_READ;
2065                 s->len_chanlist = this_board->n_aichanlist;
2066                 s->do_cmdtest = pci9118_ai_cmdtest;
2067                 s->do_cmd = pci9118_ai_cmd;
2068                 s->cancel = pci9118_ai_cancel;
2069                 s->munge = pci9118_ai_munge;
2070         }
2071
2072         s = &dev->subdevices[1];
2073         s->type = COMEDI_SUBD_AO;
2074         s->subdev_flags = SDF_WRITABLE | SDF_GROUND | SDF_COMMON;
2075         s->n_chan = this_board->n_aochan;
2076         s->maxdata = this_board->ao_maxdata;
2077         s->len_chanlist = this_board->n_aochan;
2078         s->range_table = this_board->rangelist_ao;
2079         s->insn_write = pci9118_insn_write_ao;
2080         s->insn_read = pci9118_insn_read_ao;
2081
2082         s = &dev->subdevices[2];
2083         s->type = COMEDI_SUBD_DI;
2084         s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON;
2085         s->n_chan = 4;
2086         s->maxdata = 1;
2087         s->len_chanlist = 4;
2088         s->range_table = &range_digital;
2089         s->insn_bits = pci9118_insn_bits_di;
2090
2091         s = &dev->subdevices[3];
2092         s->type = COMEDI_SUBD_DO;
2093         s->subdev_flags = SDF_WRITABLE | SDF_GROUND | SDF_COMMON;
2094         s->n_chan = 4;
2095         s->maxdata = 1;
2096         s->len_chanlist = 4;
2097         s->range_table = &range_digital;
2098         s->insn_bits = pci9118_insn_bits_do;
2099
2100         devpriv->valid = 1;
2101         devpriv->i8254_osc_base = I8254_OSC_BASE_4MHZ;
2102         devpriv->ai_maskharderr = 0x10a;
2103                                         /* default measure crash condition */
2104         if (hw_err_mask)                /* disable some requested */
2105                 devpriv->ai_maskharderr &= ~hw_err_mask;
2106
2107         switch (this_board->ai_maxdata) {
2108         case 0xffff:
2109                 devpriv->ai16bits = 1;
2110                 break;
2111         default:
2112                 devpriv->ai16bits = 0;
2113                 break;
2114         }
2115
2116         pci9118_report_attach(dev, dev->irq);
2117         return 0;
2118 }
2119
2120 static int pci9118_attach(struct comedi_device *dev,
2121                           struct comedi_devconfig *it)
2122 {
2123         struct pci9118_private *devpriv;
2124         struct pci_dev *pcidev;
2125         int ext_mux, disable_irq, master, softsshdelay, hw_err_mask;
2126
2127         ext_mux = it->options[2];
2128         master = ((it->options[3] & 1) == 0);
2129         disable_irq = ((it->options[3] & 2) != 0);
2130         softsshdelay = it->options[4];
2131         hw_err_mask = it->options[5];
2132
2133         devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
2134         if (!devpriv)
2135                 return -ENOMEM;
2136
2137         pcidev = pci9118_find_pci(dev, it);
2138         if (!pcidev)
2139                 return -EIO;
2140         comedi_set_hw_dev(dev, &pcidev->dev);
2141
2142         return pci9118_common_attach(dev, disable_irq, master, ext_mux,
2143                                      softsshdelay, hw_err_mask);
2144 }
2145
2146 static int pci9118_auto_attach(struct comedi_device *dev,
2147                                          unsigned long context_unused)
2148 {
2149         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
2150         struct pci9118_private *devpriv;
2151
2152         devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
2153         if (!devpriv)
2154                 return -ENOMEM;
2155
2156         dev->board_ptr = pci9118_find_boardinfo(pcidev);
2157         if (dev->board_ptr == NULL) {
2158                 dev_err(dev->class_dev,
2159                         "adl_pci9118: cannot determine board type for pci %s\n",
2160                         pci_name(pcidev));
2161                 return -EINVAL;
2162         }
2163         /*
2164          * Need to 'get' the PCI device to match the 'put' in pci9118_detach().
2165          * (The 'put' also matches the implicit 'get' by pci9118_find_pci().)
2166          */
2167         pci_dev_get(pcidev);
2168         /* Don't disable irq, use bus master, no external mux,
2169          * no sample-hold delay, no error mask. */
2170         return pci9118_common_attach(dev, 0, 1, 0, 0, 0);
2171 }
2172
2173 static void pci9118_detach(struct comedi_device *dev)
2174 {
2175         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
2176         struct pci9118_private *devpriv = dev->private;
2177
2178         if (devpriv) {
2179                 if (devpriv->valid)
2180                         pci9118_reset(dev);
2181                 if (dev->irq)
2182                         free_irq(dev->irq, dev);
2183                 if (devpriv->dmabuf_virt[0])
2184                         free_pages((unsigned long)devpriv->dmabuf_virt[0],
2185                                    devpriv->dmabuf_pages[0]);
2186                 if (devpriv->dmabuf_virt[1])
2187                         free_pages((unsigned long)devpriv->dmabuf_virt[1],
2188                                    devpriv->dmabuf_pages[1]);
2189         }
2190         comedi_pci_disable(dev);
2191         if (pcidev)
2192                 pci_dev_put(pcidev);
2193 }
2194
2195 static struct comedi_driver adl_pci9118_driver = {
2196         .driver_name    = "adl_pci9118",
2197         .module         = THIS_MODULE,
2198         .attach         = pci9118_attach,
2199         .auto_attach    = pci9118_auto_attach,
2200         .detach         = pci9118_detach,
2201         .num_names      = ARRAY_SIZE(boardtypes),
2202         .board_name     = &boardtypes[0].name,
2203         .offset         = sizeof(struct boardtype),
2204 };
2205
2206 static int adl_pci9118_pci_probe(struct pci_dev *dev,
2207                                  const struct pci_device_id *id)
2208 {
2209         return comedi_pci_auto_config(dev, &adl_pci9118_driver,
2210                                       id->driver_data);
2211 }
2212
2213 static const struct pci_device_id adl_pci9118_pci_table[] = {
2214         { PCI_DEVICE(PCI_VENDOR_ID_AMCC, 0x80d9) },
2215         { 0 }
2216 };
2217 MODULE_DEVICE_TABLE(pci, adl_pci9118_pci_table);
2218
2219 static struct pci_driver adl_pci9118_pci_driver = {
2220         .name           = "adl_pci9118",
2221         .id_table       = adl_pci9118_pci_table,
2222         .probe          = adl_pci9118_pci_probe,
2223         .remove         = comedi_pci_auto_unconfig,
2224 };
2225 module_comedi_pci_driver(adl_pci9118_driver, adl_pci9118_pci_driver);
2226
2227 MODULE_AUTHOR("Comedi http://www.comedi.org");
2228 MODULE_DESCRIPTION("Comedi low-level driver");
2229 MODULE_LICENSE("GPL");