2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/pci_ids.h>
18 #include <linux/if_ether.h>
19 #include <net/mac80211.h>
20 #include <brcm_hw_ids.h>
22 #include <chipcommon.h>
25 #include "phy/phy_hal.h"
30 #include "mac80211_if.h"
31 #include "ucode_loader.h"
35 * Indication for txflowcontrol that all priority bits in
36 * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
41 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
43 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
45 /* watchdog timer, in unit of ms */
46 #define TIMER_INTERVAL_WATCHDOG 1000
47 /* radio monitor timer, in unit of ms */
48 #define TIMER_INTERVAL_RADIOCHK 800
50 /* Max MPC timeout, in unit of watchdog */
51 #ifndef BRCMS_MPC_MAX_DELAYCNT
52 #define BRCMS_MPC_MAX_DELAYCNT 10
55 /* Min MPC timeout, in unit of watchdog */
56 #define BRCMS_MPC_MIN_DELAYCNT 1
57 #define BRCMS_MPC_THRESHOLD 3 /* MPC count threshold level */
59 /* beacon interval, in unit of 1024TU */
60 #define BEACON_INTERVAL_DEFAULT 100
61 /* DTIM interval, in unit of beacon interval */
62 #define DTIM_INTERVAL_DEFAULT 3
64 /* Scale down delays to accommodate QT slow speed */
65 /* beacon interval, in unit of 1024TU */
66 #define BEACON_INTERVAL_DEF_QT 20
67 /* DTIM interval, in unit of beacon interval */
68 #define DTIM_INTERVAL_DEF_QT 1
70 #define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */
72 /* n-mode support capability */
73 /* 2x2 includes both 1x1 & 2x2 devices
74 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
75 * control it independently
81 /* define 11n feature disable flags */
82 #define WLFEATURE_DISABLE_11N 0x00000001
83 #define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002
84 #define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004
85 #define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008
86 #define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010
87 #define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020
88 #define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040
89 #define WLFEATURE_DISABLE_11N_GF 0x00000080
91 #define EDCF_ACI_MASK 0x60
92 #define EDCF_ACI_SHIFT 5
93 #define EDCF_ECWMIN_MASK 0x0f
94 #define EDCF_ECWMAX_SHIFT 4
95 #define EDCF_AIFSN_MASK 0x0f
96 #define EDCF_AIFSN_MAX 15
97 #define EDCF_ECWMAX_MASK 0xf0
99 #define EDCF_AC_BE_TXOP_STA 0x0000
100 #define EDCF_AC_BK_TXOP_STA 0x0000
101 #define EDCF_AC_VO_ACI_STA 0x62
102 #define EDCF_AC_VO_ECW_STA 0x32
103 #define EDCF_AC_VI_ACI_STA 0x42
104 #define EDCF_AC_VI_ECW_STA 0x43
105 #define EDCF_AC_BK_ECW_STA 0xA4
106 #define EDCF_AC_VI_TXOP_STA 0x005e
107 #define EDCF_AC_VO_TXOP_STA 0x002f
108 #define EDCF_AC_BE_ACI_STA 0x03
109 #define EDCF_AC_BE_ECW_STA 0xA4
110 #define EDCF_AC_BK_ACI_STA 0x27
111 #define EDCF_AC_VO_TXOP_AP 0x002f
113 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
114 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
116 #define APHY_SYMBOL_TIME 4
117 #define APHY_PREAMBLE_TIME 16
118 #define APHY_SIGNAL_TIME 4
119 #define APHY_SIFS_TIME 16
120 #define APHY_SERVICE_NBITS 16
121 #define APHY_TAIL_NBITS 6
122 #define BPHY_SIFS_TIME 10
123 #define BPHY_PLCP_SHORT_TIME 96
125 #define PREN_PREAMBLE 24
126 #define PREN_MM_EXT 12
127 #define PREN_PREAMBLE_EXT 4
129 #define DOT11_MAC_HDR_LEN 24
130 #define DOT11_ACK_LEN 10
131 #define DOT11_BA_LEN 4
132 #define DOT11_OFDM_SIGNAL_EXTENSION 6
133 #define DOT11_MIN_FRAG_LEN 256
134 #define DOT11_RTS_LEN 16
135 #define DOT11_CTS_LEN 10
136 #define DOT11_BA_BITMAP_LEN 128
137 #define DOT11_MIN_BEACON_PERIOD 1
138 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
139 #define DOT11_MAXNUMFRAGS 16
140 #define DOT11_MAX_FRAG_LEN 2346
142 #define BPHY_PLCP_TIME 192
143 #define RIFS_11N_TIME 2
146 #define WME_SUBTYPE_PARAM_IE 1
148 #define WME_OUI "\x00\x50\xf2"
155 #define BCN_TMPL_LEN 512 /* length of the BCN template area */
157 /* brcms_bss_info flag bit values */
158 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
160 /* Flags used in brcms_c_txq_info.stopped */
161 /* per prio flow control bits */
162 #define TXQ_STOP_FOR_PRIOFC_MASK 0x000000FF
163 /* stop txq enqueue for packet drain */
164 #define TXQ_STOP_FOR_PKT_DRAIN 0x00000100
165 /* stop txq enqueue for ampdu flow control */
166 #define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL 0x00000200
168 #define BRCMS_HWRXOFF 38 /* chip rx buffer offset */
170 /* Find basic rate for a given rate */
171 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
173 if (is_mcs_rate(rspec))
174 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
176 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
179 static u16 frametype(u32 rspec, u8 mimoframe)
181 if (is_mcs_rate(rspec))
183 return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
186 /* rfdisable delay timer 500 ms, runs of ALP clock */
187 #define RFDISABLE_DEFAULT 10000000
189 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
191 /* precedences numbers for wlc queues. These are twice as may levels as
193 * Odd numbers are used for HI priority traffic at same precedence levels
194 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
197 #define _BRCMS_PREC_NONE 0 /* None = - */
198 #define _BRCMS_PREC_BK 2 /* BK - Background */
199 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
200 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
201 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
202 #define _BRCMS_PREC_VI 10 /* Vi - Video */
203 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
204 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
206 /* The BSS is generating beacons in HW */
207 #define BRCMS_BSSCFG_HW_BCN 0x20
209 #define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */
210 #define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us */
211 #define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us */
212 #define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */
214 #define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */
216 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */
218 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
219 #define EDCF_SHORT_S 0
221 #define EDCF_LONG_S 8
222 #define EDCF_LFB_S 12
223 #define EDCF_SHORT_M BITFIELD_MASK(4)
224 #define EDCF_SFB_M BITFIELD_MASK(4)
225 #define EDCF_LONG_M BITFIELD_MASK(4)
226 #define EDCF_LFB_M BITFIELD_MASK(4)
228 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
229 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
230 #define RETRY_LONG_DEF 4 /* Default Long retry count */
231 #define RETRY_SHORT_FB 3 /* Short count for fallback rate */
232 #define RETRY_LONG_FB 2 /* Long count for fallback rate */
234 #define APHY_CWMIN 15
235 #define PHY_CWMAX 1023
237 #define EDCF_AIFSN_MIN 1
239 #define FRAGNUM_MASK 0xF
241 #define APHY_SLOT_TIME 9
242 #define BPHY_SLOT_TIME 20
244 #define WL_SPURAVOID_OFF 0
245 #define WL_SPURAVOID_ON1 1
246 #define WL_SPURAVOID_ON2 2
248 /* invalid core flags, use the saved coreflags */
249 #define BRCMS_USE_COREFLAGS 0xffffffff
251 /* values for PLCPHdr_override */
252 #define BRCMS_PLCP_AUTO -1
253 #define BRCMS_PLCP_SHORT 0
254 #define BRCMS_PLCP_LONG 1
256 /* values for g_protection_override and n_protection_override */
257 #define BRCMS_PROTECTION_AUTO -1
258 #define BRCMS_PROTECTION_OFF 0
259 #define BRCMS_PROTECTION_ON 1
260 #define BRCMS_PROTECTION_MMHDR_ONLY 2
261 #define BRCMS_PROTECTION_CTS_ONLY 3
263 /* values for g_protection_control and n_protection_control */
264 #define BRCMS_PROTECTION_CTL_OFF 0
265 #define BRCMS_PROTECTION_CTL_LOCAL 1
266 #define BRCMS_PROTECTION_CTL_OVERLAP 2
268 /* values for n_protection */
269 #define BRCMS_N_PROTECTION_OFF 0
270 #define BRCMS_N_PROTECTION_OPTIONAL 1
271 #define BRCMS_N_PROTECTION_20IN40 2
272 #define BRCMS_N_PROTECTION_MIXEDMODE 3
274 /* values for band specific 40MHz capabilities */
275 #define BRCMS_N_BW_20ALL 0
276 #define BRCMS_N_BW_40ALL 1
277 #define BRCMS_N_BW_20IN2G_40IN5G 2
279 /* bitflags for SGI support (sgi_rx iovar) */
280 #define BRCMS_N_SGI_20 0x01
281 #define BRCMS_N_SGI_40 0x02
283 /* defines used by the nrate iovar */
284 /* MSC in use,indicates b0-6 holds an mcs */
285 #define NRATE_MCS_INUSE 0x00000080
287 #define NRATE_RATE_MASK 0x0000007f
288 /* stf mode mask: siso, cdd, stbc, sdm */
289 #define NRATE_STF_MASK 0x0000ff00
291 #define NRATE_STF_SHIFT 8
292 /* bit indicates override both rate & mode */
293 #define NRATE_OVERRIDE 0x80000000
294 /* bit indicate to override mcs only */
295 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
296 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
297 #define NRATE_SGI_SHIFT 23 /* sgi mode */
298 #define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */
299 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
301 #define NRATE_STF_SISO 0 /* stf mode SISO */
302 #define NRATE_STF_CDD 1 /* stf mode CDD */
303 #define NRATE_STF_STBC 2 /* stf mode STBC */
304 #define NRATE_STF_SDM 3 /* stf mode SDM */
306 #define MAX_DMA_SEGS 4
308 /* Max # of entries in Tx FIFO based on 4kb page size */
310 /* Max # of entries in Rx FIFO based on 4kb page size */
313 /* try to keep this # rbufs posted to the chip */
314 #define NRXBUFPOST 32
316 /* data msg txq hiwat mark */
317 #define BRCMS_DATAHIWAT 50
319 /* bounded rx loops */
320 #define RXBND 8 /* max # frames to process in brcms_c_recv() */
321 #define TXSBND 8 /* max # tx status to process in wlc_txstatus() */
324 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
326 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
329 * The following table lists the buffer memory allocated to xmt fifos in HW.
330 * the size is in units of 256bytes(one block), total size is HW dependent
331 * ucode has default fifo partition, sw can overwrite if necessary
333 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
334 * the twiki is updated before making changes.
337 /* Starting corerev for the fifo size table */
338 #define XMTFIFOTBL_STARTREV 20
346 /* currently the best mechanism for determining SIFS is the band in use */
347 static u16 get_sifs(struct brcms_band *band)
349 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
355 * Detect Card removed.
356 * Even checking an sbconfig register read will not false trigger when the core
357 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
358 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
359 * reg with fixed 0/1 pattern (some platforms return all 0).
360 * If clocks are present, call the sb routine which will figure out if the
363 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
366 return ai_deviceremoved(wlc->hw->sih);
367 return (R_REG(&wlc->hw->regs->maccontrol) &
368 (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
371 /* sum the individual fifo tx pending packet counts */
372 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
374 return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
375 wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
378 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
380 return wlc->pub->_nbands > 1 && !wlc->bandlocked;
383 static int brcms_chspec_bw(u16 chanspec)
385 if (CHSPEC_IS40(chanspec))
387 if (CHSPEC_IS20(chanspec))
393 struct edcf_acparam {
399 const u8 prio2fifo[NUMPRIO] = {
400 TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */
401 TX_AC_BK_FIFO, /* 1 BK AC_BK Background */
402 TX_AC_BK_FIFO, /* 2 -- AC_BK Background */
403 TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */
404 TX_AC_VI_FIFO, /* 4 CL AC_VI Video */
405 TX_AC_VI_FIFO, /* 5 VI AC_VI Video */
406 TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */
407 TX_AC_VO_FIFO /* 7 NC AC_VO Voice */
411 uint brcm_msg_level =
418 /* TX FIFO number to WME/802.1E Access Category */
419 static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE };
421 /* WME/802.1E Access Category to TX FIFO number */
422 static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 };
424 /* 802.1D Priority to precedence queue mapping */
425 const u8 wlc_prio2prec_map[] = {
426 _BRCMS_PREC_BE, /* 0 BE - Best-effort */
427 _BRCMS_PREC_BK, /* 1 BK - Background */
428 _BRCMS_PREC_NONE, /* 2 None = - */
429 _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */
430 _BRCMS_PREC_CL, /* 4 CL - Controlled Load */
431 _BRCMS_PREC_VI, /* 5 Vi - Video */
432 _BRCMS_PREC_VO, /* 6 Vo - Voice */
433 _BRCMS_PREC_NC, /* 7 NC - Network Control */
436 static const u16 xmtfifo_sz[][NFIFO] = {
437 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
438 {20, 192, 192, 21, 17, 5},
439 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
440 {9, 58, 22, 14, 14, 5},
441 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
442 {20, 192, 192, 21, 17, 5},
443 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
444 {20, 192, 192, 21, 17, 5},
445 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
446 {9, 58, 22, 14, 14, 5},
449 static const u8 acbitmap2maxprio[] = {
450 PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK,
451 PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI,
452 PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO,
453 PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO
457 static const char * const fifo_names[] = {
458 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
460 static const char fifo_names[6][0];
464 /* pointer to most recently allocated wl/wlc */
465 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
468 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
473 kfree(cfg->current_bss);
477 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
482 brcms_c_bsscfg_mfree(wlc->bsscfg);
484 kfree(wlc->modulecb);
485 kfree(wlc->default_bss);
486 kfree(wlc->protection);
488 kfree(wlc->bandstate[0]);
489 kfree(wlc->corestate->macstat_snapshot);
490 kfree(wlc->corestate);
491 kfree(wlc->hw->bandstate[0]);
499 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
501 struct brcms_bss_cfg *cfg;
503 cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
507 cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
508 if (cfg->current_bss == NULL)
514 brcms_c_bsscfg_mfree(cfg);
518 static struct brcms_c_info *
519 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
521 struct brcms_c_info *wlc;
523 wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
529 /* allocate struct brcms_c_pub state structure */
530 wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
531 if (wlc->pub == NULL) {
537 /* allocate struct brcms_hardware state structure */
539 wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
540 if (wlc->hw == NULL) {
546 wlc->hw->bandstate[0] =
547 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
548 if (wlc->hw->bandstate[0] == NULL) {
554 for (i = 1; i < MAXBANDS; i++)
555 wlc->hw->bandstate[i] = (struct brcms_hw_band *)
556 ((unsigned long)wlc->hw->bandstate[0] +
557 (sizeof(struct brcms_hw_band) * i));
561 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
562 if (wlc->modulecb == NULL) {
567 wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
568 if (wlc->default_bss == NULL) {
573 wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
574 if (wlc->bsscfg == NULL) {
579 wlc->protection = kzalloc(sizeof(struct brcms_protection),
581 if (wlc->protection == NULL) {
586 wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
587 if (wlc->stf == NULL) {
593 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
594 if (wlc->bandstate[0] == NULL) {
600 for (i = 1; i < MAXBANDS; i++)
601 wlc->bandstate[i] = (struct brcms_band *)
602 ((unsigned long)wlc->bandstate[0]
603 + (sizeof(struct brcms_band)*i));
606 wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
607 if (wlc->corestate == NULL) {
612 wlc->corestate->macstat_snapshot =
613 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
614 if (wlc->corestate->macstat_snapshot == NULL) {
622 brcms_c_detach_mfree(wlc);
627 * Update the slot timing for standard 11b/g (20us slots)
628 * or shortslot 11g (9us slots)
629 * The PSM needs to be suspended for this call.
631 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
634 struct d11regs __iomem *regs;
639 /* 11g short slot: 11a timing */
640 W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */
641 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
643 /* 11g long slot: 11b timing */
644 W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */
645 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
649 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
650 const struct d11init *inits)
658 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
660 base = (u8 __iomem *)wlc_hw->regs;
662 for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
663 size = le16_to_cpu(inits[i].size);
664 addr = base + le16_to_cpu(inits[i].addr);
665 value = le32_to_cpu(inits[i].value);
667 W_REG((u16 __iomem *)addr, value);
669 W_REG((u32 __iomem *)addr, value);
675 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
679 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
683 for (idx = 0; idx < MHFMAX; idx++)
684 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
687 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
689 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
690 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
692 /* init microcode host flags */
693 brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
695 /* do band-specific ucode IHR, SHM, and SCR inits */
696 if (D11REV_IS(wlc_hw->corerev, 23)) {
697 if (BRCMS_ISNPHY(wlc_hw->band))
698 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
700 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
701 " %d\n", __func__, wlc_hw->unit,
704 if (D11REV_IS(wlc_hw->corerev, 24)) {
705 if (BRCMS_ISLCNPHY(wlc_hw->band))
706 brcms_c_write_inits(wlc_hw,
707 ucode->d11lcn0bsinitvals24);
709 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
710 " core rev %d\n", __func__,
711 wlc_hw->unit, wlc_hw->corerev);
713 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
714 __func__, wlc_hw->unit, wlc_hw->corerev);
719 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
721 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
723 wlc_hw->phyclk = clk;
725 if (OFF == clk) { /* clear gmode bit, put phy into reset */
727 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE),
728 (SICF_PRST | SICF_FGC));
730 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST);
733 } else { /* take phy out of reset */
735 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC);
737 ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0);
743 /* switch to new band but leave it inactive */
744 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
746 struct brcms_hardware *wlc_hw = wlc->hw;
749 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
751 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
753 /* disable interrupts */
754 macintmask = brcms_intrsoff(wlc->wl);
757 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
759 brcms_b_core_phy_clk(wlc_hw, OFF);
761 brcms_c_setxband(wlc_hw, bandunit);
766 /* Process received frames */
768 * Return true if more frames need to be processed. false otherwise.
769 * Param 'bound' indicates max. # frames to process before break out.
772 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
775 struct sk_buff *head = NULL;
776 struct sk_buff *tail = NULL;
778 uint bound_limit = bound ? RXBND : -1;
780 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
781 /* gather received frames */
782 while ((p = dma_rx(wlc_hw->di[fifo]))) {
791 /* !give others some time to run! */
792 if (++n >= bound_limit)
796 /* post more rbufs */
797 dma_rxfill(wlc_hw->di[fifo]);
799 /* process each frame */
800 while ((p = head) != NULL) {
801 struct d11rxhdr_le *rxh_le;
802 struct d11rxhdr *rxh;
806 rxh_le = (struct d11rxhdr_le *)p->data;
807 rxh = (struct d11rxhdr *)p->data;
809 /* fixup rx header endianness */
810 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
811 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
812 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
813 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
814 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
815 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
816 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
817 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
818 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
819 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
820 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
822 brcms_c_recv(wlc_hw->wlc, p);
825 return n >= bound_limit;
828 /* process an individual struct tx_status */
830 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
835 struct scb *scb = NULL;
837 int tx_rts, tx_frame_count, tx_rts_count;
838 uint totlen, supr_status;
840 struct ieee80211_hdr *h;
842 struct ieee80211_tx_info *tx_info;
843 struct ieee80211_tx_rate *txrate;
846 /* discard intermediate indications for ucode with one legitimate case:
847 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
848 * but the subsequent tx of DATA failed. so it will start rts/cts
849 * from the beginning (resetting the rts transmission count)
851 if (!(txs->status & TX_STATUS_AMPDU)
852 && (txs->status & TX_STATUS_INTERMEDIATE)) {
853 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
858 queue = txs->frameid & TXFID_QUEUE_MASK;
859 if (queue >= NFIFO) {
864 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
868 txh = (struct d11txh *) (p->data);
869 mcl = le16_to_cpu(txh->MacTxControlLow);
872 if (brcm_msg_level & LOG_ERROR_VAL) {
873 wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
874 txs->phyerr, txh->MainRates);
875 brcms_c_print_txdesc(txh);
877 brcms_c_print_txstatus(txs);
880 if (txs->frameid != le16_to_cpu(txh->TxFrameID))
882 tx_info = IEEE80211_SKB_CB(p);
883 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
885 if (tx_info->control.sta)
888 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
889 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
893 supr_status = txs->status & TX_STATUS_SUPR_MASK;
894 if (supr_status == TX_STATUS_SUPR_BADCH)
896 "%s: Pkt tx suppressed, possibly channel %d\n",
897 __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
899 tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
901 (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
903 (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
905 lastframe = !ieee80211_has_morefrags(h->frame_control);
908 wiphy_err(wlc->wiphy, "Not last frame!\n");
911 * Set information to be consumed by Minstrel ht.
913 * The "fallback limit" is the number of tx attempts a given
914 * MPDU is sent at the "primary" rate. Tx attempts beyond that
915 * limit are sent at the "secondary" rate.
916 * A 'short frame' does not exceed RTS treshold.
918 u16 sfbl, /* Short Frame Rate Fallback Limit */
919 lfbl, /* Long Frame Rate Fallback Limit */
922 if (queue < AC_COUNT) {
923 sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
925 lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
932 txrate = tx_info->status.rates;
933 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
938 ieee80211_tx_info_clear_status(tx_info);
940 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
942 * rate selection requested a fallback rate
945 txrate[0].count = fbl;
946 txrate[1].count = tx_frame_count - fbl;
949 * rate selection did not request fallback rate, or
952 txrate[0].count = tx_frame_count;
954 * rc80211_minstrel.c:minstrel_tx_status() expects
955 * unused rates to be marked with idx = -1
961 /* clear the rest of the rates */
962 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
967 if (txs->status & TX_STATUS_ACK_RCV)
968 tx_info->flags |= IEEE80211_TX_STAT_ACK;
971 totlen = brcmu_pkttotlen(p);
974 brcms_c_txfifo_complete(wlc, queue, 1);
979 /* remove PLCP & Broadcom tx descriptor header */
980 skb_pull(p, D11_PHY_HDR_LEN);
981 skb_pull(p, D11_TXH_LEN);
982 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
984 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
985 "tx_status\n", __func__);
992 brcmu_pkt_buf_free_skb(p);
999 brcms_b_dotxstatus(struct brcms_hardware *wlc_hw, struct tx_status *txs)
1001 /* discard intermediate indications for ucode with one legitimate case:
1002 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
1003 * but the subsequent tx of DATA failed. so it will start rts/cts from
1004 * the beginning (resetting the rts transmission count)
1006 if (!(txs->status & TX_STATUS_AMPDU)
1007 && (txs->status & TX_STATUS_INTERMEDIATE))
1010 return brcms_c_dotxstatus(wlc_hw->wlc, txs);
1013 /* process tx completion events in BMAC
1014 * Return true if more tx status need to be processed. false otherwise.
1017 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
1019 bool morepending = false;
1020 struct brcms_c_info *wlc = wlc_hw->wlc;
1021 struct d11regs __iomem *regs;
1022 struct tx_status txstatus, *txs;
1026 * Param 'max_tx_num' indicates max. # tx status to process before
1029 uint max_tx_num = bound ? TXSBND : -1;
1031 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1034 regs = wlc_hw->regs;
1036 && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) {
1038 if (s1 == 0xffffffff) {
1039 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1040 wlc_hw->unit, __func__);
1044 s2 = R_REG(®s->frmtxstatus2);
1046 txs->status = s1 & TXS_STATUS_MASK;
1047 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1048 txs->sequence = s2 & TXS_SEQ_MASK;
1049 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1050 txs->lasttxtime = 0;
1052 *fatal = brcms_b_dotxstatus(wlc_hw, txs);
1054 /* !give others some time to run! */
1055 if (++n >= max_tx_num)
1062 if (n >= max_tx_num)
1065 if (!pktq_empty(&wlc->pkt_queue->q))
1066 brcms_c_send_q(wlc);
1071 /* second-level interrupt processing
1072 * Return true if another dpc needs to be re-scheduled. false otherwise.
1073 * Param 'bounded' indicates if applicable loops should be bounded.
1075 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
1078 struct brcms_hardware *wlc_hw = wlc->hw;
1079 struct d11regs __iomem *regs = wlc_hw->regs;
1081 struct wiphy *wiphy = wlc->wiphy;
1083 if (brcms_deviceremoved(wlc)) {
1084 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
1086 brcms_down(wlc->wl);
1090 /* grab and clear the saved software intstatus bits */
1091 macintstatus = wlc->macintstatus;
1092 wlc->macintstatus = 0;
1094 BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
1095 wlc_hw->unit, macintstatus);
1097 WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
1100 if (macintstatus & MI_TFS) {
1101 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
1102 wlc->macintstatus |= MI_TFS;
1104 wiphy_err(wiphy, "MI_TFS: fatal\n");
1109 if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
1112 /* ATIM window end */
1113 if (macintstatus & MI_ATIMWINEND) {
1114 BCMMSG(wlc->wiphy, "end of ATIM window\n");
1115 OR_REG(®s->maccommand, wlc->qvalid);
1120 * received data or control frame, MI_DMAINT is
1121 * indication of RX_FIFO interrupt
1123 if (macintstatus & MI_DMAINT)
1124 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
1125 wlc->macintstatus |= MI_DMAINT;
1127 /* noise sample collected */
1128 if (macintstatus & MI_BG_NOISE)
1129 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
1131 if (macintstatus & MI_GP0) {
1132 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
1133 "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
1135 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
1136 __func__, wlc_hw->sih->chip,
1137 wlc_hw->sih->chiprev);
1139 brcms_init(wlc->wl);
1142 /* gptimer timeout */
1143 if (macintstatus & MI_TO)
1144 W_REG(®s->gptimer, 0);
1146 if (macintstatus & MI_RFDISABLE) {
1147 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
1148 " RF Disable Input\n", wlc_hw->unit);
1149 brcms_rfkill_set_hw_state(wlc->wl);
1152 /* send any enq'd tx packets. Just makes sure to jump start tx */
1153 if (!pktq_empty(&wlc->pkt_queue->q))
1154 brcms_c_send_q(wlc);
1156 /* it isn't done and needs to be resched if macintstatus is non-zero */
1157 return wlc->macintstatus != 0;
1160 brcms_init(wlc->wl);
1161 return wlc->macintstatus != 0;
1164 /* set initial host flags value */
1166 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1168 struct brcms_hardware *wlc_hw = wlc->hw;
1170 memset(mhfs, 0, MHFMAX * sizeof(u16));
1172 mhfs[MHF2] |= mhf2_init;
1174 /* prohibit use of slowclock on multifunction boards */
1175 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1176 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1178 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1179 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1180 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1184 static struct dma64regs __iomem *
1185 dmareg(struct brcms_hardware *hw, uint direction, uint fifonum)
1187 if (direction == DMA_TX)
1188 return &(hw->regs->fifo64regs[fifonum].dmaxmt);
1189 return &(hw->regs->fifo64regs[fifonum].dmarcv);
1192 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1197 * ucode host flag 2 needed for pio mode, independent of band and fifo
1200 struct brcms_hardware *wlc_hw = wlc->hw;
1201 uint unit = wlc_hw->unit;
1202 struct wiphy *wiphy = wlc->wiphy;
1204 /* name and offsets for dma_attach */
1205 snprintf(name, sizeof(name), "wl%d", unit);
1207 if (wlc_hw->di[0] == NULL) { /* Init FIFOs */
1208 int dma_attach_err = 0;
1212 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1213 * RX: RX_FIFO (RX data packets)
1215 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih,
1216 (wme ? dmareg(wlc_hw, DMA_TX, 0) :
1217 NULL), dmareg(wlc_hw, DMA_RX, 0),
1218 (wme ? NTXD : 0), NRXD,
1219 RXBUFSZ, -1, NRXBUFPOST,
1220 BRCMS_HWRXOFF, &brcm_msg_level);
1221 dma_attach_err |= (NULL == wlc_hw->di[0]);
1225 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1226 * (legacy) TX_DATA_FIFO (TX data packets)
1229 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
1230 dmareg(wlc_hw, DMA_TX, 1), NULL,
1231 NTXD, 0, 0, -1, 0, 0,
1233 dma_attach_err |= (NULL == wlc_hw->di[1]);
1237 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1240 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
1241 dmareg(wlc_hw, DMA_TX, 2), NULL,
1242 NTXD, 0, 0, -1, 0, 0,
1244 dma_attach_err |= (NULL == wlc_hw->di[2]);
1247 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1248 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1250 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
1251 dmareg(wlc_hw, DMA_TX, 3),
1252 NULL, NTXD, 0, 0, -1,
1253 0, 0, &brcm_msg_level);
1254 dma_attach_err |= (NULL == wlc_hw->di[3]);
1255 /* Cleaner to leave this as if with AP defined */
1257 if (dma_attach_err) {
1258 wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1263 /* get pointer to dma engine tx flow control variable */
1264 for (i = 0; i < NFIFO; i++)
1266 wlc_hw->txavail[i] =
1267 (uint *) dma_getvar(wlc_hw->di[i],
1271 /* initial ucode host flags */
1272 brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1277 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1281 for (j = 0; j < NFIFO; j++) {
1282 if (wlc_hw->di[j]) {
1283 dma_detach(wlc_hw->di[j]);
1284 wlc_hw->di[j] = NULL;
1290 * Initialize brcms_c_info default values ...
1291 * may get overrides later in this function
1292 * BMAC_NOTES, move low out and resolve the dangling ones
1294 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1296 struct brcms_c_info *wlc = wlc_hw->wlc;
1298 /* set default sw macintmask value */
1299 wlc->defmacintmask = DEF_MACINTMASK;
1301 /* various 802.11g modes */
1302 wlc_hw->shortslot = false;
1304 wlc_hw->SFBL = RETRY_SHORT_FB;
1305 wlc_hw->LFBL = RETRY_LONG_FB;
1307 /* default mac retry limits */
1308 wlc_hw->SRL = RETRY_SHORT_DEF;
1309 wlc_hw->LRL = RETRY_LONG_DEF;
1310 wlc_hw->chanspec = ch20mhz_chspec(1);
1313 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1315 /* delay before first read of ucode state */
1318 /* wait until ucode is no longer asleep */
1319 SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1320 DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1323 /* control chip clock to save power, enable dynamic clock or force fast clock */
1324 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1326 if (wlc_hw->sih->cccaps & CC_CAP_PMU) {
1327 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1328 * on backplane, but mac core will still run on ALP(not HT) when
1329 * it enters powersave mode, which means the FCA bit may not be
1330 * set. Should wakeup mac if driver wants it to run on HT.
1334 if (mode == CLK_FAST) {
1335 OR_REG(&wlc_hw->regs->clk_ctl_st,
1342 clk_ctl_st) & CCS_HTAVAIL) == 0),
1343 PMU_MAX_TRANSITION_DLY);
1346 clk_ctl_st) & CCS_HTAVAIL));
1348 if ((wlc_hw->sih->pmurev == 0) &&
1351 clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ)))
1354 clk_ctl_st) & CCS_HTAVAIL)
1356 PMU_MAX_TRANSITION_DLY);
1357 AND_REG(&wlc_hw->regs->clk_ctl_st,
1361 wlc_hw->forcefastclk = (mode == CLK_FAST);
1364 /* old chips w/o PMU, force HT through cc,
1365 * then use FCA to verify mac is running fast clock
1368 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1370 /* check fast clock is available (if core is not in reset) */
1371 if (wlc_hw->forcefastclk && wlc_hw->clk)
1372 WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
1376 * keep the ucode wake bit on if forcefastclk is on since we
1377 * do not want ucode to put us back to slow clock when it dozes
1378 * for PM mode. Code below matches the wake override bit with
1379 * current forcefastclk state. Only setting bit in wake_override
1380 * instead of waking ucode immediately since old code had this
1381 * behavior. Older code set wlc->forcefastclk but only had the
1382 * wake happen if the wakup_ucode work (protected by an up
1383 * check) was executed just below.
1385 if (wlc_hw->forcefastclk)
1386 mboolset(wlc_hw->wake_override,
1387 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1389 mboolclr(wlc_hw->wake_override,
1390 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1394 /* set or clear ucode host flag bits
1395 * it has an optimization for no-change write
1396 * it only writes through shared memory when the core has clock;
1397 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1400 * bands values are: BRCM_BAND_AUTO <--- Current band only
1401 * BRCM_BAND_5G <--- 5G band only
1402 * BRCM_BAND_2G <--- 2G band only
1403 * BRCM_BAND_ALL <--- All bands
1406 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1410 u16 addr[MHFMAX] = {
1411 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1414 struct brcms_hw_band *band;
1416 if ((val & ~mask) || idx >= MHFMAX)
1417 return; /* error condition */
1420 /* Current band only or all bands,
1421 * then set the band to current band
1423 case BRCM_BAND_AUTO:
1425 band = wlc_hw->band;
1428 band = wlc_hw->bandstate[BAND_5G_INDEX];
1431 band = wlc_hw->bandstate[BAND_2G_INDEX];
1434 band = NULL; /* error condition */
1438 save = band->mhfs[idx];
1439 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1441 /* optimization: only write through if changed, and
1442 * changed band is the current band
1444 if (wlc_hw->clk && (band->mhfs[idx] != save)
1445 && (band == wlc_hw->band))
1446 brcms_b_write_shm(wlc_hw, addr[idx],
1447 (u16) band->mhfs[idx]);
1450 if (bands == BRCM_BAND_ALL) {
1451 wlc_hw->bandstate[0]->mhfs[idx] =
1452 (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1453 wlc_hw->bandstate[1]->mhfs[idx] =
1454 (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1458 /* set the maccontrol register to desired reset state and
1459 * initialize the sw cache of the register
1461 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1463 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1464 wlc_hw->maccontrol = 0;
1465 wlc_hw->suspended_fifos = 0;
1466 wlc_hw->wake_override = 0;
1467 wlc_hw->mute_override = 0;
1468 brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1472 * write the software state of maccontrol and
1473 * overrides to the maccontrol register
1475 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1477 u32 maccontrol = wlc_hw->maccontrol;
1479 /* OR in the wake bit if overridden */
1480 if (wlc_hw->wake_override)
1481 maccontrol |= MCTL_WAKE;
1483 /* set AP and INFRA bits for mute if needed */
1484 if (wlc_hw->mute_override) {
1485 maccontrol &= ~(MCTL_AP);
1486 maccontrol |= MCTL_INFRA;
1489 W_REG(&wlc_hw->regs->maccontrol, maccontrol);
1492 /* set or clear maccontrol bits */
1493 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1499 return; /* error condition */
1500 maccontrol = wlc_hw->maccontrol;
1501 new_maccontrol = (maccontrol & ~mask) | val;
1503 /* if the new maccontrol value is the same as the old, nothing to do */
1504 if (new_maccontrol == maccontrol)
1507 /* something changed, cache the new value */
1508 wlc_hw->maccontrol = new_maccontrol;
1510 /* write the new values with overrides applied */
1511 brcms_c_mctrl_write(wlc_hw);
1514 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1517 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1518 mboolset(wlc_hw->wake_override, override_bit);
1522 mboolset(wlc_hw->wake_override, override_bit);
1524 brcms_c_mctrl_write(wlc_hw);
1525 brcms_b_wait_for_wake(wlc_hw);
1528 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1531 mboolclr(wlc_hw->wake_override, override_bit);
1533 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1536 brcms_c_mctrl_write(wlc_hw);
1539 /* When driver needs ucode to stop beaconing, it has to make sure that
1540 * MCTL_AP is clear and MCTL_INFRA is set
1541 * Mode MCTL_AP MCTL_INFRA
1543 * STA 0 1 <--- This will ensure no beacons
1546 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1548 wlc_hw->mute_override = 1;
1550 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1551 * override, then there is no change to write
1553 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1556 brcms_c_mctrl_write(wlc_hw);
1559 /* Clear the override on AP and INFRA bits */
1560 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1562 if (wlc_hw->mute_override == 0)
1565 wlc_hw->mute_override = 0;
1567 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1568 * override, then there is no change to write
1570 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1573 brcms_c_mctrl_write(wlc_hw);
1577 * Write a MAC address to the given match reg offset in the RXE match engine.
1580 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1583 struct d11regs __iomem *regs;
1588 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1591 regs = wlc_hw->regs;
1592 mac_l = addr[0] | (addr[1] << 8);
1593 mac_m = addr[2] | (addr[3] << 8);
1594 mac_h = addr[4] | (addr[5] << 8);
1596 /* enter the MAC addr into the RXE match registers */
1597 W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset);
1598 W_REG(®s->rcm_mat_data, mac_l);
1599 W_REG(®s->rcm_mat_data, mac_m);
1600 W_REG(®s->rcm_mat_data, mac_h);
1605 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1608 struct d11regs __iomem *regs;
1613 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1615 regs = wlc_hw->regs;
1616 W_REG(®s->tplatewrptr, offset);
1618 /* if MCTL_BIGEND bit set in mac control register,
1619 * the chip swaps data in fifo, as well as data in
1622 be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0;
1625 memcpy(&word, buf, sizeof(u32));
1628 word_be = cpu_to_be32(word);
1629 word = *(u32 *)&word_be;
1631 word_le = cpu_to_le32(word);
1632 word = *(u32 *)&word_le;
1635 W_REG(®s->tplatewrdata, word);
1637 buf = (u8 *) buf + sizeof(u32);
1642 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1644 wlc_hw->band->CWmin = newmin;
1646 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1647 (void)R_REG(&wlc_hw->regs->objaddr);
1648 W_REG(&wlc_hw->regs->objdata, newmin);
1651 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1653 wlc_hw->band->CWmax = newmax;
1655 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1656 (void)R_REG(&wlc_hw->regs->objaddr);
1657 W_REG(&wlc_hw->regs->objdata, newmax);
1660 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1664 /* request FAST clock if not on */
1665 fastclk = wlc_hw->forcefastclk;
1667 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1669 wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1671 brcms_b_phy_reset(wlc_hw);
1672 wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1674 /* restore the clk */
1676 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1679 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1682 struct brcms_c_info *wlc = wlc_hw->wlc;
1683 /* update SYNTHPU_DLY */
1685 if (BRCMS_ISLCNPHY(wlc->band))
1686 v = SYNTHPU_DLY_LPPHY_US;
1687 else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1688 v = SYNTHPU_DLY_NPHY_US;
1690 v = SYNTHPU_DLY_BPHY_US;
1692 brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1695 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1698 u16 phytxant = wlc_hw->bmac_phytxant;
1699 u16 mask = PHY_TXC_ANT_MASK;
1701 /* set the Probe Response frame phy control word */
1702 phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1703 phyctl = (phyctl & ~mask) | phytxant;
1704 brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1706 /* set the Response (ACK/CTS) frame phy control word */
1707 phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1708 phyctl = (phyctl & ~mask) | phytxant;
1709 brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1712 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1717 struct plcp_signal_rate_lookup {
1721 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1722 const struct plcp_signal_rate_lookup rate_lookup[] = {
1723 {BRCM_RATE_6M, 0xB},
1724 {BRCM_RATE_9M, 0xF},
1725 {BRCM_RATE_12M, 0xA},
1726 {BRCM_RATE_18M, 0xE},
1727 {BRCM_RATE_24M, 0x9},
1728 {BRCM_RATE_36M, 0xD},
1729 {BRCM_RATE_48M, 0x8},
1730 {BRCM_RATE_54M, 0xC}
1733 for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1734 if (rate == rate_lookup[i].rate) {
1735 plcp_rate = rate_lookup[i].signal_rate;
1740 /* Find the SHM pointer to the rate table entry by looking in the
1743 return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1746 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1750 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1751 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1757 if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1760 /* walk the phy rate table and update the entries */
1761 for (i = 0; i < ARRAY_SIZE(rates); i++) {
1764 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1766 /* read the SHM Rate Table entry OFDM PCTL1 values */
1768 brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1770 /* modify the value */
1771 pctl1 &= ~PHY_TXC1_MODE_MASK;
1772 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1774 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1775 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1780 /* band-specific init */
1781 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1783 struct brcms_hardware *wlc_hw = wlc->hw;
1785 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1786 wlc_hw->band->bandunit);
1788 brcms_c_ucode_bsinit(wlc_hw);
1790 wlc_phy_init(wlc_hw->band->pi, chanspec);
1792 brcms_c_ucode_txant_set(wlc_hw);
1795 * cwmin is band-specific, update hardware
1796 * with value for current band
1798 brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1799 brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1801 brcms_b_update_slot_timing(wlc_hw,
1802 wlc_hw->band->bandtype == BRCM_BAND_5G ?
1803 true : wlc_hw->shortslot);
1805 /* write phytype and phyvers */
1806 brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1807 brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1810 * initialize the txphyctl1 rate table since
1811 * shmem is shared between bands
1813 brcms_upd_ofdm_pctl1_table(wlc_hw);
1815 brcms_b_upd_synthpu(wlc_hw);
1818 /* Perform a soft reset of the PHY PLL */
1819 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1821 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1823 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1824 offsetof(struct chipcregs, chipcontrol_addr), ~0, 0);
1826 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1827 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1829 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1830 offsetof(struct chipcregs, chipcontrol_data), 0x4, 4);
1832 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1833 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1837 /* light way to turn on phy clock without reset for NPHY only
1838 * refer to brcms_b_core_phy_clk for full version
1840 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1842 /* support(necessary for NPHY and HYPHY) only */
1843 if (!BRCMS_ISNPHY(wlc_hw->band))
1847 ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC);
1849 ai_core_cflags(wlc_hw->sih, SICF_FGC, 0);
1853 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1856 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
1858 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
1861 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1863 struct brcms_phy_pub *pih = wlc_hw->band->pi;
1865 bool phy_in_reset = false;
1867 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1872 phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1874 /* Specific reset sequence required for NPHY rev 3 and 4 */
1875 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1876 NREV_LE(wlc_hw->band->phyrev, 4)) {
1877 /* Set the PHY bandwidth */
1878 ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits);
1882 /* Perform a soft reset of the PHY PLL */
1883 brcms_b_core_phypll_reset(wlc_hw);
1886 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
1887 (SICF_PRST | SICF_PCLKE));
1888 phy_in_reset = true;
1890 ai_core_cflags(wlc_hw->sih,
1891 (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1892 (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1896 brcms_b_core_phy_clk(wlc_hw, ON);
1899 wlc_phy_anacore(pih, ON);
1902 /* switch to and initialize new band */
1903 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1905 struct brcms_c_info *wlc = wlc_hw->wlc;
1908 /* Enable the d11 core before accessing it */
1909 if (!ai_iscoreup(wlc_hw->sih)) {
1910 ai_core_reset(wlc_hw->sih, 0, 0);
1911 brcms_c_mctrl_reset(wlc_hw);
1914 macintmask = brcms_c_setband_inact(wlc, bandunit);
1919 brcms_b_core_phy_clk(wlc_hw, ON);
1921 /* band-specific initializations */
1922 brcms_b_bsinit(wlc, chanspec);
1925 * If there are any pending software interrupt bits,
1926 * then replace these with a harmless nonzero value
1927 * so brcms_c_dpc() will re-enable interrupts when done.
1929 if (wlc->macintstatus)
1930 wlc->macintstatus = MI_DMAINT;
1932 /* restore macintmask */
1933 brcms_intrsrestore(wlc->wl, macintmask);
1935 /* ucode should still be suspended.. */
1936 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
1939 /* low-level band switch utility routine */
1940 void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
1942 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1945 wlc_hw->band = wlc_hw->bandstate[bandunit];
1949 * until we eliminate need for wlc->band refs in low level code
1951 wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
1953 /* set gmode core flag */
1954 if (wlc_hw->sbclk && !wlc_hw->noreset)
1955 ai_core_cflags(wlc_hw->sih, SICF_GMODE,
1956 ((bandunit == 0) ? SICF_GMODE : 0));
1959 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1962 /* reject unsupported corerev */
1963 if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1964 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1972 /* Validate some board info parameters */
1973 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1975 uint boardrev = wlc_hw->boardrev;
1977 /* 4 bits each for board type, major, minor, and tiny version */
1978 uint brt = (boardrev & 0xf000) >> 12;
1979 uint b0 = (boardrev & 0xf00) >> 8;
1980 uint b1 = (boardrev & 0xf0) >> 4;
1981 uint b2 = boardrev & 0xf;
1983 /* voards from other vendors are always considered valid */
1984 if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM)
1987 /* do some boardrev sanity checks when boardvendor is Broadcom */
1991 if (boardrev <= 0xff)
1994 if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
2001 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
2003 const char *varname = "macaddr";
2006 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
2007 macaddr = getvar(wlc_hw->vars, varname);
2008 if (macaddr != NULL)
2011 if (wlc_hw->_nbands > 1)
2012 varname = "et1macaddr";
2014 varname = "il0macaddr";
2016 macaddr = getvar(wlc_hw->vars, varname);
2017 if (macaddr == NULL)
2018 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
2019 "getvar(%s) not found\n", wlc_hw->unit, varname);
2024 /* power both the pll and external oscillator on/off */
2025 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
2027 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
2030 * dont power down if plldown is false or
2031 * we must poll hw radio disable
2033 if (!want && wlc_hw->pllreq)
2037 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
2039 wlc_hw->sbclk = want;
2040 if (!wlc_hw->sbclk) {
2041 wlc_hw->clk = false;
2042 if (wlc_hw->band && wlc_hw->band->pi)
2043 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2048 * Return true if radio is disabled, otherwise false.
2049 * hw radio disable signal is an external pin, users activate it asynchronously
2050 * this function could be called when driver is down and w/o clock
2051 * it operates on different registers depending on corerev and boardflag.
2053 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
2056 u32 resetbits = 0, flags = 0;
2058 xtal = wlc_hw->sbclk;
2060 brcms_b_xtal(wlc_hw, ON);
2062 /* may need to take core out of reset first */
2066 * mac no longer enables phyclk automatically when driver
2067 * accesses phyreg throughput mac. This can be skipped since
2068 * only mac reg is accessed below
2070 flags |= SICF_PCLKE;
2073 * AI chip doesn't restore bar0win2 on
2074 * hibernation/resume, need sw fixup
2076 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2077 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
2078 wlc_hw->regs = (struct d11regs __iomem *)
2079 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
2080 ai_core_reset(wlc_hw->sih, flags, resetbits);
2081 brcms_c_mctrl_reset(wlc_hw);
2084 v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0);
2086 /* put core back into reset */
2088 ai_core_disable(wlc_hw->sih, 0);
2091 brcms_b_xtal(wlc_hw, OFF);
2096 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
2098 struct dma_pub *di = wlc_hw->di[fifo];
2099 return dma_rxreset(di);
2103 * ensure fask clock during reset
2105 * reset d11(out of reset)
2106 * reset phy(out of reset)
2107 * clear software macintstatus for fresh new start
2108 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
2110 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
2112 struct d11regs __iomem *regs;
2117 if (flags == BRCMS_USE_COREFLAGS)
2118 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2120 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2122 regs = wlc_hw->regs;
2124 /* request FAST clock if not on */
2125 fastclk = wlc_hw->forcefastclk;
2127 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2129 /* reset the dma engines except first time thru */
2130 if (ai_iscoreup(wlc_hw->sih)) {
2131 for (i = 0; i < NFIFO; i++)
2132 if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2133 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2134 "dma_txreset[%d]: cannot stop dma\n",
2135 wlc_hw->unit, __func__, i);
2137 if ((wlc_hw->di[RX_FIFO])
2138 && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2139 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2140 "[%d]: cannot stop dma\n",
2141 wlc_hw->unit, __func__, RX_FIFO);
2143 /* if noreset, just stop the psm and return */
2144 if (wlc_hw->noreset) {
2145 wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */
2146 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2151 * mac no longer enables phyclk automatically when driver accesses
2152 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2153 * band->pi is invalid. need to enable PHY CLK
2155 flags |= SICF_PCLKE;
2159 * In chips with PMU, the fastclk request goes through d11 core
2160 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2162 * This adds some delay and we can optimize it by also requesting
2163 * fastclk through chipcommon during this period if necessary. But
2164 * that has to work coordinate with other driver like mips/arm since
2165 * they may touch chipcommon as well.
2167 wlc_hw->clk = false;
2168 ai_core_reset(wlc_hw->sih, flags, resetbits);
2170 if (wlc_hw->band && wlc_hw->band->pi)
2171 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2173 brcms_c_mctrl_reset(wlc_hw);
2175 if (wlc_hw->sih->cccaps & CC_CAP_PMU)
2176 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2178 brcms_b_phy_reset(wlc_hw);
2180 /* turn on PHY_PLL */
2181 brcms_b_core_phypll_ctl(wlc_hw, true);
2183 /* clear sw intstatus */
2184 wlc_hw->wlc->macintstatus = 0;
2186 /* restore the clk setting */
2188 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2191 /* txfifo sizes needs to be modified(increased) since the newer cores
2194 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2196 struct d11regs __iomem *regs = wlc_hw->regs;
2198 u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2199 u16 txfifo_def, txfifo_def1;
2202 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2203 txfifo_startblk = TXFIFO_START_BLK;
2205 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2206 for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2208 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2209 txfifo_def = (txfifo_startblk & 0xff) |
2210 (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2211 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2213 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2215 TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2217 W_REG(®s->xmtfifocmd, txfifo_cmd);
2218 W_REG(®s->xmtfifodef, txfifo_def);
2219 W_REG(®s->xmtfifodef1, txfifo_def1);
2221 W_REG(®s->xmtfifocmd, txfifo_cmd);
2223 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2226 * need to propagate to shm location to be in sync since ucode/hw won't
2229 brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2230 wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2231 brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2232 wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2233 brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2234 ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2235 xmtfifo_sz[TX_AC_BK_FIFO]));
2236 brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2237 ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2238 xmtfifo_sz[TX_BCMC_FIFO]));
2241 /* This function is used for changing the tsf frac register
2242 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2243 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2244 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2245 * HTPHY Formula is 2^26/freq(MHz) e.g.
2246 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2247 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2248 * For spuron: 123MHz -> 2^26/123 = 545600.5
2249 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2250 * For spur off: 120MHz -> 2^26/120 = 559240.5
2251 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2254 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2256 struct d11regs __iomem *regs = wlc_hw->regs;
2258 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2259 (wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
2260 if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */
2261 W_REG(®s->tsf_clk_frac_l, 0x2082);
2262 W_REG(®s->tsf_clk_frac_h, 0x8);
2263 } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */
2264 W_REG(®s->tsf_clk_frac_l, 0x5341);
2265 W_REG(®s->tsf_clk_frac_h, 0x8);
2266 } else { /* 120Mhz */
2267 W_REG(®s->tsf_clk_frac_l, 0x8889);
2268 W_REG(®s->tsf_clk_frac_h, 0x8);
2270 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2271 if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */
2272 W_REG(®s->tsf_clk_frac_l, 0x7CE0);
2273 W_REG(®s->tsf_clk_frac_h, 0xC);
2274 } else { /* 80Mhz */
2275 W_REG(®s->tsf_clk_frac_l, 0xCCCD);
2276 W_REG(®s->tsf_clk_frac_h, 0xC);
2281 /* Initialize GPIOs that are controlled by D11 core */
2282 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2284 struct brcms_hardware *wlc_hw = wlc->hw;
2285 struct d11regs __iomem *regs;
2288 regs = wlc_hw->regs;
2290 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2291 brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2294 * Common GPIO setup:
2295 * G0 = LED 0 = WLAN Activity
2296 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2297 * G2 = LED 2 = WLAN 5 GHz Radio State
2298 * G4 = radio disable input (HI enabled, LO disabled)
2303 /* Allocate GPIOs for mimo antenna diversity feature */
2304 if (wlc_hw->antsel_type == ANTSEL_2x3) {
2305 /* Enable antenna diversity, use 2x3 mode */
2306 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2307 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2308 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2309 MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2311 /* init superswitch control */
2312 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2314 } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2315 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2317 * The board itself is powered by these GPIOs
2318 * (when not sending pattern) so set them high
2320 OR_REG(®s->psm_gpio_oe,
2321 (BOARD_GPIO_12 | BOARD_GPIO_13));
2322 OR_REG(®s->psm_gpio_out,
2323 (BOARD_GPIO_12 | BOARD_GPIO_13));
2325 /* Enable antenna diversity, use 2x4 mode */
2326 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2327 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2328 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2331 /* Configure the desired clock to be 4Mhz */
2332 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2333 ANTSEL_CLKDIV_4MHZ);
2337 * gpio 9 controls the PA. ucode is responsible
2338 * for wiggling out and oe
2340 if (wlc_hw->boardflags & BFL_PACTRL)
2341 gm |= gc |= BOARD_GPIO_PACTRL;
2343 /* apply to gpiocontrol register */
2344 ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2347 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2348 const __le32 ucode[], const size_t nbytes)
2350 struct d11regs __iomem *regs = wlc_hw->regs;
2354 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2356 count = (nbytes / sizeof(u32));
2358 W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
2359 (void)R_REG(®s->objaddr);
2360 for (i = 0; i < count; i++)
2361 W_REG(®s->objdata, le32_to_cpu(ucode[i]));
2365 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2367 struct brcms_c_info *wlc;
2368 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2372 if (wlc_hw->ucode_loaded)
2375 if (D11REV_IS(wlc_hw->corerev, 23)) {
2376 if (BRCMS_ISNPHY(wlc_hw->band)) {
2377 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2378 ucode->bcm43xx_16_mimosz);
2379 wlc_hw->ucode_loaded = true;
2381 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2383 __func__, wlc_hw->unit, wlc_hw->corerev);
2384 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2385 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2386 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2387 ucode->bcm43xx_24_lcnsz);
2388 wlc_hw->ucode_loaded = true;
2390 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2392 __func__, wlc_hw->unit, wlc_hw->corerev);
2397 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2399 /* update sw state */
2400 wlc_hw->bmac_phytxant = phytxant;
2402 /* push to ucode if up */
2405 brcms_c_ucode_txant_set(wlc_hw);
2409 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2411 return (u16) wlc_hw->wlc->stf->txant;
2414 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2416 wlc_hw->antsel_type = antsel_type;
2418 /* Update the antsel type for phy module to use */
2419 wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2422 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2426 uint intstatus, idx;
2427 struct d11regs __iomem *regs = wlc_hw->regs;
2428 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2430 unit = wlc_hw->unit;
2432 for (idx = 0; idx < NFIFO; idx++) {
2433 /* read intstatus register and ignore any non-error bits */
2435 R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS;
2439 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2440 unit, idx, intstatus);
2442 if (intstatus & I_RO) {
2443 wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2444 "overflow\n", unit, idx);
2448 if (intstatus & I_PC) {
2449 wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2454 if (intstatus & I_PD) {
2455 wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2460 if (intstatus & I_DE) {
2461 wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2462 "error\n", unit, idx);
2466 if (intstatus & I_RU)
2467 wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2468 "underflow\n", idx, unit);
2470 if (intstatus & I_XU) {
2471 wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2472 "underflow\n", idx, unit);
2477 brcms_c_fatal_error(wlc_hw->wlc); /* big hammer */
2480 W_REG(®s->intctrlregs[idx].intstatus,
2485 void brcms_c_intrson(struct brcms_c_info *wlc)
2487 struct brcms_hardware *wlc_hw = wlc->hw;
2488 wlc->macintmask = wlc->defmacintmask;
2489 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2493 * callback for siutils.c, which has only wlc handler, no wl they both check
2494 * up, not only because there is no need to off/restore d11 interrupt but also
2495 * because per-port code may require sync with valid interrupt.
2497 static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc)
2502 return brcms_intrsoff(wlc->wl);
2505 static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2510 brcms_intrsrestore(wlc->wl, macintmask);
2513 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2515 struct brcms_hardware *wlc_hw = wlc->hw;
2521 macintmask = wlc->macintmask; /* isr can still happen */
2523 W_REG(&wlc_hw->regs->macintmask, 0);
2524 (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */
2525 udelay(1); /* ensure int line is no longer driven */
2526 wlc->macintmask = 0;
2528 /* return previous macintmask; resolve race between us and our isr */
2529 return wlc->macintstatus ? 0 : macintmask;
2532 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2534 struct brcms_hardware *wlc_hw = wlc->hw;
2538 wlc->macintmask = macintmask;
2539 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2542 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2545 u8 fifo = 1 << tx_fifo;
2547 /* Two clients of this code, 11h Quiet period and scanning. */
2549 /* only suspend if not already suspended */
2550 if ((wlc_hw->suspended_fifos & fifo) == fifo)
2553 /* force the core awake only if not already */
2554 if (wlc_hw->suspended_fifos == 0)
2555 brcms_c_ucode_wake_override_set(wlc_hw,
2556 BRCMS_WAKE_OVERRIDE_TXFIFO);
2558 wlc_hw->suspended_fifos |= fifo;
2560 if (wlc_hw->di[tx_fifo]) {
2562 * Suspending AMPDU transmissions in the middle can cause
2563 * underflow which may result in mismatch between ucode and
2564 * driver so suspend the mac before suspending the FIFO
2566 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2567 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2569 dma_txsuspend(wlc_hw->di[tx_fifo]);
2571 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2572 brcms_c_enable_mac(wlc_hw->wlc);
2576 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2579 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2580 * but need to be done here for PIO otherwise the watchdog will catch
2581 * the inconsistency and fire
2583 /* Two clients of this code, 11h Quiet period and scanning. */
2584 if (wlc_hw->di[tx_fifo])
2585 dma_txresume(wlc_hw->di[tx_fifo]);
2587 /* allow core to sleep again */
2588 if (wlc_hw->suspended_fifos == 0)
2591 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2592 if (wlc_hw->suspended_fifos == 0)
2593 brcms_c_ucode_wake_override_clear(wlc_hw,
2594 BRCMS_WAKE_OVERRIDE_TXFIFO);
2598 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags)
2600 const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2603 /* suspend tx fifos */
2604 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2605 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2606 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2607 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2609 /* zero the address match register so we do not send ACKs */
2610 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2613 /* resume tx fifos */
2614 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2615 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2616 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2617 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2619 /* Restore address */
2620 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2624 wlc_phy_mute_upd(wlc_hw->band->pi, on, flags);
2627 brcms_c_ucode_mute_override_set(wlc_hw);
2629 brcms_c_ucode_mute_override_clear(wlc_hw);
2633 * Read and clear macintmask and macintstatus and intstatus registers.
2634 * This routine should be called with interrupts off
2636 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2637 * 0 if the interrupt is not for us, or we are in some special cases;
2638 * device interrupt status bits otherwise.
2640 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2642 struct brcms_hardware *wlc_hw = wlc->hw;
2643 struct d11regs __iomem *regs = wlc_hw->regs;
2646 /* macintstatus includes a DMA interrupt summary bit */
2647 macintstatus = R_REG(®s->macintstatus);
2649 BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2652 /* detect cardbus removed, in power down(suspend) and in reset */
2653 if (brcms_deviceremoved(wlc))
2656 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2657 * handle that case here.
2659 if (macintstatus == 0xffffffff)
2662 /* defer unsolicited interrupts */
2663 macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2666 if (macintstatus == 0)
2669 /* interrupts are already turned off for CFE build
2670 * Caution: For CFE Turning off the interrupts again has some undesired
2673 /* turn off the interrupts */
2674 W_REG(®s->macintmask, 0);
2675 (void)R_REG(®s->macintmask); /* sync readback */
2676 wlc->macintmask = 0;
2678 /* clear device interrupts */
2679 W_REG(®s->macintstatus, macintstatus);
2681 /* MI_DMAINT is indication of non-zero intstatus */
2682 if (macintstatus & MI_DMAINT)
2684 * only fifo interrupt enabled is I_RI in
2685 * RX_FIFO. If MI_DMAINT is set, assume it
2686 * is set and clear the interrupt.
2688 W_REG(®s->intctrlregs[RX_FIFO].intstatus,
2691 return macintstatus;
2694 /* Update wlc->macintstatus and wlc->intstatus[]. */
2695 /* Return true if they are updated successfully. false otherwise */
2696 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2700 /* read and clear macintstatus and intstatus registers */
2701 macintstatus = wlc_intstatus(wlc, false);
2703 /* device is removed */
2704 if (macintstatus == 0xffffffff)
2707 /* update interrupt status in software */
2708 wlc->macintstatus |= macintstatus;
2714 * First-level interrupt processing.
2715 * Return true if this was our interrupt, false otherwise.
2716 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2719 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2721 struct brcms_hardware *wlc_hw = wlc->hw;
2726 if (!wlc_hw->up || !wlc->macintmask)
2729 /* read and clear macintstatus and intstatus registers */
2730 macintstatus = wlc_intstatus(wlc, true);
2732 if (macintstatus == 0xffffffff)
2733 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2736 /* it is not for us */
2737 if (macintstatus == 0)
2742 /* save interrupt status bits */
2743 wlc->macintstatus = macintstatus;
2749 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2751 struct brcms_hardware *wlc_hw = wlc->hw;
2752 struct d11regs __iomem *regs = wlc_hw->regs;
2754 struct wiphy *wiphy = wlc->wiphy;
2756 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2757 wlc_hw->band->bandunit);
2760 * Track overlapping suspend requests
2762 wlc_hw->mac_suspend_depth++;
2763 if (wlc_hw->mac_suspend_depth > 1)
2766 /* force the core awake */
2767 brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2769 mc = R_REG(®s->maccontrol);
2771 if (mc == 0xffffffff) {
2772 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2774 brcms_down(wlc->wl);
2777 WARN_ON(mc & MCTL_PSM_JMP_0);
2778 WARN_ON(!(mc & MCTL_PSM_RUN));
2779 WARN_ON(!(mc & MCTL_EN_MAC));
2781 mi = R_REG(®s->macintstatus);
2782 if (mi == 0xffffffff) {
2783 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2785 brcms_down(wlc->wl);
2788 WARN_ON(mi & MI_MACSSPNDD);
2790 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2792 SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD),
2793 BRCMS_MAX_MAC_SUSPEND);
2795 if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) {
2796 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2797 " and MI_MACSSPNDD is still not on.\n",
2798 wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2799 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2800 "psm_brc 0x%04x\n", wlc_hw->unit,
2801 R_REG(®s->psmdebug),
2802 R_REG(®s->phydebug),
2803 R_REG(®s->psm_brc));
2806 mc = R_REG(®s->maccontrol);
2807 if (mc == 0xffffffff) {
2808 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2810 brcms_down(wlc->wl);
2813 WARN_ON(mc & MCTL_PSM_JMP_0);
2814 WARN_ON(!(mc & MCTL_PSM_RUN));
2815 WARN_ON(mc & MCTL_EN_MAC);
2818 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2820 struct brcms_hardware *wlc_hw = wlc->hw;
2821 struct d11regs __iomem *regs = wlc_hw->regs;
2824 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2825 wlc->band->bandunit);
2828 * Track overlapping suspend requests
2830 wlc_hw->mac_suspend_depth--;
2831 if (wlc_hw->mac_suspend_depth > 0)
2834 mc = R_REG(®s->maccontrol);
2835 WARN_ON(mc & MCTL_PSM_JMP_0);
2836 WARN_ON(mc & MCTL_EN_MAC);
2837 WARN_ON(!(mc & MCTL_PSM_RUN));
2839 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2840 W_REG(®s->macintstatus, MI_MACSSPNDD);
2842 mc = R_REG(®s->maccontrol);
2843 WARN_ON(mc & MCTL_PSM_JMP_0);
2844 WARN_ON(!(mc & MCTL_EN_MAC));
2845 WARN_ON(!(mc & MCTL_PSM_RUN));
2847 mi = R_REG(®s->macintstatus);
2848 WARN_ON(mi & MI_MACSSPNDD);
2850 brcms_c_ucode_wake_override_clear(wlc_hw,
2851 BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2854 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2856 wlc_hw->hw_stf_ss_opmode = stf_mode;
2859 brcms_upd_ofdm_pctl1_table(wlc_hw);
2862 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2864 struct d11regs __iomem *regs;
2866 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2868 BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2870 regs = wlc_hw->regs;
2872 /* Validate dchip register access */
2874 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2875 (void)R_REG(®s->objaddr);
2876 w = R_REG(®s->objdata);
2878 /* Can we write and read back a 32bit register? */
2879 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2880 (void)R_REG(®s->objaddr);
2881 W_REG(®s->objdata, (u32) 0xaa5555aa);
2883 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2884 (void)R_REG(®s->objaddr);
2885 val = R_REG(®s->objdata);
2886 if (val != (u32) 0xaa5555aa) {
2887 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2888 "expected 0xaa5555aa\n", wlc_hw->unit, val);
2892 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2893 (void)R_REG(®s->objaddr);
2894 W_REG(®s->objdata, (u32) 0x55aaaa55);
2896 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2897 (void)R_REG(®s->objaddr);
2898 val = R_REG(®s->objdata);
2899 if (val != (u32) 0x55aaaa55) {
2900 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2901 "expected 0x55aaaa55\n", wlc_hw->unit, val);
2905 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2906 (void)R_REG(®s->objaddr);
2907 W_REG(®s->objdata, w);
2909 /* clear CFPStart */
2910 W_REG(®s->tsf_cfpstart, 0);
2912 w = R_REG(®s->maccontrol);
2913 if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2914 (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2915 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2916 "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2917 (MCTL_IHR_EN | MCTL_WAKE),
2918 (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2925 #define PHYPLL_WAIT_US 100000
2927 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2929 struct d11regs __iomem *regs;
2932 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2935 regs = wlc_hw->regs;
2938 if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
2939 OR_REG(®s->clk_ctl_st,
2940 (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL |
2941 CCS_ERSRC_REQ_PHYPLL));
2942 SPINWAIT((R_REG(®s->clk_ctl_st) &
2943 (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT),
2946 tmp = R_REG(®s->clk_ctl_st);
2947 if ((tmp & (CCS_ERSRC_AVAIL_HT)) !=
2948 (CCS_ERSRC_AVAIL_HT))
2949 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2950 " PLL failed\n", __func__);
2952 OR_REG(®s->clk_ctl_st,
2953 (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL));
2954 SPINWAIT((R_REG(®s->clk_ctl_st) &
2955 (CCS_ERSRC_AVAIL_D11PLL |
2956 CCS_ERSRC_AVAIL_PHYPLL)) !=
2957 (CCS_ERSRC_AVAIL_D11PLL |
2958 CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2960 tmp = R_REG(®s->clk_ctl_st);
2962 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2964 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2965 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2966 "PHY PLL failed\n", __func__);
2970 * Since the PLL may be shared, other cores can still
2971 * be requesting it; so we'll deassert the request but
2972 * not wait for status to comply.
2974 AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL);
2975 tmp = R_REG(®s->clk_ctl_st);
2979 void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2983 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2985 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2990 if (wlc_hw->noreset)
2994 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2996 /* turn off analog core */
2997 wlc_phy_anacore(wlc_hw->band->pi, OFF);
2999 /* turn off PHYPLL to save power */
3000 brcms_b_core_phypll_ctl(wlc_hw, false);
3002 wlc_hw->clk = false;
3003 ai_core_disable(wlc_hw->sih, 0);
3004 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
3007 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
3009 struct brcms_hardware *wlc_hw = wlc->hw;
3012 /* free any posted tx packets */
3013 for (i = 0; i < NFIFO; i++)
3014 if (wlc_hw->di[i]) {
3015 dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
3016 wlc->core->txpktpend[i] = 0;
3017 BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
3020 /* free any posted rx packets */
3021 dma_rxreclaim(wlc_hw->di[RX_FIFO]);
3025 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
3027 struct d11regs __iomem *regs = wlc_hw->regs;
3028 u16 __iomem *objdata_lo = (u16 __iomem *)®s->objdata;
3029 u16 __iomem *objdata_hi = objdata_lo + 1;
3032 W_REG(®s->objaddr, sel | (offset >> 2));
3033 (void)R_REG(®s->objaddr);
3035 v = R_REG(objdata_hi);
3037 v = R_REG(objdata_lo);
3043 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
3046 struct d11regs __iomem *regs = wlc_hw->regs;
3047 u16 __iomem *objdata_lo = (u16 __iomem *)®s->objdata;
3048 u16 __iomem *objdata_hi = objdata_lo + 1;
3050 W_REG(®s->objaddr, sel | (offset >> 2));
3051 (void)R_REG(®s->objaddr);
3053 W_REG(objdata_hi, v);
3055 W_REG(objdata_lo, v);
3059 * Read a single u16 from shared memory.
3060 * SHM 'offset' needs to be an even address
3062 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
3064 return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
3068 * Write a single u16 to shared memory.
3069 * SHM 'offset' needs to be an even address
3071 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
3073 brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
3077 * Copy a buffer to shared memory of specified type .
3078 * SHM 'offset' needs to be an even address and
3079 * Buffer length 'len' must be an even number of bytes
3080 * 'sel' selects the type of memory
3083 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
3084 const void *buf, int len, u32 sel)
3087 const u8 *p = (const u8 *)buf;
3090 if (len <= 0 || (offset & 1) || (len & 1))
3093 for (i = 0; i < len; i += 2) {
3094 v = p[i] | (p[i + 1] << 8);
3095 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
3100 * Copy a piece of shared memory of specified type to a buffer .
3101 * SHM 'offset' needs to be an even address and
3102 * Buffer length 'len' must be an even number of bytes
3103 * 'sel' selects the type of memory
3106 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
3113 if (len <= 0 || (offset & 1) || (len & 1))
3116 for (i = 0; i < len; i += 2) {
3117 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
3119 p[i + 1] = (v >> 8) & 0xFF;
3123 static void brcms_b_copyfrom_vars(struct brcms_hardware *wlc_hw, char **buf,
3126 BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n",
3129 *buf = wlc_hw->vars;
3130 *len = wlc_hw->vars_size;
3133 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
3139 /* write retry limit to SCR, shouldn't need to suspend */
3141 W_REG(&wlc_hw->regs->objaddr,
3142 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3143 (void)R_REG(&wlc_hw->regs->objaddr);
3144 W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL);
3145 W_REG(&wlc_hw->regs->objaddr,
3146 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3147 (void)R_REG(&wlc_hw->regs->objaddr);
3148 W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL);
3152 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3155 if (mboolisset(wlc_hw->pllreq, req_bit))
3158 mboolset(wlc_hw->pllreq, req_bit);
3160 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3162 brcms_b_xtal(wlc_hw, ON);
3165 if (!mboolisset(wlc_hw->pllreq, req_bit))
3168 mboolclr(wlc_hw->pllreq, req_bit);
3170 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3172 brcms_b_xtal(wlc_hw, OFF);
3177 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3179 wlc_hw->antsel_avail = antsel_avail;
3183 * conditions under which the PM bit should be set in outgoing frames
3184 * and STAY_AWAKE is meaningful
3186 bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3188 struct brcms_bss_cfg *cfg = wlc->bsscfg;
3190 /* disallow PS when one of the following global conditions meets */
3191 if (!wlc->pub->associated)
3194 /* disallow PS when one of these meets when not scanning */
3198 if (cfg->associated) {
3200 * disallow PS when one of the following
3201 * bsscfg specific conditions meets
3212 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3214 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3216 /* reset the core */
3217 if (!brcms_deviceremoved(wlc_hw->wlc))
3218 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3220 /* purge the dma rings */
3221 brcms_c_flushqueues(wlc_hw->wlc);
3224 void brcms_c_reset(struct brcms_c_info *wlc)
3226 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3228 /* slurp up hw mac counters before core reset */
3229 brcms_c_statsupd(wlc);
3231 /* reset our snapshot of macstat counters */
3232 memset((char *)wlc->core->macstat_snapshot, 0,
3233 sizeof(struct macstat));
3235 brcms_b_reset(wlc->hw);
3238 void brcms_c_fatal_error(struct brcms_c_info *wlc)
3240 wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n",
3242 brcms_init(wlc->wl);
3245 /* Return the channel the driver should initialize during brcms_c_init.
3246 * the channel may have to be changed from the currently configured channel
3247 * if other configurations are in conflict (bandlocked, 11n mode disabled,
3248 * invalid channel for current country, etc.)
3250 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3253 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3254 WL_CHANSPEC_BAND_2G;
3259 void brcms_c_init_scb(struct scb *scb)
3263 memset(scb, 0, sizeof(struct scb));
3264 scb->flags = SCB_WMECAP | SCB_HTCAP;
3265 for (i = 0; i < NUMPRIO; i++) {
3267 scb->seqctl[i] = 0xFFFF;
3270 scb->seqctl_nonqos = 0xFFFF;
3271 scb->magic = SCB_MAGIC;
3276 * download ucode/PCM
3277 * let ucode run to suspended
3278 * download ucode inits
3279 * config other core registers
3282 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3284 struct brcms_hardware *wlc_hw = wlc->hw;
3285 struct d11regs __iomem *regs;
3289 bool fifosz_fixup = false;
3292 struct wiphy *wiphy = wlc->wiphy;
3293 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3295 regs = wlc_hw->regs;
3297 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3300 brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3302 brcms_ucode_download(wlc_hw);
3304 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3306 fifosz_fixup = true;
3308 /* let the PSM run to the suspended state, set mode to BSS STA */
3309 W_REG(®s->macintstatus, -1);
3310 brcms_b_mctrl(wlc_hw, ~0,
3311 (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3313 /* wait for ucode to self-suspend after auto-init */
3314 SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0),
3316 if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0)
3317 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3318 "suspend!\n", wlc_hw->unit);
3320 brcms_c_gpio_init(wlc);
3322 sflags = ai_core_sflags(wlc_hw->sih, 0, 0);
3324 if (D11REV_IS(wlc_hw->corerev, 23)) {
3325 if (BRCMS_ISNPHY(wlc_hw->band))
3326 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3328 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3329 " %d\n", __func__, wlc_hw->unit,
3331 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3332 if (BRCMS_ISLCNPHY(wlc_hw->band))
3333 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3335 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3336 " %d\n", __func__, wlc_hw->unit,
3339 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3340 __func__, wlc_hw->unit, wlc_hw->corerev);
3343 /* For old ucode, txfifo sizes needs to be modified(increased) */
3344 if (fifosz_fixup == true)
3345 brcms_b_corerev_fifofixup(wlc_hw);
3347 /* check txfifo allocations match between ucode and driver */
3348 buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3349 if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3353 buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3354 if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3358 buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3359 buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3360 buf[TX_AC_BK_FIFO] &= 0xff;
3361 if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3365 if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3369 buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3370 buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3371 buf[TX_BCMC_FIFO] &= 0xff;
3372 if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3376 if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3381 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3382 " driver size %d index %d\n", buf[i],
3383 wlc_hw->xmtfifo_sz[i], i);
3385 /* make sure we can still talk to the mac */
3386 WARN_ON(R_REG(®s->maccontrol) == 0xffffffff);
3388 /* band-specific inits done by wlc_bsinit() */
3390 /* Set up frame burst size and antenna swap threshold init values */
3391 brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3392 brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3394 /* enable one rx interrupt per received frame */
3395 W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT));
3397 /* set the station mode (BSS STA) */
3398 brcms_b_mctrl(wlc_hw,
3399 (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3400 (MCTL_INFRA | MCTL_DISCARD_PMQ));
3402 /* set up Beacon interval */
3403 bcnint_us = 0x8000 << 10;
3404 W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT));
3405 W_REG(®s->tsf_cfpstart, bcnint_us);
3406 W_REG(®s->macintstatus, MI_GP1);
3408 /* write interrupt mask */
3409 W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK);
3411 /* allow the MAC to control the PHY clock (dynamic on/off) */
3412 brcms_b_macphyclk_set(wlc_hw, ON);
3414 /* program dynamic clock control fast powerup delay register */
3415 wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3416 W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly);
3418 /* tell the ucode the corerev */
3419 brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3421 /* tell the ucode MAC capabilities */
3422 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3423 (u16) (wlc_hw->machwcap & 0xffff));
3424 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3426 machwcap >> 16) & 0xffff));
3428 /* write retry limits to SCR, this done after PSM init */
3429 W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3430 (void)R_REG(®s->objaddr);
3431 W_REG(®s->objdata, wlc_hw->SRL);
3432 W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3433 (void)R_REG(®s->objaddr);
3434 W_REG(®s->objdata, wlc_hw->LRL);
3436 /* write rate fallback retry limits */
3437 brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3438 brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3440 AND_REG(®s->ifs_ctl, 0x0FFF);
3441 W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN);
3443 /* init the tx dma engines */
3444 for (i = 0; i < NFIFO; i++) {
3446 dma_txinit(wlc_hw->di[i]);
3449 /* init the rx dma engine(s) and post receive buffers */
3450 dma_rxinit(wlc_hw->di[RX_FIFO]);
3451 dma_rxfill(wlc_hw->di[RX_FIFO]);
3455 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec,
3459 struct brcms_c_info *wlc = wlc_hw->wlc;
3461 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3463 /* request FAST clock if not on */
3464 fastclk = wlc_hw->forcefastclk;
3466 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3468 /* disable interrupts */
3469 macintmask = brcms_intrsoff(wlc->wl);
3471 /* set up the specified band and chanspec */
3472 brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3473 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3475 /* do one-time phy inits and calibration */
3476 wlc_phy_cal_init(wlc_hw->band->pi);
3478 /* core-specific initialization */
3479 brcms_b_coreinit(wlc);
3481 /* suspend the tx fifos and mute the phy for preism cac time */
3483 brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM);
3485 /* band-specific inits */
3486 brcms_b_bsinit(wlc, chanspec);
3488 /* restore macintmask */
3489 brcms_intrsrestore(wlc->wl, macintmask);
3491 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3492 * is suspended and brcms_c_enable_mac() will clear this override bit.
3494 mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3497 * initialize mac_suspend_depth to 1 to match ucode
3498 * initial suspended state
3500 wlc_hw->mac_suspend_depth = 1;
3502 /* restore the clk */
3504 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3507 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3510 /* Save our copy of the chanspec */
3511 wlc->chanspec = chanspec;
3513 /* Set the chanspec and power limits for this locale */
3514 brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3516 if (wlc->stf->ss_algosel_auto)
3517 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3520 brcms_c_stf_ss_update(wlc, wlc->band);
3524 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3527 struct brcms_c_rateset default_rateset;
3529 uint i, band_order[2];
3531 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3533 * We might have been bandlocked during down and the chip
3534 * power-cycled (hibernate). Figure out the right band to park on
3536 if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3537 /* updated in brcms_c_bandlock() */
3538 parkband = wlc->band->bandunit;
3539 band_order[0] = band_order[1] = parkband;
3541 /* park on the band of the specified chanspec */
3542 parkband = chspec_bandunit(chanspec);
3544 /* order so that parkband initialize last */
3545 band_order[0] = parkband ^ 1;
3546 band_order[1] = parkband;
3549 /* make each band operational, software state init */
3550 for (i = 0; i < wlc->pub->_nbands; i++) {
3551 uint j = band_order[i];
3553 wlc->band = wlc->bandstate[j];
3555 brcms_default_rateset(wlc, &default_rateset);
3557 /* fill in hw_rate */
3558 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3559 false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3560 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3562 /* init basic rate lookup */
3563 brcms_c_rate_lookup_init(wlc, &default_rateset);
3566 /* sync up phy/radio chanspec */
3567 brcms_c_set_phy_chanspec(wlc, chanspec);
3571 * ucode, hwmac update
3572 * Channel dependent updates for ucode and hw
3574 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3576 /* enable or disable any active IBSSs depending on whether or not
3577 * we are on the home channel
3579 if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3580 if (wlc->pub->associated) {
3582 * BMAC_NOTE: This is something that should be fixed
3583 * in ucode inits. I think that the ucode inits set
3584 * up the bcn templates and shm values with a bogus
3585 * beacon. This should not be done in the inits. If
3586 * ucode needs to set up a beacon for testing, the
3587 * test routines should write it down, not expect the
3588 * inits to populate a bogus beacon.
3590 if (BRCMS_PHY_11N_CAP(wlc->band))
3591 brcms_b_write_shm(wlc->hw,
3592 M_BCN_TXTSF_OFFSET, 0);
3595 /* disable an active IBSS if we are not on the home channel */
3598 /* update the various promisc bits */
3599 brcms_c_mac_bcn_promisc(wlc);
3600 brcms_c_mac_promisc(wlc);
3603 /* band-specific init */
3604 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3606 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3607 wlc->pub->unit, wlc->band->bandunit);
3609 /* write ucode ACK/CTS rate table */
3610 brcms_c_set_ratetable(wlc);
3612 /* update some band specific mac configuration */
3613 brcms_c_ucode_mac_upd(wlc);
3615 /* init antenna selection */
3616 brcms_c_antsel_init(wlc->asi);
3620 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3622 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3625 int idle_busy_ratio_x_16 = 0;
3627 isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3628 M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3629 if (duty_cycle > 100 || duty_cycle < 0) {
3630 wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n",
3635 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3636 /* Only write to shared memory when wl is up */
3638 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3641 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3643 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3649 * Initialize the base precedence map for dequeueing
3650 * from txq based on WME settings
3652 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3654 wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3655 memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3657 wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3658 wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3659 wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3660 wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3664 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3665 struct brcms_txq_info *qi, bool on, int prio)
3667 /* transmit flowcontrol is not yet implemented */
3670 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3672 struct brcms_txq_info *qi;
3674 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3676 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3682 void brcms_c_init(struct brcms_c_info *wlc)
3684 struct d11regs __iomem *regs;
3688 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3693 * This will happen if a big-hammer was executed. In
3694 * that case, we want to go back to the channel that
3695 * we were on and not new channel
3697 if (wlc->pub->associated)
3698 chanspec = wlc->home_chanspec;
3700 chanspec = brcms_c_init_chanspec(wlc);
3702 brcms_b_init(wlc->hw, chanspec, mute);
3704 /* update beacon listen interval */
3705 brcms_c_bcn_li_upd(wlc);
3707 /* write ethernet address to core */
3708 brcms_c_set_mac(wlc->bsscfg);
3709 brcms_c_set_bssid(wlc->bsscfg);
3711 /* Update tsf_cfprep if associated and up */
3712 if (wlc->pub->associated && wlc->bsscfg->up) {
3715 /* get beacon period and convert to uS */
3716 bi = wlc->bsscfg->current_bss->beacon_period << 10;
3718 * update since init path would reset
3721 W_REG(®s->tsf_cfprep,
3722 (bi << CFPREP_CBI_SHIFT));
3724 /* Update maccontrol PM related bits */
3725 brcms_c_set_ps_ctrl(wlc);
3728 brcms_c_bandinit_ordered(wlc, chanspec);
3730 /* init probe response timeout */
3731 brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
3733 /* init max burst txop (framebursting) */
3734 brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
3736 _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
3738 /* initialize maximum allowed duty cycle */
3739 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
3740 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
3743 * Update some shared memory locations related to
3744 * max AMPDU size allowed to received
3746 brcms_c_ampdu_shm_upd(wlc->ampdu);
3748 /* band-specific inits */
3749 brcms_c_bsinit(wlc);
3751 /* Enable EDCF mode (while the MAC is suspended) */
3752 OR_REG(®s->ifs_ctl, IFS_USEEDCF);
3753 brcms_c_edcf_setparams(wlc, false);
3755 /* Init precedence maps for empty FIFOs */
3756 brcms_c_tx_prec_map_init(wlc);
3758 /* read the ucode version if we have not yet done so */
3759 if (wlc->ucode_rev == 0) {
3761 brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
3762 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
3765 /* ..now really unleash hell (allow the MAC out of suspend) */
3766 brcms_c_enable_mac(wlc);
3768 /* clear tx flow control */
3769 brcms_c_txflowcontrol_reset(wlc);
3771 /* enable the RF Disable Delay timer */
3772 W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT);
3774 /* initialize mpc delay */
3775 wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
3778 * Initialize WME parameters; if they haven't been set by some other
3779 * mechanism (IOVar, etc) then read them from the hardware.
3781 if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
3782 /* Uninitialized; read from HW */
3785 for (ac = 0; ac < AC_COUNT; ac++)
3786 wlc->wme_retries[ac] =
3787 brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
3791 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc)
3793 wlc->bcnmisc_monitor = promisc;
3794 brcms_c_mac_bcn_promisc(wlc);
3797 void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc)
3799 if (wlc->bcnmisc_monitor)
3800 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC);
3802 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, 0);
3805 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3806 void brcms_c_mac_promisc(struct brcms_c_info *wlc)
3808 u32 promisc_bits = 0;
3811 * promiscuous mode just sets MCTL_PROMISC
3812 * Note: APs get all BSS traffic without the need to set
3813 * the MCTL_PROMISC bit since all BSS data traffic is
3814 * directed at the AP
3816 if (wlc->pub->promisc)
3817 promisc_bits |= MCTL_PROMISC;
3819 /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3820 * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3821 * handled in brcms_c_mac_bcn_promisc()
3824 promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL;
3826 brcms_b_mctrl(wlc->hw, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits);
3829 /* push sw hps and wake state through hardware */
3830 void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3836 hps = brcms_c_ps_allowed(wlc);
3838 BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3840 v1 = R_REG(&wlc->regs->maccontrol);
3845 brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3847 awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3850 brcms_b_wait_for_wake(wlc->hw);
3855 * Write this BSS config's MAC address to core.
3856 * Updates RXE match engine.
3858 int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3861 struct brcms_c_info *wlc = bsscfg->wlc;
3863 /* enter the MAC addr into the RXE match registers */
3864 brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3866 brcms_c_ampdu_macaddr_upd(wlc);
3871 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3872 * Updates RXE match engine.
3874 void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3876 /* we need to update BSSID in RXE match registers */
3877 brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3880 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3882 wlc_hw->shortslot = shortslot;
3884 if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3885 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3886 brcms_b_update_slot_timing(wlc_hw, shortslot);
3887 brcms_c_enable_mac(wlc_hw->wlc);
3892 * Suspend the the MAC and update the slot timing
3893 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3895 void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3897 /* use the override if it is set */
3898 if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3899 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3901 if (wlc->shortslot == shortslot)
3904 wlc->shortslot = shortslot;
3906 brcms_b_set_shortslot(wlc->hw, shortslot);
3909 void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3911 if (wlc->home_chanspec != chanspec) {
3912 wlc->home_chanspec = chanspec;
3914 if (wlc->bsscfg->associated)
3915 wlc->bsscfg->current_bss->chanspec = chanspec;
3920 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3921 bool mute, struct txpwr_limits *txpwr)
3925 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3927 wlc_hw->chanspec = chanspec;
3929 /* Switch bands if necessary */
3930 if (wlc_hw->_nbands > 1) {
3931 bandunit = chspec_bandunit(chanspec);
3932 if (wlc_hw->band->bandunit != bandunit) {
3933 /* brcms_b_setband disables other bandunit,
3934 * use light band switch if not up yet
3937 wlc_phy_chanspec_radio_set(wlc_hw->
3938 bandstate[bandunit]->
3940 brcms_b_setband(wlc_hw, bandunit, chanspec);
3942 brcms_c_setxband(wlc_hw, bandunit);
3947 wlc_phy_initcal_enable(wlc_hw->band->pi, !mute);
3951 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3953 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3955 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3956 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3958 /* Update muting of the channel */
3959 brcms_b_mute(wlc_hw, mute, 0);
3963 /* switch to and initialize new band */
3964 static void brcms_c_setband(struct brcms_c_info *wlc,
3967 wlc->band = wlc->bandstate[bandunit];
3972 /* wait for at least one beacon before entering sleeping state */
3973 brcms_c_set_ps_ctrl(wlc);
3975 /* band-specific initializations */
3976 brcms_c_bsinit(wlc);
3979 void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3982 bool switchband = false;
3983 u16 old_chanspec = wlc->chanspec;
3985 if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3986 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3987 wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3991 /* Switch bands if necessary */
3992 if (wlc->pub->_nbands > 1) {
3993 bandunit = chspec_bandunit(chanspec);
3994 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3996 if (wlc->bandlocked) {
3997 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3998 "band is locked!\n",
3999 wlc->pub->unit, __func__,
4000 CHSPEC_CHANNEL(chanspec));
4004 * should the setband call come after the
4005 * brcms_b_chanspec() ? if the setband updates
4006 * (brcms_c_bsinit) use low level calls to inspect and
4007 * set state, the state inspected may be from the wrong
4008 * band, or the following brcms_b_set_chanspec() may
4011 brcms_c_setband(wlc, bandunit);
4015 /* sync up phy/radio chanspec */
4016 brcms_c_set_phy_chanspec(wlc, chanspec);
4018 /* init antenna selection */
4019 if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
4020 brcms_c_antsel_init(wlc->asi);
4022 /* Fix the hardware rateset based on bw.
4023 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4025 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
4026 wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
4029 /* update some mac configuration since chanspec changed */
4030 brcms_c_ucode_mac_upd(wlc);
4033 u32 brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc,
4034 struct brcms_c_rateset *rs)
4036 u32 lowest_basic_rspec;
4039 /* Use the lowest basic rate */
4040 lowest_basic_rspec = rs->rates[0] & BRCMS_RATE_MASK;
4041 for (i = 0; i < rs->count; i++) {
4042 if (rs->rates[i] & BRCMS_RATE_FLAG) {
4043 lowest_basic_rspec = rs->rates[i] & BRCMS_RATE_MASK;
4049 * pick siso/cdd as default for OFDM (note no basic
4050 * rate MCSs are supported yet)
4052 if (is_ofdm_rate(lowest_basic_rspec))
4053 lowest_basic_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
4055 return lowest_basic_rspec;
4059 * This function changes the phytxctl for beacon based on current
4060 * beacon ratespec AND txant setting as per this table:
4061 * ratespec CCK ant = wlc->stf->txant
4064 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4068 u16 phytxant = wlc->stf->phytxant;
4069 u16 mask = PHY_TXC_ANT_MASK;
4071 /* for non-siso rates or default setting, use the available chains */
4072 if (BRCMS_PHY_11N_CAP(wlc->band))
4073 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4075 phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4076 phyctl = (phyctl & ~mask) | phytxant;
4077 brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4081 * centralized protection config change function to simplify debugging, no
4082 * consistency checking this should be called only on changes to avoid overhead
4083 * in periodic function
4085 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4087 BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4090 case BRCMS_PROT_G_SPEC:
4091 wlc->protection->_g = (bool) val;
4093 case BRCMS_PROT_G_OVR:
4094 wlc->protection->g_override = (s8) val;
4096 case BRCMS_PROT_G_USER:
4097 wlc->protection->gmode_user = (u8) val;
4099 case BRCMS_PROT_OVERLAP:
4100 wlc->protection->overlap = (s8) val;
4102 case BRCMS_PROT_N_USER:
4103 wlc->protection->nmode_user = (s8) val;
4105 case BRCMS_PROT_N_CFG:
4106 wlc->protection->n_cfg = (s8) val;
4108 case BRCMS_PROT_N_CFG_OVR:
4109 wlc->protection->n_cfg_override = (s8) val;
4111 case BRCMS_PROT_N_NONGF:
4112 wlc->protection->nongf = (bool) val;
4114 case BRCMS_PROT_N_NONGF_OVR:
4115 wlc->protection->nongf_override = (s8) val;
4117 case BRCMS_PROT_N_PAM_OVR:
4118 wlc->protection->n_pam_override = (s8) val;
4120 case BRCMS_PROT_N_OBSS:
4121 wlc->protection->n_obss = (bool) val;
4130 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4133 brcms_c_update_beacon(wlc);
4134 brcms_c_update_probe_resp(wlc, true);
4138 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4140 wlc->stf->ldpc = val;
4143 brcms_c_update_beacon(wlc);
4144 brcms_c_update_probe_resp(wlc, true);
4145 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4149 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4150 const struct ieee80211_tx_queue_params *params,
4154 struct shm_acparams acp_shm;
4157 /* Only apply params if the core is out of reset and has clocks */
4159 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4164 memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4165 /* fill in shm ac params struct */
4166 acp_shm.txop = params->txop;
4167 /* convert from units of 32us to us for ucode */
4168 wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4169 EDCF_TXOP2USEC(acp_shm.txop);
4170 acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4172 if (aci == AC_VI && acp_shm.txop == 0
4173 && acp_shm.aifs < EDCF_AIFSN_MAX)
4176 if (acp_shm.aifs < EDCF_AIFSN_MIN
4177 || acp_shm.aifs > EDCF_AIFSN_MAX) {
4178 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4179 "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4181 acp_shm.cwmin = params->cw_min;
4182 acp_shm.cwmax = params->cw_max;
4183 acp_shm.cwcur = acp_shm.cwmin;
4185 R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur;
4186 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4187 /* Indicate the new params to the ucode */
4188 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4191 M_EDCF_STATUS_OFF));
4192 acp_shm.status |= WME_STATUS_NEWAC;
4194 /* Fill in shm acparam table */
4195 shm_entry = (u16 *) &acp_shm;
4196 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4197 brcms_b_write_shm(wlc->hw,
4199 wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4204 brcms_c_suspend_mac_and_wait(wlc);
4207 brcms_c_enable_mac(wlc);
4211 void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4215 struct ieee80211_tx_queue_params txq_pars;
4216 static const struct edcf_acparam default_edcf_acparams[] = {
4217 {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4218 {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4219 {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4220 {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4221 }; /* ucode needs these parameters during its initialization */
4222 const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4224 for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
4225 /* find out which ac this set of params applies to */
4226 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4228 /* fill in shm ac params struct */
4229 txq_pars.txop = edcf_acp->TXOP;
4230 txq_pars.aifs = edcf_acp->ACI;
4232 /* CWmin = 2^(ECWmin) - 1 */
4233 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4234 /* CWmax = 2^(ECWmax) - 1 */
4235 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4236 >> EDCF_ECWMAX_SHIFT);
4237 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4241 brcms_c_suspend_mac_and_wait(wlc);
4244 brcms_c_enable_mac(wlc);
4248 /* maintain LED behavior in down state */
4249 static void brcms_c_down_led_upd(struct brcms_c_info *wlc)
4252 * maintain LEDs while in down state, turn on sbclk if
4253 * not available yet. Turn on sbclk if necessary
4255 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_FLIP);
4256 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_FLIP);
4259 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4261 /* Don't start the timer if HWRADIO feature is disabled */
4262 if (wlc->radio_monitor)
4265 wlc->radio_monitor = true;
4266 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4267 brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK,
4271 void brcms_c_radio_disable(struct brcms_c_info *wlc)
4273 if (!wlc->pub->up) {
4274 brcms_c_down_led_upd(wlc);
4278 brcms_c_radio_monitor_start(wlc);
4279 brcms_down(wlc->wl);
4282 static void brcms_c_radio_enable(struct brcms_c_info *wlc)
4287 if (brcms_deviceremoved(wlc))
4293 bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4295 if (!wlc->radio_monitor)
4298 wlc->radio_monitor = false;
4299 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4300 return brcms_del_timer(wlc->wl, wlc->radio_timer);
4303 /* read hwdisable state and propagate to wlc flag */
4304 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4306 if (wlc->pub->hw_off)
4309 if (brcms_b_radio_read_hwdisabled(wlc->hw))
4310 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4312 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4316 * centralized radio disable/enable function,
4317 * invoke radio enable/disable after updating hwradio status
4319 static void brcms_c_radio_upd(struct brcms_c_info *wlc)
4321 if (wlc->pub->radio_disabled)
4322 brcms_c_radio_disable(wlc);
4324 brcms_c_radio_enable(wlc);
4327 /* update hwradio status and return it */
4328 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4330 brcms_c_radio_hwdisable_upd(wlc);
4332 return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4336 /* periodical query hw radio button while driver is "down" */
4337 static void brcms_c_radio_timer(void *arg)
4339 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4341 if (brcms_deviceremoved(wlc)) {
4342 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4344 brcms_down(wlc->wl);
4348 /* cap mpc off count */
4349 if (wlc->mpc_offcnt < BRCMS_MPC_MAX_DELAYCNT)
4352 brcms_c_radio_hwdisable_upd(wlc);
4353 brcms_c_radio_upd(wlc);
4356 /* common low-level watchdog code */
4357 static void brcms_b_watchdog(void *arg)
4359 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4360 struct brcms_hardware *wlc_hw = wlc->hw;
4362 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4367 /* increment second count */
4370 /* Check for FIFO error interrupts */
4371 brcms_b_fifoerrors(wlc_hw);
4373 /* make sure RX dma has buffers */
4374 dma_rxfill(wlc->hw->di[RX_FIFO]);
4376 wlc_phy_watchdog(wlc_hw->band->pi);
4379 /* common watchdog code */
4380 static void brcms_c_watchdog(void *arg)
4382 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4384 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4389 if (brcms_deviceremoved(wlc)) {
4390 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4392 brcms_down(wlc->wl);
4396 /* increment second count */
4399 /* delay radio disable */
4400 if (wlc->mpc_delay_off) {
4401 if (--wlc->mpc_delay_off == 0) {
4402 mboolset(wlc->pub->radio_disabled,
4403 WL_RADIO_MPC_DISABLE);
4404 if (wlc->mpc && brcms_c_ismpc(wlc))
4405 wlc->mpc_offcnt = 0;
4410 brcms_c_radio_mpc_upd(wlc);
4411 /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */
4412 brcms_c_radio_hwdisable_upd(wlc);
4413 brcms_c_radio_upd(wlc);
4414 /* if radio is disable, driver may be down, quit here */
4415 if (wlc->pub->radio_disabled)
4418 brcms_b_watchdog(wlc);
4421 * occasionally sample mac stat counters to
4422 * detect 16-bit counter wrap
4424 if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4425 brcms_c_statsupd(wlc);
4427 if (BRCMS_ISNPHY(wlc->band) &&
4428 ((wlc->pub->now - wlc->tempsense_lasttime) >=
4429 BRCMS_TEMPSENSE_PERIOD)) {
4430 wlc->tempsense_lasttime = wlc->pub->now;
4431 brcms_c_tempsense_upd(wlc);
4435 static void brcms_c_watchdog_by_timer(void *arg)
4437 brcms_c_watchdog(arg);
4440 bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4442 wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4444 if (!wlc->wdtimer) {
4445 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
4450 wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4452 if (!wlc->radio_timer) {
4453 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
4465 * Initialize brcms_c_info default values ...
4466 * may get overrides later in this function
4468 void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4472 /* Save our copy of the chanspec */
4473 wlc->chanspec = ch20mhz_chspec(1);
4475 /* various 802.11g modes */
4476 wlc->shortslot = false;
4477 wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4479 brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4480 brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4482 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4483 BRCMS_PROTECTION_AUTO);
4484 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4485 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4486 BRCMS_PROTECTION_AUTO);
4487 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4488 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4490 brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4491 BRCMS_PROTECTION_CTL_OVERLAP);
4493 /* 802.11g draft 4.0 NonERP elt advertisement */
4494 wlc->include_legacy_erp = true;
4496 wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4497 wlc->stf->txant = ANT_TX_DEF;
4499 wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4501 wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4502 for (i = 0; i < NFIFO; i++)
4503 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4504 wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4506 /* default rate fallback retry limits */
4507 wlc->SFBL = RETRY_SHORT_FB;
4508 wlc->LFBL = RETRY_LONG_FB;
4510 /* default mac retry limits */
4511 wlc->SRL = RETRY_SHORT_DEF;
4512 wlc->LRL = RETRY_LONG_DEF;
4514 /* WME QoS mode is Auto by default */
4515 wlc->pub->_ampdu = AMPDU_AGG_HOST;
4516 wlc->pub->bcmerror = 0;
4518 /* initialize mpc delay */
4519 wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
4522 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4526 unit = wlc->pub->unit;
4528 wlc->asi = brcms_c_antsel_attach(wlc);
4529 if (wlc->asi == NULL) {
4530 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4536 wlc->ampdu = brcms_c_ampdu_attach(wlc);
4537 if (wlc->ampdu == NULL) {
4538 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4544 if ((brcms_c_stf_attach(wlc) != 0)) {
4545 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4554 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4560 * run backplane attach, init nvram
4562 * initialize software state for each core and band
4563 * put the whole chip in reset(driver down state), no clock
4565 static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
4566 uint unit, bool piomode, void __iomem *regsva,
4567 struct pci_dev *btparam)
4569 struct brcms_hardware *wlc_hw;
4570 struct d11regs __iomem *regs;
4571 char *macaddr = NULL;
4576 struct shared_phy_params sha_params;
4577 struct wiphy *wiphy = wlc->wiphy;
4581 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor,
4588 wlc_hw->unit = unit;
4589 wlc_hw->band = wlc_hw->bandstate[0];
4590 wlc_hw->_piomode = piomode;
4592 /* populate struct brcms_hardware with default values */
4593 brcms_b_info_init(wlc_hw);
4596 * Do the hardware portion of the attach. Also initialize software
4597 * state that depends on the particular hardware we are running.
4599 wlc_hw->sih = ai_attach(regsva, btparam,
4600 &wlc_hw->vars, &wlc_hw->vars_size);
4601 if (wlc_hw->sih == NULL) {
4602 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4607 vars = wlc_hw->vars;
4610 * Get vendid/devid nvram overwrites, which could be different
4611 * than those the BIOS recognizes for devices on PCMCIA_BUS,
4612 * SDIO_BUS, and SROMless devices on PCI_BUS.
4614 var = getvar(vars, "vendid");
4615 if (var && !kstrtoul(var, 0, &res)) {
4617 wiphy_err(wiphy, "Overriding vendor id = 0x%x\n",
4620 var = getvar(vars, "devid");
4621 if (var && !kstrtoul(var, 0, &res)) {
4622 u16 devid = (u16)res;
4623 if (devid != 0xffff) {
4625 wiphy_err(wiphy, "Overriding device id = 0x%x"
4630 /* verify again the device is supported */
4631 if (!brcms_c_chipmatch(vendor, device)) {
4632 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4633 "vendor/device (0x%x/0x%x)\n",
4634 unit, vendor, device);
4639 wlc_hw->vendorid = vendor;
4640 wlc_hw->deviceid = device;
4642 /* set bar0 window to point at D11 core */
4643 wlc_hw->regs = (struct d11regs __iomem *)
4644 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
4645 wlc_hw->corerev = ai_corerev(wlc_hw->sih);
4647 regs = wlc_hw->regs;
4649 wlc->regs = wlc_hw->regs;
4651 /* validate chip, chiprev and corerev */
4652 if (!brcms_c_isgoodchip(wlc_hw)) {
4657 /* initialize power control registers */
4658 ai_clkctl_init(wlc_hw->sih);
4660 /* request fastclock and force fastclock for the rest of attach
4661 * bring the d11 core out of reset.
4662 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4663 * is still false; But it will be called again inside wlc_corereset,
4664 * after d11 is out of reset.
4666 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4667 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4669 if (!brcms_b_validate_chip_access(wlc_hw)) {
4670 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4676 /* get the board rev, used just below */
4677 j = getintvar(vars, "boardrev");
4678 /* promote srom boardrev of 0xFF to 1 */
4679 if (j == BOARDREV_PROMOTABLE)
4680 j = BOARDREV_PROMOTED;
4681 wlc_hw->boardrev = (u16) j;
4682 if (!brcms_c_validboardtype(wlc_hw)) {
4683 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4684 "board type (0x%x)" " or revision level (0x%x)\n",
4685 unit, wlc_hw->sih->boardtype, wlc_hw->boardrev);
4689 wlc_hw->sromrev = (u8) getintvar(vars, "sromrev");
4690 wlc_hw->boardflags = (u32) getintvar(vars, "boardflags");
4691 wlc_hw->boardflags2 = (u32) getintvar(vars, "boardflags2");
4693 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4694 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4696 /* check device id(srom, nvram etc.) to set bands */
4697 if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4698 wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4699 /* Dualband boards */
4700 wlc_hw->_nbands = 2;
4702 wlc_hw->_nbands = 1;
4704 if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
4705 wlc_hw->_nbands = 1;
4707 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4708 * unconditionally does the init of these values
4710 wlc->vendorid = wlc_hw->vendorid;
4711 wlc->deviceid = wlc_hw->deviceid;
4712 wlc->pub->sih = wlc_hw->sih;
4713 wlc->pub->corerev = wlc_hw->corerev;
4714 wlc->pub->sromrev = wlc_hw->sromrev;
4715 wlc->pub->boardrev = wlc_hw->boardrev;
4716 wlc->pub->boardflags = wlc_hw->boardflags;
4717 wlc->pub->boardflags2 = wlc_hw->boardflags2;
4718 wlc->pub->_nbands = wlc_hw->_nbands;
4720 wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4722 if (wlc_hw->physhim == NULL) {
4723 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4729 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4730 sha_params.sih = wlc_hw->sih;
4731 sha_params.physhim = wlc_hw->physhim;
4732 sha_params.unit = unit;
4733 sha_params.corerev = wlc_hw->corerev;
4734 sha_params.vars = vars;
4735 sha_params.vid = wlc_hw->vendorid;
4736 sha_params.did = wlc_hw->deviceid;
4737 sha_params.chip = wlc_hw->sih->chip;
4738 sha_params.chiprev = wlc_hw->sih->chiprev;
4739 sha_params.chippkg = wlc_hw->sih->chippkg;
4740 sha_params.sromrev = wlc_hw->sromrev;
4741 sha_params.boardtype = wlc_hw->sih->boardtype;
4742 sha_params.boardrev = wlc_hw->boardrev;
4743 sha_params.boardvendor = wlc_hw->sih->boardvendor;
4744 sha_params.boardflags = wlc_hw->boardflags;
4745 sha_params.boardflags2 = wlc_hw->boardflags2;
4746 sha_params.buscorerev = wlc_hw->sih->buscorerev;
4748 /* alloc and save pointer to shared phy state area */
4749 wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4750 if (!wlc_hw->phy_sh) {
4755 /* initialize software state for each core and band */
4756 for (j = 0; j < wlc_hw->_nbands; j++) {
4758 * band0 is always 2.4Ghz
4759 * band1, if present, is 5Ghz
4762 brcms_c_setxband(wlc_hw, j);
4764 wlc_hw->band->bandunit = j;
4765 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4766 wlc->band->bandunit = j;
4767 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4768 wlc->core->coreidx = ai_coreidx(wlc_hw->sih);
4770 wlc_hw->machwcap = R_REG(®s->machwcap);
4771 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4773 /* init tx fifo size */
4774 wlc_hw->xmtfifo_sz =
4775 xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4777 /* Get a phy for this band */
4779 wlc_phy_attach(wlc_hw->phy_sh, regs,
4780 wlc_hw->band->bandtype, vars,
4782 if (wlc_hw->band->pi == NULL) {
4783 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4784 "attach failed\n", unit);
4789 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4791 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4792 &wlc_hw->band->phyrev,
4793 &wlc_hw->band->radioid,
4794 &wlc_hw->band->radiorev);
4795 wlc_hw->band->abgphy_encore =
4796 wlc_phy_get_encore(wlc_hw->band->pi);
4797 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4798 wlc_hw->band->core_flags =
4799 wlc_phy_get_coreflags(wlc_hw->band->pi);
4801 /* verify good phy_type & supported phy revision */
4802 if (BRCMS_ISNPHY(wlc_hw->band)) {
4803 if (NCONF_HAS(wlc_hw->band->phyrev))
4807 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4808 if (LCNCONF_HAS(wlc_hw->band->phyrev))
4814 wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4815 "phy type/rev (%d/%d)\n", unit,
4816 wlc_hw->band->phytype, wlc_hw->band->phyrev);
4823 * BMAC_NOTE: wlc->band->pi should not be set below and should
4824 * be done in the high level attach. However we can not make
4825 * that change until all low level access is changed to
4826 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4827 * keeping wlc_hw->band->pi as well for incremental update of
4828 * low level fns, and cut over low only init when all fns
4831 wlc->band->pi = wlc_hw->band->pi;
4832 wlc->band->phytype = wlc_hw->band->phytype;
4833 wlc->band->phyrev = wlc_hw->band->phyrev;
4834 wlc->band->radioid = wlc_hw->band->radioid;
4835 wlc->band->radiorev = wlc_hw->band->radiorev;
4837 /* default contention windows size limits */
4838 wlc_hw->band->CWmin = APHY_CWMIN;
4839 wlc_hw->band->CWmax = PHY_CWMAX;
4841 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4847 /* disable core to match driver "down" state */
4848 brcms_c_coredisable(wlc_hw);
4850 /* Match driver "down" state */
4851 ai_pci_down(wlc_hw->sih);
4853 /* register sb interrupt callback functions */
4854 ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff,
4855 (void *)brcms_c_wlintrsrestore, NULL, wlc);
4857 /* turn off pll and xtal to match driver "down" state */
4858 brcms_b_xtal(wlc_hw, OFF);
4860 /* *******************************************************************
4861 * The hardware is in the DOWN state at this point. D11 core
4862 * or cores are in reset with clocks off, and the board PLLs
4863 * are off if possible.
4865 * Beyond this point, wlc->sbclk == false and chip registers
4866 * should not be touched.
4867 *********************************************************************
4870 /* init etheraddr state variables */
4871 macaddr = brcms_c_get_macaddr(wlc_hw);
4872 if (macaddr == NULL) {
4873 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4878 if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4879 is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4880 is_zero_ether_addr(wlc_hw->etheraddr)) {
4881 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4888 "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4889 wlc_hw->deviceid, wlc_hw->_nbands,
4890 wlc_hw->sih->boardtype, macaddr);
4895 wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4900 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4903 unit = wlc->pub->unit;
4905 if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4906 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4907 wlc->band->antgain = 8;
4908 } else if (wlc->band->antgain == -1) {
4909 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4910 " srom, using 2dB\n", unit, __func__);
4911 wlc->band->antgain = 8;
4914 /* Older sroms specified gain in whole dbm only. In order
4915 * be able to specify qdbm granularity and remain backward
4916 * compatible the whole dbms are now encoded in only
4917 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4918 * 6 bit signed number ranges from -32 - 31.
4922 * 0xc1 = 1.75 db (1 + 3 quarters),
4923 * 0x3f = -1 (-1 + 0 quarters),
4924 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4925 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4927 gain = wlc->band->antgain & 0x3f;
4928 gain <<= 2; /* Sign extend */
4930 fract = (wlc->band->antgain & 0xc0) >> 6;
4931 wlc->band->antgain = 4 * gain + fract;
4935 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4942 unit = wlc->pub->unit;
4943 vars = wlc->pub->vars;
4944 bandtype = wlc->band->bandtype;
4946 /* get antennas available */
4947 aa = (s8) getintvar(vars, bandtype == BRCM_BAND_5G ? "aa5g" : "aa2g");
4949 aa = (s8) getintvar(vars,
4950 bandtype == BRCM_BAND_5G ? "aa1" : "aa0");
4951 if ((aa < 1) || (aa > 15)) {
4952 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4953 " srom (0x%x), using 3\n", unit, __func__, aa);
4957 /* reset the defaults if we have a single antenna */
4959 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4960 wlc->stf->txant = ANT_TX_FORCE_0;
4961 } else if (aa == 2) {
4962 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4963 wlc->stf->txant = ANT_TX_FORCE_1;
4967 /* Compute Antenna Gain */
4968 wlc->band->antgain =
4969 (s8) getintvar(vars, bandtype == BRCM_BAND_5G ? "ag1" : "ag0");
4970 brcms_c_attach_antgain_init(wlc);
4975 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4978 struct brcms_band *band;
4979 struct brcms_bss_info *bi = wlc->default_bss;
4981 /* init default and target BSS with some sane initial values */
4982 memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4983 bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4985 /* fill the default channel as the first valid channel
4986 * starting from the 2G channels
4988 chanspec = ch20mhz_chspec(1);
4989 wlc->home_chanspec = bi->chanspec = chanspec;
4991 /* find the band of our default channel */
4993 if (wlc->pub->_nbands > 1 &&
4994 band->bandunit != chspec_bandunit(chanspec))
4995 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4997 /* init bss rates to the band specific default rate set */
4998 brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4999 band->bandtype, false, BRCMS_RATE_MASK_FULL,
5000 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
5001 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
5003 if (wlc->pub->_n_enab & SUPPORT_11N)
5004 bi->flags |= BRCMS_BSS_HT;
5007 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
5009 struct brcms_txq_info *qi, *p;
5011 qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
5014 * Have enough room for control packets along with HI watermark
5015 * Also, add room to txq for total psq packets if all the SCBs
5016 * leave PS mode. The watermark for flowcontrol to OS packets
5017 * will remain the same
5019 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
5020 2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
5022 /* add this queue to the the global list */
5025 wlc->tx_queues = qi;
5027 while (p->next != NULL)
5035 static void brcms_c_txq_free(struct brcms_c_info *wlc,
5036 struct brcms_txq_info *qi)
5038 struct brcms_txq_info *p;
5043 /* remove the queue from the linked list */
5046 wlc->tx_queues = p->next;
5048 while (p != NULL && p->next != qi)
5051 p->next = p->next->next;
5057 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
5060 struct brcms_band *band;
5062 for (i = 0; i < wlc->pub->_nbands; i++) {
5063 band = wlc->bandstate[i];
5064 if (band->bandtype == BRCM_BAND_5G) {
5065 if ((bwcap == BRCMS_N_BW_40ALL)
5066 || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
5067 band->mimo_cap_40 = true;
5069 band->mimo_cap_40 = false;
5071 if (bwcap == BRCMS_N_BW_40ALL)
5072 band->mimo_cap_40 = true;
5074 band->mimo_cap_40 = false;
5080 * The common driver entry routine. Error codes should be unique
5082 struct brcms_c_info *
5083 brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
5084 bool piomode, void __iomem *regsva, struct pci_dev *btparam,
5087 struct brcms_c_info *wlc;
5090 struct brcms_pub *pub;
5092 /* allocate struct brcms_c_info state and its substructures */
5093 wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device);
5096 wlc->wiphy = wl->wiphy;
5103 wlc->band = wlc->bandstate[0];
5104 wlc->core = wlc->corestate;
5107 pub->_piomode = piomode;
5108 wlc->bandinit_pending = false;
5110 /* populate struct brcms_c_info with default values */
5111 brcms_c_info_init(wlc, unit);
5113 /* update sta/ap related parameters */
5114 brcms_c_ap_upd(wlc);
5117 * low level attach steps(all hw accesses go
5118 * inside, no more in rest of the attach)
5120 err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva,
5125 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
5127 pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
5129 /* propagate *vars* from BMAC driver to high driver */
5130 brcms_b_copyfrom_vars(wlc->hw, &pub->vars, &wlc->vars_size);
5133 /* set maximum allowed duty cycle */
5134 wlc->tx_duty_cycle_ofdm =
5135 (u16) getintvar(pub->vars, "tx_duty_cycle_ofdm");
5136 wlc->tx_duty_cycle_cck =
5137 (u16) getintvar(pub->vars, "tx_duty_cycle_cck");
5139 brcms_c_stf_phy_chain_calc(wlc);
5141 /* txchain 1: txant 0, txchain 2: txant 1 */
5142 if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
5143 wlc->stf->txant = wlc->stf->hw_txchain - 1;
5145 /* push to BMAC driver */
5146 wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
5147 wlc->stf->hw_rxchain);
5149 /* pull up some info resulting from the low attach */
5150 for (i = 0; i < NFIFO; i++)
5151 wlc->core->txavail[i] = wlc->hw->txavail[i];
5153 memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
5154 memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
5156 for (j = 0; j < wlc->pub->_nbands; j++) {
5157 wlc->band = wlc->bandstate[j];
5159 if (!brcms_c_attach_stf_ant_init(wlc)) {
5164 /* default contention windows size limits */
5165 wlc->band->CWmin = APHY_CWMIN;
5166 wlc->band->CWmax = PHY_CWMAX;
5168 /* init gmode value */
5169 if (wlc->band->bandtype == BRCM_BAND_2G) {
5170 wlc->band->gmode = GMODE_AUTO;
5171 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
5175 /* init _n_enab supported mode */
5176 if (BRCMS_PHY_11N_CAP(wlc->band)) {
5177 pub->_n_enab = SUPPORT_11N;
5178 brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
5180 SUPPORT_11N) ? WL_11N_2x2 :
5184 /* init per-band default rateset, depend on band->gmode */
5185 brcms_default_rateset(wlc, &wlc->band->defrateset);
5187 /* fill in hw_rateset */
5188 brcms_c_rateset_filter(&wlc->band->defrateset,
5189 &wlc->band->hw_rateset, false,
5190 BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
5191 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
5195 * update antenna config due to
5196 * wlc->stf->txant/txchain/ant_rx_ovr change
5198 brcms_c_stf_phy_txant_upd(wlc);
5200 /* attach each modules */
5201 err = brcms_c_attach_module(wlc);
5205 if (!brcms_c_timers_init(wlc, unit)) {
5206 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
5212 /* depend on rateset, gmode */
5213 wlc->cmi = brcms_c_channel_mgr_attach(wlc);
5215 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
5216 "\n", unit, __func__);
5221 /* init default when all parameters are ready, i.e. ->rateset */
5222 brcms_c_bss_default_init(wlc);
5225 * Complete the wlc default state initializations..
5228 /* allocate our initial queue */
5229 wlc->pkt_queue = brcms_c_txq_alloc(wlc);
5230 if (wlc->pkt_queue == NULL) {
5231 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
5237 wlc->bsscfg->wlc = wlc;
5239 wlc->mimoft = FT_HT;
5240 wlc->mimo_40txbw = AUTO;
5241 wlc->ofdm_40txbw = AUTO;
5242 wlc->cck_40txbw = AUTO;
5243 brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
5245 /* Set default values of SGI */
5246 if (BRCMS_SGI_CAP_PHY(wlc)) {
5247 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5249 } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
5250 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5253 brcms_c_ht_update_sgi_rx(wlc, 0);
5256 /* initialize radio_mpc_disable according to wlc->mpc */
5257 brcms_c_radio_mpc_upd(wlc);
5258 brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
5266 wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
5267 unit, __func__, err);
5269 brcms_c_detach(wlc);
5276 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
5278 /* free timer state */
5280 brcms_free_timer(wlc->wl, wlc->wdtimer);
5281 wlc->wdtimer = NULL;
5283 if (wlc->radio_timer) {
5284 brcms_free_timer(wlc->wl, wlc->radio_timer);
5285 wlc->radio_timer = NULL;
5289 static void brcms_c_detach_module(struct brcms_c_info *wlc)
5292 brcms_c_antsel_detach(wlc->asi);
5297 brcms_c_ampdu_detach(wlc->ampdu);
5301 brcms_c_stf_detach(wlc);
5307 static int brcms_b_detach(struct brcms_c_info *wlc)
5310 struct brcms_hw_band *band;
5311 struct brcms_hardware *wlc_hw = wlc->hw;
5318 * detach interrupt sync mechanism since interrupt is disabled
5319 * and per-port interrupt object may has been freed. this must
5320 * be done before sb core switch
5322 ai_deregister_intr_callback(wlc_hw->sih);
5323 ai_pci_sleep(wlc_hw->sih);
5326 brcms_b_detach_dmapio(wlc_hw);
5328 band = wlc_hw->band;
5329 for (i = 0; i < wlc_hw->_nbands; i++) {
5331 /* Detach this band's phy */
5332 wlc_phy_detach(band->pi);
5335 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
5338 /* Free shared phy state */
5339 kfree(wlc_hw->phy_sh);
5341 wlc_phy_shim_detach(wlc_hw->physhim);
5344 kfree(wlc_hw->vars);
5345 wlc_hw->vars = NULL;
5348 ai_detach(wlc_hw->sih);
5357 * Return a count of the number of driver callbacks still pending.
5359 * General policy is that brcms_c_detach can only dealloc/free software states.
5360 * It can NOT touch hardware registers since the d11core may be in reset and
5361 * clock may not be available.
5362 * One exception is sb register access, which is possible if crystal is turned
5363 * on after "down" state, driver should avoid software timer with the exception
5366 uint brcms_c_detach(struct brcms_c_info *wlc)
5373 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5375 callbacks += brcms_b_detach(wlc);
5377 /* delete software timers */
5378 if (!brcms_c_radio_monitor_stop(wlc))
5381 brcms_c_channel_mgr_detach(wlc->cmi);
5383 brcms_c_timers_deinit(wlc);
5385 brcms_c_detach_module(wlc);
5388 while (wlc->tx_queues != NULL)
5389 brcms_c_txq_free(wlc, wlc->tx_queues);
5391 brcms_c_detach_mfree(wlc);
5395 /* update state that depends on the current value of "ap" */
5396 void brcms_c_ap_upd(struct brcms_c_info *wlc)
5398 /* STA-BSS; short capable */
5399 wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5406 * return true if Minimum Power Consumption should
5407 * be entered, false otherwise
5409 bool brcms_c_is_non_delay_mpc(struct brcms_c_info *wlc)
5414 bool brcms_c_ismpc(struct brcms_c_info *wlc)
5416 return (wlc->mpc_delay_off == 0) && (brcms_c_is_non_delay_mpc(wlc));
5419 void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc)
5421 bool mpc_radio, radio_state;
5424 * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled
5425 * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio
5426 * monitor also when WL_RADIO_MPC_DISABLE is the only reason that
5427 * the radio is going down.
5430 if (!wlc->pub->radio_disabled)
5432 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5433 brcms_c_radio_upd(wlc);
5434 if (!wlc->pub->radio_disabled)
5435 brcms_c_radio_monitor_stop(wlc);
5440 * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in
5441 * wlc->pub->radio_disabled to go ON, always call radio_upd
5442 * synchronously to go OFF, postpone radio_upd to later when
5443 * context is safe(e.g. watchdog)
5446 (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF :
5448 mpc_radio = (brcms_c_ismpc(wlc) == true) ? OFF : ON;
5450 if (radio_state == ON && mpc_radio == OFF)
5451 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5452 else if (radio_state == OFF && mpc_radio == ON) {
5453 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5454 brcms_c_radio_upd(wlc);
5455 if (wlc->mpc_offcnt < BRCMS_MPC_THRESHOLD)
5456 wlc->mpc_dlycnt = BRCMS_MPC_MAX_DELAYCNT;
5458 wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
5461 * Below logic is meant to capture the transition from mpc off
5462 * to mpc on for reasons other than wlc->mpc_delay_off keeping
5463 * the mpc off. In that case reset wlc->mpc_delay_off to
5464 * wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off
5466 if ((wlc->prev_non_delay_mpc == false) &&
5467 (brcms_c_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off)
5468 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5470 wlc->prev_non_delay_mpc = brcms_c_is_non_delay_mpc(wlc);
5472 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5473 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5475 if (wlc_hw->wlc->pub->hw_up)
5478 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5481 * Enable pll and xtal, initialize the power control registers,
5482 * and force fastclock for the remainder of brcms_c_up().
5484 brcms_b_xtal(wlc_hw, ON);
5485 ai_clkctl_init(wlc_hw->sih);
5486 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5488 ai_pci_fixcfg(wlc_hw->sih);
5491 * AI chip doesn't restore bar0win2 on
5492 * hibernation/resume, need sw fixup
5494 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
5495 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
5496 wlc_hw->regs = (struct d11regs __iomem *)
5497 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
5500 * Inform phy that a POR reset has occurred so
5501 * it does a complete phy init
5503 wlc_phy_por_inform(wlc_hw->band->pi);
5505 wlc_hw->ucode_loaded = false;
5506 wlc_hw->wlc->pub->hw_up = true;
5508 if ((wlc_hw->boardflags & BFL_FEM)
5509 && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
5511 (wlc_hw->boardrev >= 0x1250
5512 && (wlc_hw->boardflags & BFL_FEM_BT)))
5513 ai_epa_4313war(wlc_hw->sih);
5517 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5521 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5524 * Enable pll and xtal, initialize the power control registers,
5525 * and force fastclock for the remainder of brcms_c_up().
5527 brcms_b_xtal(wlc_hw, ON);
5528 ai_clkctl_init(wlc_hw->sih);
5529 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5532 * Configure pci/pcmcia here instead of in brcms_c_attach()
5533 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5535 coremask = (1 << wlc_hw->wlc->core->coreidx);
5537 ai_pci_setup(wlc_hw->sih, coremask);
5540 * Need to read the hwradio status here to cover the case where the
5541 * system is loaded with the hw radio disabled. We do not want to
5542 * bring the driver up in this case.
5544 if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5545 /* put SB PCI in down state again */
5546 ai_pci_down(wlc_hw->sih);
5547 brcms_b_xtal(wlc_hw, OFF);
5551 ai_pci_up(wlc_hw->sih);
5553 /* reset the d11 core */
5554 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5559 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5561 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5564 wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5566 /* FULLY enable dynamic power control and d11 core interrupt */
5567 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5568 brcms_intrson(wlc_hw->wlc->wl);
5573 * Write WME tunable parameters for retransmit/max rate
5574 * from wlc struct to ucode
5576 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5580 /* Need clock to do this */
5584 for (ac = 0; ac < AC_COUNT; ac++)
5585 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5586 wlc->wme_retries[ac]);
5589 /* make interface operational */
5590 int brcms_c_up(struct brcms_c_info *wlc)
5592 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5594 /* HW is turned off so don't try to access it */
5595 if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5598 if (!wlc->pub->hw_up) {
5599 brcms_b_hw_up(wlc->hw);
5600 wlc->pub->hw_up = true;
5603 if ((wlc->pub->boardflags & BFL_FEM)
5604 && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
5605 if (wlc->pub->boardrev >= 0x1250
5606 && (wlc->pub->boardflags & BFL_FEM_BT))
5607 brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5608 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5610 brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5611 MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5615 * Need to read the hwradio status here to cover the case where the
5616 * system is loaded with the hw radio disabled. We do not want to bring
5617 * the driver up in this case. If radio is disabled, abort up, lower
5618 * power, start radio timer and return 0(for NDIS) don't call
5619 * radio_update to avoid looping brcms_c_up.
5621 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5623 if (!wlc->pub->radio_disabled) {
5624 int status = brcms_b_up_prep(wlc->hw);
5625 if (status == -ENOMEDIUM) {
5627 (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5628 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5629 mboolset(wlc->pub->radio_disabled,
5630 WL_RADIO_HW_DISABLE);
5632 if (bsscfg->enable && bsscfg->BSS)
5633 wiphy_err(wlc->wiphy, "wl%d: up"
5635 "bsscfg_disable()\n",
5641 if (wlc->pub->radio_disabled) {
5642 brcms_c_radio_monitor_start(wlc);
5646 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5649 brcms_c_radio_monitor_stop(wlc);
5651 /* Set EDCF hostflags */
5652 brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5654 brcms_init(wlc->wl);
5655 wlc->pub->up = true;
5657 if (wlc->bandinit_pending) {
5658 brcms_c_suspend_mac_and_wait(wlc);
5659 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5660 wlc->bandinit_pending = false;
5661 brcms_c_enable_mac(wlc);
5664 brcms_b_up_finish(wlc->hw);
5666 /* Program the TX wme params with the current settings */
5667 brcms_c_wme_retries_write(wlc);
5669 /* start one second watchdog timer */
5670 brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5671 wlc->WDarmed = true;
5673 /* ensure antenna config is up to date */
5674 brcms_c_stf_phy_txant_upd(wlc);
5675 /* ensure LDPC config is in sync */
5676 brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5681 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5688 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5693 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5698 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5700 /* disable interrupts */
5702 wlc_hw->wlc->macintmask = 0;
5704 /* now disable interrupts */
5705 brcms_intrsoff(wlc_hw->wlc->wl);
5707 /* ensure we're running on the pll clock again */
5708 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5710 /* down phy at the last of this stage */
5711 callbacks += wlc_phy_down(wlc_hw->band->pi);
5716 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5721 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5727 wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5729 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5732 wlc_hw->sbclk = false;
5733 wlc_hw->clk = false;
5734 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5736 /* reclaim any posted packets */
5737 brcms_c_flushqueues(wlc_hw->wlc);
5740 /* Reset and disable the core */
5741 if (ai_iscoreup(wlc_hw->sih)) {
5742 if (R_REG(&wlc_hw->regs->maccontrol) &
5744 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5745 callbacks += brcms_reset(wlc_hw->wlc->wl);
5746 brcms_c_coredisable(wlc_hw);
5749 /* turn off primary xtal and pll */
5750 if (!wlc_hw->noreset) {
5751 ai_pci_down(wlc_hw->sih);
5752 brcms_b_xtal(wlc_hw, OFF);
5760 * Mark the interface nonoperational, stop the software mechanisms,
5761 * disable the hardware, free any transient buffer state.
5762 * Return a count of the number of driver callbacks still pending.
5764 uint brcms_c_down(struct brcms_c_info *wlc)
5769 bool dev_gone = false;
5770 struct brcms_txq_info *qi;
5772 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5774 /* check if we are already in the going down path */
5775 if (wlc->going_down) {
5776 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5777 "\n", wlc->pub->unit, __func__);
5783 /* in between, mpc could try to bring down again.. */
5784 wlc->going_down = true;
5786 callbacks += brcms_b_bmac_down_prep(wlc->hw);
5788 dev_gone = brcms_deviceremoved(wlc);
5790 /* Call any registered down handlers */
5791 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5792 if (wlc->modulecb[i].down_fn)
5794 wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5797 /* cancel the watchdog timer */
5799 if (!brcms_del_timer(wlc->wl, wlc->wdtimer))
5801 wlc->WDarmed = false;
5803 /* cancel all other timers */
5804 callbacks += brcms_c_down_del_timer(wlc);
5806 wlc->pub->up = false;
5808 wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5810 /* clear txq flow control */
5811 brcms_c_txflowcontrol_reset(wlc);
5813 /* flush tx queues */
5814 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5815 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5817 callbacks += brcms_b_down_finish(wlc->hw);
5819 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5822 wlc->going_down = false;
5826 /* Set the current gmode configuration */
5827 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5831 struct brcms_c_rateset rs;
5832 /* Default to 54g Auto */
5833 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5834 s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5835 bool shortslot_restrict = false; /* Restrict association to stations
5836 * that support shortslot
5838 bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */
5839 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5840 int preamble = BRCMS_PLCP_LONG;
5841 bool preamble_restrict = false; /* Restrict association to stations
5842 * that support short preambles
5844 struct brcms_band *band;
5846 /* if N-support is enabled, allow Gmode set as long as requested
5847 * Gmode is not GMODE_LEGACY_B
5849 if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5852 /* verify that we are dealing with 2G band and grab the band pointer */
5853 if (wlc->band->bandtype == BRCM_BAND_2G)
5855 else if ((wlc->pub->_nbands > 1) &&
5856 (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5857 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5861 /* Legacy or bust when no OFDM is supported by regulatory */
5862 if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5863 BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5866 /* update configuration value */
5868 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5870 /* Clear rateset override */
5871 memset(&rs, 0, sizeof(struct brcms_c_rateset));
5874 case GMODE_LEGACY_B:
5875 shortslot = BRCMS_SHORTSLOT_OFF;
5876 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5884 /* Accept defaults */
5889 preamble = BRCMS_PLCP_SHORT;
5890 preamble_restrict = true;
5893 case GMODE_PERFORMANCE:
5894 shortslot = BRCMS_SHORTSLOT_ON;
5895 shortslot_restrict = true;
5897 preamble = BRCMS_PLCP_SHORT;
5898 preamble_restrict = true;
5903 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5904 wlc->pub->unit, __func__, gmode);
5908 band->gmode = gmode;
5910 wlc->shortslot_override = shortslot;
5912 /* Use the default 11g rateset */
5914 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5917 for (i = 0; i < rs.count; i++) {
5918 if (rs.rates[i] == BRCM_RATE_6M
5919 || rs.rates[i] == BRCM_RATE_12M
5920 || rs.rates[i] == BRCM_RATE_24M)
5921 rs.rates[i] |= BRCMS_RATE_FLAG;
5925 /* Set default bss rateset */
5926 wlc->default_bss->rateset.count = rs.count;
5927 memcpy(wlc->default_bss->rateset.rates, rs.rates,
5928 sizeof(wlc->default_bss->rateset.rates));
5933 static int brcms_c_nmode_validate(struct brcms_c_info *wlc, s32 nmode)
5945 if (!(BRCMS_PHY_11N_CAP(wlc->band)))
5957 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5963 err = brcms_c_nmode_validate(wlc, nmode);
5967 if (wlc->stf->txstreams == WL_11N_3x3)
5972 /* force GMODE_AUTO if NMODE is ON */
5973 brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5974 if (nmode == WL_11N_3x3)
5975 wlc->pub->_n_enab = SUPPORT_HT;
5977 wlc->pub->_n_enab = SUPPORT_11N;
5978 wlc->default_bss->flags |= BRCMS_BSS_HT;
5979 /* add the mcs rates to the default and hw ratesets */
5980 brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5981 wlc->stf->txstreams);
5982 for (i = 0; i < wlc->pub->_nbands; i++)
5983 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5984 wlc->default_bss->rateset.mcs, MCSSET_LEN);
5990 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5991 struct brcms_c_rateset *rs_arg)
5993 struct brcms_c_rateset rs, new;
5996 memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5998 /* check for bad count value */
5999 if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
6002 /* try the current band */
6003 bandunit = wlc->band->bandunit;
6004 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
6005 if (brcms_c_rate_hwrs_filter_sort_validate
6006 (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
6007 wlc->stf->txstreams))
6010 /* try the other band */
6011 if (brcms_is_mband_unlocked(wlc)) {
6012 bandunit = OTHERBANDUNIT(wlc);
6013 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
6014 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
6016 bandstate[bandunit]->
6018 wlc->stf->txstreams))
6025 /* apply new rateset */
6026 memcpy(&wlc->default_bss->rateset, &new,
6027 sizeof(struct brcms_c_rateset));
6028 memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
6029 sizeof(struct brcms_c_rateset));
6033 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
6038 if (wlc->bsscfg->associated)
6039 r = wlc->bsscfg->current_bss->rateset.rates[0];
6041 r = wlc->default_bss->rateset.rates[0];
6043 wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
6046 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
6048 u16 chspec = ch20mhz_chspec(channel);
6050 if (channel < 0 || channel > MAXCHANNEL)
6053 if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
6057 if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
6058 if (wlc->band->bandunit != chspec_bandunit(chspec))
6059 wlc->bandinit_pending = true;
6061 wlc->bandinit_pending = false;
6064 wlc->default_bss->chanspec = chspec;
6065 /* brcms_c_BSSinit() will sanitize the rateset before
6067 if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
6068 brcms_c_set_home_chanspec(wlc, chspec);
6069 brcms_c_suspend_mac_and_wait(wlc);
6070 brcms_c_set_chanspec(wlc, chspec);
6071 brcms_c_enable_mac(wlc);
6076 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
6080 if (srl < 1 || srl > RETRY_SHORT_MAX ||
6081 lrl < 1 || lrl > RETRY_SHORT_MAX)
6087 brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
6089 for (ac = 0; ac < AC_COUNT; ac++) {
6090 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
6091 EDCF_SHORT, wlc->SRL);
6092 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
6093 EDCF_LONG, wlc->LRL);
6095 brcms_c_wme_retries_write(wlc);
6100 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
6101 struct brcm_rateset *currs)
6103 struct brcms_c_rateset *rs;
6105 if (wlc->pub->associated)
6106 rs = &wlc->bsscfg->current_bss->rateset;
6108 rs = &wlc->default_bss->rateset;
6110 /* Copy only legacy rateset section */
6111 currs->count = rs->count;
6112 memcpy(&currs->rates, &rs->rates, rs->count);
6115 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
6117 struct brcms_c_rateset internal_rs;
6120 if (rs->count > BRCMS_NUMRATES)
6123 memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
6125 /* Copy only legacy rateset section */
6126 internal_rs.count = rs->count;
6127 memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
6129 /* merge rateset coming in with the current mcsset */
6130 if (wlc->pub->_n_enab & SUPPORT_11N) {
6131 struct brcms_bss_info *mcsset_bss;
6132 if (wlc->bsscfg->associated)
6133 mcsset_bss = wlc->bsscfg->current_bss;
6135 mcsset_bss = wlc->default_bss;
6136 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
6140 bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
6142 brcms_c_ofdm_rateset_war(wlc);
6147 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
6149 if (period < DOT11_MIN_BEACON_PERIOD ||
6150 period > DOT11_MAX_BEACON_PERIOD)
6153 wlc->default_bss->beacon_period = period;
6157 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
6159 return wlc->band->phytype;
6162 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
6164 wlc->shortslot_override = sslot_override;
6167 * shortslot is an 11g feature, so no more work if we are
6168 * currently on the 5G band
6170 if (wlc->band->bandtype == BRCM_BAND_5G)
6173 if (wlc->pub->up && wlc->pub->associated) {
6174 /* let watchdog or beacon processing update shortslot */
6175 } else if (wlc->pub->up) {
6176 /* unassociated shortslot is off */
6177 brcms_c_switch_shortslot(wlc, false);
6179 /* driver is down, so just update the brcms_c_info
6181 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
6182 wlc->shortslot = false;
6185 (wlc->shortslot_override ==
6186 BRCMS_SHORTSLOT_ON);
6191 * register watchdog and down handlers.
6193 int brcms_c_module_register(struct brcms_pub *pub,
6194 const char *name, struct brcms_info *hdl,
6195 int (*d_fn)(void *handle))
6197 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6200 /* find an empty entry and just add, no duplication check! */
6201 for (i = 0; i < BRCMS_MAXMODULES; i++) {
6202 if (wlc->modulecb[i].name[0] == '\0') {
6203 strncpy(wlc->modulecb[i].name, name,
6204 sizeof(wlc->modulecb[i].name) - 1);
6205 wlc->modulecb[i].hdl = hdl;
6206 wlc->modulecb[i].down_fn = d_fn;
6214 /* unregister module callbacks */
6215 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
6216 struct brcms_info *hdl)
6218 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6224 for (i = 0; i < BRCMS_MAXMODULES; i++) {
6225 if (!strcmp(wlc->modulecb[i].name, name) &&
6226 (wlc->modulecb[i].hdl == hdl)) {
6227 memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
6232 /* table not found! */
6237 static const char * const supr_reason[] = {
6238 "None", "PMQ Entry", "Flush request",
6239 "Previous frag failure", "Channel mismatch",
6240 "Lifetime Expiry", "Underflow"
6243 static void brcms_c_print_txs_status(u16 s)
6245 printk(KERN_DEBUG "[15:12] %d frame attempts\n",
6246 (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
6247 printk(KERN_DEBUG " [11:8] %d rts attempts\n",
6248 (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
6249 printk(KERN_DEBUG " [7] %d PM mode indicated\n",
6250 ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
6251 printk(KERN_DEBUG " [6] %d intermediate status\n",
6252 ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
6253 printk(KERN_DEBUG " [5] %d AMPDU\n",
6254 (s & TX_STATUS_AMPDU) ? 1 : 0);
6255 printk(KERN_DEBUG " [4:2] %d Frame Suppressed Reason (%s)\n",
6256 ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
6257 supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
6258 printk(KERN_DEBUG " [1] %d acked\n",
6259 ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
6263 void brcms_c_print_txstatus(struct tx_status *txs)
6266 u16 s = txs->status;
6267 u16 ackphyrxsh = txs->ackphyrxsh;
6269 printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
6271 printk(KERN_DEBUG "FrameID: %04x ", txs->frameid);
6272 printk(KERN_DEBUG "TxStatus: %04x", s);
6273 printk(KERN_DEBUG "\n");
6275 brcms_c_print_txs_status(s);
6277 printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
6278 printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
6279 printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
6280 printk(KERN_DEBUG "RxAckRSSI: %04x ",
6281 (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
6282 printk(KERN_DEBUG "RxAckSQ: %04x",
6283 (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
6284 printk(KERN_DEBUG "\n");
6285 #endif /* defined(BCMDBG) */
6288 void brcms_c_statsupd(struct brcms_c_info *wlc)
6291 struct macstat macstats;
6298 /* if driver down, make no sense to update stats */
6303 /* save last rx fifo 0 overflow count */
6304 rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
6306 /* save last tx fifo underflow count */
6307 for (i = 0; i < NFIFO; i++)
6308 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
6311 /* Read mac stats from contiguous shared memory */
6312 brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
6313 sizeof(struct macstat), OBJADDR_SHM_SEL);
6316 /* check for rx fifo 0 overflow */
6317 delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
6319 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
6320 wlc->pub->unit, delta);
6322 /* check for tx fifo underflows */
6323 for (i = 0; i < NFIFO; i++) {
6325 (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
6328 wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
6329 "\n", wlc->pub->unit, delta, i);
6333 /* merge counters from dma module */
6334 for (i = 0; i < NFIFO; i++) {
6336 dma_counterreset(wlc->hw->di[i]);
6340 bool brcms_c_chipmatch(u16 vendor, u16 device)
6342 if (vendor != PCI_VENDOR_ID_BROADCOM) {
6343 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
6347 if (device == BCM43224_D11N_ID_VEN1)
6349 if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
6351 if (device == BCM4313_D11N2G_ID)
6353 if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
6356 pr_err("chipmatch: unknown device id %04x\n", device);
6361 void brcms_c_print_txdesc(struct d11txh *txh)
6363 u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
6364 u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
6365 u16 mfc = le16_to_cpu(txh->MacFrameControl);
6366 u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
6367 u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
6368 u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
6369 u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
6370 u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
6371 u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
6372 u16 mainrates = le16_to_cpu(txh->MainRates);
6373 u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
6375 u8 *ra = txh->TxFrameRA;
6376 u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
6377 u8 *rtspfb = txh->RTSPLCPFallback;
6378 u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
6379 u8 *fragpfb = txh->FragPLCPFallback;
6380 u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
6381 u16 mmodelen = le16_to_cpu(txh->MModeLen);
6382 u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
6383 u16 tfid = le16_to_cpu(txh->TxFrameID);
6384 u16 txs = le16_to_cpu(txh->TxStatus);
6385 u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
6386 u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
6387 u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
6388 u16 mmbyte = le16_to_cpu(txh->MinMBytes);
6390 u8 *rtsph = txh->RTSPhyHeader;
6391 struct ieee80211_rts rts = txh->rts_frame;
6394 /* add plcp header along with txh descriptor */
6395 printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
6396 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
6397 txh, sizeof(struct d11txh) + 48);
6399 printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
6400 printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
6401 printk(KERN_DEBUG "FC: %04x ", mfc);
6402 printk(KERN_DEBUG "FES Time: %04x\n", tfest);
6403 printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
6404 (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
6405 printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
6406 printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
6407 printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
6408 printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
6409 printk(KERN_DEBUG "MainRates: %04x ", mainrates);
6410 printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
6411 printk(KERN_DEBUG "\n");
6413 brcmu_format_hex(hexbuf, iv, sizeof(txh->IV));
6414 printk(KERN_DEBUG "SecIV: %s\n", hexbuf);
6415 brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA));
6416 printk(KERN_DEBUG "RA: %s\n", hexbuf);
6418 printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
6419 brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback));
6420 printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6421 printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
6422 brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback));
6423 printk(KERN_DEBUG "PLCP: %s ", hexbuf);
6424 printk(KERN_DEBUG "DUR: %04x", fragdfb);
6425 printk(KERN_DEBUG "\n");
6427 printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
6428 printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
6430 printk(KERN_DEBUG "FrameID: %04x\n", tfid);
6431 printk(KERN_DEBUG "TxStatus: %04x\n", txs);
6433 printk(KERN_DEBUG "MaxNumMpdu: %04x\n", mnmpdu);
6434 printk(KERN_DEBUG "MaxAggbyte: %04x\n", mabyte);
6435 printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f);
6436 printk(KERN_DEBUG "MinByte: %04x\n", mmbyte);
6438 brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader));
6439 printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6440 brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame));
6441 printk(KERN_DEBUG "RTS Frame: %s", hexbuf);
6442 printk(KERN_DEBUG "\n");
6444 #endif /* defined(BCMDBG) */
6447 void brcms_c_print_rxh(struct d11rxhdr *rxh)
6449 u16 len = rxh->RxFrameSize;
6450 u16 phystatus_0 = rxh->PhyRxStatus_0;
6451 u16 phystatus_1 = rxh->PhyRxStatus_1;
6452 u16 phystatus_2 = rxh->PhyRxStatus_2;
6453 u16 phystatus_3 = rxh->PhyRxStatus_3;
6454 u16 macstatus1 = rxh->RxStatus1;
6455 u16 macstatus2 = rxh->RxStatus2;
6458 static const struct brcmu_bit_desc macstat_flags[] = {
6459 {RXS_FCSERR, "FCSErr"},
6460 {RXS_RESPFRAMETX, "Reply"},
6461 {RXS_PBPRES, "PADDING"},
6462 {RXS_DECATMPT, "DeCr"},
6463 {RXS_DECERR, "DeCrErr"},
6464 {RXS_BCNSENT, "Bcn"},
6468 printk(KERN_DEBUG "Raw RxDesc:\n");
6469 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6470 sizeof(struct d11rxhdr));
6472 brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64);
6474 snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6476 printk(KERN_DEBUG "RxFrameSize: %6s (%d)%s\n", lenbuf, len,
6477 (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6478 printk(KERN_DEBUG "RxPHYStatus: %04x %04x %04x %04x\n",
6479 phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6480 printk(KERN_DEBUG "RxMACStatus: %x %s\n", macstatus1, flagstr);
6481 printk(KERN_DEBUG "RXMACaggtype: %x\n",
6482 (macstatus2 & RXS_AGGTYPE_MASK));
6483 printk(KERN_DEBUG "RxTSFTime: %04x\n", rxh->RxTSFTime);
6485 #endif /* defined(BCMDBG) */
6487 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6492 /* get the phy specific rate encoding for the PLCP SIGNAL field */
6493 if (is_ofdm_rate(rate))
6494 table_ptr = M_RT_DIRMAP_A;
6496 table_ptr = M_RT_DIRMAP_B;
6498 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6499 * the index into the rate table.
6501 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6502 index = phy_rate & 0xf;
6504 /* Find the SHM pointer to the rate table entry by looking in the
6507 return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6510 /* Callback for device removed */
6513 * Attempts to queue a packet onto a multiple-precedence queue,
6514 * if necessary evicting a lower precedence packet from the queue.
6516 * 'prec' is the precedence number that has already been mapped
6517 * from the packet priority.
6519 * Returns true if packet consumed (queued), false if not.
6521 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6522 struct sk_buff *pkt, int prec)
6524 return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6528 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6529 struct sk_buff *pkt, int prec, bool head)
6532 int eprec = -1; /* precedence to evict from */
6534 /* Determine precedence from which to evict packet, if any */
6535 if (pktq_pfull(q, prec))
6537 else if (pktq_full(q)) {
6538 p = brcmu_pktq_peek_tail(q, &eprec);
6540 wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6541 "\n", __func__, eprec, prec);
6546 /* Evict if needed */
6548 bool discard_oldest;
6550 discard_oldest = ac_bitmap_tst(0, eprec);
6552 /* Refuse newer packet unless configured to discard oldest */
6553 if (eprec == prec && !discard_oldest) {
6554 wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6555 "\n", __func__, prec);
6559 /* Evict packet according to discard policy */
6560 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6561 brcmu_pktq_pdeq_tail(q, eprec);
6562 brcmu_pkt_buf_free_skb(p);
6567 p = brcmu_pktq_penq_head(q, prec, pkt);
6569 p = brcmu_pktq_penq(q, prec, pkt);
6574 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6575 struct sk_buff *sdu, uint prec)
6577 struct brcms_txq_info *qi = wlc->pkt_queue; /* Check me */
6578 struct pktq *q = &qi->q;
6581 prio = sdu->priority;
6583 if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6585 * we might hit this condtion in case
6586 * packet flooding from mac80211 stack
6588 brcmu_pkt_buf_free_skb(sdu);
6593 * bcmc_fid_generate:
6594 * Generate frame ID for a BCMC packet. The frag field is not used
6595 * for MC frames so is used as part of the sequence number.
6598 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6603 frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6607 mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6614 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6619 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6620 wlc->pub->unit, rspec, preamble_type);
6622 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6623 * is less than or equal to the rate of the immediately previous
6626 rspec = brcms_basic_rate(wlc, rspec);
6627 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6629 brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6630 (DOT11_ACK_LEN + FCS_LEN));
6635 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6638 BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6639 wlc->pub->unit, rspec, preamble_type);
6640 return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6644 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6647 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6648 "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6650 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6651 * is less than or equal to the rate of the immediately previous
6654 rspec = brcms_basic_rate(wlc, rspec);
6655 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6656 return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6657 (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6661 /* brcms_c_compute_frame_dur()
6663 * Calculate the 802.11 MAC header DUR field for MPDU
6664 * DUR for a single frame = 1 SIFS + 1 ACK
6665 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6667 * rate MPDU rate in unit of 500kbps
6668 * next_frag_len next MPDU length in bytes
6669 * preamble_type use short/GF or long/MM PLCP header
6672 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6673 u8 preamble_type, uint next_frag_len)
6677 sifs = get_sifs(wlc->band);
6680 dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6682 if (next_frag_len) {
6683 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6685 /* add another SIFS and the frag time */
6688 (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6694 /* The opposite of brcms_c_calc_frame_time */
6696 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6697 u8 preamble_type, uint dur)
6699 uint nsyms, mac_len, Ndps, kNdps;
6700 uint rate = rspec2rate(ratespec);
6702 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6703 wlc->pub->unit, ratespec, preamble_type, dur);
6705 if (is_mcs_rate(ratespec)) {
6706 uint mcs = ratespec & RSPEC_RATE_MASK;
6707 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6708 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6709 /* payload calculation matches that of regular ofdm */
6710 if (wlc->band->bandtype == BRCM_BAND_2G)
6711 dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6712 /* kNdbps = kbps * 4 */
6713 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6714 rspec_issgi(ratespec)) * 4;
6715 nsyms = dur / APHY_SYMBOL_TIME;
6718 ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6719 } else if (is_ofdm_rate(ratespec)) {
6720 dur -= APHY_PREAMBLE_TIME;
6721 dur -= APHY_SIGNAL_TIME;
6722 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6724 nsyms = dur / APHY_SYMBOL_TIME;
6727 (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6729 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6730 dur -= BPHY_PLCP_SHORT_TIME;
6732 dur -= BPHY_PLCP_TIME;
6733 mac_len = dur * rate;
6734 /* divide out factor of 2 in rate (1/2 mbps) */
6735 mac_len = mac_len / 8 / 2;
6741 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6744 u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6745 u8 rate = int_val & NRATE_RATE_MASK;
6747 bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6748 bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6749 bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6750 == NRATE_OVERRIDE_MCS_ONLY);
6756 /* validate the combination of rate/mcs/stf is allowed */
6757 if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6758 /* mcs only allowed when nmode */
6759 if (stf > PHY_TXC1_MODE_SDM) {
6760 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6761 wlc->pub->unit, __func__);
6766 /* mcs 32 is a special case, DUP mode 40 only */
6768 if (!CHSPEC_IS40(wlc->home_chanspec) ||
6769 ((stf != PHY_TXC1_MODE_SISO)
6770 && (stf != PHY_TXC1_MODE_CDD))) {
6771 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6772 "32\n", wlc->pub->unit, __func__);
6776 /* mcs > 7 must use stf SDM */
6777 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6778 /* mcs > 7 must use stf SDM */
6779 if (stf != PHY_TXC1_MODE_SDM) {
6780 BCMMSG(wlc->wiphy, "wl%d: enabling "
6781 "SDM mode for mcs %d\n",
6782 wlc->pub->unit, rate);
6783 stf = PHY_TXC1_MODE_SDM;
6787 * MCS 0-7 may use SISO, CDD, and for
6790 if ((stf > PHY_TXC1_MODE_STBC) ||
6791 (!BRCMS_STBC_CAP_PHY(wlc)
6792 && (stf == PHY_TXC1_MODE_STBC))) {
6793 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6794 "\n", wlc->pub->unit, __func__);
6799 } else if (is_ofdm_rate(rate)) {
6800 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6801 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6802 wlc->pub->unit, __func__);
6806 } else if (is_cck_rate(rate)) {
6807 if ((cur_band->bandtype != BRCM_BAND_2G)
6808 || (stf != PHY_TXC1_MODE_SISO)) {
6809 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6810 wlc->pub->unit, __func__);
6815 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6816 wlc->pub->unit, __func__);
6820 /* make sure multiple antennae are available for non-siso rates */
6821 if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6822 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6823 "request\n", wlc->pub->unit, __func__);
6830 rspec |= RSPEC_MIMORATE;
6831 /* For STBC populate the STC field of the ratespec */
6832 if (stf == PHY_TXC1_MODE_STBC) {
6834 stc = 1; /* Nss for single stream is always 1 */
6835 rspec |= (stc << RSPEC_STC_SHIFT);
6839 rspec |= (stf << RSPEC_STF_SHIFT);
6841 if (override_mcs_only)
6842 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6845 rspec |= RSPEC_SHORT_GI;
6848 && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6857 * Add struct d11txh, struct cck_phy_hdr.
6859 * 'p' data must start with 802.11 MAC header
6860 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6862 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6866 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6867 struct sk_buff *p, struct scb *scb, uint frag,
6868 uint nfrags, uint queue, uint next_frag_len)
6870 struct ieee80211_hdr *h;
6872 u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6873 int len, phylen, rts_phylen;
6874 u16 mch, phyctl, xfts, mainrates;
6875 u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6876 u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6877 u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6878 bool use_rts = false;
6879 bool use_cts = false;
6880 bool use_rifs = false;
6881 bool short_preamble[2] = { false, false };
6882 u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6883 u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6884 u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6885 struct ieee80211_rts *rts = NULL;
6888 bool hwtkmic = false;
6889 u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6890 #define ANTCFG_NONE 0xFF
6891 u8 antcfg = ANTCFG_NONE;
6892 u8 fbantcfg = ANTCFG_NONE;
6893 uint phyctl1_stf = 0;
6895 struct ieee80211_tx_rate *txrate[2];
6897 struct ieee80211_tx_info *tx_info;
6900 u8 mimo_preamble_type;
6902 /* locate 802.11 MAC header */
6903 h = (struct ieee80211_hdr *)(p->data);
6904 qos = ieee80211_is_data_qos(h->frame_control);
6906 /* compute length of frame in bytes for use in PLCP computations */
6907 len = brcmu_pkttotlen(p);
6908 phylen = len + FCS_LEN;
6911 tx_info = IEEE80211_SKB_CB(p);
6914 plcp = skb_push(p, D11_PHY_HDR_LEN);
6916 /* add Broadcom tx descriptor header */
6917 txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6918 memset(txh, 0, D11_TXH_LEN);
6921 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6922 /* non-AP STA should never use BCMC queue */
6923 if (queue == TX_BCMC_FIFO) {
6924 wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6925 "TX_BCMC!\n", wlc->pub->unit, __func__);
6926 frameid = bcmc_fid_generate(wlc, NULL, txh);
6928 /* Increment the counter for first fragment */
6929 if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6930 scb->seqnum[p->priority]++;
6932 /* extract fragment number from frame first */
6933 seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6934 seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6935 h->seq_ctrl = cpu_to_le16(seq);
6937 frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6938 (queue & TXFID_QUEUE_MASK);
6941 frameid |= queue & TXFID_QUEUE_MASK;
6943 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6944 if (ieee80211_is_beacon(h->frame_control))
6945 mcl |= TXC_IGNOREPMQ;
6947 txrate[0] = tx_info->control.rates;
6948 txrate[1] = txrate[0] + 1;
6951 * if rate control algorithm didn't give us a fallback
6952 * rate, use the primary rate
6954 if (txrate[1]->idx < 0)
6955 txrate[1] = txrate[0];
6957 for (k = 0; k < hw->max_rates; k++) {
6958 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6960 if ((txrate[k]->idx >= 0)
6961 && (txrate[k]->idx <
6962 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6964 hw->wiphy->bands[tx_info->band]->
6965 bitrates[txrate[k]->idx].hw_value;
6968 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6971 rspec[k] = BRCM_RATE_1M;
6974 rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6975 NRATE_MCS_INUSE | txrate[k]->idx);
6979 * Currently only support same setting for primay and
6980 * fallback rates. Unify flags for each rate into a
6981 * single value for the frame
6985 flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6988 flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6993 * determine and validate primary rate
6994 * and fallback rates
6996 if (!rspec_active(rspec[k])) {
6997 rspec[k] = BRCM_RATE_1M;
6999 if (!is_multicast_ether_addr(h->addr1)) {
7000 /* set tx antenna config */
7001 brcms_c_antsel_antcfg_get(wlc->asi, false,
7002 false, 0, 0, &antcfg, &fbantcfg);
7007 phyctl1_stf = wlc->stf->ss_opmode;
7009 if (wlc->pub->_n_enab & SUPPORT_11N) {
7010 for (k = 0; k < hw->max_rates; k++) {
7012 * apply siso/cdd to single stream mcs's or ofdm
7013 * if rspec is auto selected
7015 if (((is_mcs_rate(rspec[k]) &&
7016 is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
7017 is_ofdm_rate(rspec[k]))
7018 && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
7019 || !(rspec[k] & RSPEC_OVERRIDE))) {
7020 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
7022 /* For SISO MCS use STBC if possible */
7023 if (is_mcs_rate(rspec[k])
7024 && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
7027 /* Nss for single stream is always 1 */
7029 rspec[k] |= (PHY_TXC1_MODE_STBC <<
7031 (stc << RSPEC_STC_SHIFT);
7034 (phyctl1_stf << RSPEC_STF_SHIFT);
7038 * Is the phy configured to use 40MHZ frames? If
7039 * so then pick the desired txbw
7041 if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
7042 /* default txbw is 20in40 SB */
7043 mimo_ctlchbw = mimo_txbw =
7044 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
7046 ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
7048 if (is_mcs_rate(rspec[k])) {
7049 /* mcs 32 must be 40b/w DUP */
7050 if ((rspec[k] & RSPEC_RATE_MASK)
7053 PHY_TXC1_BW_40MHZ_DUP;
7055 } else if (wlc->mimo_40txbw != AUTO)
7056 mimo_txbw = wlc->mimo_40txbw;
7057 /* else check if dst is using 40 Mhz */
7058 else if (scb->flags & SCB_IS40)
7059 mimo_txbw = PHY_TXC1_BW_40MHZ;
7060 } else if (is_ofdm_rate(rspec[k])) {
7061 if (wlc->ofdm_40txbw != AUTO)
7062 mimo_txbw = wlc->ofdm_40txbw;
7063 } else if (wlc->cck_40txbw != AUTO) {
7064 mimo_txbw = wlc->cck_40txbw;
7068 * mcs32 is 40 b/w only.
7069 * This is possible for probe packets on
7072 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
7074 rspec[k] = RSPEC_MIMORATE;
7076 mimo_txbw = PHY_TXC1_BW_20MHZ;
7079 /* Set channel width */
7080 rspec[k] &= ~RSPEC_BW_MASK;
7081 if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
7082 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
7084 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7086 /* Disable short GI, not supported yet */
7087 rspec[k] &= ~RSPEC_SHORT_GI;
7089 mimo_preamble_type = BRCMS_MM_PREAMBLE;
7090 if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
7091 mimo_preamble_type = BRCMS_GF_PREAMBLE;
7093 if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
7094 && (!is_mcs_rate(rspec[k]))) {
7095 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
7096 "RC_MCS != is_mcs_rate(rspec)\n",
7097 wlc->pub->unit, __func__);
7100 if (is_mcs_rate(rspec[k])) {
7101 preamble_type[k] = mimo_preamble_type;
7104 * if SGI is selected, then forced mm
7107 if ((rspec[k] & RSPEC_SHORT_GI)
7108 && is_single_stream(rspec[k] &
7110 preamble_type[k] = BRCMS_MM_PREAMBLE;
7113 /* should be better conditionalized */
7114 if (!is_mcs_rate(rspec[0])
7115 && (tx_info->control.rates[0].
7116 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
7117 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
7120 for (k = 0; k < hw->max_rates; k++) {
7121 /* Set ctrlchbw as 20Mhz */
7122 rspec[k] &= ~RSPEC_BW_MASK;
7123 rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
7125 /* for nphy, stf of ofdm frames must follow policies */
7126 if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
7127 rspec[k] &= ~RSPEC_STF_MASK;
7128 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
7133 /* Reset these for use with AMPDU's */
7134 txrate[0]->count = 0;
7135 txrate[1]->count = 0;
7137 /* (2) PROTECTION, may change rspec */
7138 if ((ieee80211_is_data(h->frame_control) ||
7139 ieee80211_is_mgmt(h->frame_control)) &&
7140 (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
7143 /* (3) PLCP: determine PLCP header and MAC duration,
7144 * fill struct d11txh */
7145 brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
7146 brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
7147 memcpy(&txh->FragPLCPFallback,
7148 plcp_fallback, sizeof(txh->FragPLCPFallback));
7150 /* Length field now put in CCK FBR CRC field */
7151 if (is_cck_rate(rspec[1])) {
7152 txh->FragPLCPFallback[4] = phylen & 0xff;
7153 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
7156 /* MIMO-RATE: need validation ?? */
7157 mainrates = is_ofdm_rate(rspec[0]) ?
7158 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
7161 /* DUR field for main rate */
7162 if (!ieee80211_is_pspoll(h->frame_control) &&
7163 !is_multicast_ether_addr(h->addr1) && !use_rifs) {
7165 brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
7167 h->duration_id = cpu_to_le16(durid);
7168 } else if (use_rifs) {
7169 /* NAV protect to end of next max packet size */
7171 (u16) brcms_c_calc_frame_time(wlc, rspec[0],
7173 DOT11_MAX_FRAG_LEN);
7174 durid += RIFS_11N_TIME;
7175 h->duration_id = cpu_to_le16(durid);
7178 /* DUR field for fallback rate */
7179 if (ieee80211_is_pspoll(h->frame_control))
7180 txh->FragDurFallback = h->duration_id;
7181 else if (is_multicast_ether_addr(h->addr1) || use_rifs)
7182 txh->FragDurFallback = 0;
7184 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
7185 preamble_type[1], next_frag_len);
7186 txh->FragDurFallback = cpu_to_le16(durid);
7189 /* (4) MAC-HDR: MacTxControlLow */
7191 mcl |= TXC_STARTMSDU;
7193 if (!is_multicast_ether_addr(h->addr1))
7194 mcl |= TXC_IMMEDACK;
7196 if (wlc->band->bandtype == BRCM_BAND_5G)
7197 mcl |= TXC_FREQBAND_5G;
7199 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
7202 /* set AMIC bit if using hardware TKIP MIC */
7206 txh->MacTxControlLow = cpu_to_le16(mcl);
7208 /* MacTxControlHigh */
7211 /* Set fallback rate preamble type */
7212 if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
7213 (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
7214 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
7215 mch |= TXC_PREAMBLE_DATA_FB_SHORT;
7218 /* MacFrameControl */
7219 memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
7220 txh->TxFesTimeNormal = cpu_to_le16(0);
7222 txh->TxFesTimeFallback = cpu_to_le16(0);
7225 memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7228 txh->TxFrameID = cpu_to_le16(frameid);
7231 * TxStatus, Note the case of recreating the first frag of a suppressed
7232 * frame then we may need to reset the retry cnt's via the status reg
7234 txh->TxStatus = cpu_to_le16(status);
7237 * extra fields for ucode AMPDU aggregation, the new fields are added to
7238 * the END of previous structure so that it's compatible in driver.
7240 txh->MaxNMpdus = cpu_to_le16(0);
7241 txh->MaxABytes_MRT = cpu_to_le16(0);
7242 txh->MaxABytes_FBR = cpu_to_le16(0);
7243 txh->MinMBytes = cpu_to_le16(0);
7245 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7246 * furnish struct d11txh */
7247 /* RTS PLCP header and RTS frame */
7248 if (use_rts || use_cts) {
7249 if (use_rts && use_cts)
7252 for (k = 0; k < 2; k++) {
7253 rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7258 if (!is_ofdm_rate(rts_rspec[0]) &&
7259 !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7260 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7261 rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7262 mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7265 if (!is_ofdm_rate(rts_rspec[1]) &&
7266 !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7267 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7268 rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7269 mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7272 /* RTS/CTS additions to MacTxControlLow */
7274 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7276 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7277 txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7280 /* RTS PLCP header */
7281 rts_plcp = txh->RTSPhyHeader;
7283 rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7285 rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7287 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7289 /* fallback rate version of RTS PLCP header */
7290 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7292 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7293 sizeof(txh->RTSPLCPFallback));
7295 /* RTS frame fields... */
7296 rts = (struct ieee80211_rts *)&txh->rts_frame;
7298 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7299 rspec[0], rts_preamble_type[0],
7300 preamble_type[0], phylen, false);
7301 rts->duration = cpu_to_le16(durid);
7302 /* fallback rate version of RTS DUR field */
7303 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7304 rts_rspec[1], rspec[1],
7305 rts_preamble_type[1],
7306 preamble_type[1], phylen, false);
7307 txh->RTSDurFallback = cpu_to_le16(durid);
7310 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7311 IEEE80211_STYPE_CTS);
7313 memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7315 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7316 IEEE80211_STYPE_RTS);
7318 memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7322 * low 8 bits: main frag rate/mcs,
7323 * high 8 bits: rts/cts rate/mcs
7325 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7327 (struct ofdm_phy_hdr *) rts_plcp) :
7330 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7331 memset((char *)&txh->rts_frame, 0,
7332 sizeof(struct ieee80211_rts));
7333 memset((char *)txh->RTSPLCPFallback, 0,
7334 sizeof(txh->RTSPLCPFallback));
7335 txh->RTSDurFallback = 0;
7338 #ifdef SUPPORT_40MHZ
7339 /* add null delimiter count */
7340 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7341 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7342 brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7347 * Now that RTS/RTS FB preamble types are updated, write
7350 txh->MacTxControlHigh = cpu_to_le16(mch);
7353 * MainRates (both the rts and frag plcp rates have
7354 * been calculated now)
7356 txh->MainRates = cpu_to_le16(mainrates);
7358 /* XtraFrameTypes */
7359 xfts = frametype(rspec[1], wlc->mimoft);
7360 xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7361 xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7362 xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7364 txh->XtraFrameTypes = cpu_to_le16(xfts);
7366 /* PhyTxControlWord */
7367 phyctl = frametype(rspec[0], wlc->mimoft);
7368 if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7369 (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7370 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7371 phyctl |= PHY_TXC_SHORT_HDR;
7374 /* phytxant is properly bit shifted */
7375 phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7376 txh->PhyTxControlWord = cpu_to_le16(phyctl);
7378 /* PhyTxControlWord_1 */
7379 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7382 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7383 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7384 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7385 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7387 if (use_rts || use_cts) {
7388 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7389 txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7390 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7391 txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7395 * For mcs frames, if mixedmode(overloaded with long preamble)
7396 * is going to be set, fill in non-zero MModeLen and/or
7397 * MModeFbrLen it will be unnecessary if they are separated
7399 if (is_mcs_rate(rspec[0]) &&
7400 (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7402 brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7403 txh->MModeLen = cpu_to_le16(mmodelen);
7406 if (is_mcs_rate(rspec[1]) &&
7407 (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7409 brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7410 txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7414 ac = skb_get_queue_mapping(p);
7415 if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7416 uint frag_dur, dur, dur_fallback;
7418 /* WME: Update TXOP threshold */
7419 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7421 brcms_c_calc_frame_time(wlc, rspec[0],
7422 preamble_type[0], phylen);
7425 /* 1 RTS or CTS-to-self frame */
7427 brcms_c_calc_cts_time(wlc, rts_rspec[0],
7428 rts_preamble_type[0]);
7430 brcms_c_calc_cts_time(wlc, rts_rspec[1],
7431 rts_preamble_type[1]);
7432 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7433 dur += le16_to_cpu(rts->duration);
7435 le16_to_cpu(txh->RTSDurFallback);
7436 } else if (use_rifs) {
7440 /* frame + SIFS + ACK */
7443 brcms_c_compute_frame_dur(wlc, rspec[0],
7444 preamble_type[0], 0);
7447 brcms_c_calc_frame_time(wlc, rspec[1],
7451 brcms_c_compute_frame_dur(wlc, rspec[1],
7452 preamble_type[1], 0);
7454 /* NEED to set TxFesTimeNormal (hard) */
7455 txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7457 * NEED to set fallback rate version of
7458 * TxFesTimeNormal (hard)
7460 txh->TxFesTimeFallback =
7461 cpu_to_le16((u16) dur_fallback);
7464 * update txop byte threshold (txop minus intraframe
7467 if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7471 brcms_c_calc_frame_len(wlc,
7472 rspec[0], preamble_type[0],
7473 (wlc->edcf_txop[ac] -
7475 /* range bound the fragthreshold */
7476 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7479 else if (newfragthresh >
7480 wlc->usr_fragthresh)
7482 wlc->usr_fragthresh;
7483 /* update the fragthresh and do txc update */
7484 if (wlc->fragthresh[queue] !=
7485 (u16) newfragthresh)
7486 wlc->fragthresh[queue] =
7487 (u16) newfragthresh;
7489 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7491 wlc->pub->unit, fifo_names[queue],
7492 rspec2rate(rspec[0]));
7495 if (dur > wlc->edcf_txop[ac])
7496 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7497 "exceeded phylen %d/%d dur %d/%d\n",
7498 wlc->pub->unit, __func__,
7500 phylen, wlc->fragthresh[queue],
7501 dur, wlc->edcf_txop[ac]);
7508 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7509 struct ieee80211_hw *hw)
7513 struct scb *scb = &wlc->pri_scb;
7514 struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7517 * 802.11 standard requires management traffic
7518 * to go at highest priority
7520 prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7522 fifo = prio2fifo[prio];
7523 if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7525 brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7526 brcms_c_send_q(wlc);
7529 void brcms_c_send_q(struct brcms_c_info *wlc)
7531 struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7534 int err = 0, i, count;
7536 struct brcms_txq_info *qi = wlc->pkt_queue;
7537 struct pktq *q = &qi->q;
7538 struct ieee80211_tx_info *tx_info;
7540 prec_map = wlc->tx_prec_map;
7542 /* Send all the enq'd pkts that we can.
7543 * Dequeue packets with precedence with empty HW fifo only
7545 while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7546 tx_info = IEEE80211_SKB_CB(pkt[0]);
7547 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7548 err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7551 err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7553 for (i = 0; i < count; i++)
7554 brcms_c_txfifo(wlc, fifo, pkt[i], true,
7559 if (err == -EBUSY) {
7560 brcmu_pktq_penq_head(q, prec, pkt[0]);
7562 * If send failed due to any other reason than a
7563 * change in HW FIFO condition, quit. Otherwise,
7564 * read the new prec_map!
7566 if (prec_map == wlc->tx_prec_map)
7568 prec_map = wlc->tx_prec_map;
7574 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7575 bool commit, s8 txpktpend)
7577 u16 frameid = INVALIDFID;
7580 txh = (struct d11txh *) (p->data);
7582 /* When a BC/MC frame is being committed to the BCMC fifo
7583 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7585 if (fifo == TX_BCMC_FIFO)
7586 frameid = le16_to_cpu(txh->TxFrameID);
7589 * Bump up pending count for if not using rpc. If rpc is
7590 * used, this will be handled in brcms_b_txfifo()
7593 wlc->core->txpktpend[fifo] += txpktpend;
7594 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7595 txpktpend, wlc->core->txpktpend[fifo]);
7598 /* Commit BCMC sequence number in the SHM frame ID location */
7599 if (frameid != INVALIDFID) {
7601 * To inform the ucode of the last mcast frame posted
7602 * so that it can clear moredata bit
7604 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7607 if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7608 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7612 * Compute PLCP, but only requires actual rate and length of pkt.
7613 * Rate is given in the driver standard multiple of 500 kbps.
7614 * le is set for 11 Mbps rate if necessary.
7615 * Broken out for PRQ.
7618 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
7619 uint length, u8 *plcp)
7632 usec = (length << 4) / 11;
7633 if ((length << 4) - (usec * 11) > 0)
7637 usec = (length << 3) / 11;
7638 if ((length << 3) - (usec * 11) > 0) {
7640 if ((usec * 11) - (length << 3) >= 8)
7641 le = D11B_PLCP_SIGNAL_LE;
7646 wiphy_err(wlc->wiphy,
7647 "brcms_c_cck_plcp_set: unsupported rate %d\n",
7649 rate_500 = BRCM_RATE_1M;
7653 /* PLCP signal byte */
7654 plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
7655 /* PLCP service byte */
7656 plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
7657 /* PLCP length u16, little endian */
7658 plcp[2] = usec & 0xff;
7659 plcp[3] = (usec >> 8) & 0xff;
7665 /* Rate: 802.11 rate code, length: PSDU length in octets */
7666 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
7668 u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
7670 if (rspec_is40mhz(rspec) || (mcs == 32))
7671 plcp[0] |= MIMO_PLCP_40MHZ;
7672 BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
7673 plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
7674 plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
7675 plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
7679 /* Rate: 802.11 rate code, length: PSDU length in octets */
7681 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
7685 int rate = rspec2rate(rspec);
7688 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
7691 rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
7692 memset(plcp, 0, D11_PHY_HDR_LEN);
7693 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
7695 tmp = (length & 0xfff) << 5;
7696 plcp[2] |= (tmp >> 16) & 0xff;
7697 plcp[1] |= (tmp >> 8) & 0xff;
7698 plcp[0] |= tmp & 0xff;
7701 /* Rate: 802.11 rate code, length: PSDU length in octets */
7702 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
7703 uint length, u8 *plcp)
7705 int rate = rspec2rate(rspec);
7707 brcms_c_cck_plcp_set(wlc, rate, length, plcp);
7711 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
7712 uint length, u8 *plcp)
7714 if (is_mcs_rate(rspec))
7715 brcms_c_compute_mimo_plcp(rspec, length, plcp);
7716 else if (is_ofdm_rate(rspec))
7717 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
7719 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
7722 /* brcms_c_compute_rtscts_dur()
7724 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
7725 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
7726 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
7728 * cts cts-to-self or rts/cts
7729 * rts_rate rts or cts rate in unit of 500kbps
7730 * rate next MPDU rate in unit of 500kbps
7731 * frame_len next MPDU frame length in bytes
7734 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
7736 u32 frame_rate, u8 rts_preamble_type,
7737 u8 frame_preamble_type, uint frame_len, bool ba)
7741 sifs = get_sifs(wlc->band);
7747 (u16) brcms_c_calc_cts_time(wlc, rts_rate,
7755 (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
7759 (u16) brcms_c_calc_ba_time(wlc, frame_rate,
7760 BRCMS_SHORT_PREAMBLE);
7763 (u16) brcms_c_calc_ack_time(wlc, frame_rate,
7764 frame_preamble_type);
7768 u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
7773 if (BRCMS_ISLCNPHY(wlc->band)) {
7774 bw = PHY_TXC1_BW_20MHZ;
7776 bw = rspec_get_bw(rspec);
7777 /* 10Mhz is not supported yet */
7778 if (bw < PHY_TXC1_BW_20MHZ) {
7779 wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
7780 "not supported yet, set to 20L\n", bw);
7781 bw = PHY_TXC1_BW_20MHZ;
7785 if (is_mcs_rate(rspec)) {
7786 uint mcs = rspec & RSPEC_RATE_MASK;
7788 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
7789 phyctl1 = rspec_phytxbyte2(rspec);
7790 /* set the upper byte of phyctl1 */
7791 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
7792 } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
7793 && !BRCMS_ISSSLPNPHY(wlc->band)) {
7795 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
7796 * Data Rate. Eventually MIMOPHY would also be converted to
7799 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
7800 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
7801 } else { /* legacy OFDM/CCK */
7803 /* get the phyctl byte from rate phycfg table */
7804 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
7806 wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
7807 "legacy OFDM/CCK rate\n");
7810 /* set the upper byte of phyctl1 */
7812 (bw | (phycfg << 8) |
7813 (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
7819 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7820 bool use_rspec, u16 mimo_ctlchbw)
7825 /* use frame rate as rts rate */
7827 else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7828 /* Use 11Mbps as the g protection RTS target rate and fallback.
7829 * Use the brcms_basic_rate() lookup to find the best basic rate
7830 * under the target in case 11 Mbps is not Basic.
7831 * 6 and 9 Mbps are not usually selected by rate selection, but
7832 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7835 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7837 /* calculate RTS rate and fallback rate based on the frame rate
7838 * RTS must be sent at a basic rate since it is a
7839 * control frame, sec 9.6 of 802.11 spec
7841 rts_rspec = brcms_basic_rate(wlc, rspec);
7843 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7844 /* set rts txbw to correct side band */
7845 rts_rspec &= ~RSPEC_BW_MASK;
7848 * if rspec/rspec_fallback is 40MHz, then send RTS on both
7849 * 20MHz channel (DUP), otherwise send RTS on control channel
7851 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7852 rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7854 rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7856 /* pick siso/cdd as default for ofdm */
7857 if (is_ofdm_rate(rts_rspec)) {
7858 rts_rspec &= ~RSPEC_STF_MASK;
7859 rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7865 void brcms_c_tbtt(struct brcms_c_info *wlc)
7867 if (!wlc->bsscfg->BSS)
7869 * DirFrmQ is now valid...defer setting until end
7872 wlc->qvalid |= MCMD_DIRFRMQVAL;
7876 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7878 wlc->core->txpktpend[fifo] -= txpktpend;
7879 BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7880 wlc->core->txpktpend[fifo]);
7882 /* There is more room; mark precedences related to this FIFO sendable */
7883 wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7885 /* figure out which bsscfg is being worked on... */
7888 /* Update beacon listen interval in shared memory */
7889 void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7891 /* wake up every DTIM is the default */
7892 if (wlc->bcn_li_dtim == 1)
7893 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7895 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7896 (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7900 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7903 struct d11regs __iomem *regs = wlc_hw->regs;
7905 /* read the tsf timer low, then high to get an atomic read */
7906 *tsf_l_ptr = R_REG(®s->tsf_timerlow);
7907 *tsf_h_ptr = R_REG(®s->tsf_timerhigh);
7911 * recover 64bit TSF value from the 16bit TSF value in the rx header
7912 * given the assumption that the TSF passed in header is within 65ms
7913 * of the current tsf.
7916 * 3.......6.......8.......0.......2.......4.......6.......8......0
7917 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7919 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7920 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7921 * receive call sequence after rx interrupt. Only the higher 16 bits
7922 * are used. Finally, the tsf_h is read from the tsf register.
7924 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7925 struct d11rxhdr *rxh)
7928 u16 rx_tsf_0_15, rx_tsf_16_31;
7930 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7932 rx_tsf_16_31 = (u16)(tsf_l >> 16);
7933 rx_tsf_0_15 = rxh->RxTSFTime;
7936 * a greater tsf time indicates the low 16 bits of
7937 * tsf_l wrapped, so decrement the high 16 bits.
7939 if ((u16)tsf_l < rx_tsf_0_15) {
7941 if (rx_tsf_16_31 == 0xffff)
7945 return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7949 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7951 struct ieee80211_rx_status *rx_status)
7956 unsigned char *plcp;
7958 /* fill in TSF and flag its presence */
7959 rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7960 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7962 channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7965 rx_status->band = IEEE80211_BAND_5GHZ;
7966 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7967 WF_CHAN_FACTOR_5_G/2, channel);
7970 rx_status->band = IEEE80211_BAND_2GHZ;
7971 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7974 rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7978 rx_status->antenna =
7979 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7983 rspec = brcms_c_compute_rspec(rxh, plcp);
7984 if (is_mcs_rate(rspec)) {
7985 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7986 rx_status->flag |= RX_FLAG_HT;
7987 if (rspec_is40mhz(rspec))
7988 rx_status->flag |= RX_FLAG_40MHZ;
7990 switch (rspec2rate(rspec)) {
7992 rx_status->rate_idx = 0;
7995 rx_status->rate_idx = 1;
7998 rx_status->rate_idx = 2;
8001 rx_status->rate_idx = 3;
8004 rx_status->rate_idx = 4;
8007 rx_status->rate_idx = 5;
8010 rx_status->rate_idx = 6;
8013 rx_status->rate_idx = 7;
8016 rx_status->rate_idx = 8;
8019 rx_status->rate_idx = 9;
8022 rx_status->rate_idx = 10;
8025 rx_status->rate_idx = 11;
8028 wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
8032 * For 5GHz, we should decrease the index as it is
8033 * a subset of the 2.4G rates. See bitrates field
8034 * of brcms_band_5GHz_nphy (in mac80211_if.c).
8036 if (rx_status->band == IEEE80211_BAND_5GHZ)
8037 rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
8039 /* Determine short preamble and rate_idx */
8041 if (is_cck_rate(rspec)) {
8042 if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
8043 rx_status->flag |= RX_FLAG_SHORTPRE;
8044 } else if (is_ofdm_rate(rspec)) {
8045 rx_status->flag |= RX_FLAG_SHORTPRE;
8047 wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
8052 if (plcp3_issgi(plcp[3]))
8053 rx_status->flag |= RX_FLAG_SHORT_GI;
8055 if (rxh->RxStatus1 & RXS_DECERR) {
8056 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
8057 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
8060 if (rxh->RxStatus1 & RXS_FCSERR) {
8061 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
8062 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n",
8068 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
8072 struct ieee80211_rx_status rx_status;
8074 memset(&rx_status, 0, sizeof(rx_status));
8075 prep_mac80211_status(wlc, rxh, p, &rx_status);
8077 /* mac header+body length, exclude CRC and plcp header */
8078 len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
8079 skb_pull(p, D11_PHY_HDR_LEN);
8080 __skb_trim(p, len_mpdu);
8082 memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
8083 ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
8086 /* Process received frames */
8088 * Return true if more frames need to be processed. false otherwise.
8089 * Param 'bound' indicates max. # frames to process before break out.
8091 void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8093 struct d11rxhdr *rxh;
8094 struct ieee80211_hdr *h;
8098 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8100 /* frame starts with rxhdr */
8101 rxh = (struct d11rxhdr *) (p->data);
8103 /* strip off rxhdr */
8104 skb_pull(p, BRCMS_HWRXOFF);
8106 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8107 if (rxh->RxStatus1 & RXS_PBPRES) {
8109 wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8110 "len %d\n", wlc->pub->unit, p->len);
8116 h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8119 if (rxh->RxStatus1 & RXS_FCSERR) {
8120 if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) {
8121 wiphy_err(wlc->wiphy, "FCSERR while scanning******* -"
8125 wiphy_err(wlc->wiphy, "RCSERR!!!\n");
8130 /* check received pkt has at least frame control field */
8131 if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8134 /* not supporting A-MSDU */
8135 is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8139 brcms_c_recvctl(wlc, rxh, p);
8143 brcmu_pkt_buf_free_skb(p);
8146 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
8147 * number of bytes goes in the length field
8149 * Formula given by HT PHY Spec v 1.13
8150 * len = 3(nsyms + nstream + 3) - 3
8153 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
8156 uint nsyms, len = 0, kNdps;
8158 BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
8159 wlc->pub->unit, rspec2rate(ratespec), mac_len);
8161 if (is_mcs_rate(ratespec)) {
8162 uint mcs = ratespec & RSPEC_RATE_MASK;
8163 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
8164 rspec_stc(ratespec);
8167 * the payload duration calculation matches that
8170 /* 1000Ndbps = kbps * 4 */
8171 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8172 rspec_issgi(ratespec)) * 4;
8174 if (rspec_stc(ratespec) == 0)
8176 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8177 APHY_TAIL_NBITS) * 1000, kNdps);
8179 /* STBC needs to have even number of symbols */
8182 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8183 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8185 /* (+3) account for HT-SIG(2) and HT-STF(1) */
8186 nsyms += (tot_streams + 3);
8188 * 3 bytes/symbol @ legacy 6Mbps rate
8189 * (-3) excluding service bits and tail bits
8191 len = (3 * nsyms) - 3;
8198 * calculate frame duration of a given rate and length, return
8202 brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
8203 u8 preamble_type, uint mac_len)
8205 uint nsyms, dur = 0, Ndps, kNdps;
8206 uint rate = rspec2rate(ratespec);
8209 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
8211 rate = BRCM_RATE_1M;
8214 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
8215 wlc->pub->unit, ratespec, preamble_type, mac_len);
8217 if (is_mcs_rate(ratespec)) {
8218 uint mcs = ratespec & RSPEC_RATE_MASK;
8219 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
8221 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
8222 if (preamble_type == BRCMS_MM_PREAMBLE)
8224 /* 1000Ndbps = kbps * 4 */
8225 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8226 rspec_issgi(ratespec)) * 4;
8228 if (rspec_stc(ratespec) == 0)
8230 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8231 APHY_TAIL_NBITS) * 1000, kNdps);
8233 /* STBC needs to have even number of symbols */
8236 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8237 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8239 dur += APHY_SYMBOL_TIME * nsyms;
8240 if (wlc->band->bandtype == BRCM_BAND_2G)
8241 dur += DOT11_OFDM_SIGNAL_EXTENSION;
8242 } else if (is_ofdm_rate(rate)) {
8243 dur = APHY_PREAMBLE_TIME;
8244 dur += APHY_SIGNAL_TIME;
8245 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
8247 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
8249 CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
8251 dur += APHY_SYMBOL_TIME * nsyms;
8252 if (wlc->band->bandtype == BRCM_BAND_2G)
8253 dur += DOT11_OFDM_SIGNAL_EXTENSION;
8256 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
8259 mac_len = mac_len * 8 * 2;
8260 /* calc ceiling of bits/rate = microseconds of air time */
8261 dur = (mac_len + rate - 1) / rate;
8262 if (preamble_type & BRCMS_SHORT_PREAMBLE)
8263 dur += BPHY_PLCP_SHORT_TIME;
8265 dur += BPHY_PLCP_TIME;
8270 /* derive wlc->band->basic_rate[] table from 'rateset' */
8271 void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
8272 struct brcms_c_rateset *rateset)
8278 u8 *br = wlc->band->basic_rate;
8281 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
8282 memset(br, 0, BRCM_MAXRATE + 1);
8284 /* For each basic rate in the rates list, make an entry in the
8285 * best basic lookup.
8287 for (i = 0; i < rateset->count; i++) {
8288 /* only make an entry for a basic rate */
8289 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
8292 /* mask off basic bit */
8293 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
8295 if (rate > BRCM_MAXRATE) {
8296 wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
8297 "invalid rate 0x%X in rate set\n",
8305 /* The rate lookup table now has non-zero entries for each
8306 * basic rate, equal to the basic rate: br[basicN] = basicN
8308 * To look up the best basic rate corresponding to any
8309 * particular rate, code can use the basic_rate table
8312 * basic_rate = wlc->band->basic_rate[tx_rate]
8314 * Make sure there is a best basic rate entry for
8315 * every rate by walking up the table from low rates
8316 * to high, filling in holes in the lookup table
8319 for (i = 0; i < wlc->band->hw_rateset.count; i++) {
8320 rate = wlc->band->hw_rateset.rates[i];
8322 if (br[rate] != 0) {
8323 /* This rate is a basic rate.
8324 * Keep track of the best basic rate so far by
8327 if (is_ofdm_rate(rate))
8335 /* This rate is not a basic rate so figure out the
8336 * best basic rate less than this rate and fill in
8337 * the hole in the table
8340 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
8345 if (is_ofdm_rate(rate)) {
8347 * In 11g and 11a, the OFDM mandatory rates
8348 * are 6, 12, and 24 Mbps
8350 if (rate >= BRCM_RATE_24M)
8351 mandatory = BRCM_RATE_24M;
8352 else if (rate >= BRCM_RATE_12M)
8353 mandatory = BRCM_RATE_12M;
8355 mandatory = BRCM_RATE_6M;
8357 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
8361 br[rate] = mandatory;
8365 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
8369 u8 basic_phy_rate, basic_index;
8370 u16 dir_table, basic_table;
8373 /* Shared memory address for the table we are reading */
8374 dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
8376 /* Shared memory address for the table we are writing */
8377 basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
8380 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
8381 * the index into the rate table.
8383 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
8384 basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
8385 index = phy_rate & 0xf;
8386 basic_index = basic_phy_rate & 0xf;
8388 /* Find the SHM pointer to the ACK rate entry by looking in the
8391 basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
8393 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
8394 * to the correct basic rate for the given incoming rate
8396 brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
8399 static const struct brcms_c_rateset *
8400 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
8402 const struct brcms_c_rateset *rs_dflt;
8404 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8405 if (wlc->band->bandtype == BRCM_BAND_5G)
8406 rs_dflt = &ofdm_mimo_rates;
8408 rs_dflt = &cck_ofdm_mimo_rates;
8409 } else if (wlc->band->gmode)
8410 rs_dflt = &cck_ofdm_rates;
8412 rs_dflt = &cck_rates;
8417 void brcms_c_set_ratetable(struct brcms_c_info *wlc)
8419 const struct brcms_c_rateset *rs_dflt;
8420 struct brcms_c_rateset rs;
8421 u8 rate, basic_rate;
8424 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8426 brcms_c_rateset_copy(rs_dflt, &rs);
8427 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8429 /* walk the phy rate table and update SHM basic rate lookup table */
8430 for (i = 0; i < rs.count; i++) {
8431 rate = rs.rates[i] & BRCMS_RATE_MASK;
8433 /* for a given rate brcms_basic_rate returns the rate at
8434 * which a response ACK/CTS should be sent.
8436 basic_rate = brcms_basic_rate(wlc, rate);
8437 if (basic_rate == 0)
8438 /* This should only happen if we are using a
8439 * restricted rateset.
8441 basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
8443 brcms_c_write_rate_shm(wlc, rate, basic_rate);
8448 * Return true if the specified rate is supported by the specified band.
8449 * BRCM_BAND_AUTO indicates the current band.
8451 bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
8454 struct brcms_c_rateset *hw_rateset;
8457 if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
8458 hw_rateset = &wlc->band->hw_rateset;
8459 else if (wlc->pub->_nbands > 1)
8460 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
8462 /* other band specified and we are a single band device */
8465 /* check if this is a mimo rate */
8466 if (is_mcs_rate(rspec)) {
8467 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
8470 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
8473 for (i = 0; i < hw_rateset->count; i++)
8474 if (hw_rateset->rates[i] == rspec2rate(rspec))
8478 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
8479 "not in hw_rateset\n", wlc->pub->unit, rspec);
8484 void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
8486 const struct brcms_c_rateset *rs_dflt;
8487 struct brcms_c_rateset rs;
8490 u8 plcp[D11_PHY_HDR_LEN];
8494 sifs = get_sifs(wlc->band);
8496 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8498 brcms_c_rateset_copy(rs_dflt, &rs);
8499 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8502 * walk the phy rate table and update MAC core SHM
8503 * basic rate table entries
8505 for (i = 0; i < rs.count; i++) {
8506 rate = rs.rates[i] & BRCMS_RATE_MASK;
8508 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
8510 /* Calculate the Probe Response PLCP for the given rate */
8511 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
8514 * Calculate the duration of the Probe Response
8515 * frame plus SIFS for the MAC
8517 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
8518 BRCMS_LONG_PREAMBLE, frame_len);
8521 /* Update the SHM Rate Table entry Probe Response values */
8522 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
8523 (u16) (plcp[0] + (plcp[1] << 8)));
8524 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
8525 (u16) (plcp[2] + (plcp[3] << 8)));
8526 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
8530 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
8532 * PLCP header is 6 bytes.
8533 * 802.11 A3 header is 24 bytes.
8534 * Max beacon frame body template length is 112 bytes.
8535 * Max probe resp frame body template length is 110 bytes.
8537 * *len on input contains the max length of the packet available.
8539 * The *len value is set to the number of bytes in buf used, and starts
8540 * with the PLCP and included up to, but not including, the 4 byte FCS.
8543 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
8545 struct brcms_bss_cfg *cfg, u16 *buf, int *len)
8547 static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
8548 struct cck_phy_hdr *plcp;
8549 struct ieee80211_mgmt *h;
8550 int hdr_len, body_len;
8552 hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
8554 /* calc buffer size provided for frame body */
8555 body_len = *len - hdr_len;
8556 /* return actual size */
8557 *len = hdr_len + body_len;
8559 /* format PHY and MAC headers */
8560 memset((char *)buf, 0, hdr_len);
8562 plcp = (struct cck_phy_hdr *) buf;
8565 * PLCP for Probe Response frames are filled in from
8568 if (type == IEEE80211_STYPE_BEACON)
8570 brcms_c_compute_plcp(wlc, bcn_rspec,
8571 (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
8574 /* "Regular" and 16 MBSS but not for 4 MBSS */
8575 /* Update the phytxctl for the beacon based on the rspec */
8576 brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
8578 h = (struct ieee80211_mgmt *)&plcp[1];
8580 /* fill in 802.11 header */
8581 h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
8583 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
8584 /* A1 filled in by MAC for prb resp, broadcast for bcn */
8585 if (type == IEEE80211_STYPE_BEACON)
8586 memcpy(&h->da, ðer_bcast, ETH_ALEN);
8587 memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
8588 memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
8590 /* SEQ filled in by MAC */
8593 int brcms_c_get_header_len(void)
8599 * Update all beacons for the system.
8601 void brcms_c_update_beacon(struct brcms_c_info *wlc)
8603 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8605 if (bsscfg->up && !bsscfg->BSS)
8606 /* Clear the soft intmask */
8607 wlc->defmacintmask &= ~MI_BCNTPL;
8610 /* Write ssid into shared memory */
8611 void brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
8613 u8 *ssidptr = cfg->SSID;
8615 u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
8617 /* padding the ssid with zero and copy it into shm */
8618 memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
8619 memcpy(ssidbuf, ssidptr, cfg->SSID_len);
8621 brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
8622 brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
8625 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
8627 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8629 /* update AP or IBSS probe responses */
8630 if (bsscfg->up && !bsscfg->BSS)
8631 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
8635 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
8636 struct brcms_bss_cfg *cfg,
8639 u16 prb_resp[BCN_TMPL_LEN / 2];
8640 int len = BCN_TMPL_LEN;
8643 * write the probe response to hardware, or save in
8644 * the config structure
8647 /* create the probe response template */
8648 brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
8649 cfg, prb_resp, &len);
8652 brcms_c_suspend_mac_and_wait(wlc);
8654 /* write the probe response into the template region */
8655 brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
8656 (len + 3) & ~3, prb_resp);
8658 /* write the length of the probe response frame (+PLCP/-FCS) */
8659 brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
8661 /* write the SSID and SSID length */
8662 brcms_c_shm_ssid_upd(wlc, cfg);
8665 * Write PLCP headers and durations for probe response frames
8666 * at all rates. Use the actual frame length covered by the
8667 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
8668 * by subtracting the PLCP len and adding the FCS.
8670 len += (-D11_PHY_HDR_LEN + FCS_LEN);
8671 brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
8674 brcms_c_enable_mac(wlc);
8677 /* prepares pdu for transmission. returns BCM error codes */
8678 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
8682 struct ieee80211_hdr *h;
8685 txh = (struct d11txh *) (pdu->data);
8686 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
8688 /* get the pkt queue info. This was put at brcms_c_sendctl or
8689 * brcms_c_send for PDU */
8690 fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
8696 /* return if insufficient dma resources */
8697 if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
8698 /* Mark precedences related to this FIFO, unsendable */
8699 /* A fifo is full. Clear precedences related to that FIFO */
8700 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
8706 void brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
8708 brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
8709 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
8710 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
8711 brcms_chspec_bw(wlc->default_bss->chanspec),
8712 wlc->stf->txstreams);
8715 /* Copy a buffer to shared memory.
8716 * SHM 'offset' needs to be an even address and
8717 * Buffer length 'len' must be an even number of bytes
8719 void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset, const void *buf,
8722 brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
8725 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
8731 *blocks = wlc_hw->xmtfifo_sz[fifo];
8737 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
8740 brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
8741 if (match_reg_offset == RCM_BSSID_OFFSET)
8742 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
8745 /* check for the particular priority flow control bit being set */
8747 brcms_c_txflowcontrol_prio_isset(struct brcms_c_info *wlc,
8748 struct brcms_txq_info *q,
8753 if (prio == ALLPRIO)
8754 prio_mask = TXQ_STOP_FOR_PRIOFC_MASK;
8756 prio_mask = NBITVAL(prio);
8758 return (q->stopped & prio_mask) == prio_mask;
8761 /* propagate the flow control to all interfaces using the given tx queue */
8762 void brcms_c_txflowcontrol(struct brcms_c_info *wlc,
8763 struct brcms_txq_info *qi,
8769 BCMMSG(wlc->wiphy, "flow control kicks in\n");
8771 if (prio == ALLPRIO)
8772 prio_bits = TXQ_STOP_FOR_PRIOFC_MASK;
8774 prio_bits = NBITVAL(prio);
8776 cur_bits = qi->stopped & prio_bits;
8778 /* Check for the case of no change and return early
8779 * Otherwise update the bit and continue
8782 if (cur_bits == prio_bits)
8785 mboolset(qi->stopped, prio_bits);
8790 mboolclr(qi->stopped, prio_bits);
8793 /* If there is a flow control override we will not change the external
8794 * flow control state.
8796 if (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK)
8799 brcms_c_txflowcontrol_signal(wlc, qi, on, prio);
8803 brcms_c_txflowcontrol_override(struct brcms_c_info *wlc,
8804 struct brcms_txq_info *qi,
8805 bool on, uint override)
8809 prev_override = (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK);
8811 /* Update the flow control bits and do an early return if there is
8812 * no change in the external flow control state.
8815 mboolset(qi->stopped, override);
8816 /* if there was a previous override bit on, then setting this
8817 * makes no difference.
8822 brcms_c_txflowcontrol_signal(wlc, qi, ON, ALLPRIO);
8824 mboolclr(qi->stopped, override);
8825 /* clearing an override bit will only make a difference for
8826 * flow control if it was the only bit set. For any other
8827 * override setting, just return
8829 if (prev_override != override)
8832 if (qi->stopped == 0) {
8833 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
8837 for (prio = MAXPRIO; prio >= 0; prio--) {
8838 if (!mboolisset(qi->stopped, NBITVAL(prio)))
8839 brcms_c_txflowcontrol_signal(
8840 wlc, qi, OFF, prio);
8847 * Flag 'scan in progress' to withhold dynamic phy calibration
8849 void brcms_c_scan_start(struct brcms_c_info *wlc)
8851 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
8854 void brcms_c_scan_stop(struct brcms_c_info *wlc)
8856 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
8859 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
8861 wlc->pub->associated = state;
8862 wlc->bsscfg->associated = state;
8866 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
8867 * AMPDU traffic, packets pending in hardware have to be invalidated so that
8868 * when later on hardware releases them, they can be handled appropriately.
8870 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
8871 struct ieee80211_sta *sta,
8872 void (*dma_callback_fn))
8874 struct dma_pub *dmah;
8876 for (i = 0; i < NFIFO; i++) {
8879 dma_walk_packets(dmah, dma_callback_fn, sta);
8883 int brcms_c_get_curband(struct brcms_c_info *wlc)
8885 return wlc->band->bandunit;
8888 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
8890 /* flush packet queue when requested */
8892 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
8894 /* wait for queue and DMA fifos to run dry */
8895 while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0)
8896 brcms_msleep(wlc->wl, 1);
8899 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
8901 wlc->bcn_li_bcn = interval;
8903 brcms_c_bcn_li_upd(wlc);
8906 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8910 /* Remove override bit and clip to max qdbm value */
8911 qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8912 return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8915 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8920 wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8922 /* Return qdbm units */
8923 return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8926 void brcms_c_set_radio_mpc(struct brcms_c_info *wlc, bool mpc)
8929 brcms_c_radio_mpc_upd(wlc);
8933 * Search the name=value vars for a specific one and return its value.
8934 * Returns NULL if not found.
8936 char *getvar(char *vars, const char *name)
8948 /* first look in vars[] */
8949 for (s = vars; s && *s;) {
8950 if ((memcmp(s, name, len) == 0) && (s[len] == '='))
8961 * Search the vars for a specific one and return its value as
8962 * an integer. Returns 0 if not found.
8964 int getintvar(char *vars, const char *name)
8969 val = getvar(vars, name);
8970 if (val && !kstrtoul(val, 0, &res))