Pileus Git - ~andy/linux/blob - drivers/staging/bcm/Adapter.h

   1 /***********************************
   2 *       Adapter.h
   3 ************************************/
   4 #ifndef __ADAPTER_H__
   5 #define __ADAPTER_H__
   6
   7 #define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
   8 #include "Debug.h"
   9
  10 struct _LEADER {
  11         USHORT  Vcid;
  12         USHORT  PLength;
  13         UCHAR   Status;
  14         UCHAR   Unused[3];
  15 } __attribute__((packed));
  16 typedef struct _LEADER LEADER, *PLEADER;
  17
  18 struct _PACKETTOSEND {
  19         LEADER  Leader;
  20         UCHAR   ucPayload;
  21 } __attribute__((packed));
  22 typedef struct _PACKETTOSEND PACKETTOSEND, *PPACKETTOSEND;
  23
  24 struct _CONTROL_PACKET {
  25         PVOID   ControlBuff;
  26         UINT    ControlBuffLen;
  27         struct _CONTROL_PACKET *next;
  28 } __attribute__((packed));
  29 typedef struct _CONTROL_PACKET CONTROL_PACKET, *PCONTROL_PACKET;
  30
  31 struct link_request {
  32         LEADER  Leader;
  33         UCHAR   szData[4];
  34 } __attribute__((packed));
  35 typedef struct link_request LINK_REQUEST, *PLINK_REQUEST;
  36
  37 //classification extension is added
  38 typedef struct _ADD_CONNECTION {
  39         ULONG   SrcIpAddressCount;
  40         ULONG   SrcIpAddress[MAX_CONNECTIONS];
  41         ULONG   SrcIpMask[MAX_CONNECTIONS];
  42
  43         ULONG   DestIpAddressCount;
  44         ULONG   DestIpAddress[MAX_CONNECTIONS];
  45         ULONG   DestIpMask[MAX_CONNECTIONS];
  46
  47         USHORT  SrcPortBegin;
  48         USHORT  SrcPortEnd;
  49
  50         USHORT  DestPortBegin;
  51         USHORT  DestPortEnd;
  52
  53         UCHAR   SrcTOS;
  54         UCHAR   SrcProtocol;
  55 } ADD_CONNECTION, *PADD_CONNECTION;
  56
  57 typedef struct _CLASSIFICATION_RULE {
  58         UCHAR   ucIPSrcAddrLen;
  59         UCHAR   ucIPSrcAddr[32];
  60         UCHAR   ucIPDestAddrLen;
  61         UCHAR   ucIPDestAddr[32];
  62         UCHAR   ucSrcPortRangeLen;
  63         UCHAR   ucSrcPortRange[4];
  64         UCHAR   ucDestPortRangeLen;
  65         UCHAR   ucDestPortRange[4];
  66         USHORT  usVcid;
  67 } CLASSIFICATION_RULE, *PCLASSIFICATION_RULE;
  68
  69 typedef struct _CLASSIFICATION_ONLY {
  70         USHORT  usVcid;
  71         ULONG   DestIpAddress;
  72         ULONG   DestIpMask;
  73         USHORT  usPortLo;
  74         USHORT  usPortHi;
  75         BOOLEAN bIpVersion;
  76         UCHAR   ucDestinationAddress[16];
  77 } CLASSIFICATION_ONLY, *PCLASSIFICATION_ONLY;
  78
  79 #define MAX_IP_RANGE_LENGTH 4
  80 #define MAX_PORT_RANGE 4
  81 #define MAX_PROTOCOL_LENGTH   32
  82 #define IPV6_ADDRESS_SIZEINBYTES 0x10
  83
  84 typedef union _U_IP_ADDRESS {
  85         struct {
  86                 ULONG ulIpv4Addr[MAX_IP_RANGE_LENGTH];//Source Ip Address Range
  87                 ULONG ulIpv4Mask[MAX_IP_RANGE_LENGTH];//Source Ip Mask Address Range
  88         };
  89         struct {
  90                 ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4];//Source Ip Address Range
  91                 ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4];//Source Ip Mask Address Range
  92         };
  93         struct {
  94                 UCHAR ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
  95                 UCHAR ucIpv4Mask[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
  96         };
  97         struct {
  98                 UCHAR ucIpv6Address[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
  99                 UCHAR ucIpv6Mask[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
 100         };
 101 } U_IP_ADDRESS;
 102 struct _packet_info;
 103
 104 typedef struct _S_HDR_SUPRESSION_CONTEXTINFO {
 105         UCHAR ucaHdrSupressionInBuf[MAX_PHS_LENGTHS]; //Intermediate buffer to accumulate pkt Header for PHS
 106         UCHAR ucaHdrSupressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN]; //Intermediate buffer containing pkt Header after PHS
 107 } S_HDR_SUPRESSION_CONTEXTINFO;
 108
 109 typedef struct _S_CLASSIFIER_RULE {
 110         ULONG           ulSFID;
 111         UCHAR           ucReserved[2];
 112         B_UINT16        uiClassifierRuleIndex;
 113         BOOLEAN         bUsed;
 114         USHORT          usVCID_Value;
 115         B_UINT8         u8ClassifierRulePriority; //This field detemines the Classifier Priority
 116         U_IP_ADDRESS    stSrcIpAddress;
 117         UCHAR           ucIPSourceAddressLength;//Ip Source Address Length
 118
 119         U_IP_ADDRESS    stDestIpAddress;
 120         UCHAR           ucIPDestinationAddressLength;//Ip Destination Address Length
 121         UCHAR           ucIPTypeOfServiceLength;//Type of service Length
 122         UCHAR           ucTosLow;//Tos Low
 123         UCHAR           ucTosHigh;//Tos High
 124         UCHAR           ucTosMask;//Tos Mask
 125
 126         UCHAR           ucProtocolLength;//protocol Length
 127         UCHAR           ucProtocol[MAX_PROTOCOL_LENGTH];//protocol Length
 128         USHORT          usSrcPortRangeLo[MAX_PORT_RANGE];
 129         USHORT          usSrcPortRangeHi[MAX_PORT_RANGE];
 130         UCHAR           ucSrcPortRangeLength;
 131
 132         USHORT          usDestPortRangeLo[MAX_PORT_RANGE];
 133         USHORT          usDestPortRangeHi[MAX_PORT_RANGE];
 134         UCHAR           ucDestPortRangeLength;
 135
 136         BOOLEAN         bProtocolValid;
 137         BOOLEAN         bTOSValid;
 138         BOOLEAN         bDestIpValid;
 139         BOOLEAN         bSrcIpValid;
 140
 141         //For IPv6 Addressing
 142         UCHAR           ucDirection;
 143         BOOLEAN         bIpv6Protocol;
 144         UINT32          u32PHSRuleID;
 145         S_PHS_RULE      sPhsRule;
 146         UCHAR           u8AssociatedPHSI;
 147
 148         //Classification fields for ETH CS
 149         UCHAR           ucEthCSSrcMACLen;
 150         UCHAR           au8EThCSSrcMAC[MAC_ADDRESS_SIZE];
 151         UCHAR           au8EThCSSrcMACMask[MAC_ADDRESS_SIZE];
 152         UCHAR           ucEthCSDestMACLen;
 153         UCHAR           au8EThCSDestMAC[MAC_ADDRESS_SIZE];
 154         UCHAR           au8EThCSDestMACMask[MAC_ADDRESS_SIZE];
 155         UCHAR           ucEtherTypeLen;
 156         UCHAR           au8EthCSEtherType[NUM_ETHERTYPE_BYTES];
 157         UCHAR           usUserPriority[2];
 158         USHORT          usVLANID;
 159         USHORT          usValidityBitMap;
 160 } S_CLASSIFIER_RULE;
 161 //typedef struct _S_CLASSIFIER_RULE S_CLASSIFIER_RULE;
 162
 163 typedef struct _S_FRAGMENTED_PACKET_INFO {
 164         BOOLEAN                 bUsed;
 165         ULONG                   ulSrcIpAddress;
 166         USHORT                  usIpIdentification;
 167         S_CLASSIFIER_RULE       *pstMatchedClassifierEntry;
 168         BOOLEAN                 bOutOfOrderFragment;
 169 } S_FRAGMENTED_PACKET_INFO, *PS_FRAGMENTED_PACKET_INFO;
 170
 171 struct _packet_info {
 172         //classification extension Rule
 173         ULONG           ulSFID;
 174         USHORT          usVCID_Value;
 175         UINT            uiThreshold;
 176         // This field determines the priority of the SF Queues
 177         B_UINT8         u8TrafficPriority;
 178
 179         BOOLEAN         bValid;
 180         BOOLEAN         bActive;
 181         BOOLEAN         bActivateRequestSent;
 182
 183         B_UINT8         u8QueueType;//BE or rtPS
 184
 185         UINT            uiMaxBucketSize;//maximum size of the bucket for the queue
 186         UINT            uiCurrentQueueDepthOnTarget;
 187         UINT            uiCurrentBytesOnHost;
 188         UINT            uiCurrentPacketsOnHost;
 189         UINT            uiDroppedCountBytes;
 190         UINT            uiDroppedCountPackets;
 191         UINT            uiSentBytes;
 192         UINT            uiSentPackets;
 193         UINT            uiCurrentDrainRate;
 194         UINT            uiThisPeriodSentBytes;
 195         LARGE_INTEGER   liDrainCalculated;
 196         UINT            uiCurrentTokenCount;
 197         LARGE_INTEGER   liLastUpdateTokenAt;
 198         UINT            uiMaxAllowedRate;
 199         UINT            NumOfPacketsSent;
 200         UCHAR           ucDirection;
 201         USHORT          usCID;
 202         S_MIBS_EXTSERVICEFLOW_PARAMETERS        stMibsExtServiceFlowTable;
 203         UINT            uiCurrentRxRate;
 204         UINT            uiThisPeriodRxBytes;
 205         UINT            uiTotalRxBytes;
 206         UINT            uiTotalTxBytes;
 207         UINT            uiPendedLast;
 208         UCHAR           ucIpVersion;
 209
 210         union {
 211                 struct {
 212                         struct sk_buff *FirstTxQueue;
 213                         struct sk_buff *LastTxQueue;
 214                 };
 215                 struct {
 216                         struct sk_buff *ControlHead;
 217                         struct sk_buff *ControlTail;
 218                 };
 219         };
 220
 221         BOOLEAN         bProtocolValid;
 222         BOOLEAN         bTOSValid;
 223         BOOLEAN         bDestIpValid;
 224         BOOLEAN         bSrcIpValid;
 225
 226         BOOLEAN         bActiveSet;
 227         BOOLEAN         bAdmittedSet;
 228         BOOLEAN         bAuthorizedSet;
 229         BOOLEAN         bClassifierPriority;
 230         UCHAR           ucServiceClassName[MAX_CLASS_NAME_LENGTH];
 231         BOOLEAN         bHeaderSuppressionEnabled;
 232         spinlock_t      SFQueueLock;
 233         void            *pstSFIndication;
 234         struct timeval  stLastUpdateTokenAt;
 235         atomic_t        uiPerSFTxResourceCount;
 236         UINT            uiMaxLatency;
 237         UCHAR           bIPCSSupport;
 238         UCHAR           bEthCSSupport;
 239 };
 240 typedef struct _packet_info PacketInfo;
 241
 242 typedef struct _PER_TARANG_DATA {
 243         struct _PER_TARANG_DATA *next;
 244         struct _MINI_ADAPTER    *Adapter;
 245         struct sk_buff          *RxAppControlHead;
 246         struct sk_buff          *RxAppControlTail;
 247         volatile INT            AppCtrlQueueLen;
 248         BOOLEAN                 MacTracingEnabled;
 249         BOOLEAN                 bApplicationToExit;
 250         S_MIBS_DROPPED_APP_CNTRL_MESSAGES       stDroppedAppCntrlMsgs;
 251         ULONG                   RxCntrlMsgBitMask;
 252 } PER_TARANG_DATA, *PPER_TARANG_DATA;
 253
 254 #ifdef REL_4_1
 255 typedef struct _TARGET_PARAMS {
 256         B_UINT32 m_u32CfgVersion;
 257
 258         // Scanning Related Params
 259         B_UINT32 m_u32CenterFrequency;
 260         B_UINT32 m_u32BandAScan;
 261         B_UINT32 m_u32BandBScan;
 262         B_UINT32 m_u32BandCScan;
 263
 264         // QoS Params
 265         B_UINT32 m_u32minGrantsize;     // size of minimum grant is 0 or 6
 266         B_UINT32 m_u32PHSEnable;
 267
 268         // HO Params
 269         B_UINT32 m_u32HoEnable;
 270         B_UINT32 m_u32HoReserved1;
 271         B_UINT32 m_u32HoReserved2;
 272
 273         // Power Control Params
 274         B_UINT32 m_u32MimoEnable;
 275         B_UINT32 m_u32SecurityEnable;
 276         /*
 277          * bit 1: 1 Idlemode enable;
 278          * bit 2: 1 Sleepmode Enable
 279          */
 280         B_UINT32 m_u32PowerSavingModesEnable;
 281         /* PowerSaving Mode Options:
 282            bit 0 = 1: CPE mode - to keep pcmcia if alive;
 283            bit 1 = 1: CINR reporing in Idlemode Msg
 284            bit 2 = 1: Default PSC Enable in sleepmode*/
 285         B_UINT32 m_u32PowerSavingModeOptions;
 286
 287         B_UINT32 m_u32ArqEnable;
 288
 289         // From Version #3, the HARQ section renamed as general
 290         B_UINT32 m_u32HarqEnable;
 291         // EEPROM Param Location
 292         B_UINT32 m_u32EEPROMFlag;
 293         /* BINARY TYPE - 4th MSByte:
 294          * Interface Type -  3rd MSByte:
 295          * Vendor Type - 2nd MSByte
 296          */
 297         // Unused - LSByte
 298         B_UINT32 m_u32Customize;
 299         B_UINT32 m_u32ConfigBW;  /* In Hz */
 300         B_UINT32 m_u32ShutDownTimer;
 301         B_UINT32 m_u32RadioParameter;
 302         B_UINT32 m_u32PhyParameter1;
 303         B_UINT32 m_u32PhyParameter2;
 304         B_UINT32 m_u32PhyParameter3;
 305
 306         /* in eval mode only;
 307          * lower 16bits = basic cid for testing;
 308          * then bit 16 is test cqich,
 309          * bit 17  test init rang;
 310          * bit 18 test periodic rang
 311          * bit 19 is test harq ack/nack
 312          */
 313         B_UINT32 m_u32TestOptions;
 314         B_UINT32 m_u32MaxMACDataperDLFrame;
 315         B_UINT32 m_u32MaxMACDataperULFrame;
 316         B_UINT32 m_u32Corr2MacFlags;
 317
 318         //adding driver params.
 319         B_UINT32 HostDrvrConfig1;
 320         B_UINT32 HostDrvrConfig2;
 321         B_UINT32 HostDrvrConfig3;
 322         B_UINT32 HostDrvrConfig4;
 323         B_UINT32 HostDrvrConfig5;
 324         B_UINT32 HostDrvrConfig6;
 325         B_UINT32 m_u32SegmentedPUSCenable;
 326
 327         //      BAMC enable - but 4.x does not support this feature
 328         //      This is added just to sync 4.x and 5.x CFGs
 329         B_UINT32 m_u32BandAMCEnable;
 330 } STARGETPARAMS, *PSTARGETPARAMS;
 331 #endif
 332
 333 typedef struct _STTARGETDSXBUFFER {
 334         ULONG           ulTargetDsxBuffer;
 335         B_UINT16        tid;
 336         BOOLEAN         valid;
 337 } STTARGETDSXBUFFER, *PSTTARGETDSXBUFFER;
 338
 339 typedef INT (*FP_FLASH_WRITE)(struct _MINI_ADAPTER *, UINT, PVOID);
 340
 341 typedef INT (*FP_FLASH_WRITE_STATUS)(struct _MINI_ADAPTER *, UINT, PVOID);
 342
 343 /**
 344    Driver adapter data structure
 345 */
 346 struct _MINI_ADAPTER {
 347         struct _MINI_ADAPTER    *next;
 348         struct net_device       *dev;
 349         u32                     msg_enable;
 350         CHAR                    *caDsxReqResp;
 351         atomic_t                ApplicationRunning;
 352         volatile INT            CtrlQueueLen;
 353         atomic_t                AppCtrlQueueLen;
 354         BOOLEAN                 AppCtrlQueueOverFlow;
 355         atomic_t                CurrentApplicationCount;
 356         atomic_t                RegisteredApplicationCount;
 357         BOOLEAN                 LinkUpStatus;
 358         BOOLEAN                 TimerActive;
 359         u32                     StatisticsPointer;
 360         struct sk_buff          *RxControlHead;
 361         struct sk_buff          *RxControlTail;
 362         struct semaphore        RxAppControlQueuelock;
 363         struct semaphore        fw_download_sema;
 364         PPER_TARANG_DATA        pTarangs;
 365         spinlock_t              control_queue_lock;
 366         wait_queue_head_t       process_read_wait_queue;
 367
 368         // the pointer to the first packet we have queued in send
 369         // deserialized miniport support variables
 370         atomic_t                TotalPacketCount;
 371         atomic_t                TxPktAvail;
 372
 373         // this to keep track of the Tx and Rx MailBox Registers.
 374         atomic_t                CurrNumFreeTxDesc;
 375         // to keep track the no of byte received
 376         USHORT                  PrevNumRecvDescs;
 377         USHORT                  CurrNumRecvDescs;
 378         UINT                    u32TotalDSD;
 379         PacketInfo              PackInfo[NO_OF_QUEUES];
 380         S_CLASSIFIER_RULE       astClassifierTable[MAX_CLASSIFIERS];
 381         BOOLEAN                 TransferMode;
 382
 383         /*************** qos ******************/
 384         BOOLEAN                 bETHCSEnabled;
 385         ULONG                   BEBucketSize;
 386         ULONG                   rtPSBucketSize;
 387         UCHAR                   LinkStatus;
 388         BOOLEAN                 AutoLinkUp;
 389         BOOLEAN                 AutoSyncup;
 390
 391         int                     major;
 392         int                     minor;
 393         wait_queue_head_t       tx_packet_wait_queue;
 394         wait_queue_head_t       process_rx_cntrlpkt;
 395         atomic_t                process_waiting;
 396         BOOLEAN                 fw_download_done;
 397
 398         char                    *txctlpacket[MAX_CNTRL_PKTS];
 399         atomic_t                cntrlpktCnt ;
 400         atomic_t                index_app_read_cntrlpkt;
 401         atomic_t                index_wr_txcntrlpkt;
 402         atomic_t                index_rd_txcntrlpkt;
 403         UINT                    index_datpkt;
 404         struct semaphore        rdmwrmsync;
 405
 406         STTARGETDSXBUFFER       astTargetDsxBuffer[MAX_TARGET_DSX_BUFFERS];
 407         ULONG                   ulFreeTargetBufferCnt;
 408         ULONG                   ulCurrentTargetBuffer;
 409         ULONG                   ulTotalTargetBuffersAvailable;
 410         unsigned long           chip_id;
 411         wait_queue_head_t       lowpower_mode_wait_queue;
 412         BOOLEAN                 bFlashBoot;
 413         BOOLEAN                 bBinDownloaded;
 414         BOOLEAN                 bCfgDownloaded;
 415         BOOLEAN                 bSyncUpRequestSent;
 416         USHORT                  usBestEffortQueueIndex;
 417         wait_queue_head_t       ioctl_fw_dnld_wait_queue;
 418         BOOLEAN                 waiting_to_fw_download_done;
 419         pid_t                   fw_download_process_pid;
 420         PSTARGETPARAMS          pstargetparams;
 421         BOOLEAN                 device_removed;
 422         BOOLEAN                 DeviceAccess;
 423         BOOLEAN                 bIsAutoCorrectEnabled;
 424         BOOLEAN                 bDDRInitDone;
 425         INT                     DDRSetting;
 426         ULONG                   ulPowerSaveMode;
 427         spinlock_t              txtransmitlock;
 428         B_UINT8                 txtransmit_running;
 429         /* Thread for control packet handling */
 430         struct task_struct      *control_packet_handler;
 431         /* thread for transmitting packets. */
 432         struct task_struct      *transmit_packet_thread;
 433
 434         /* LED Related Structures */
 435         LED_INFO_STRUCT         LEDInfo;
 436
 437         /* Driver State for LED Blinking */
 438         LedEventInfo_t          DriverState;
 439         /* Interface Specific */
 440         PVOID                   pvInterfaceAdapter;
 441         int (*bcm_file_download)(PVOID,
 442                                 struct file *,
 443                                 unsigned int);
 444         int (*bcm_file_readback_from_chip)(PVOID,
 445                                         struct file *,
 446                                         unsigned int);
 447         INT (*interface_rdm)(PVOID,
 448                         UINT,
 449                         PVOID,
 450                         INT);
 451         INT (*interface_wrm)(PVOID,
 452                         UINT,
 453                         PVOID,
 454                         INT);
 455         int (*interface_transmit)(PVOID, PVOID , UINT);
 456         BOOLEAN                 IdleMode;
 457         BOOLEAN                 bDregRequestSentInIdleMode;
 458         BOOLEAN                 bTriedToWakeUpFromlowPowerMode;
 459         BOOLEAN                 bShutStatus;
 460         BOOLEAN                 bWakeUpDevice;
 461         unsigned int            usIdleModePattern;
 462         //BOOLEAN                       bTriedToWakeUpFromShutdown;
 463         BOOLEAN                 bLinkDownRequested;
 464         int                     downloadDDR;
 465         PHS_DEVICE_EXTENSION    stBCMPhsContext;
 466         S_HDR_SUPRESSION_CONTEXTINFO stPhsTxContextInfo;
 467         uint8_t                 ucaPHSPktRestoreBuf[2048];
 468         uint8_t                 bPHSEnabled;
 469         BOOLEAN                 AutoFirmDld;
 470         BOOLEAN                 bMipsConfig;
 471         BOOLEAN                 bDPLLConfig;
 472         UINT32                  aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
 473         UINT32                  aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
 474         S_FRAGMENTED_PACKET_INFO astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
 475         atomic_t                uiMBupdate;
 476         UINT32                  PmuMode;
 477         NVM_TYPE                eNVMType;
 478         UINT                    uiSectorSize;
 479         UINT                    uiSectorSizeInCFG;
 480         BOOLEAN                 bSectorSizeOverride;
 481         BOOLEAN                 bStatusWrite;
 482         UINT                    uiNVMDSDSize;
 483         UINT                    uiVendorExtnFlag;
 484         //it will always represent chosen DSD at any point of time.
 485         // Generally it is Active DSD but in case of NVM RD/WR it might be different.
 486         UINT                    ulFlashCalStart;
 487         ULONG                   ulFlashControlSectionStart;
 488         ULONG                   ulFlashWriteSize;
 489         ULONG                   ulFlashID;
 490         FP_FLASH_WRITE          fpFlashWrite;
 491         FP_FLASH_WRITE_STATUS   fpFlashWriteWithStatusCheck;
 492
 493         struct semaphore        NVMRdmWrmLock;
 494         struct device           *pstCreatedClassDevice;
 495
 496         //      BOOLEAN                         InterfaceUpStatus;
 497         PFLASH2X_CS_INFO        psFlash2xCSInfo;
 498         PFLASH_CS_INFO          psFlashCSInfo;
 499         PFLASH2X_VENDORSPECIFIC_INFO psFlash2xVendorInfo;
 500         UINT                    uiFlashBaseAdd; //Flash start address
 501         UINT                    uiActiveISOOffset; //Active ISO offset chosen before f/w download
 502         FLASH2X_SECTION_VAL     eActiveISO; //Active ISO section val
 503         FLASH2X_SECTION_VAL     eActiveDSD;     //Active DSD val chosen before f/w download
 504         UINT                    uiActiveDSDOffsetAtFwDld;  //For accessing Active DSD chosen before f/w download
 505         UINT                    uiFlashLayoutMajorVersion;
 506         UINT                    uiFlashLayoutMinorVersion;
 507         BOOLEAN                 bAllDSDWriteAllow;
 508         BOOLEAN                 bSigCorrupted;
 509         //this should be set who so ever want to change the Headers. after Wrtie it should be reset immediately.
 510         BOOLEAN                 bHeaderChangeAllowed;
 511         INT                     SelectedChip;
 512         BOOLEAN                 bEndPointHalted;
 513         //while bFlashRawRead will be true, Driver  ignore map lay out and consider flash as of without any map.
 514         BOOLEAN                 bFlashRawRead;
 515         BOOLEAN                 bPreparingForLowPowerMode;
 516         BOOLEAN                 bDoSuspend;
 517         UINT                    syscfgBefFwDld;
 518         BOOLEAN                 StopAllXaction;
 519         UINT32                  liTimeSinceLastNetEntry; //Used to Support extended CAPI requirements from
 520         struct semaphore        LowPowerModeSync;
 521         ULONG                   liDrainCalculated;
 522         UINT                    gpioBitMap;
 523         S_BCM_DEBUG_STATE       stDebugState;
 524 };
 525 typedef struct _MINI_ADAPTER MINI_ADAPTER, *PMINI_ADAPTER;
 526
 527 #define GET_BCM_ADAPTER(net_dev) netdev_priv(net_dev)
 528
 529 struct _ETH_HEADER_STRUC {
 530         UCHAR   au8DestinationAddress[6];
 531         UCHAR   au8SourceAddress[6];
 532         USHORT  u16Etype;
 533 } __attribute__((packed));
 534 typedef struct _ETH_HEADER_STRUC ETH_HEADER_STRUC, *PETH_HEADER_STRUC;
 535
 536 typedef struct FirmwareInfo {
 537         void    __user *pvMappedFirmwareAddress;
 538         ULONG   u32FirmwareLength;
 539         ULONG   u32StartingAddress;
 540 } __attribute__((packed)) FIRMWARE_INFO, *PFIRMWARE_INFO;
 541
 542 // holds the value of net_device structure..
 543 extern struct net_device *gblpnetdev;
 544 typedef struct _cntl_pkt {
 545         PMINI_ADAPTER   Adapter;
 546         PLEADER         PLeader;
 547 } cntl_pkt;
 548 typedef LINK_REQUEST CONTROL_MESSAGE;
 549
 550 typedef struct _DDR_SETTING {
 551         UINT ulRegAddress;
 552         UINT ulRegValue;
 553 } DDR_SETTING, *PDDR_SETTING;
 554 typedef DDR_SETTING DDR_SET_NODE, *PDDR_SET_NODE;
 555 INT InitAdapter(PMINI_ADAPTER psAdapter);
 556
 557 // =====================================================================
 558 // Beceem vendor request codes for EP0
 559 // =====================================================================
 560
 561 #define BCM_REQUEST_READ        0x2
 562 #define BCM_REQUEST_WRITE       0x1
 563 #define EP2_MPS_REG             0x0F0110A0
 564 #define EP2_MPS                 0x40
 565
 566 #define EP2_CFG_REG     0x0F0110A8
 567 #define EP2_CFG_INT     0x27
 568 #define EP2_CFG_BULK    0x25
 569
 570 #define EP4_MPS_REG     0x0F0110F0
 571 #define EP4_MPS         0x8C
 572
 573 #define EP4_CFG_REG     0x0F0110F8
 574
 575 #define ISO_MPS_REG     0x0F0110C8
 576 #define ISO_MPS         0x00000000
 577
 578 #define EP1 0
 579 #define EP2 1
 580 #define EP3 2
 581 #define EP4 3
 582 #define EP5 4
 583 #define EP6 5
 584
 585 typedef enum eInterface_setting {
 586         DEFAULT_SETTING_0  = 0,
 587         ALTERNATE_SETTING_1 = 1,
 588 } INTERFACE_SETTING;
 589
 590 #endif  //__ADAPTER_H__