Pileus Git - ~andy/linux/blob - drivers/staging/bcm/Adapter.h

   1 /***********************************
   2 *       Adapter.h
   3 ************************************/
   4 #ifndef __ADAPTER_H__
   5 #define __ADAPTER_H__
   6
   7 #define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
   8 #include "Debug.h"
   9
  10 struct _LEADER {
  11         USHORT  Vcid;
  12         USHORT  PLength;
  13         UCHAR   Status;
  14         UCHAR   Unused[3];
  15 } __packed;
  16 typedef struct _LEADER LEADER, *PLEADER;
  17
  18 struct _PACKETTOSEND {
  19         LEADER  Leader;
  20         UCHAR   ucPayload;
  21 } __packed;
  22 typedef struct _PACKETTOSEND PACKETTOSEND, *PPACKETTOSEND;
  23
  24 struct _CONTROL_PACKET {
  25         PVOID   ControlBuff;
  26         UINT    ControlBuffLen;
  27         struct _CONTROL_PACKET *next;
  28 } __packed;
  29 typedef struct _CONTROL_PACKET CONTROL_PACKET, *PCONTROL_PACKET;
  30
  31 struct link_request {
  32         LEADER  Leader;
  33         UCHAR   szData[4];
  34 } __packed;
  35 typedef struct link_request LINK_REQUEST, *PLINK_REQUEST;
  36
  37 /* classification extension is added */
  38 typedef struct _ADD_CONNECTION {
  39         ULONG   SrcIpAddressCount;
  40         ULONG   SrcIpAddress[MAX_CONNECTIONS];
  41         ULONG   SrcIpMask[MAX_CONNECTIONS];
  42
  43         ULONG   DestIpAddressCount;
  44         ULONG   DestIpAddress[MAX_CONNECTIONS];
  45         ULONG   DestIpMask[MAX_CONNECTIONS];
  46
  47         USHORT  SrcPortBegin;
  48         USHORT  SrcPortEnd;
  49
  50         USHORT  DestPortBegin;
  51         USHORT  DestPortEnd;
  52
  53         UCHAR   SrcTOS;
  54         UCHAR   SrcProtocol;
  55 } ADD_CONNECTION, *PADD_CONNECTION;
  56
  57 typedef struct _CLASSIFICATION_RULE {
  58         UCHAR   ucIPSrcAddrLen;
  59         UCHAR   ucIPSrcAddr[32];
  60         UCHAR   ucIPDestAddrLen;
  61         UCHAR   ucIPDestAddr[32];
  62         UCHAR   ucSrcPortRangeLen;
  63         UCHAR   ucSrcPortRange[4];
  64         UCHAR   ucDestPortRangeLen;
  65         UCHAR   ucDestPortRange[4];
  66         USHORT  usVcid;
  67 } CLASSIFICATION_RULE, *PCLASSIFICATION_RULE;
  68
  69 typedef struct _CLASSIFICATION_ONLY {
  70         USHORT  usVcid;
  71         ULONG   DestIpAddress;
  72         ULONG   DestIpMask;
  73         USHORT  usPortLo;
  74         USHORT  usPortHi;
  75         BOOLEAN bIpVersion;
  76         UCHAR   ucDestinationAddress[16];
  77 } CLASSIFICATION_ONLY, *PCLASSIFICATION_ONLY;
  78
  79 #define MAX_IP_RANGE_LENGTH 4
  80 #define MAX_PORT_RANGE 4
  81 #define MAX_PROTOCOL_LENGTH   32
  82 #define IPV6_ADDRESS_SIZEINBYTES 0x10
  83
  84 typedef union _U_IP_ADDRESS {
  85         struct {
  86                 ULONG ulIpv4Addr[MAX_IP_RANGE_LENGTH]; /* Source Ip Address Range */
  87                 ULONG ulIpv4Mask[MAX_IP_RANGE_LENGTH]; /* Source Ip Mask Address Range */
  88         };
  89         struct {
  90                 ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4]; /* Source Ip Address Range */
  91                 ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4]; /* Source Ip Mask Address Range */
  92         };
  93         struct {
  94                 UCHAR ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
  95                 UCHAR ucIpv4Mask[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
  96         };
  97         struct {
  98                 UCHAR ucIpv6Address[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
  99                 UCHAR ucIpv6Mask[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
 100         };
 101 } U_IP_ADDRESS;
 102 struct _packet_info;
 103
 104 typedef struct _S_HDR_SUPRESSION_CONTEXTINFO {
 105         UCHAR ucaHdrSupressionInBuf[MAX_PHS_LENGTHS]; /* Intermediate buffer to accumulate pkt Header for PHS */
 106         UCHAR ucaHdrSupressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN]; /* Intermediate buffer containing pkt Header after PHS */
 107 } S_HDR_SUPRESSION_CONTEXTINFO;
 108
 109 typedef struct _S_CLASSIFIER_RULE {
 110         ULONG           ulSFID;
 111         UCHAR           ucReserved[2];
 112         B_UINT16        uiClassifierRuleIndex;
 113         BOOLEAN         bUsed;
 114         USHORT          usVCID_Value;
 115         B_UINT8         u8ClassifierRulePriority; /* This field detemines the Classifier Priority */
 116         U_IP_ADDRESS    stSrcIpAddress;
 117         UCHAR           ucIPSourceAddressLength; /* Ip Source Address Length */
 118
 119         U_IP_ADDRESS    stDestIpAddress;
 120         UCHAR           ucIPDestinationAddressLength; /* Ip Destination Address Length */
 121         UCHAR           ucIPTypeOfServiceLength; /* Type of service Length */
 122         UCHAR           ucTosLow; /* Tos Low */
 123         UCHAR           ucTosHigh; /* Tos High */
 124         UCHAR           ucTosMask; /* Tos Mask */
 125
 126         UCHAR           ucProtocolLength; /* protocol Length */
 127         UCHAR           ucProtocol[MAX_PROTOCOL_LENGTH]; /* protocol Length */
 128         USHORT          usSrcPortRangeLo[MAX_PORT_RANGE];
 129         USHORT          usSrcPortRangeHi[MAX_PORT_RANGE];
 130         UCHAR           ucSrcPortRangeLength;
 131
 132         USHORT          usDestPortRangeLo[MAX_PORT_RANGE];
 133         USHORT          usDestPortRangeHi[MAX_PORT_RANGE];
 134         UCHAR           ucDestPortRangeLength;
 135
 136         BOOLEAN         bProtocolValid;
 137         BOOLEAN         bTOSValid;
 138         BOOLEAN         bDestIpValid;
 139         BOOLEAN         bSrcIpValid;
 140
 141         /* For IPv6 Addressing */
 142         UCHAR           ucDirection;
 143         BOOLEAN         bIpv6Protocol;
 144         UINT32          u32PHSRuleID;
 145         S_PHS_RULE      sPhsRule;
 146         UCHAR           u8AssociatedPHSI;
 147
 148         /* Classification fields for ETH CS */
 149         UCHAR           ucEthCSSrcMACLen;
 150         UCHAR           au8EThCSSrcMAC[MAC_ADDRESS_SIZE];
 151         UCHAR           au8EThCSSrcMACMask[MAC_ADDRESS_SIZE];
 152         UCHAR           ucEthCSDestMACLen;
 153         UCHAR           au8EThCSDestMAC[MAC_ADDRESS_SIZE];
 154         UCHAR           au8EThCSDestMACMask[MAC_ADDRESS_SIZE];
 155         UCHAR           ucEtherTypeLen;
 156         UCHAR           au8EthCSEtherType[NUM_ETHERTYPE_BYTES];
 157         UCHAR           usUserPriority[2];
 158         USHORT          usVLANID;
 159         USHORT          usValidityBitMap;
 160 } S_CLASSIFIER_RULE;
 161 /* typedef struct _S_CLASSIFIER_RULE S_CLASSIFIER_RULE; */
 162
 163 typedef struct _S_FRAGMENTED_PACKET_INFO {
 164         BOOLEAN                 bUsed;
 165         ULONG                   ulSrcIpAddress;
 166         USHORT                  usIpIdentification;
 167         S_CLASSIFIER_RULE       *pstMatchedClassifierEntry;
 168         BOOLEAN                 bOutOfOrderFragment;
 169 } S_FRAGMENTED_PACKET_INFO, *PS_FRAGMENTED_PACKET_INFO;
 170
 171 struct _packet_info {
 172         /* classification extension Rule */
 173         ULONG           ulSFID;
 174         USHORT          usVCID_Value;
 175         UINT            uiThreshold;
 176         /* This field determines the priority of the SF Queues */
 177         B_UINT8         u8TrafficPriority;
 178
 179         BOOLEAN         bValid;
 180         BOOLEAN         bActive;
 181         BOOLEAN         bActivateRequestSent;
 182
 183         B_UINT8         u8QueueType; /* BE or rtPS */
 184
 185         UINT            uiMaxBucketSize; /* maximum size of the bucket for the queue */
 186         UINT            uiCurrentQueueDepthOnTarget;
 187         UINT            uiCurrentBytesOnHost;
 188         UINT            uiCurrentPacketsOnHost;
 189         UINT            uiDroppedCountBytes;
 190         UINT            uiDroppedCountPackets;
 191         UINT            uiSentBytes;
 192         UINT            uiSentPackets;
 193         UINT            uiCurrentDrainRate;
 194         UINT            uiThisPeriodSentBytes;
 195         LARGE_INTEGER   liDrainCalculated;
 196         UINT            uiCurrentTokenCount;
 197         LARGE_INTEGER   liLastUpdateTokenAt;
 198         UINT            uiMaxAllowedRate;
 199         UINT            NumOfPacketsSent;
 200         UCHAR           ucDirection;
 201         USHORT          usCID;
 202         S_MIBS_EXTSERVICEFLOW_PARAMETERS        stMibsExtServiceFlowTable;
 203         UINT            uiCurrentRxRate;
 204         UINT            uiThisPeriodRxBytes;
 205         UINT            uiTotalRxBytes;
 206         UINT            uiTotalTxBytes;
 207         UINT            uiPendedLast;
 208         UCHAR           ucIpVersion;
 209
 210         union {
 211                 struct {
 212                         struct sk_buff *FirstTxQueue;
 213                         struct sk_buff *LastTxQueue;
 214                 };
 215                 struct {
 216                         struct sk_buff *ControlHead;
 217                         struct sk_buff *ControlTail;
 218                 };
 219         };
 220
 221         BOOLEAN         bProtocolValid;
 222         BOOLEAN         bTOSValid;
 223         BOOLEAN         bDestIpValid;
 224         BOOLEAN         bSrcIpValid;
 225
 226         BOOLEAN         bActiveSet;
 227         BOOLEAN         bAdmittedSet;
 228         BOOLEAN         bAuthorizedSet;
 229         BOOLEAN         bClassifierPriority;
 230         UCHAR           ucServiceClassName[MAX_CLASS_NAME_LENGTH];
 231         BOOLEAN         bHeaderSuppressionEnabled;
 232         spinlock_t      SFQueueLock;
 233         void            *pstSFIndication;
 234         struct timeval  stLastUpdateTokenAt;
 235         atomic_t        uiPerSFTxResourceCount;
 236         UINT            uiMaxLatency;
 237         UCHAR           bIPCSSupport;
 238         UCHAR           bEthCSSupport;
 239 };
 240 typedef struct _packet_info PacketInfo;
 241
 242 typedef struct _PER_TARANG_DATA {
 243         struct _PER_TARANG_DATA *next;
 244         struct _MINI_ADAPTER    *Adapter;
 245         struct sk_buff          *RxAppControlHead;
 246         struct sk_buff          *RxAppControlTail;
 247         int                     AppCtrlQueueLen;
 248         BOOLEAN                 MacTracingEnabled;
 249         BOOLEAN                 bApplicationToExit;
 250         S_MIBS_DROPPED_APP_CNTRL_MESSAGES       stDroppedAppCntrlMsgs;
 251         ULONG                   RxCntrlMsgBitMask;
 252 } PER_TARANG_DATA, *PPER_TARANG_DATA;
 253
 254 #ifdef REL_4_1
 255 typedef struct _TARGET_PARAMS {
 256         B_UINT32 m_u32CfgVersion;
 257
 258         /* Scanning Related Params */
 259         B_UINT32 m_u32CenterFrequency;
 260         B_UINT32 m_u32BandAScan;
 261         B_UINT32 m_u32BandBScan;
 262         B_UINT32 m_u32BandCScan;
 263
 264         /* QoS Params */
 265         B_UINT32 m_u32minGrantsize;     /* size of minimum grant is 0 or 6 */
 266         B_UINT32 m_u32PHSEnable;
 267
 268         /* HO Params */
 269         B_UINT32 m_u32HoEnable;
 270         B_UINT32 m_u32HoReserved1;
 271         B_UINT32 m_u32HoReserved2;
 272
 273         /* Power Control Params */
 274         B_UINT32 m_u32MimoEnable;
 275         B_UINT32 m_u32SecurityEnable;
 276         /*
 277          * bit 1: 1 Idlemode enable;
 278          * bit 2: 1 Sleepmode Enable
 279          */
 280         B_UINT32 m_u32PowerSavingModesEnable;
 281         /* PowerSaving Mode Options:
 282          * bit 0 = 1: CPE mode - to keep pcmcia if alive;
 283          * bit 1 = 1: CINR reporing in Idlemode Msg
 284          * bit 2 = 1: Default PSC Enable in sleepmode
 285          */
 286         B_UINT32 m_u32PowerSavingModeOptions;
 287
 288         B_UINT32 m_u32ArqEnable;
 289
 290         /* From Version #3, the HARQ section renamed as general */
 291         B_UINT32 m_u32HarqEnable;
 292         /* EEPROM Param Location */
 293         B_UINT32 m_u32EEPROMFlag;
 294         /* BINARY TYPE - 4th MSByte:
 295          * Interface Type -  3rd MSByte:
 296          * Vendor Type - 2nd MSByte
 297          */
 298         /* Unused - LSByte */
 299         B_UINT32 m_u32Customize;
 300         B_UINT32 m_u32ConfigBW;  /* In Hz */
 301         B_UINT32 m_u32ShutDownTimer;
 302         B_UINT32 m_u32RadioParameter;
 303         B_UINT32 m_u32PhyParameter1;
 304         B_UINT32 m_u32PhyParameter2;
 305         B_UINT32 m_u32PhyParameter3;
 306
 307         /* in eval mode only;
 308          * lower 16bits = basic cid for testing;
 309          * then bit 16 is test cqich,
 310          * bit 17  test init rang;
 311          * bit 18 test periodic rang
 312          * bit 19 is test harq ack/nack
 313          */
 314         B_UINT32 m_u32TestOptions;
 315         B_UINT32 m_u32MaxMACDataperDLFrame;
 316         B_UINT32 m_u32MaxMACDataperULFrame;
 317         B_UINT32 m_u32Corr2MacFlags;
 318
 319         /* adding driver params. */
 320         B_UINT32 HostDrvrConfig1;
 321         B_UINT32 HostDrvrConfig2;
 322         B_UINT32 HostDrvrConfig3;
 323         B_UINT32 HostDrvrConfig4;
 324         B_UINT32 HostDrvrConfig5;
 325         B_UINT32 HostDrvrConfig6;
 326         B_UINT32 m_u32SegmentedPUSCenable;
 327
 328         /* BAMC enable - but 4.x does not support this feature
 329          * This is added just to sync 4.x and 5.x CFGs
 330          */
 331         B_UINT32 m_u32BandAMCEnable;
 332 } STARGETPARAMS, *PSTARGETPARAMS;
 333 #endif
 334
 335 typedef struct _STTARGETDSXBUFFER {
 336         ULONG           ulTargetDsxBuffer;
 337         B_UINT16        tid;
 338         BOOLEAN         valid;
 339 } STTARGETDSXBUFFER, *PSTTARGETDSXBUFFER;
 340
 341 typedef int (*FP_FLASH_WRITE)(struct _MINI_ADAPTER *, UINT, PVOID);
 342
 343 typedef int (*FP_FLASH_WRITE_STATUS)(struct _MINI_ADAPTER *, UINT, PVOID);
 344
 345 /*
 346  * Driver adapter data structure
 347  */
 348 struct _MINI_ADAPTER {
 349         struct _MINI_ADAPTER    *next;
 350         struct net_device       *dev;
 351         u32                     msg_enable;
 352         CHAR                    *caDsxReqResp;
 353         atomic_t                ApplicationRunning;
 354         BOOLEAN                 AppCtrlQueueOverFlow;
 355         atomic_t                CurrentApplicationCount;
 356         atomic_t                RegisteredApplicationCount;
 357         BOOLEAN                 LinkUpStatus;
 358         BOOLEAN                 TimerActive;
 359         u32                     StatisticsPointer;
 360         struct sk_buff          *RxControlHead;
 361         struct sk_buff          *RxControlTail;
 362         struct semaphore        RxAppControlQueuelock;
 363         struct semaphore        fw_download_sema;
 364         PPER_TARANG_DATA        pTarangs;
 365         spinlock_t              control_queue_lock;
 366         wait_queue_head_t       process_read_wait_queue;
 367
 368         /* the pointer to the first packet we have queued in send
 369          * deserialized miniport support variables
 370          */
 371         atomic_t                TotalPacketCount;
 372         atomic_t                TxPktAvail;
 373
 374         /* this to keep track of the Tx and Rx MailBox Registers. */
 375         atomic_t                CurrNumFreeTxDesc;
 376         /* to keep track the no of byte received */
 377         USHORT                  PrevNumRecvDescs;
 378         USHORT                  CurrNumRecvDescs;
 379         UINT                    u32TotalDSD;
 380         PacketInfo              PackInfo[NO_OF_QUEUES];
 381         S_CLASSIFIER_RULE       astClassifierTable[MAX_CLASSIFIERS];
 382         BOOLEAN                 TransferMode;
 383
 384         /*************** qos ******************/
 385         BOOLEAN                 bETHCSEnabled;
 386         ULONG                   BEBucketSize;
 387         ULONG                   rtPSBucketSize;
 388         UCHAR                   LinkStatus;
 389         BOOLEAN                 AutoLinkUp;
 390         BOOLEAN                 AutoSyncup;
 391
 392         int                     major;
 393         int                     minor;
 394         wait_queue_head_t       tx_packet_wait_queue;
 395         wait_queue_head_t       process_rx_cntrlpkt;
 396         atomic_t                process_waiting;
 397         BOOLEAN                 fw_download_done;
 398
 399         char                    *txctlpacket[MAX_CNTRL_PKTS];
 400         atomic_t                cntrlpktCnt ;
 401         atomic_t                index_app_read_cntrlpkt;
 402         atomic_t                index_wr_txcntrlpkt;
 403         atomic_t                index_rd_txcntrlpkt;
 404         UINT                    index_datpkt;
 405         struct semaphore        rdmwrmsync;
 406
 407         STTARGETDSXBUFFER       astTargetDsxBuffer[MAX_TARGET_DSX_BUFFERS];
 408         ULONG                   ulFreeTargetBufferCnt;
 409         ULONG                   ulCurrentTargetBuffer;
 410         ULONG                   ulTotalTargetBuffersAvailable;
 411         unsigned long           chip_id;
 412         wait_queue_head_t       lowpower_mode_wait_queue;
 413         BOOLEAN                 bFlashBoot;
 414         BOOLEAN                 bBinDownloaded;
 415         BOOLEAN                 bCfgDownloaded;
 416         BOOLEAN                 bSyncUpRequestSent;
 417         USHORT                  usBestEffortQueueIndex;
 418         wait_queue_head_t       ioctl_fw_dnld_wait_queue;
 419         BOOLEAN                 waiting_to_fw_download_done;
 420         pid_t                   fw_download_process_pid;
 421         PSTARGETPARAMS          pstargetparams;
 422         BOOLEAN                 device_removed;
 423         BOOLEAN                 DeviceAccess;
 424         BOOLEAN                 bIsAutoCorrectEnabled;
 425         BOOLEAN                 bDDRInitDone;
 426         int                     DDRSetting;
 427         ULONG                   ulPowerSaveMode;
 428         spinlock_t              txtransmitlock;
 429         B_UINT8                 txtransmit_running;
 430         /* Thread for control packet handling */
 431         struct task_struct      *control_packet_handler;
 432         /* thread for transmitting packets. */
 433         struct task_struct      *transmit_packet_thread;
 434
 435         /* LED Related Structures */
 436         LED_INFO_STRUCT         LEDInfo;
 437
 438         /* Driver State for LED Blinking */
 439         LedEventInfo_t          DriverState;
 440         /* Interface Specific */
 441         PVOID                   pvInterfaceAdapter;
 442         int (*bcm_file_download)(PVOID,
 443                                 struct file *,
 444                                 unsigned int);
 445         int (*bcm_file_readback_from_chip)(PVOID,
 446                                         struct file *,
 447                                         unsigned int);
 448         int (*interface_rdm)(PVOID,
 449                         UINT,
 450                         PVOID,
 451                         int);
 452         int (*interface_wrm)(PVOID,
 453                         UINT,
 454                         PVOID,
 455                         int);
 456         int (*interface_transmit)(PVOID, PVOID , UINT);
 457         BOOLEAN                 IdleMode;
 458         BOOLEAN                 bDregRequestSentInIdleMode;
 459         BOOLEAN                 bTriedToWakeUpFromlowPowerMode;
 460         BOOLEAN                 bShutStatus;
 461         BOOLEAN                 bWakeUpDevice;
 462         unsigned int            usIdleModePattern;
 463         /* BOOLEAN                      bTriedToWakeUpFromShutdown; */
 464         BOOLEAN                 bLinkDownRequested;
 465         int                     downloadDDR;
 466         PHS_DEVICE_EXTENSION    stBCMPhsContext;
 467         S_HDR_SUPRESSION_CONTEXTINFO stPhsTxContextInfo;
 468         uint8_t                 ucaPHSPktRestoreBuf[2048];
 469         uint8_t                 bPHSEnabled;
 470         BOOLEAN                 AutoFirmDld;
 471         BOOLEAN                 bMipsConfig;
 472         BOOLEAN                 bDPLLConfig;
 473         UINT32                  aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
 474         UINT32                  aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
 475         S_FRAGMENTED_PACKET_INFO astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
 476         atomic_t                uiMBupdate;
 477         UINT32                  PmuMode;
 478         NVM_TYPE                eNVMType;
 479         UINT                    uiSectorSize;
 480         UINT                    uiSectorSizeInCFG;
 481         BOOLEAN                 bSectorSizeOverride;
 482         BOOLEAN                 bStatusWrite;
 483         UINT                    uiNVMDSDSize;
 484         UINT                    uiVendorExtnFlag;
 485         /* it will always represent chosen DSD at any point of time.
 486          * Generally it is Active DSD but in case of NVM RD/WR it might be different.
 487          */
 488         UINT                    ulFlashCalStart;
 489         ULONG                   ulFlashControlSectionStart;
 490         ULONG                   ulFlashWriteSize;
 491         ULONG                   ulFlashID;
 492         FP_FLASH_WRITE          fpFlashWrite;
 493         FP_FLASH_WRITE_STATUS   fpFlashWriteWithStatusCheck;
 494
 495         struct semaphore        NVMRdmWrmLock;
 496         struct device           *pstCreatedClassDevice;
 497
 498         /*      BOOLEAN                         InterfaceUpStatus; */
 499         PFLASH2X_CS_INFO        psFlash2xCSInfo;
 500         PFLASH_CS_INFO          psFlashCSInfo;
 501         PFLASH2X_VENDORSPECIFIC_INFO psFlash2xVendorInfo;
 502         UINT                    uiFlashBaseAdd; /* Flash start address */
 503         UINT                    uiActiveISOOffset; /* Active ISO offset chosen before f/w download */
 504         FLASH2X_SECTION_VAL     eActiveISO; /* Active ISO section val */
 505         FLASH2X_SECTION_VAL     eActiveDSD;     /* Active DSD val chosen before f/w download */
 506         UINT                    uiActiveDSDOffsetAtFwDld;  /* For accessing Active DSD chosen before f/w download */
 507         UINT                    uiFlashLayoutMajorVersion;
 508         UINT                    uiFlashLayoutMinorVersion;
 509         BOOLEAN                 bAllDSDWriteAllow;
 510         BOOLEAN                 bSigCorrupted;
 511         /* this should be set who so ever want to change the Headers. after Wrtie it should be reset immediately. */
 512         BOOLEAN                 bHeaderChangeAllowed;
 513         int                     SelectedChip;
 514         BOOLEAN                 bEndPointHalted;
 515         /* while bFlashRawRead will be true, Driver  ignore map lay out and consider flash as of without any map. */
 516         BOOLEAN                 bFlashRawRead;
 517         BOOLEAN                 bPreparingForLowPowerMode;
 518         BOOLEAN                 bDoSuspend;
 519         UINT                    syscfgBefFwDld;
 520         BOOLEAN                 StopAllXaction;
 521         UINT32                  liTimeSinceLastNetEntry; /* Used to Support extended CAPI requirements from */
 522         struct semaphore        LowPowerModeSync;
 523         ULONG                   liDrainCalculated;
 524         UINT                    gpioBitMap;
 525         S_BCM_DEBUG_STATE       stDebugState;
 526 };
 527 typedef struct _MINI_ADAPTER MINI_ADAPTER, *PMINI_ADAPTER;
 528
 529 #define GET_BCM_ADAPTER(net_dev) netdev_priv(net_dev)
 530
 531 struct _ETH_HEADER_STRUC {
 532         UCHAR   au8DestinationAddress[6];
 533         UCHAR   au8SourceAddress[6];
 534         USHORT  u16Etype;
 535 } __packed;
 536 typedef struct _ETH_HEADER_STRUC ETH_HEADER_STRUC, *PETH_HEADER_STRUC;
 537
 538 typedef struct FirmwareInfo {
 539         void    __user *pvMappedFirmwareAddress;
 540         ULONG   u32FirmwareLength;
 541         ULONG   u32StartingAddress;
 542 } __packed FIRMWARE_INFO, *PFIRMWARE_INFO;
 543
 544 /* holds the value of net_device structure.. */
 545 extern struct net_device *gblpnetdev;
 546 typedef struct _cntl_pkt {
 547         PMINI_ADAPTER   Adapter;
 548         PLEADER         PLeader;
 549 } cntl_pkt;
 550 typedef LINK_REQUEST CONTROL_MESSAGE;
 551
 552 typedef struct _DDR_SETTING {
 553         UINT ulRegAddress;
 554         UINT ulRegValue;
 555 } DDR_SETTING, *PDDR_SETTING;
 556 typedef DDR_SETTING DDR_SET_NODE, *PDDR_SET_NODE;
 557 int InitAdapter(PMINI_ADAPTER psAdapter);
 558
 559 /* =====================================================================
 560  * Beceem vendor request codes for EP0
 561  * =====================================================================
 562  */
 563
 564 #define BCM_REQUEST_READ        0x2
 565 #define BCM_REQUEST_WRITE       0x1
 566 #define EP2_MPS_REG             0x0F0110A0
 567 #define EP2_MPS                 0x40
 568
 569 #define EP2_CFG_REG     0x0F0110A8
 570 #define EP2_CFG_INT     0x27
 571 #define EP2_CFG_BULK    0x25
 572
 573 #define EP4_MPS_REG     0x0F0110F0
 574 #define EP4_MPS         0x8C
 575
 576 #define EP4_CFG_REG     0x0F0110F8
 577
 578 #define ISO_MPS_REG     0x0F0110C8
 579 #define ISO_MPS         0x00000000
 580
 581 #define EP1 0
 582 #define EP2 1
 583 #define EP3 2
 584 #define EP4 3
 585 #define EP5 4
 586 #define EP6 5
 587
 588 typedef enum eInterface_setting {
 589         DEFAULT_SETTING_0  = 0,
 590         ALTERNATE_SETTING_1 = 1,
 591 } INTERFACE_SETTING;
 592
 593 #endif  /* __ADAPTER_H__ */