2 * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
3 * Copyright (C) 2013, Intel Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
13 #include <linux/atomic.h>
14 #include <linux/dmaengine.h>
15 #include <linux/errno.h>
17 #include <linux/interrupt.h>
18 #include <linux/platform_device.h>
19 #include <linux/pxa2xx_ssp.h>
20 #include <linux/scatterlist.h>
21 #include <linux/sizes.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/pxa2xx_spi.h>
26 /* Driver model hookup */
27 struct platform_device *pdev;
30 struct ssp_device *ssp;
32 /* SPI framework hookup */
33 enum pxa_ssp_type ssp_type;
34 struct spi_master *master;
37 struct pxa2xx_spi_master *master_info;
39 /* PXA private DMA setup stuff */
44 /* SSP register addresses */
54 /* Maximun clock rate */
55 unsigned long max_clk_rate;
57 /* Message Transfer pump */
58 struct tasklet_struct pump_transfers;
60 /* DMA engine support */
61 struct dma_chan *rx_chan;
62 struct dma_chan *tx_chan;
63 struct sg_table rx_sgt;
64 struct sg_table tx_sgt;
70 /* Current message transfer state info */
71 struct spi_message *cur_msg;
72 struct spi_transfer *cur_transfer;
73 struct chip_data *cur_chip;
85 int (*write)(struct driver_data *drv_data);
86 int (*read)(struct driver_data *drv_data);
87 irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
88 void (*cs_control)(u32 command);
107 int gpio_cs_inverted;
108 int (*write)(struct driver_data *drv_data);
109 int (*read)(struct driver_data *drv_data);
110 void (*cs_control)(u32 command);
113 #define DEFINE_SSP_REG(reg, off) \
114 static inline u32 read_##reg(void const __iomem *p) \
115 { return __raw_readl(p + (off)); } \
117 static inline void write_##reg(u32 v, void __iomem *p) \
118 { __raw_writel(v, p + (off)); }
120 DEFINE_SSP_REG(SSCR0, 0x00)
121 DEFINE_SSP_REG(SSCR1, 0x04)
122 DEFINE_SSP_REG(SSSR, 0x08)
123 DEFINE_SSP_REG(SSITR, 0x0c)
124 DEFINE_SSP_REG(SSDR, 0x10)
125 DEFINE_SSP_REG(SSTO, 0x28)
126 DEFINE_SSP_REG(SSPSP, 0x2c)
128 #define START_STATE ((void *)0)
129 #define RUNNING_STATE ((void *)1)
130 #define DONE_STATE ((void *)2)
131 #define ERROR_STATE ((void *)-1)
133 #define IS_DMA_ALIGNED(x) IS_ALIGNED((unsigned long)(x), DMA_ALIGNMENT)
134 #define DMA_ALIGNMENT 8
136 static inline int pxa25x_ssp_comp(struct driver_data *drv_data)
138 if (drv_data->ssp_type == PXA25x_SSP)
140 if (drv_data->ssp_type == CE4100_SSP)
145 static inline void write_SSSR_CS(struct driver_data *drv_data, u32 val)
147 void __iomem *reg = drv_data->ioaddr;
149 if (drv_data->ssp_type == CE4100_SSP)
150 val |= read_SSSR(reg) & SSSR_ALT_FRM_MASK;
152 write_SSSR(val, reg);
155 extern int pxa2xx_spi_flush(struct driver_data *drv_data);
156 extern void *pxa2xx_spi_next_transfer(struct driver_data *drv_data);
159 * Select the right DMA implementation.
161 #if defined(CONFIG_SPI_PXA2XX_PXADMA)
162 #define SPI_PXA2XX_USE_DMA 1
163 #define MAX_DMA_LEN 8191
164 #define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TINTE)
165 #elif defined(CONFIG_SPI_PXA2XX_DMA)
166 #define SPI_PXA2XX_USE_DMA 1
167 #define MAX_DMA_LEN SZ_64K
168 #define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TRAIL)
170 #undef SPI_PXA2XX_USE_DMA
171 #define MAX_DMA_LEN 0
172 #define DEFAULT_DMA_CR1 0
175 #ifdef SPI_PXA2XX_USE_DMA
176 extern bool pxa2xx_spi_dma_is_possible(size_t len);
177 extern int pxa2xx_spi_map_dma_buffers(struct driver_data *drv_data);
178 extern irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data);
179 extern int pxa2xx_spi_dma_prepare(struct driver_data *drv_data, u32 dma_burst);
180 extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
181 extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
182 extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
183 extern void pxa2xx_spi_dma_resume(struct driver_data *drv_data);
184 extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
185 struct spi_device *spi,
190 static inline bool pxa2xx_spi_dma_is_possible(size_t len) { return false; }
191 static inline int pxa2xx_spi_map_dma_buffers(struct driver_data *drv_data)
195 #define pxa2xx_spi_dma_transfer NULL
196 static inline void pxa2xx_spi_dma_prepare(struct driver_data *drv_data,
198 static inline void pxa2xx_spi_dma_start(struct driver_data *drv_data) {}
199 static inline int pxa2xx_spi_dma_setup(struct driver_data *drv_data)
203 static inline void pxa2xx_spi_dma_release(struct driver_data *drv_data) {}
204 static inline void pxa2xx_spi_dma_resume(struct driver_data *drv_data) {}
205 static inline int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
206 struct spi_device *spi,
215 #endif /* SPI_PXA2XX_H */