2 * polling/bitbanging SPI master controller driver utilities
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/workqueue.h>
22 #include <linux/interrupt.h>
23 #include <linux/module.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/platform_device.h>
27 #include <linux/slab.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi/spi_bitbang.h>
33 /*----------------------------------------------------------------------*/
36 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
37 * Use this for GPIO or shift-register level hardware APIs.
39 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
40 * to glue code. These bitbang setup() and cleanup() routines are always
41 * used, though maybe they're called from controller-aware code.
43 * chipselect() and friends may use use spi_device->controller_data and
44 * controller registers as appropriate.
47 * NOTE: SPI controller pins can often be used as GPIO pins instead,
48 * which means you could use a bitbang driver either to get hardware
49 * working quickly, or testing for differences that aren't speed related.
52 struct spi_bitbang_cs {
53 unsigned nsecs; /* (clock cycle time)/2 */
54 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
56 unsigned (*txrx_bufs)(struct spi_device *,
58 struct spi_device *spi,
61 unsigned, struct spi_transfer *);
64 static unsigned bitbang_txrx_8(
65 struct spi_device *spi,
66 u32 (*txrx_word)(struct spi_device *spi,
70 struct spi_transfer *t
72 unsigned bits = t->bits_per_word;
73 unsigned count = t->len;
74 const u8 *tx = t->tx_buf;
77 while (likely(count > 0)) {
82 word = txrx_word(spi, ns, word, bits);
87 return t->len - count;
90 static unsigned bitbang_txrx_16(
91 struct spi_device *spi,
92 u32 (*txrx_word)(struct spi_device *spi,
96 struct spi_transfer *t
98 unsigned bits = t->bits_per_word;
99 unsigned count = t->len;
100 const u16 *tx = t->tx_buf;
103 while (likely(count > 1)) {
108 word = txrx_word(spi, ns, word, bits);
113 return t->len - count;
116 static unsigned bitbang_txrx_32(
117 struct spi_device *spi,
118 u32 (*txrx_word)(struct spi_device *spi,
122 struct spi_transfer *t
124 unsigned bits = t->bits_per_word;
125 unsigned count = t->len;
126 const u32 *tx = t->tx_buf;
129 while (likely(count > 3)) {
134 word = txrx_word(spi, ns, word, bits);
139 return t->len - count;
142 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
144 struct spi_bitbang_cs *cs = spi->controller_state;
149 bits_per_word = t->bits_per_word;
156 /* spi_transfer level calls that work per-word */
158 bits_per_word = spi->bits_per_word;
159 if (bits_per_word <= 8)
160 cs->txrx_bufs = bitbang_txrx_8;
161 else if (bits_per_word <= 16)
162 cs->txrx_bufs = bitbang_txrx_16;
163 else if (bits_per_word <= 32)
164 cs->txrx_bufs = bitbang_txrx_32;
168 /* nsecs = (clock period)/2 */
170 hz = spi->max_speed_hz;
172 cs->nsecs = (1000000000/2) / hz;
173 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
179 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
182 * spi_bitbang_setup - default setup for per-word I/O loops
184 int spi_bitbang_setup(struct spi_device *spi)
186 struct spi_bitbang_cs *cs = spi->controller_state;
187 struct spi_bitbang *bitbang;
191 bitbang = spi_master_get_devdata(spi->master);
194 cs = kzalloc(sizeof *cs, GFP_KERNEL);
197 spi->controller_state = cs;
200 /* per-word shift register access, in hardware or bitbanging */
201 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
205 retval = bitbang->setup_transfer(spi, NULL);
209 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
211 /* NOTE we _need_ to call chipselect() early, ideally with adapter
212 * setup, unless the hardware defaults cooperate to avoid confusion
213 * between normal (active low) and inverted chipselects.
216 /* deselect chip (low or high) */
217 spin_lock_irqsave(&bitbang->lock, flags);
218 if (!bitbang->busy) {
219 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
222 spin_unlock_irqrestore(&bitbang->lock, flags);
226 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
229 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
231 void spi_bitbang_cleanup(struct spi_device *spi)
233 kfree(spi->controller_state);
235 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
237 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
239 struct spi_bitbang_cs *cs = spi->controller_state;
240 unsigned nsecs = cs->nsecs;
242 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
245 /*----------------------------------------------------------------------*/
248 * SECOND PART ... simple transfer queue runner.
250 * This costs a task context per controller, running the queue by
251 * performing each transfer in sequence. Smarter hardware can queue
252 * several DMA transfers at once, and process several controller queues
253 * in parallel; this driver doesn't match such hardware very well.
255 * Drivers can provide word-at-a-time i/o primitives, or provide
256 * transfer-at-a-time ones to leverage dma or fifo hardware.
258 static int spi_bitbang_transfer_one(struct spi_device *spi,
259 struct spi_message *m)
261 struct spi_bitbang *bitbang;
263 struct spi_transfer *t = NULL;
269 bitbang = spi_master_get_devdata(spi->master);
271 /* FIXME this is made-up ... the correct value is known to
272 * word-at-a-time bitbang code, and presumably chipselect()
273 * should enforce these requirements too?
281 list_for_each_entry (t, &m->transfers, transfer_list) {
283 /* override speed or wordsize? */
284 if (t->speed_hz || t->bits_per_word)
287 /* init (-1) or override (1) transfer params */
289 status = bitbang->setup_transfer(spi, t);
296 /* set up default clock polarity, and activate chip;
297 * this implicitly updates clock and spi modes as
298 * previously recorded for this device via setup().
299 * (and also deselects any other chip that might be
303 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
306 cs_change = t->cs_change;
307 if (!t->tx_buf && !t->rx_buf && t->len) {
312 /* transfer data. the lower level code handles any
313 * new dma mappings it needs. our caller always gave
314 * us dma-safe buffers.
317 /* REVISIT dma API still needs a designated
318 * DMA_ADDR_INVALID; ~0 might be better.
320 if (!m->is_dma_mapped)
321 t->rx_dma = t->tx_dma = 0;
322 status = bitbang->txrx_bufs(spi, t);
325 m->actual_length += status;
326 if (status != t->len) {
327 /* always report some kind of error */
334 /* protocol tweaks before next transfer */
336 udelay(t->delay_usecs);
338 if (cs_change && !list_is_last(&t->transfer_list, &m->transfers)) {
339 /* sometimes a short mid-message deselect of the chip
340 * may be needed to terminate a mode or command
343 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
349 m->complete(m->context);
351 /* normally deactivate chipselect ... unless no error and
352 * cs_change has hinted that the next message will probably
353 * be for this chip too.
355 if (!(status == 0 && cs_change)) {
357 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
364 static void bitbang_work(struct work_struct *work)
366 struct spi_bitbang *bitbang =
367 container_of(work, struct spi_bitbang, work);
369 struct spi_message *m, *_m;
371 spin_lock_irqsave(&bitbang->lock, flags);
373 list_for_each_entry_safe(m, _m, &bitbang->queue, queue) {
375 spin_unlock_irqrestore(&bitbang->lock, flags);
377 spi_bitbang_transfer_one(m->spi, m);
379 spin_lock_irqsave(&bitbang->lock, flags);
382 spin_unlock_irqrestore(&bitbang->lock, flags);
386 * spi_bitbang_transfer - default submit to transfer queue
388 static int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
390 struct spi_bitbang *bitbang;
394 m->actual_length = 0;
395 m->status = -EINPROGRESS;
397 bitbang = spi_master_get_devdata(spi->master);
399 spin_lock_irqsave(&bitbang->lock, flags);
400 if (!spi->max_speed_hz)
403 list_add_tail(&m->queue, &bitbang->queue);
404 queue_work(bitbang->workqueue, &bitbang->work);
406 spin_unlock_irqrestore(&bitbang->lock, flags);
411 /*----------------------------------------------------------------------*/
414 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
415 * @bitbang: driver handle
417 * Caller should have zero-initialized all parts of the structure, and then
418 * provided callbacks for chip selection and I/O loops. If the master has
419 * a transfer method, its final step should call spi_bitbang_transfer; or,
420 * that's the default if the transfer routine is not initialized. It should
421 * also set up the bus number and number of chipselects.
423 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
424 * hardware that basically exposes a shift register) or per-spi_transfer
425 * (which takes better advantage of hardware like fifos or DMA engines).
427 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
428 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
429 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
430 * routine isn't initialized.
432 * This routine registers the spi_master, which will process requests in a
433 * dedicated task, keeping IRQs unblocked most of the time. To stop
434 * processing those requests, call spi_bitbang_stop().
436 int spi_bitbang_start(struct spi_bitbang *bitbang)
438 struct spi_master *master = bitbang->master;
441 if (!master || !bitbang->chipselect)
444 INIT_WORK(&bitbang->work, bitbang_work);
445 spin_lock_init(&bitbang->lock);
446 INIT_LIST_HEAD(&bitbang->queue);
448 if (!master->mode_bits)
449 master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
451 if (!master->transfer)
452 master->transfer = spi_bitbang_transfer;
453 if (!bitbang->txrx_bufs) {
454 bitbang->use_dma = 0;
455 bitbang->txrx_bufs = spi_bitbang_bufs;
456 if (!master->setup) {
457 if (!bitbang->setup_transfer)
458 bitbang->setup_transfer =
459 spi_bitbang_setup_transfer;
460 master->setup = spi_bitbang_setup;
461 master->cleanup = spi_bitbang_cleanup;
463 } else if (!master->setup)
465 if (master->transfer == spi_bitbang_transfer &&
466 !bitbang->setup_transfer)
469 /* this task is the only thing to touch the SPI bits */
471 bitbang->workqueue = create_singlethread_workqueue(
472 dev_name(master->dev.parent));
473 if (bitbang->workqueue == NULL) {
478 /* driver may get busy before register() returns, especially
479 * if someone registered boardinfo for devices
481 status = spi_register_master(master);
488 destroy_workqueue(bitbang->workqueue);
492 EXPORT_SYMBOL_GPL(spi_bitbang_start);
495 * spi_bitbang_stop - stops the task providing spi communication
497 int spi_bitbang_stop(struct spi_bitbang *bitbang)
499 spi_unregister_master(bitbang->master);
501 WARN_ON(!list_empty(&bitbang->queue));
503 destroy_workqueue(bitbang->workqueue);
507 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
509 MODULE_LICENSE("GPL");