2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2012 QLogic Corporation
5 * See LICENSE.qla4xxx for copyright and licensing details.
11 #include "ql4_inline.h"
12 #include "ql4_version.h"
14 void qla4xxx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd,
19 /* Load all mailbox registers, except mailbox 0. */
20 for (i = 1; i < in_count; i++)
21 writel(mbx_cmd[i], &ha->reg->mailbox[i]);
24 writel(mbx_cmd[0], &ha->reg->mailbox[0]);
25 readl(&ha->reg->mailbox[0]);
26 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
27 readl(&ha->reg->ctrl_status);
30 void qla4xxx_process_mbox_intr(struct scsi_qla_host *ha, int out_count)
34 intr_status = readl(&ha->reg->ctrl_status);
35 if (intr_status & INTR_PENDING) {
37 * Service the interrupt.
38 * The ISR will save the mailbox status registers
39 * to a temporary storage location in the adapter structure.
41 ha->mbox_status_count = out_count;
42 ha->isp_ops->interrupt_service_routine(ha, intr_status);
47 * qla4xxx_mailbox_command - issues mailbox commands
48 * @ha: Pointer to host adapter structure.
49 * @inCount: number of mailbox registers to load.
50 * @outCount: number of mailbox registers to return.
51 * @mbx_cmd: data pointer for mailbox in registers.
52 * @mbx_sts: data pointer for mailbox out registers.
54 * This routine issue mailbox commands and waits for completion.
55 * If outCount is 0, this routine completes successfully WITHOUT waiting
56 * for the mailbox command to complete.
58 int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
59 uint8_t outCount, uint32_t *mbx_cmd,
62 int status = QLA_ERROR;
65 unsigned long flags = 0;
68 /* Make sure that pointers are valid */
69 if (!mbx_cmd || !mbx_sts) {
70 DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
71 "pointer\n", ha->host_no, __func__));
76 if (test_bit(AF_HA_REMOVAL, &ha->flags)) {
77 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
78 "prematurely completing mbx cmd as "
79 "adapter removal detected\n",
80 ha->host_no, __func__));
85 if ((is_aer_supported(ha)) &&
86 (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))) {
87 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Perm failure on EEH, "
88 "timeout MBX Exiting.\n", ha->host_no, __func__));
92 /* Mailbox code active */
93 wait_count = MBOX_TOV * 100;
95 while (wait_count--) {
96 mutex_lock(&ha->mbox_sem);
97 if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
98 set_bit(AF_MBOX_COMMAND, &ha->flags);
99 mutex_unlock(&ha->mbox_sem);
102 mutex_unlock(&ha->mbox_sem);
104 DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
105 ha->host_no, __func__));
111 if (is_qla80XX(ha)) {
112 if (test_bit(AF_FW_RECOVERY, &ha->flags)) {
113 DEBUG2(ql4_printk(KERN_WARNING, ha,
114 "scsi%ld: %s: prematurely completing mbx cmd as firmware recovery detected\n",
115 ha->host_no, __func__));
118 /* Do not send any mbx cmd if h/w is in failed state*/
119 ha->isp_ops->idc_lock(ha);
120 dev_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE);
121 ha->isp_ops->idc_unlock(ha);
122 if (dev_state == QLA8XXX_DEV_FAILED) {
123 ql4_printk(KERN_WARNING, ha,
124 "scsi%ld: %s: H/W is in failed state, do not send any mailbox commands\n",
125 ha->host_no, __func__);
130 spin_lock_irqsave(&ha->hardware_lock, flags);
132 ha->mbox_status_count = outCount;
133 for (i = 0; i < outCount; i++)
134 ha->mbox_status[i] = 0;
136 /* Queue the mailbox command to the firmware */
137 ha->isp_ops->queue_mailbox_command(ha, mbx_cmd, inCount);
139 spin_unlock_irqrestore(&ha->hardware_lock, flags);
141 /* Wait for completion */
144 * If we don't want status, don't wait for the mailbox command to
145 * complete. For example, MBOX_CMD_RESET_FW doesn't return status,
146 * you must poll the inbound Interrupt Mask for completion.
149 status = QLA_SUCCESS;
154 * Wait for completion: Poll or completion queue
156 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
157 test_bit(AF_INTERRUPTS_ON, &ha->flags) &&
158 test_bit(AF_ONLINE, &ha->flags) &&
159 !test_bit(AF_HA_REMOVAL, &ha->flags)) {
160 /* Do not poll for completion. Use completion queue */
161 set_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
162 wait_for_completion_timeout(&ha->mbx_intr_comp, MBOX_TOV * HZ);
163 clear_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
165 /* Poll for command to complete */
166 wait_count = jiffies + MBOX_TOV * HZ;
167 while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
168 if (time_after_eq(jiffies, wait_count))
172 * Service the interrupt.
173 * The ISR will save the mailbox status registers
174 * to a temporary storage location in the adapter
178 spin_lock_irqsave(&ha->hardware_lock, flags);
179 ha->isp_ops->process_mailbox_interrupt(ha, outCount);
180 spin_unlock_irqrestore(&ha->hardware_lock, flags);
185 /* Check for mailbox timeout. */
186 if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
187 if (is_qla80XX(ha) &&
188 test_bit(AF_FW_RECOVERY, &ha->flags)) {
189 DEBUG2(ql4_printk(KERN_INFO, ha,
190 "scsi%ld: %s: prematurely completing mbx cmd as "
191 "firmware recovery detected\n",
192 ha->host_no, __func__));
195 DEBUG2(printk("scsi%ld: Mailbox Cmd 0x%08X timed out ...,"
196 " Scheduling Adapter Reset\n", ha->host_no,
198 ha->mailbox_timeout_count++;
200 set_bit(DPC_RESET_HA, &ha->dpc_flags);
201 if (is_qla8022(ha)) {
202 ql4_printk(KERN_INFO, ha,
203 "disabling pause transmit on port 0 & 1.\n");
204 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98,
205 CRB_NIU_XG_PAUSE_CTL_P0 |
206 CRB_NIU_XG_PAUSE_CTL_P1);
207 } else if (is_qla8032(ha)) {
208 ql4_printk(KERN_INFO, ha, " %s: disabling pause transmit on port 0 & 1.\n",
210 qla4_83xx_disable_pause(ha);
216 * Copy the mailbox out registers to the caller's mailbox in/out
219 spin_lock_irqsave(&ha->hardware_lock, flags);
220 for (i = 0; i < outCount; i++)
221 mbx_sts[i] = ha->mbox_status[i];
223 /* Set return status and error flags (if applicable). */
224 switch (ha->mbox_status[0]) {
225 case MBOX_STS_COMMAND_COMPLETE:
226 status = QLA_SUCCESS;
229 case MBOX_STS_INTERMEDIATE_COMPLETION:
230 status = QLA_SUCCESS;
234 DEBUG2( printk("scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
235 ha->host_no, __func__, mbx_cmd[0]));
236 ha->mailbox_timeout_count++;
240 DEBUG2(printk("scsi%ld: %s: **** FAILED, cmd = %08X, "
241 "sts = %08X ****\n", ha->host_no, __func__,
242 mbx_cmd[0], mbx_sts[0]));
245 spin_unlock_irqrestore(&ha->hardware_lock, flags);
248 mutex_lock(&ha->mbox_sem);
249 clear_bit(AF_MBOX_COMMAND, &ha->flags);
250 mutex_unlock(&ha->mbox_sem);
251 clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
257 * qla4xxx_get_minidump_template - Get the firmware template
258 * @ha: Pointer to host adapter structure.
259 * @phys_addr: dma address for template
261 * Obtain the minidump template from firmware during initialization
262 * as it may not be available when minidump is desired.
264 int qla4xxx_get_minidump_template(struct scsi_qla_host *ha,
265 dma_addr_t phys_addr)
267 uint32_t mbox_cmd[MBOX_REG_COUNT];
268 uint32_t mbox_sts[MBOX_REG_COUNT];
271 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
272 memset(&mbox_sts, 0, sizeof(mbox_sts));
274 mbox_cmd[0] = MBOX_CMD_MINIDUMP;
275 mbox_cmd[1] = MINIDUMP_GET_TMPLT_SUBCOMMAND;
276 mbox_cmd[2] = LSDW(phys_addr);
277 mbox_cmd[3] = MSDW(phys_addr);
278 mbox_cmd[4] = ha->fw_dump_tmplt_size;
281 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
283 if (status != QLA_SUCCESS) {
284 DEBUG2(ql4_printk(KERN_INFO, ha,
285 "scsi%ld: %s: Cmd = %08X, mbx[0] = 0x%04x, mbx[1] = 0x%04x\n",
286 ha->host_no, __func__, mbox_cmd[0],
287 mbox_sts[0], mbox_sts[1]));
293 * qla4xxx_req_template_size - Get minidump template size from firmware.
294 * @ha: Pointer to host adapter structure.
296 int qla4xxx_req_template_size(struct scsi_qla_host *ha)
298 uint32_t mbox_cmd[MBOX_REG_COUNT];
299 uint32_t mbox_sts[MBOX_REG_COUNT];
302 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
303 memset(&mbox_sts, 0, sizeof(mbox_sts));
305 mbox_cmd[0] = MBOX_CMD_MINIDUMP;
306 mbox_cmd[1] = MINIDUMP_GET_SIZE_SUBCOMMAND;
308 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 8, &mbox_cmd[0],
310 if (status == QLA_SUCCESS) {
311 ha->fw_dump_tmplt_size = mbox_sts[1];
312 DEBUG2(ql4_printk(KERN_INFO, ha,
313 "%s: sts[0]=0x%04x, template size=0x%04x, size_cm_02=0x%04x, size_cm_04=0x%04x, size_cm_08=0x%04x, size_cm_10=0x%04x, size_cm_FF=0x%04x, version=0x%04x\n",
314 __func__, mbox_sts[0], mbox_sts[1],
315 mbox_sts[2], mbox_sts[3], mbox_sts[4],
316 mbox_sts[5], mbox_sts[6], mbox_sts[7]));
317 if (ha->fw_dump_tmplt_size == 0)
320 ql4_printk(KERN_WARNING, ha,
321 "%s: Error sts[0]=0x%04x, mbx[1]=0x%04x\n",
322 __func__, mbox_sts[0], mbox_sts[1]);
329 void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha)
331 set_bit(AF_FW_RECOVERY, &ha->flags);
332 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: set FW RECOVERY!\n",
333 ha->host_no, __func__);
335 if (test_bit(AF_MBOX_COMMAND, &ha->flags)) {
336 if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) {
337 complete(&ha->mbx_intr_comp);
338 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
339 "recovery, doing premature completion of "
340 "mbx cmd\n", ha->host_no, __func__);
343 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
344 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
345 "recovery, doing premature completion of "
346 "polling mbx cmd\n", ha->host_no, __func__);
352 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
353 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
355 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
356 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
359 qla4_82xx_wr_32(ha, ha->nx_db_wr_ptr, 0);
361 mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
363 mbox_cmd[2] = LSDW(init_fw_cb_dma);
364 mbox_cmd[3] = MSDW(init_fw_cb_dma);
365 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
366 mbox_cmd[5] = (IFCB_VER_MAX << 8) | IFCB_VER_MIN;
368 if (qla4xxx_mailbox_command(ha, 6, 6, mbox_cmd, mbox_sts) !=
370 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
371 "MBOX_CMD_INITIALIZE_FIRMWARE"
372 " failed w/ status %04X\n",
373 ha->host_no, __func__, mbox_sts[0]));
380 qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
381 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
383 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
384 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
385 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
386 mbox_cmd[2] = LSDW(init_fw_cb_dma);
387 mbox_cmd[3] = MSDW(init_fw_cb_dma);
388 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
390 if (qla4xxx_mailbox_command(ha, 5, 5, mbox_cmd, mbox_sts) !=
392 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
393 "MBOX_CMD_GET_INIT_FW_CTRL_BLOCK"
394 " failed w/ status %04X\n",
395 ha->host_no, __func__, mbox_sts[0]));
402 qla4xxx_update_local_ip(struct scsi_qla_host *ha,
403 struct addr_ctrl_blk *init_fw_cb)
405 ha->ip_config.tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts);
406 ha->ip_config.ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts);
407 ha->ip_config.ipv4_addr_state =
408 le16_to_cpu(init_fw_cb->ipv4_addr_state);
409 ha->ip_config.eth_mtu_size =
410 le16_to_cpu(init_fw_cb->eth_mtu_size);
411 ha->ip_config.ipv4_port = le16_to_cpu(init_fw_cb->ipv4_port);
413 if (ha->acb_version == ACB_SUPPORTED) {
414 ha->ip_config.ipv6_options = le16_to_cpu(init_fw_cb->ipv6_opts);
415 ha->ip_config.ipv6_addl_options =
416 le16_to_cpu(init_fw_cb->ipv6_addtl_opts);
419 /* Save IPv4 Address Info */
420 memcpy(ha->ip_config.ip_address, init_fw_cb->ipv4_addr,
421 min(sizeof(ha->ip_config.ip_address),
422 sizeof(init_fw_cb->ipv4_addr)));
423 memcpy(ha->ip_config.subnet_mask, init_fw_cb->ipv4_subnet,
424 min(sizeof(ha->ip_config.subnet_mask),
425 sizeof(init_fw_cb->ipv4_subnet)));
426 memcpy(ha->ip_config.gateway, init_fw_cb->ipv4_gw_addr,
427 min(sizeof(ha->ip_config.gateway),
428 sizeof(init_fw_cb->ipv4_gw_addr)));
430 ha->ip_config.ipv4_vlan_tag = be16_to_cpu(init_fw_cb->ipv4_vlan_tag);
432 if (is_ipv6_enabled(ha)) {
433 /* Save IPv6 Address */
434 ha->ip_config.ipv6_link_local_state =
435 le16_to_cpu(init_fw_cb->ipv6_lnk_lcl_addr_state);
436 ha->ip_config.ipv6_addr0_state =
437 le16_to_cpu(init_fw_cb->ipv6_addr0_state);
438 ha->ip_config.ipv6_addr1_state =
439 le16_to_cpu(init_fw_cb->ipv6_addr1_state);
440 ha->ip_config.ipv6_default_router_state =
441 le16_to_cpu(init_fw_cb->ipv6_dflt_rtr_state);
442 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE;
443 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80;
445 memcpy(&ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[8],
446 init_fw_cb->ipv6_if_id,
447 min(sizeof(ha->ip_config.ipv6_link_local_addr)/2,
448 sizeof(init_fw_cb->ipv6_if_id)));
449 memcpy(&ha->ip_config.ipv6_addr0, init_fw_cb->ipv6_addr0,
450 min(sizeof(ha->ip_config.ipv6_addr0),
451 sizeof(init_fw_cb->ipv6_addr0)));
452 memcpy(&ha->ip_config.ipv6_addr1, init_fw_cb->ipv6_addr1,
453 min(sizeof(ha->ip_config.ipv6_addr1),
454 sizeof(init_fw_cb->ipv6_addr1)));
455 memcpy(&ha->ip_config.ipv6_default_router_addr,
456 init_fw_cb->ipv6_dflt_rtr_addr,
457 min(sizeof(ha->ip_config.ipv6_default_router_addr),
458 sizeof(init_fw_cb->ipv6_dflt_rtr_addr)));
459 ha->ip_config.ipv6_vlan_tag =
460 be16_to_cpu(init_fw_cb->ipv6_vlan_tag);
461 ha->ip_config.ipv6_port = le16_to_cpu(init_fw_cb->ipv6_port);
466 qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
469 struct addr_ctrl_blk *init_fw_cb,
470 dma_addr_t init_fw_cb_dma)
472 if (qla4xxx_get_ifcb(ha, mbox_cmd, mbox_sts, init_fw_cb_dma)
474 DEBUG2(printk(KERN_WARNING
475 "scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
476 ha->host_no, __func__));
480 DEBUG2(qla4xxx_dump_buffer(init_fw_cb, sizeof(struct addr_ctrl_blk)));
482 /* Save some info in adapter structure. */
483 ha->acb_version = init_fw_cb->acb_version;
484 ha->firmware_options = le16_to_cpu(init_fw_cb->fw_options);
485 ha->heartbeat_interval = init_fw_cb->hb_interval;
486 memcpy(ha->name_string, init_fw_cb->iscsi_name,
487 min(sizeof(ha->name_string),
488 sizeof(init_fw_cb->iscsi_name)));
489 ha->def_timeout = le16_to_cpu(init_fw_cb->def_timeout);
490 /*memcpy(ha->alias, init_fw_cb->Alias,
491 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
493 qla4xxx_update_local_ip(ha, init_fw_cb);
499 * qla4xxx_initialize_fw_cb - initializes firmware control block.
500 * @ha: Pointer to host adapter structure.
502 int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
504 struct addr_ctrl_blk *init_fw_cb;
505 dma_addr_t init_fw_cb_dma;
506 uint32_t mbox_cmd[MBOX_REG_COUNT];
507 uint32_t mbox_sts[MBOX_REG_COUNT];
508 int status = QLA_ERROR;
510 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
511 sizeof(struct addr_ctrl_blk),
512 &init_fw_cb_dma, GFP_KERNEL);
513 if (init_fw_cb == NULL) {
514 DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
515 ha->host_no, __func__));
516 goto exit_init_fw_cb_no_free;
518 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
520 /* Get Initialize Firmware Control Block. */
521 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
522 memset(&mbox_sts, 0, sizeof(mbox_sts));
524 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
526 dma_free_coherent(&ha->pdev->dev,
527 sizeof(struct addr_ctrl_blk),
528 init_fw_cb, init_fw_cb_dma);
529 goto exit_init_fw_cb;
532 /* Initialize request and response queues. */
533 qla4xxx_init_rings(ha);
535 /* Fill in the request and response queue information. */
536 init_fw_cb->rqq_consumer_idx = cpu_to_le16(ha->request_out);
537 init_fw_cb->compq_producer_idx = cpu_to_le16(ha->response_in);
538 init_fw_cb->rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
539 init_fw_cb->compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
540 init_fw_cb->rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
541 init_fw_cb->rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
542 init_fw_cb->compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
543 init_fw_cb->compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
544 init_fw_cb->shdwreg_addr_lo = cpu_to_le32(LSDW(ha->shadow_regs_dma));
545 init_fw_cb->shdwreg_addr_hi = cpu_to_le32(MSDW(ha->shadow_regs_dma));
547 /* Set up required options. */
548 init_fw_cb->fw_options |=
549 __constant_cpu_to_le16(FWOPT_SESSION_MODE |
550 FWOPT_INITIATOR_MODE);
553 init_fw_cb->fw_options |=
554 __constant_cpu_to_le16(FWOPT_ENABLE_CRBDB);
556 init_fw_cb->fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
558 init_fw_cb->add_fw_options = 0;
559 init_fw_cb->add_fw_options |=
560 __constant_cpu_to_le16(ADFWOPT_SERIALIZE_TASK_MGMT);
561 init_fw_cb->add_fw_options |=
562 __constant_cpu_to_le16(ADFWOPT_AUTOCONN_DISABLE);
564 if (qla4xxx_set_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma)
566 DEBUG2(printk(KERN_WARNING
567 "scsi%ld: %s: Failed to set init_fw_ctrl_blk\n",
568 ha->host_no, __func__));
569 goto exit_init_fw_cb;
572 if (qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0],
573 init_fw_cb, init_fw_cb_dma) != QLA_SUCCESS) {
574 DEBUG2(printk("scsi%ld: %s: Failed to update local ifcb\n",
575 ha->host_no, __func__));
576 goto exit_init_fw_cb;
578 status = QLA_SUCCESS;
581 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
582 init_fw_cb, init_fw_cb_dma);
583 exit_init_fw_cb_no_free:
588 * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
589 * @ha: Pointer to host adapter structure.
591 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
593 struct addr_ctrl_blk *init_fw_cb;
594 dma_addr_t init_fw_cb_dma;
595 uint32_t mbox_cmd[MBOX_REG_COUNT];
596 uint32_t mbox_sts[MBOX_REG_COUNT];
598 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
599 sizeof(struct addr_ctrl_blk),
600 &init_fw_cb_dma, GFP_KERNEL);
601 if (init_fw_cb == NULL) {
602 printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
607 /* Get Initialize Firmware Control Block. */
608 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
609 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
611 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
612 ha->host_no, __func__));
613 dma_free_coherent(&ha->pdev->dev,
614 sizeof(struct addr_ctrl_blk),
615 init_fw_cb, init_fw_cb_dma);
619 /* Save IP Address. */
620 qla4xxx_update_local_ip(ha, init_fw_cb);
621 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
622 init_fw_cb, init_fw_cb_dma);
628 * qla4xxx_get_firmware_state - gets firmware state of HBA
629 * @ha: Pointer to host adapter structure.
631 int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
633 uint32_t mbox_cmd[MBOX_REG_COUNT];
634 uint32_t mbox_sts[MBOX_REG_COUNT];
636 /* Get firmware version */
637 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
638 memset(&mbox_sts, 0, sizeof(mbox_sts));
640 mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
642 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
644 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
645 "status %04X\n", ha->host_no, __func__,
649 ha->firmware_state = mbox_sts[1];
650 ha->board_id = mbox_sts[2];
651 ha->addl_fw_state = mbox_sts[3];
652 DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
653 ha->host_no, __func__, ha->firmware_state);)
659 * qla4xxx_get_firmware_status - retrieves firmware status
660 * @ha: Pointer to host adapter structure.
662 int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
664 uint32_t mbox_cmd[MBOX_REG_COUNT];
665 uint32_t mbox_sts[MBOX_REG_COUNT];
667 /* Get firmware version */
668 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
669 memset(&mbox_sts, 0, sizeof(mbox_sts));
671 mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
673 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
675 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
676 "status %04X\n", ha->host_no, __func__,
681 ql4_printk(KERN_INFO, ha, "%ld firmware IOCBs available (%d).\n",
682 ha->host_no, mbox_sts[2]);
688 * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
689 * @ha: Pointer to host adapter structure.
690 * @fw_ddb_index: Firmware's device database index
691 * @fw_ddb_entry: Pointer to firmware's device database entry structure
692 * @num_valid_ddb_entries: Pointer to number of valid ddb entries
693 * @next_ddb_index: Pointer to next valid device database index
694 * @fw_ddb_device_state: Pointer to device state
696 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
697 uint16_t fw_ddb_index,
698 struct dev_db_entry *fw_ddb_entry,
699 dma_addr_t fw_ddb_entry_dma,
700 uint32_t *num_valid_ddb_entries,
701 uint32_t *next_ddb_index,
702 uint32_t *fw_ddb_device_state,
703 uint32_t *conn_err_detail,
704 uint16_t *tcp_source_port_num,
705 uint16_t *connection_id)
707 int status = QLA_ERROR;
709 uint32_t mbox_cmd[MBOX_REG_COUNT];
710 uint32_t mbox_sts[MBOX_REG_COUNT];
712 /* Make sure the device index is valid */
713 if (fw_ddb_index >= MAX_DDB_ENTRIES) {
714 DEBUG2(printk("scsi%ld: %s: ddb [%d] out of range.\n",
715 ha->host_no, __func__, fw_ddb_index));
718 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
719 memset(&mbox_sts, 0, sizeof(mbox_sts));
721 memset(fw_ddb_entry, 0, sizeof(struct dev_db_entry));
723 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
724 mbox_cmd[1] = (uint32_t) fw_ddb_index;
725 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
726 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
727 mbox_cmd[4] = sizeof(struct dev_db_entry);
729 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
731 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
732 " with status 0x%04X\n", ha->host_no, __func__,
736 if (fw_ddb_index != mbox_sts[1]) {
737 DEBUG2(printk("scsi%ld: %s: ddb mismatch [%d] != [%d].\n",
738 ha->host_no, __func__, fw_ddb_index,
743 options = le16_to_cpu(fw_ddb_entry->options);
744 if (options & DDB_OPT_IPV6_DEVICE) {
745 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
746 "Next %d State %04x ConnErr %08x %pI6 "
747 ":%04d \"%s\"\n", __func__, fw_ddb_index,
748 mbox_sts[0], mbox_sts[2], mbox_sts[3],
749 mbox_sts[4], mbox_sts[5],
750 fw_ddb_entry->ip_addr,
751 le16_to_cpu(fw_ddb_entry->port),
752 fw_ddb_entry->iscsi_name);
754 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
755 "Next %d State %04x ConnErr %08x %pI4 "
756 ":%04d \"%s\"\n", __func__, fw_ddb_index,
757 mbox_sts[0], mbox_sts[2], mbox_sts[3],
758 mbox_sts[4], mbox_sts[5],
759 fw_ddb_entry->ip_addr,
760 le16_to_cpu(fw_ddb_entry->port),
761 fw_ddb_entry->iscsi_name);
764 if (num_valid_ddb_entries)
765 *num_valid_ddb_entries = mbox_sts[2];
767 *next_ddb_index = mbox_sts[3];
768 if (fw_ddb_device_state)
769 *fw_ddb_device_state = mbox_sts[4];
772 * RA: This mailbox has been changed to pass connection error and
773 * details. Its true for ISP4010 as per Version E - Not sure when it
774 * was changed. Get the time2wait from the fw_dd_entry field :
775 * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
779 *conn_err_detail = mbox_sts[5];
780 if (tcp_source_port_num)
781 *tcp_source_port_num = (uint16_t) (mbox_sts[6] >> 16);
783 *connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
784 status = QLA_SUCCESS;
790 int qla4xxx_conn_open(struct scsi_qla_host *ha, uint16_t fw_ddb_index)
792 uint32_t mbox_cmd[MBOX_REG_COUNT];
793 uint32_t mbox_sts[MBOX_REG_COUNT];
796 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
797 memset(&mbox_sts, 0, sizeof(mbox_sts));
799 mbox_cmd[0] = MBOX_CMD_CONN_OPEN;
800 mbox_cmd[1] = fw_ddb_index;
802 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
804 DEBUG2(ql4_printk(KERN_INFO, ha,
805 "%s: status = %d mbx0 = 0x%x mbx1 = 0x%x\n",
806 __func__, status, mbox_sts[0], mbox_sts[1]));
811 * qla4xxx_set_fwddb_entry - sets a ddb entry.
812 * @ha: Pointer to host adapter structure.
813 * @fw_ddb_index: Firmware's device database index
814 * @fw_ddb_entry_dma: dma address of ddb entry
815 * @mbx_sts: mailbox 0 to be returned or NULL
817 * This routine initializes or updates the adapter's device database
818 * entry for the specified device.
820 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
821 dma_addr_t fw_ddb_entry_dma, uint32_t *mbx_sts)
823 uint32_t mbox_cmd[MBOX_REG_COUNT];
824 uint32_t mbox_sts[MBOX_REG_COUNT];
827 /* Do not wait for completion. The firmware will send us an
828 * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
830 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
831 memset(&mbox_sts, 0, sizeof(mbox_sts));
833 mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
834 mbox_cmd[1] = (uint32_t) fw_ddb_index;
835 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
836 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
837 mbox_cmd[4] = sizeof(struct dev_db_entry);
839 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
842 *mbx_sts = mbox_sts[0];
843 DEBUG2(printk("scsi%ld: %s: status=%d mbx0=0x%x mbx4=0x%x\n",
844 ha->host_no, __func__, status, mbox_sts[0], mbox_sts[4]);)
849 int qla4xxx_session_logout_ddb(struct scsi_qla_host *ha,
850 struct ddb_entry *ddb_entry, int options)
853 uint32_t mbox_cmd[MBOX_REG_COUNT];
854 uint32_t mbox_sts[MBOX_REG_COUNT];
856 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
857 memset(&mbox_sts, 0, sizeof(mbox_sts));
859 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
860 mbox_cmd[1] = ddb_entry->fw_ddb_index;
861 mbox_cmd[3] = options;
863 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
865 if (status != QLA_SUCCESS) {
866 DEBUG2(ql4_printk(KERN_INFO, ha,
867 "%s: MBOX_CMD_CONN_CLOSE_SESS_LOGOUT "
868 "failed sts %04X %04X", __func__,
869 mbox_sts[0], mbox_sts[1]));
876 * qla4xxx_get_crash_record - retrieves crash record.
877 * @ha: Pointer to host adapter structure.
879 * This routine retrieves a crash record from the QLA4010 after an 8002h aen.
881 void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
883 uint32_t mbox_cmd[MBOX_REG_COUNT];
884 uint32_t mbox_sts[MBOX_REG_COUNT];
885 struct crash_record *crash_record = NULL;
886 dma_addr_t crash_record_dma = 0;
887 uint32_t crash_record_size = 0;
889 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
890 memset(&mbox_sts, 0, sizeof(mbox_cmd));
892 /* Get size of crash record. */
893 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
895 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
897 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
898 ha->host_no, __func__));
899 goto exit_get_crash_record;
901 crash_record_size = mbox_sts[4];
902 if (crash_record_size == 0) {
903 DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
904 ha->host_no, __func__));
905 goto exit_get_crash_record;
908 /* Alloc Memory for Crash Record. */
909 crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
910 &crash_record_dma, GFP_KERNEL);
911 if (crash_record == NULL)
912 goto exit_get_crash_record;
914 /* Get Crash Record. */
915 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
916 memset(&mbox_sts, 0, sizeof(mbox_cmd));
918 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
919 mbox_cmd[2] = LSDW(crash_record_dma);
920 mbox_cmd[3] = MSDW(crash_record_dma);
921 mbox_cmd[4] = crash_record_size;
923 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
925 goto exit_get_crash_record;
927 /* Dump Crash Record. */
929 exit_get_crash_record:
931 dma_free_coherent(&ha->pdev->dev, crash_record_size,
932 crash_record, crash_record_dma);
936 * qla4xxx_get_conn_event_log - retrieves connection event log
937 * @ha: Pointer to host adapter structure.
939 void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
941 uint32_t mbox_cmd[MBOX_REG_COUNT];
942 uint32_t mbox_sts[MBOX_REG_COUNT];
943 struct conn_event_log_entry *event_log = NULL;
944 dma_addr_t event_log_dma = 0;
945 uint32_t event_log_size = 0;
946 uint32_t num_valid_entries;
947 uint32_t oldest_entry = 0;
948 uint32_t max_event_log_entries;
951 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
952 memset(&mbox_sts, 0, sizeof(mbox_cmd));
954 /* Get size of crash record. */
955 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
957 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
959 goto exit_get_event_log;
961 event_log_size = mbox_sts[4];
962 if (event_log_size == 0)
963 goto exit_get_event_log;
965 /* Alloc Memory for Crash Record. */
966 event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
967 &event_log_dma, GFP_KERNEL);
968 if (event_log == NULL)
969 goto exit_get_event_log;
971 /* Get Crash Record. */
972 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
973 memset(&mbox_sts, 0, sizeof(mbox_cmd));
975 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
976 mbox_cmd[2] = LSDW(event_log_dma);
977 mbox_cmd[3] = MSDW(event_log_dma);
979 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
981 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
982 "log!\n", ha->host_no, __func__));
983 goto exit_get_event_log;
986 /* Dump Event Log. */
987 num_valid_entries = mbox_sts[1];
989 max_event_log_entries = event_log_size /
990 sizeof(struct conn_event_log_entry);
992 if (num_valid_entries > max_event_log_entries)
993 oldest_entry = num_valid_entries % max_event_log_entries;
995 DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
996 ha->host_no, num_valid_entries));
998 if (ql4xextended_error_logging == 3) {
999 if (oldest_entry == 0) {
1000 /* Circular Buffer has not wrapped around */
1001 for (i=0; i < num_valid_entries; i++) {
1002 qla4xxx_dump_buffer((uint8_t *)event_log+
1003 (i*sizeof(*event_log)),
1004 sizeof(*event_log));
1008 /* Circular Buffer has wrapped around -
1009 * display accordingly*/
1010 for (i=oldest_entry; i < max_event_log_entries; i++) {
1011 qla4xxx_dump_buffer((uint8_t *)event_log+
1012 (i*sizeof(*event_log)),
1013 sizeof(*event_log));
1015 for (i=0; i < oldest_entry; i++) {
1016 qla4xxx_dump_buffer((uint8_t *)event_log+
1017 (i*sizeof(*event_log)),
1018 sizeof(*event_log));
1025 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
1030 * qla4xxx_abort_task - issues Abort Task
1031 * @ha: Pointer to host adapter structure.
1032 * @srb: Pointer to srb entry
1034 * This routine performs a LUN RESET on the specified target/lun.
1035 * The caller must ensure that the ddb_entry and lun_entry pointers
1036 * are valid before calling this routine.
1038 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb)
1040 uint32_t mbox_cmd[MBOX_REG_COUNT];
1041 uint32_t mbox_sts[MBOX_REG_COUNT];
1042 struct scsi_cmnd *cmd = srb->cmd;
1043 int status = QLA_SUCCESS;
1044 unsigned long flags = 0;
1048 * Send abort task command to ISP, so that the ISP will return
1049 * request with ABORT status
1051 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1052 memset(&mbox_sts, 0, sizeof(mbox_sts));
1054 spin_lock_irqsave(&ha->hardware_lock, flags);
1055 index = (unsigned long)(unsigned char *)cmd->host_scribble;
1056 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1058 /* Firmware already posted completion on response queue */
1059 if (index == MAX_SRBS)
1062 mbox_cmd[0] = MBOX_CMD_ABORT_TASK;
1063 mbox_cmd[1] = srb->ddb->fw_ddb_index;
1064 mbox_cmd[2] = index;
1065 /* Immediate Command Enable */
1068 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
1070 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE) {
1073 DEBUG2(printk(KERN_WARNING "scsi%ld:%d:%d: abort task FAILED: "
1074 "mbx0=%04X, mb1=%04X, mb2=%04X, mb3=%04X, mb4=%04X\n",
1075 ha->host_no, cmd->device->id, cmd->device->lun, mbox_sts[0],
1076 mbox_sts[1], mbox_sts[2], mbox_sts[3], mbox_sts[4]));
1083 * qla4xxx_reset_lun - issues LUN Reset
1084 * @ha: Pointer to host adapter structure.
1085 * @ddb_entry: Pointer to device database entry
1088 * This routine performs a LUN RESET on the specified target/lun.
1089 * The caller must ensure that the ddb_entry and lun_entry pointers
1090 * are valid before calling this routine.
1092 int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
1095 uint32_t mbox_cmd[MBOX_REG_COUNT];
1096 uint32_t mbox_sts[MBOX_REG_COUNT];
1097 int status = QLA_SUCCESS;
1099 DEBUG2(printk("scsi%ld:%d:%d: lun reset issued\n", ha->host_no,
1100 ddb_entry->fw_ddb_index, lun));
1103 * Send lun reset command to ISP, so that the ISP will return all
1104 * outstanding requests with RESET status
1106 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1107 memset(&mbox_sts, 0, sizeof(mbox_sts));
1109 mbox_cmd[0] = MBOX_CMD_LUN_RESET;
1110 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1111 mbox_cmd[2] = lun << 8;
1112 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1114 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
1115 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1116 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1123 * qla4xxx_reset_target - issues target Reset
1124 * @ha: Pointer to host adapter structure.
1125 * @db_entry: Pointer to device database entry
1126 * @un_entry: Pointer to lun entry structure
1128 * This routine performs a TARGET RESET on the specified target.
1129 * The caller must ensure that the ddb_entry pointers
1130 * are valid before calling this routine.
1132 int qla4xxx_reset_target(struct scsi_qla_host *ha,
1133 struct ddb_entry *ddb_entry)
1135 uint32_t mbox_cmd[MBOX_REG_COUNT];
1136 uint32_t mbox_sts[MBOX_REG_COUNT];
1137 int status = QLA_SUCCESS;
1139 DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
1140 ddb_entry->fw_ddb_index));
1143 * Send target reset command to ISP, so that the ISP will return all
1144 * outstanding requests with RESET status
1146 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1147 memset(&mbox_sts, 0, sizeof(mbox_sts));
1149 mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
1150 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1151 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1153 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1155 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1156 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1162 int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
1163 uint32_t offset, uint32_t len)
1165 uint32_t mbox_cmd[MBOX_REG_COUNT];
1166 uint32_t mbox_sts[MBOX_REG_COUNT];
1168 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1169 memset(&mbox_sts, 0, sizeof(mbox_sts));
1171 mbox_cmd[0] = MBOX_CMD_READ_FLASH;
1172 mbox_cmd[1] = LSDW(dma_addr);
1173 mbox_cmd[2] = MSDW(dma_addr);
1174 mbox_cmd[3] = offset;
1177 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
1179 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
1180 "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
1181 __func__, mbox_sts[0], mbox_sts[1], offset, len));
1188 * qla4xxx_about_firmware - gets FW, iscsi draft and boot loader version
1189 * @ha: Pointer to host adapter structure.
1191 * Retrieves the FW version, iSCSI draft version & bootloader version of HBA.
1192 * Mailboxes 2 & 3 may hold an address for data. Make sure that we write 0 to
1193 * those mailboxes, if unused.
1195 int qla4xxx_about_firmware(struct scsi_qla_host *ha)
1197 struct about_fw_info *about_fw = NULL;
1198 dma_addr_t about_fw_dma;
1199 uint32_t mbox_cmd[MBOX_REG_COUNT];
1200 uint32_t mbox_sts[MBOX_REG_COUNT];
1201 int status = QLA_ERROR;
1203 about_fw = dma_alloc_coherent(&ha->pdev->dev,
1204 sizeof(struct about_fw_info),
1205 &about_fw_dma, GFP_KERNEL);
1207 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: Unable to alloc memory "
1208 "for about_fw\n", __func__));
1212 memset(about_fw, 0, sizeof(struct about_fw_info));
1213 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1214 memset(&mbox_sts, 0, sizeof(mbox_sts));
1216 mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
1217 mbox_cmd[2] = LSDW(about_fw_dma);
1218 mbox_cmd[3] = MSDW(about_fw_dma);
1219 mbox_cmd[4] = sizeof(struct about_fw_info);
1221 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1222 &mbox_cmd[0], &mbox_sts[0]);
1223 if (status != QLA_SUCCESS) {
1224 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_ABOUT_FW "
1225 "failed w/ status %04X\n", __func__,
1230 /* Save version information. */
1231 ha->firmware_version[0] = le16_to_cpu(about_fw->fw_major);
1232 ha->firmware_version[1] = le16_to_cpu(about_fw->fw_minor);
1233 ha->patch_number = le16_to_cpu(about_fw->fw_patch);
1234 ha->build_number = le16_to_cpu(about_fw->fw_build);
1235 ha->iscsi_major = le16_to_cpu(about_fw->iscsi_major);
1236 ha->iscsi_minor = le16_to_cpu(about_fw->iscsi_minor);
1237 ha->bootload_major = le16_to_cpu(about_fw->bootload_major);
1238 ha->bootload_minor = le16_to_cpu(about_fw->bootload_minor);
1239 ha->bootload_patch = le16_to_cpu(about_fw->bootload_patch);
1240 ha->bootload_build = le16_to_cpu(about_fw->bootload_build);
1241 status = QLA_SUCCESS;
1244 dma_free_coherent(&ha->pdev->dev, sizeof(struct about_fw_info),
1245 about_fw, about_fw_dma);
1249 static int qla4xxx_get_default_ddb(struct scsi_qla_host *ha, uint32_t options,
1250 dma_addr_t dma_addr)
1252 uint32_t mbox_cmd[MBOX_REG_COUNT];
1253 uint32_t mbox_sts[MBOX_REG_COUNT];
1255 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1256 memset(&mbox_sts, 0, sizeof(mbox_sts));
1258 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
1259 mbox_cmd[1] = options;
1260 mbox_cmd[2] = LSDW(dma_addr);
1261 mbox_cmd[3] = MSDW(dma_addr);
1263 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
1265 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
1266 ha->host_no, __func__, mbox_sts[0]));
1272 int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index,
1276 uint32_t mbox_cmd[MBOX_REG_COUNT];
1277 uint32_t mbox_sts[MBOX_REG_COUNT];
1279 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1280 memset(&mbox_sts, 0, sizeof(mbox_sts));
1282 mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
1283 mbox_cmd[1] = ddb_index;
1285 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1287 if (status != QLA_SUCCESS) {
1288 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1289 __func__, mbox_sts[0]));
1292 *mbx_sts = mbox_sts[0];
1296 int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index)
1299 uint32_t mbox_cmd[MBOX_REG_COUNT];
1300 uint32_t mbox_sts[MBOX_REG_COUNT];
1302 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1303 memset(&mbox_sts, 0, sizeof(mbox_sts));
1305 mbox_cmd[0] = MBOX_CMD_CLEAR_DATABASE_ENTRY;
1306 mbox_cmd[1] = ddb_index;
1308 status = qla4xxx_mailbox_command(ha, 2, 1, &mbox_cmd[0],
1310 if (status != QLA_SUCCESS) {
1311 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1312 __func__, mbox_sts[0]));
1318 int qla4xxx_set_flash(struct scsi_qla_host *ha, dma_addr_t dma_addr,
1319 uint32_t offset, uint32_t length, uint32_t options)
1321 uint32_t mbox_cmd[MBOX_REG_COUNT];
1322 uint32_t mbox_sts[MBOX_REG_COUNT];
1323 int status = QLA_SUCCESS;
1325 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1326 memset(&mbox_sts, 0, sizeof(mbox_sts));
1328 mbox_cmd[0] = MBOX_CMD_WRITE_FLASH;
1329 mbox_cmd[1] = LSDW(dma_addr);
1330 mbox_cmd[2] = MSDW(dma_addr);
1331 mbox_cmd[3] = offset;
1332 mbox_cmd[4] = length;
1333 mbox_cmd[5] = options;
1335 status = qla4xxx_mailbox_command(ha, 6, 2, &mbox_cmd[0], &mbox_sts[0]);
1336 if (status != QLA_SUCCESS) {
1337 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_WRITE_FLASH "
1338 "failed w/ status %04X, mbx1 %04X\n",
1339 __func__, mbox_sts[0], mbox_sts[1]));
1344 int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha,
1345 struct dev_db_entry *fw_ddb_entry,
1346 dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index)
1348 uint32_t dev_db_start_offset = FLASH_OFFSET_DB_INFO;
1349 uint32_t dev_db_end_offset;
1350 int status = QLA_ERROR;
1352 memset(fw_ddb_entry, 0, sizeof(*fw_ddb_entry));
1354 dev_db_start_offset += (ddb_index * sizeof(*fw_ddb_entry));
1355 dev_db_end_offset = FLASH_OFFSET_DB_END;
1357 if (dev_db_start_offset > dev_db_end_offset) {
1358 DEBUG2(ql4_printk(KERN_ERR, ha,
1359 "%s:Invalid DDB index %d", __func__,
1361 goto exit_bootdb_failed;
1364 if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset,
1365 sizeof(*fw_ddb_entry)) != QLA_SUCCESS) {
1366 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash"
1367 "failed\n", ha->host_no, __func__);
1368 goto exit_bootdb_failed;
1371 if (fw_ddb_entry->cookie == DDB_VALID_COOKIE)
1372 status = QLA_SUCCESS;
1378 int qla4xxx_get_chap(struct scsi_qla_host *ha, char *username, char *password,
1382 int rval = QLA_ERROR;
1383 uint32_t offset = 0, chap_size;
1384 struct ql4_chap_table *chap_table;
1385 dma_addr_t chap_dma;
1387 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1388 if (chap_table == NULL) {
1393 chap_size = sizeof(struct ql4_chap_table);
1394 memset(chap_table, 0, chap_size);
1397 offset = FLASH_CHAP_OFFSET | (idx * chap_size);
1399 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2);
1400 /* flt_chap_size is CHAP table size for both ports
1401 * so divide it by 2 to calculate the offset for second port
1403 if (ha->port_num == 1)
1404 offset += (ha->hw.flt_chap_size / 2);
1405 offset += (idx * chap_size);
1408 rval = qla4xxx_get_flash(ha, chap_dma, offset, chap_size);
1409 if (rval != QLA_SUCCESS) {
1414 DEBUG2(ql4_printk(KERN_INFO, ha, "Chap Cookie: x%x\n",
1415 __le16_to_cpu(chap_table->cookie)));
1417 if (__le16_to_cpu(chap_table->cookie) != CHAP_VALID_COOKIE) {
1418 ql4_printk(KERN_ERR, ha, "No valid chap entry found\n");
1422 strncpy(password, chap_table->secret, QL4_CHAP_MAX_SECRET_LEN);
1423 strncpy(username, chap_table->name, QL4_CHAP_MAX_NAME_LEN);
1424 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1427 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1431 static int qla4xxx_set_chap(struct scsi_qla_host *ha, char *username,
1432 char *password, uint16_t idx, int bidi)
1435 int rval = QLA_ERROR;
1436 uint32_t offset = 0;
1437 struct ql4_chap_table *chap_table;
1438 dma_addr_t chap_dma;
1440 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1441 if (chap_table == NULL) {
1446 memset(chap_table, 0, sizeof(struct ql4_chap_table));
1448 chap_table->flags |= BIT_6; /* peer */
1450 chap_table->flags |= BIT_7; /* local */
1451 chap_table->secret_len = strlen(password);
1452 strncpy(chap_table->secret, password, MAX_CHAP_SECRET_LEN);
1453 strncpy(chap_table->name, username, MAX_CHAP_NAME_LEN);
1454 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1455 offset = FLASH_CHAP_OFFSET | (idx * sizeof(struct ql4_chap_table));
1456 rval = qla4xxx_set_flash(ha, chap_dma, offset,
1457 sizeof(struct ql4_chap_table),
1458 FLASH_OPT_RMW_COMMIT);
1460 if (rval == QLA_SUCCESS && ha->chap_list) {
1461 /* Update ha chap_list cache */
1462 memcpy((struct ql4_chap_table *)ha->chap_list + idx,
1463 chap_table, sizeof(struct ql4_chap_table));
1465 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1466 if (rval != QLA_SUCCESS)
1474 * qla4xxx_get_chap_index - Get chap index given username and secret
1475 * @ha: pointer to adapter structure
1476 * @username: CHAP username to be searched
1477 * @password: CHAP password to be searched
1478 * @bidi: Is this a BIDI CHAP
1479 * @chap_index: CHAP index to be returned
1481 * Match the username and password in the chap_list, return the index if a
1482 * match is found. If a match is not found then add the entry in FLASH and
1483 * return the index at which entry is written in the FLASH.
1485 int qla4xxx_get_chap_index(struct scsi_qla_host *ha, char *username,
1486 char *password, int bidi, uint16_t *chap_index)
1489 int free_index = -1;
1490 int found_index = 0;
1491 int max_chap_entries = 0;
1492 struct ql4_chap_table *chap_table;
1495 max_chap_entries = (ha->hw.flt_chap_size / 2) /
1496 sizeof(struct ql4_chap_table);
1498 max_chap_entries = MAX_CHAP_ENTRIES_40XX;
1500 if (!ha->chap_list) {
1501 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n");
1505 if (!username || !password) {
1506 ql4_printk(KERN_ERR, ha, "Do not have username and psw\n");
1510 mutex_lock(&ha->chap_sem);
1511 for (i = 0; i < max_chap_entries; i++) {
1512 chap_table = (struct ql4_chap_table *)ha->chap_list + i;
1513 if (chap_table->cookie !=
1514 __constant_cpu_to_le16(CHAP_VALID_COOKIE)) {
1515 if (i > MAX_RESRV_CHAP_IDX && free_index == -1)
1520 if (chap_table->flags & BIT_7)
1523 if (chap_table->flags & BIT_6)
1526 if (!strncmp(chap_table->secret, password,
1527 MAX_CHAP_SECRET_LEN) &&
1528 !strncmp(chap_table->name, username,
1529 MAX_CHAP_NAME_LEN)) {
1536 /* If chap entry is not present and a free index is available then
1537 * write the entry in flash
1539 if (!found_index && free_index != -1) {
1540 rval = qla4xxx_set_chap(ha, username, password,
1543 *chap_index = free_index;
1548 mutex_unlock(&ha->chap_sem);
1555 int qla4xxx_conn_close_sess_logout(struct scsi_qla_host *ha,
1556 uint16_t fw_ddb_index,
1557 uint16_t connection_id,
1560 uint32_t mbox_cmd[MBOX_REG_COUNT];
1561 uint32_t mbox_sts[MBOX_REG_COUNT];
1562 int status = QLA_SUCCESS;
1564 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1565 memset(&mbox_sts, 0, sizeof(mbox_sts));
1567 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
1568 mbox_cmd[1] = fw_ddb_index;
1569 mbox_cmd[2] = connection_id;
1570 mbox_cmd[3] = option;
1572 status = qla4xxx_mailbox_command(ha, 4, 2, &mbox_cmd[0], &mbox_sts[0]);
1573 if (status != QLA_SUCCESS) {
1574 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_CONN_CLOSE "
1575 "option %04x failed w/ status %04X %04X\n",
1576 __func__, option, mbox_sts[0], mbox_sts[1]));
1581 int qla4xxx_disable_acb(struct scsi_qla_host *ha)
1583 uint32_t mbox_cmd[MBOX_REG_COUNT];
1584 uint32_t mbox_sts[MBOX_REG_COUNT];
1585 int status = QLA_SUCCESS;
1587 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1588 memset(&mbox_sts, 0, sizeof(mbox_sts));
1590 mbox_cmd[0] = MBOX_CMD_DISABLE_ACB;
1592 status = qla4xxx_mailbox_command(ha, 8, 5, &mbox_cmd[0], &mbox_sts[0]);
1593 if (status != QLA_SUCCESS) {
1594 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_DISABLE_ACB "
1595 "failed w/ status %04X %04X %04X", __func__,
1596 mbox_sts[0], mbox_sts[1], mbox_sts[2]));
1601 int qla4xxx_get_acb(struct scsi_qla_host *ha, dma_addr_t acb_dma,
1602 uint32_t acb_type, uint32_t len)
1604 uint32_t mbox_cmd[MBOX_REG_COUNT];
1605 uint32_t mbox_sts[MBOX_REG_COUNT];
1606 int status = QLA_SUCCESS;
1608 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1609 memset(&mbox_sts, 0, sizeof(mbox_sts));
1611 mbox_cmd[0] = MBOX_CMD_GET_ACB;
1612 mbox_cmd[1] = acb_type;
1613 mbox_cmd[2] = LSDW(acb_dma);
1614 mbox_cmd[3] = MSDW(acb_dma);
1617 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1618 if (status != QLA_SUCCESS) {
1619 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_GET_ACB "
1620 "failed w/ status %04X\n", __func__,
1626 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
1627 uint32_t *mbox_sts, dma_addr_t acb_dma)
1629 int status = QLA_SUCCESS;
1631 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1632 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1633 mbox_cmd[0] = MBOX_CMD_SET_ACB;
1634 mbox_cmd[1] = 0; /* Primary ACB */
1635 mbox_cmd[2] = LSDW(acb_dma);
1636 mbox_cmd[3] = MSDW(acb_dma);
1637 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
1639 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1640 if (status != QLA_SUCCESS) {
1641 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_SET_ACB "
1642 "failed w/ status %04X\n", __func__,
1648 int qla4xxx_set_param_ddbentry(struct scsi_qla_host *ha,
1649 struct ddb_entry *ddb_entry,
1650 struct iscsi_cls_conn *cls_conn,
1653 struct dev_db_entry *fw_ddb_entry;
1654 struct iscsi_conn *conn;
1655 struct iscsi_session *sess;
1656 struct qla_conn *qla_conn;
1657 struct sockaddr *dst_addr;
1658 dma_addr_t fw_ddb_entry_dma;
1659 int status = QLA_SUCCESS;
1661 struct sockaddr_in *addr;
1662 struct sockaddr_in6 *addr6;
1664 uint16_t iscsi_opts = 0;
1665 uint32_t options = 0;
1666 uint16_t idx, *ptid;
1668 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1669 &fw_ddb_entry_dma, GFP_KERNEL);
1670 if (!fw_ddb_entry) {
1671 DEBUG2(ql4_printk(KERN_ERR, ha,
1672 "%s: Unable to allocate dma buffer.\n",
1675 goto exit_set_param_no_free;
1678 conn = cls_conn->dd_data;
1679 qla_conn = conn->dd_data;
1680 sess = conn->session;
1681 dst_addr = (struct sockaddr *)&qla_conn->qla_ep->dst_addr;
1683 if (dst_addr->sa_family == AF_INET6)
1684 options |= IPV6_DEFAULT_DDB_ENTRY;
1686 status = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma);
1687 if (status == QLA_ERROR) {
1689 goto exit_set_param;
1692 ptid = (uint16_t *)&fw_ddb_entry->isid[1];
1693 *ptid = cpu_to_le16((uint16_t)ddb_entry->sess->target_id);
1695 DEBUG2(ql4_printk(KERN_INFO, ha, "ISID [%02x%02x%02x%02x%02x%02x]\n",
1696 fw_ddb_entry->isid[5], fw_ddb_entry->isid[4],
1697 fw_ddb_entry->isid[3], fw_ddb_entry->isid[2],
1698 fw_ddb_entry->isid[1], fw_ddb_entry->isid[0]));
1700 iscsi_opts = le16_to_cpu(fw_ddb_entry->iscsi_options);
1701 memset(fw_ddb_entry->iscsi_alias, 0, sizeof(fw_ddb_entry->iscsi_alias));
1703 memset(fw_ddb_entry->iscsi_name, 0, sizeof(fw_ddb_entry->iscsi_name));
1705 if (sess->targetname != NULL) {
1706 memcpy(fw_ddb_entry->iscsi_name, sess->targetname,
1707 min(strlen(sess->targetname),
1708 sizeof(fw_ddb_entry->iscsi_name)));
1711 memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
1712 memset(fw_ddb_entry->tgt_addr, 0, sizeof(fw_ddb_entry->tgt_addr));
1714 fw_ddb_entry->options = DDB_OPT_TARGET | DDB_OPT_AUTO_SENDTGTS_DISABLE;
1716 if (dst_addr->sa_family == AF_INET) {
1717 addr = (struct sockaddr_in *)dst_addr;
1718 ip = (char *)&addr->sin_addr;
1719 memcpy(fw_ddb_entry->ip_addr, ip, IP_ADDR_LEN);
1720 fw_ddb_entry->port = cpu_to_le16(ntohs(addr->sin_port));
1721 DEBUG2(ql4_printk(KERN_INFO, ha,
1722 "%s: Destination Address [%pI4]: index [%d]\n",
1723 __func__, fw_ddb_entry->ip_addr,
1724 ddb_entry->fw_ddb_index));
1725 } else if (dst_addr->sa_family == AF_INET6) {
1726 addr6 = (struct sockaddr_in6 *)dst_addr;
1727 ip = (char *)&addr6->sin6_addr;
1728 memcpy(fw_ddb_entry->ip_addr, ip, IPv6_ADDR_LEN);
1729 fw_ddb_entry->port = cpu_to_le16(ntohs(addr6->sin6_port));
1730 fw_ddb_entry->options |= DDB_OPT_IPV6_DEVICE;
1731 DEBUG2(ql4_printk(KERN_INFO, ha,
1732 "%s: Destination Address [%pI6]: index [%d]\n",
1733 __func__, fw_ddb_entry->ip_addr,
1734 ddb_entry->fw_ddb_index));
1736 ql4_printk(KERN_ERR, ha,
1737 "%s: Failed to get IP Address\n",
1740 goto exit_set_param;
1744 if (sess->username != NULL && sess->password != NULL) {
1745 if (strlen(sess->username) && strlen(sess->password)) {
1746 iscsi_opts |= BIT_7;
1748 rval = qla4xxx_get_chap_index(ha, sess->username,
1752 goto exit_set_param;
1754 fw_ddb_entry->chap_tbl_idx = cpu_to_le16(idx);
1758 if (sess->username_in != NULL && sess->password_in != NULL) {
1759 /* Check if BIDI CHAP */
1760 if (strlen(sess->username_in) && strlen(sess->password_in)) {
1761 iscsi_opts |= BIT_4;
1763 rval = qla4xxx_get_chap_index(ha, sess->username_in,
1767 goto exit_set_param;
1771 if (sess->initial_r2t_en)
1772 iscsi_opts |= BIT_10;
1774 if (sess->imm_data_en)
1775 iscsi_opts |= BIT_11;
1777 fw_ddb_entry->iscsi_options = cpu_to_le16(iscsi_opts);
1779 if (conn->max_recv_dlength)
1780 fw_ddb_entry->iscsi_max_rcv_data_seg_len =
1781 __constant_cpu_to_le16((conn->max_recv_dlength / BYTE_UNITS));
1784 fw_ddb_entry->iscsi_max_outsnd_r2t = cpu_to_le16(sess->max_r2t);
1786 if (sess->first_burst)
1787 fw_ddb_entry->iscsi_first_burst_len =
1788 __constant_cpu_to_le16((sess->first_burst / BYTE_UNITS));
1790 if (sess->max_burst)
1791 fw_ddb_entry->iscsi_max_burst_len =
1792 __constant_cpu_to_le16((sess->max_burst / BYTE_UNITS));
1794 if (sess->time2wait)
1795 fw_ddb_entry->iscsi_def_time2wait =
1796 cpu_to_le16(sess->time2wait);
1798 if (sess->time2retain)
1799 fw_ddb_entry->iscsi_def_time2retain =
1800 cpu_to_le16(sess->time2retain);
1802 status = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index,
1803 fw_ddb_entry_dma, mbx_sts);
1805 if (status != QLA_SUCCESS)
1808 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1809 fw_ddb_entry, fw_ddb_entry_dma);
1810 exit_set_param_no_free:
1814 int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index,
1815 uint16_t stats_size, dma_addr_t stats_dma)
1817 int status = QLA_SUCCESS;
1818 uint32_t mbox_cmd[MBOX_REG_COUNT];
1819 uint32_t mbox_sts[MBOX_REG_COUNT];
1821 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1822 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1823 mbox_cmd[0] = MBOX_CMD_GET_MANAGEMENT_DATA;
1824 mbox_cmd[1] = fw_ddb_index;
1825 mbox_cmd[2] = LSDW(stats_dma);
1826 mbox_cmd[3] = MSDW(stats_dma);
1827 mbox_cmd[4] = stats_size;
1829 status = qla4xxx_mailbox_command(ha, 5, 1, &mbox_cmd[0], &mbox_sts[0]);
1830 if (status != QLA_SUCCESS) {
1831 DEBUG2(ql4_printk(KERN_WARNING, ha,
1832 "%s: MBOX_CMD_GET_MANAGEMENT_DATA "
1833 "failed w/ status %04X\n", __func__,
1839 int qla4xxx_get_ip_state(struct scsi_qla_host *ha, uint32_t acb_idx,
1840 uint32_t ip_idx, uint32_t *sts)
1842 uint32_t mbox_cmd[MBOX_REG_COUNT];
1843 uint32_t mbox_sts[MBOX_REG_COUNT];
1844 int status = QLA_SUCCESS;
1846 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1847 memset(&mbox_sts, 0, sizeof(mbox_sts));
1848 mbox_cmd[0] = MBOX_CMD_GET_IP_ADDR_STATE;
1849 mbox_cmd[1] = acb_idx;
1850 mbox_cmd[2] = ip_idx;
1852 status = qla4xxx_mailbox_command(ha, 3, 8, &mbox_cmd[0], &mbox_sts[0]);
1853 if (status != QLA_SUCCESS) {
1854 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: "
1855 "MBOX_CMD_GET_IP_ADDR_STATE failed w/ "
1856 "status %04X\n", __func__, mbox_sts[0]));
1858 memcpy(sts, mbox_sts, sizeof(mbox_sts));
1862 int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
1863 uint32_t offset, uint32_t size)
1865 int status = QLA_SUCCESS;
1866 uint32_t mbox_cmd[MBOX_REG_COUNT];
1867 uint32_t mbox_sts[MBOX_REG_COUNT];
1869 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1870 memset(&mbox_sts, 0, sizeof(mbox_sts));
1872 mbox_cmd[0] = MBOX_CMD_GET_NVRAM;
1873 mbox_cmd[1] = LSDW(nvram_dma);
1874 mbox_cmd[2] = MSDW(nvram_dma);
1875 mbox_cmd[3] = offset;
1878 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1880 if (status != QLA_SUCCESS) {
1881 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1882 "status %04X\n", ha->host_no, __func__,
1888 int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
1889 uint32_t offset, uint32_t size)
1891 int status = QLA_SUCCESS;
1892 uint32_t mbox_cmd[MBOX_REG_COUNT];
1893 uint32_t mbox_sts[MBOX_REG_COUNT];
1895 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1896 memset(&mbox_sts, 0, sizeof(mbox_sts));
1898 mbox_cmd[0] = MBOX_CMD_SET_NVRAM;
1899 mbox_cmd[1] = LSDW(nvram_dma);
1900 mbox_cmd[2] = MSDW(nvram_dma);
1901 mbox_cmd[3] = offset;
1904 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1906 if (status != QLA_SUCCESS) {
1907 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1908 "status %04X\n", ha->host_no, __func__,
1914 int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha,
1915 uint32_t region, uint32_t field0,
1918 int status = QLA_SUCCESS;
1919 uint32_t mbox_cmd[MBOX_REG_COUNT];
1920 uint32_t mbox_sts[MBOX_REG_COUNT];
1922 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1923 memset(&mbox_sts, 0, sizeof(mbox_sts));
1925 mbox_cmd[0] = MBOX_CMD_RESTORE_FACTORY_DEFAULTS;
1926 mbox_cmd[3] = region;
1927 mbox_cmd[4] = field0;
1928 mbox_cmd[5] = field1;
1930 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0],
1932 if (status != QLA_SUCCESS) {
1933 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1934 "status %04X\n", ha->host_no, __func__,
1941 * qla4_8xxx_set_param - set driver version in firmware.
1942 * @ha: Pointer to host adapter structure.
1943 * @param: Parameter to set i.e driver version
1945 int qla4_8xxx_set_param(struct scsi_qla_host *ha, int param)
1947 uint32_t mbox_cmd[MBOX_REG_COUNT];
1948 uint32_t mbox_sts[MBOX_REG_COUNT];
1951 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1952 memset(&mbox_sts, 0, sizeof(mbox_sts));
1954 mbox_cmd[0] = MBOX_CMD_SET_PARAM;
1955 if (param == SET_DRVR_VERSION) {
1956 mbox_cmd[1] = SET_DRVR_VERSION;
1957 strncpy((char *)&mbox_cmd[2], QLA4XXX_DRIVER_VERSION,
1960 ql4_printk(KERN_ERR, ha, "%s: invalid parameter 0x%x\n",
1963 goto exit_set_param;
1966 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, mbox_cmd,
1968 if (status == QLA_ERROR)
1969 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1970 __func__, mbox_sts[0]);
1977 * qla4_83xx_post_idc_ack - post IDC ACK
1978 * @ha: Pointer to host adapter structure.
1980 * Posts IDC ACK for IDC Request Notification AEN.
1982 int qla4_83xx_post_idc_ack(struct scsi_qla_host *ha)
1984 uint32_t mbox_cmd[MBOX_REG_COUNT];
1985 uint32_t mbox_sts[MBOX_REG_COUNT];
1988 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1989 memset(&mbox_sts, 0, sizeof(mbox_sts));
1991 mbox_cmd[0] = MBOX_CMD_IDC_ACK;
1992 mbox_cmd[1] = ha->idc_info.request_desc;
1993 mbox_cmd[2] = ha->idc_info.info1;
1994 mbox_cmd[3] = ha->idc_info.info2;
1995 mbox_cmd[4] = ha->idc_info.info3;
1997 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1998 mbox_cmd, mbox_sts);
1999 if (status == QLA_ERROR)
2000 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__,
2003 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: IDC ACK posted\n",