Pileus Git - ~andy/linux/blob - drivers/scsi/pm8001/pm8001_sas.h

   1 /*
   2  * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
   3  *
   4  * Copyright (c) 2008-2009 USI Co., Ltd.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification.
  13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14  *    substantially similar to the "NO WARRANTY" disclaimer below
  15  *    ("Disclaimer") and any redistribution must be conditioned upon
  16  *    including a substantially similar Disclaimer requirement for further
  17  *    binary redistribution.
  18  * 3. Neither the names of the above-listed copyright holders nor the names
  19  *    of any contributors may be used to endorse or promote products derived
  20  *    from this software without specific prior written permission.
  21  *
  22  * Alternatively, this software may be distributed under the terms of the
  23  * GNU General Public License ("GPL") version 2 as published by the Free
  24  * Software Foundation.
  25  *
  26  * NO WARRANTY
  27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37  * POSSIBILITY OF SUCH DAMAGES.
  38  *
  39  */
  40
  41 #ifndef _PM8001_SAS_H_
  42 #define _PM8001_SAS_H_
  43
  44 #include <linux/kernel.h>
  45 #include <linux/module.h>
  46 #include <linux/spinlock.h>
  47 #include <linux/delay.h>
  48 #include <linux/types.h>
  49 #include <linux/ctype.h>
  50 #include <linux/dma-mapping.h>
  51 #include <linux/pci.h>
  52 #include <linux/interrupt.h>
  53 #include <linux/workqueue.h>
  54 #include <scsi/libsas.h>
  55 #include <scsi/scsi_tcq.h>
  56 #include <scsi/sas_ata.h>
  57 #include <linux/atomic.h>
  58 #include "pm8001_defs.h"
  59
  60 #define DRV_NAME                "pm80xx"
  61 #define DRV_VERSION             "0.1.37"
  62 #define PM8001_FAIL_LOGGING     0x01 /* Error message logging */
  63 #define PM8001_INIT_LOGGING     0x02 /* driver init logging */
  64 #define PM8001_DISC_LOGGING     0x04 /* discovery layer logging */
  65 #define PM8001_IO_LOGGING       0x08 /* I/O path logging */
  66 #define PM8001_EH_LOGGING       0x10 /* libsas EH function logging*/
  67 #define PM8001_IOCTL_LOGGING    0x20 /* IOCTL message logging */
  68 #define PM8001_MSG_LOGGING      0x40 /* misc message logging */
  69 #define pm8001_printk(format, arg...)   printk(KERN_INFO "pm80xx %s %d:" \
  70                         format, __func__, __LINE__, ## arg)
  71 #define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD)   \
  72 do {                                            \
  73         if (unlikely(HBA->logging_level & LEVEL))       \
  74                 do {                                    \
  75                         CMD;                            \
  76                 } while (0);                            \
  77 } while (0);
  78
  79 #define PM8001_EH_DBG(HBA, CMD)                 \
  80         PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD)
  81
  82 #define PM8001_INIT_DBG(HBA, CMD)               \
  83         PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD)
  84
  85 #define PM8001_DISC_DBG(HBA, CMD)               \
  86         PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD)
  87
  88 #define PM8001_IO_DBG(HBA, CMD)         \
  89         PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
  90
  91 #define PM8001_FAIL_DBG(HBA, CMD)               \
  92         PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
  93
  94 #define PM8001_IOCTL_DBG(HBA, CMD)              \
  95         PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
  96
  97 #define PM8001_MSG_DBG(HBA, CMD)                \
  98         PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
  99
 100
 101 #define PM8001_USE_TASKLET
 102 #define PM8001_USE_MSIX
 103 #define PM8001_READ_VPD
 104
 105
 106 #define DEV_IS_EXPANDER(type)   ((type == SAS_EDGE_EXPANDER_DEVICE) || (type == SAS_FANOUT_EXPANDER_DEVICE))
 107 #define IS_SPCV_12G(dev)        ((dev->device == 0X8074)                \
 108                                 || (dev->device == 0X8076)              \
 109                                 || (dev->device == 0X8077))
 110
 111 #define PM8001_NAME_LENGTH              32/* generic length of strings */
 112 extern struct list_head hba_list;
 113 extern const struct pm8001_dispatch pm8001_8001_dispatch;
 114 extern const struct pm8001_dispatch pm8001_80xx_dispatch;
 115
 116 struct pm8001_hba_info;
 117 struct pm8001_ccb_info;
 118 struct pm8001_device;
 119 /* define task management IU */
 120 struct pm8001_tmf_task {
 121         u8      tmf;
 122         u32     tag_of_task_to_be_managed;
 123 };
 124 struct pm8001_ioctl_payload {
 125         u32     signature;
 126         u16     major_function;
 127         u16     minor_function;
 128         u16     length;
 129         u16     status;
 130         u16     offset;
 131         u16     id;
 132         u8      *func_specific;
 133 };
 134
 135 struct pm8001_dispatch {
 136         char *name;
 137         int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
 138         int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha);
 139         void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
 140         int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
 141         void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
 142         irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 143         u32 (*is_our_interupt)(struct pm8001_hba_info *pm8001_ha);
 144         int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 145         void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 146         void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 147         void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
 148         int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
 149                 struct pm8001_ccb_info *ccb);
 150         int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
 151                 struct pm8001_ccb_info *ccb);
 152         int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
 153                 struct pm8001_ccb_info *ccb);
 154         int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
 155         int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
 156         int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
 157                 struct pm8001_device *pm8001_dev, u32 flag);
 158         int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
 159         int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
 160                 u32 phy_id, u32 phy_op);
 161         int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
 162                 struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag,
 163                 u32 cmd_tag);
 164         int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
 165                 struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf);
 166         int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
 167         int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
 168         int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
 169                 void *payload);
 170         int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
 171                 struct pm8001_device *pm8001_dev, u32 state);
 172         int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
 173                 u32 state);
 174         int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
 175                 u32 state);
 176         int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
 177 };
 178
 179 struct pm8001_chip_info {
 180         u32     encrypt;
 181         u32     n_phy;
 182         const struct pm8001_dispatch    *dispatch;
 183 };
 184 #define PM8001_CHIP_DISP        (pm8001_ha->chip->dispatch)
 185
 186 struct pm8001_port {
 187         struct asd_sas_port     sas_port;
 188         u8                      port_attached;
 189         u8                      wide_port_phymap;
 190         u8                      port_state;
 191         struct list_head        list;
 192 };
 193
 194 struct pm8001_phy {
 195         struct pm8001_hba_info  *pm8001_ha;
 196         struct pm8001_port      *port;
 197         struct asd_sas_phy      sas_phy;
 198         struct sas_identify     identify;
 199         struct scsi_device      *sdev;
 200         u64                     dev_sas_addr;
 201         u32                     phy_type;
 202         struct completion       *enable_completion;
 203         u32                     frame_rcvd_size;
 204         u8                      frame_rcvd[32];
 205         u8                      phy_attached;
 206         u8                      phy_state;
 207         enum sas_linkrate       minimum_linkrate;
 208         enum sas_linkrate       maximum_linkrate;
 209 };
 210
 211 struct pm8001_device {
 212         enum sas_device_type    dev_type;
 213         struct domain_device    *sas_device;
 214         u32                     attached_phy;
 215         u32                     id;
 216         struct completion       *dcompletion;
 217         struct completion       *setds_completion;
 218         u32                     device_id;
 219         u32                     running_req;
 220 };
 221
 222 struct pm8001_prd_imt {
 223         __le32                  len;
 224         __le32                  e;
 225 };
 226
 227 struct pm8001_prd {
 228         __le64                  addr;           /* 64-bit buffer address */
 229         struct pm8001_prd_imt   im_len;         /* 64-bit length */
 230 } __attribute__ ((packed));
 231 /*
 232  * CCB(Command Control Block)
 233  */
 234 struct pm8001_ccb_info {
 235         struct list_head        entry;
 236         struct sas_task         *task;
 237         u32                     n_elem;
 238         u32                     ccb_tag;
 239         dma_addr_t              ccb_dma_handle;
 240         struct pm8001_device    *device;
 241         struct pm8001_prd       buf_prd[PM8001_MAX_DMA_SG];
 242         struct fw_control_ex    *fw_control_context;
 243         u8                      open_retry;
 244 };
 245
 246 struct mpi_mem {
 247         void                    *virt_ptr;
 248         dma_addr_t              phys_addr;
 249         u32                     phys_addr_hi;
 250         u32                     phys_addr_lo;
 251         u32                     total_len;
 252         u32                     num_elements;
 253         u32                     element_size;
 254         u32                     alignment;
 255 };
 256
 257 struct mpi_mem_req {
 258         /* The number of element in the  mpiMemory array */
 259         u32                     count;
 260         /* The array of structures that define memroy regions*/
 261         struct mpi_mem          region[USI_MAX_MEMCNT];
 262 };
 263
 264 struct encrypt {
 265         u32     cipher_mode;
 266         u32     sec_mode;
 267         u32     status;
 268         u32     flag;
 269 };
 270
 271 struct sas_phy_attribute_table {
 272         u32     phystart1_16[16];
 273         u32     outbound_hw_event_pid1_16[16];
 274 };
 275
 276 union main_cfg_table {
 277         struct {
 278         u32                     signature;
 279         u32                     interface_rev;
 280         u32                     firmware_rev;
 281         u32                     max_out_io;
 282         u32                     max_sgl;
 283         u32                     ctrl_cap_flag;
 284         u32                     gst_offset;
 285         u32                     inbound_queue_offset;
 286         u32                     outbound_queue_offset;
 287         u32                     inbound_q_nppd_hppd;
 288         u32                     outbound_hw_event_pid0_3;
 289         u32                     outbound_hw_event_pid4_7;
 290         u32                     outbound_ncq_event_pid0_3;
 291         u32                     outbound_ncq_event_pid4_7;
 292         u32                     outbound_tgt_ITNexus_event_pid0_3;
 293         u32                     outbound_tgt_ITNexus_event_pid4_7;
 294         u32                     outbound_tgt_ssp_event_pid0_3;
 295         u32                     outbound_tgt_ssp_event_pid4_7;
 296         u32                     outbound_tgt_smp_event_pid0_3;
 297         u32                     outbound_tgt_smp_event_pid4_7;
 298         u32                     upper_event_log_addr;
 299         u32                     lower_event_log_addr;
 300         u32                     event_log_size;
 301         u32                     event_log_option;
 302         u32                     upper_iop_event_log_addr;
 303         u32                     lower_iop_event_log_addr;
 304         u32                     iop_event_log_size;
 305         u32                     iop_event_log_option;
 306         u32                     fatal_err_interrupt;
 307         u32                     fatal_err_dump_offset0;
 308         u32                     fatal_err_dump_length0;
 309         u32                     fatal_err_dump_offset1;
 310         u32                     fatal_err_dump_length1;
 311         u32                     hda_mode_flag;
 312         u32                     anolog_setup_table_offset;
 313         u32                     rsvd[4];
 314         } pm8001_tbl;
 315
 316         struct {
 317         u32                     signature;
 318         u32                     interface_rev;
 319         u32                     firmware_rev;
 320         u32                     max_out_io;
 321         u32                     max_sgl;
 322         u32                     ctrl_cap_flag;
 323         u32                     gst_offset;
 324         u32                     inbound_queue_offset;
 325         u32                     outbound_queue_offset;
 326         u32                     inbound_q_nppd_hppd;
 327         u32                     rsvd[8];
 328         u32                     crc_core_dump;
 329         u32                     rsvd1;
 330         u32                     upper_event_log_addr;
 331         u32                     lower_event_log_addr;
 332         u32                     event_log_size;
 333         u32                     event_log_severity;
 334         u32                     upper_pcs_event_log_addr;
 335         u32                     lower_pcs_event_log_addr;
 336         u32                     pcs_event_log_size;
 337         u32                     pcs_event_log_severity;
 338         u32                     fatal_err_interrupt;
 339         u32                     fatal_err_dump_offset0;
 340         u32                     fatal_err_dump_length0;
 341         u32                     fatal_err_dump_offset1;
 342         u32                     fatal_err_dump_length1;
 343         u32                     gpio_led_mapping;
 344         u32                     analog_setup_table_offset;
 345         u32                     int_vec_table_offset;
 346         u32                     phy_attr_table_offset;
 347         u32                     port_recovery_timer;
 348         u32                     interrupt_reassertion_delay;
 349         } pm80xx_tbl;
 350 };
 351
 352 union general_status_table {
 353         struct {
 354         u32                     gst_len_mpistate;
 355         u32                     iq_freeze_state0;
 356         u32                     iq_freeze_state1;
 357         u32                     msgu_tcnt;
 358         u32                     iop_tcnt;
 359         u32                     rsvd;
 360         u32                     phy_state[8];
 361         u32                     gpio_input_val;
 362         u32                     rsvd1[2];
 363         u32                     recover_err_info[8];
 364         } pm8001_tbl;
 365         struct {
 366         u32                     gst_len_mpistate;
 367         u32                     iq_freeze_state0;
 368         u32                     iq_freeze_state1;
 369         u32                     msgu_tcnt;
 370         u32                     iop_tcnt;
 371         u32                     rsvd[9];
 372         u32                     gpio_input_val;
 373         u32                     rsvd1[2];
 374         u32                     recover_err_info[8];
 375         } pm80xx_tbl;
 376 };
 377 struct inbound_queue_table {
 378         u32                     element_pri_size_cnt;
 379         u32                     upper_base_addr;
 380         u32                     lower_base_addr;
 381         u32                     ci_upper_base_addr;
 382         u32                     ci_lower_base_addr;
 383         u32                     pi_pci_bar;
 384         u32                     pi_offset;
 385         u32                     total_length;
 386         void                    *base_virt;
 387         void                    *ci_virt;
 388         u32                     reserved;
 389         __le32                  consumer_index;
 390         u32                     producer_idx;
 391 };
 392 struct outbound_queue_table {
 393         u32                     element_size_cnt;
 394         u32                     upper_base_addr;
 395         u32                     lower_base_addr;
 396         void                    *base_virt;
 397         u32                     pi_upper_base_addr;
 398         u32                     pi_lower_base_addr;
 399         u32                     ci_pci_bar;
 400         u32                     ci_offset;
 401         u32                     total_length;
 402         void                    *pi_virt;
 403         u32                     interrup_vec_cnt_delay;
 404         u32                     dinterrup_to_pci_offset;
 405         __le32                  producer_index;
 406         u32                     consumer_idx;
 407 };
 408 struct pm8001_hba_memspace {
 409         void __iomem            *memvirtaddr;
 410         u64                     membase;
 411         u32                     memsize;
 412 };
 413 struct pm8001_hba_info {
 414         char                    name[PM8001_NAME_LENGTH];
 415         struct list_head        list;
 416         unsigned long           flags;
 417         spinlock_t              lock;/* host-wide lock */
 418         struct pci_dev          *pdev;/* our device */
 419         struct device           *dev;
 420         struct pm8001_hba_memspace io_mem[6];
 421         struct mpi_mem_req      memoryMap;
 422         struct encrypt          encrypt_info; /* support encryption */
 423         void __iomem    *msg_unit_tbl_addr;/*Message Unit Table Addr*/
 424         void __iomem    *main_cfg_tbl_addr;/*Main Config Table Addr*/
 425         void __iomem    *general_stat_tbl_addr;/*General Status Table Addr*/
 426         void __iomem    *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
 427         void __iomem    *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
 428         void __iomem    *pspa_q_tbl_addr;
 429                         /*MPI SAS PHY attributes Queue Config Table Addr*/
 430         void __iomem    *ivt_tbl_addr; /*MPI IVT Table Addr */
 431         union main_cfg_table    main_cfg_tbl;
 432         union general_status_table      gs_tbl;
 433         struct inbound_queue_table      inbnd_q_tbl[PM8001_MAX_SPCV_INB_NUM];
 434         struct outbound_queue_table     outbnd_q_tbl[PM8001_MAX_SPCV_OUTB_NUM];
 435         struct sas_phy_attribute_table  phy_attr_table;
 436                                         /* MPI SAS PHY attributes */
 437         u8                      sas_addr[SAS_ADDR_SIZE];
 438         struct sas_ha_struct    *sas;/* SCSI/SAS glue */
 439         struct Scsi_Host        *shost;
 440         u32                     chip_id;
 441         const struct pm8001_chip_info   *chip;
 442         struct completion       *nvmd_completion;
 443         int                     tags_num;
 444         unsigned long           *tags;
 445         struct pm8001_phy       phy[PM8001_MAX_PHYS];
 446         struct pm8001_port      port[PM8001_MAX_PHYS];
 447         u32                     id;
 448         u32                     irq;
 449         u32                     iomb_size; /* SPC and SPCV IOMB size */
 450         struct pm8001_device    *devices;
 451         struct pm8001_ccb_info  *ccb_info;
 452 #ifdef PM8001_USE_MSIX
 453         struct msix_entry       msix_entries[PM8001_MAX_MSIX_VEC];
 454                                         /*for msi-x interrupt*/
 455         int                     number_of_intr;/*will be used in remove()*/
 456 #endif
 457 #ifdef PM8001_USE_TASKLET
 458         struct tasklet_struct   tasklet;
 459 #endif
 460         u32                     logging_level;
 461         u32                     fw_status;
 462         u32                     smp_exp_mode;
 463         u32                     int_vector;
 464         const struct firmware   *fw_image;
 465         u8                      outq[PM8001_MAX_MSIX_VEC];
 466 };
 467
 468 struct pm8001_work {
 469         struct work_struct work;
 470         struct pm8001_hba_info *pm8001_ha;
 471         void *data;
 472         int handler;
 473 };
 474
 475 struct pm8001_fw_image_header {
 476         u8 vender_id[8];
 477         u8 product_id;
 478         u8 hardware_rev;
 479         u8 dest_partition;
 480         u8 reserved;
 481         u8 fw_rev[4];
 482         __be32  image_length;
 483         __be32 image_crc;
 484         __be32 startup_entry;
 485 } __attribute__((packed, aligned(4)));
 486
 487
 488 /**
 489  * FW Flash Update status values
 490  */
 491 #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT    0x00
 492 #define FLASH_UPDATE_IN_PROGRESS                0x01
 493 #define FLASH_UPDATE_HDR_ERR                    0x02
 494 #define FLASH_UPDATE_OFFSET_ERR                 0x03
 495 #define FLASH_UPDATE_CRC_ERR                    0x04
 496 #define FLASH_UPDATE_LENGTH_ERR                 0x05
 497 #define FLASH_UPDATE_HW_ERR                     0x06
 498 #define FLASH_UPDATE_DNLD_NOT_SUPPORTED         0x10
 499 #define FLASH_UPDATE_DISABLED                   0x11
 500
 501 #define NCQ_READ_LOG_FLAG                       0x80000000
 502 #define NCQ_ABORT_ALL_FLAG                      0x40000000
 503 #define NCQ_2ND_RLE_FLAG                        0x20000000
 504 /**
 505  * brief param structure for firmware flash update.
 506  */
 507 struct fw_flash_updata_info {
 508         u32                     cur_image_offset;
 509         u32                     cur_image_len;
 510         u32                     total_image_len;
 511         struct pm8001_prd       sgl;
 512 };
 513
 514 struct fw_control_info {
 515         u32                     retcode;/*ret code (status)*/
 516         u32                     phase;/*ret code phase*/
 517         u32                     phaseCmplt;/*percent complete for the current
 518         update phase */
 519         u32                     version;/*Hex encoded firmware version number*/
 520         u32                     offset;/*Used for downloading firmware  */
 521         u32                     len; /*len of buffer*/
 522         u32                     size;/* Used in OS VPD and Trace get size
 523         operations.*/
 524         u32                     reserved;/* padding required for 64 bit
 525         alignment */
 526         u8                      buffer[1];/* Start of buffer */
 527 };
 528 struct fw_control_ex {
 529         struct fw_control_info *fw_control;
 530         void                    *buffer;/* keep buffer pointer to be
 531         freed when the response comes*/
 532         void                    *virtAddr;/* keep virtual address of the data */
 533         void                    *usrAddr;/* keep virtual address of the
 534         user data */
 535         dma_addr_t              phys_addr;
 536         u32                     len; /* len of buffer  */
 537         void                    *payload; /* pointer to IOCTL Payload */
 538         u8                      inProgress;/*if 1 - the IOCTL request is in
 539         progress */
 540         void                    *param1;
 541         void                    *param2;
 542         void                    *param3;
 543 };
 544
 545 /* pm8001 workqueue */
 546 extern struct workqueue_struct *pm8001_wq;
 547
 548 /******************** function prototype *********************/
 549 int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
 550 void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha);
 551 u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
 552 void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha, u32 ccb_idx);
 553 void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
 554         struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx);
 555 int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
 556         void *funcdata);
 557 void pm8001_scan_start(struct Scsi_Host *shost);
 558 int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
 559 int pm8001_queue_command(struct sas_task *task, const int num,
 560         gfp_t gfp_flags);
 561 int pm8001_abort_task(struct sas_task *task);
 562 int pm8001_abort_task_set(struct domain_device *dev, u8 *lun);
 563 int pm8001_clear_aca(struct domain_device *dev, u8 *lun);
 564 int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
 565 int pm8001_dev_found(struct domain_device *dev);
 566 void pm8001_dev_gone(struct domain_device *dev);
 567 int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
 568 int pm8001_I_T_nexus_reset(struct domain_device *dev);
 569 int pm8001_I_T_nexus_event_handler(struct domain_device *dev);
 570 int pm8001_query_task(struct sas_task *task);
 571 void pm8001_open_reject_retry(
 572         struct pm8001_hba_info *pm8001_ha,
 573         struct sas_task *task_to_close,
 574         struct pm8001_device *device_to_close);
 575 int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
 576         dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
 577         u32 mem_size, u32 align);
 578
 579 void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha);
 580 int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
 581                         struct inbound_queue_table *circularQ,
 582                         u32 opCode, void *payload, u32 responseQueue);
 583 int pm8001_mpi_msg_free_get(struct inbound_queue_table *circularQ,
 584                                 u16 messageSize, void **messagePtr);
 585 u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
 586                         struct outbound_queue_table *circularQ, u8 bc);
 587 u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
 588                         struct outbound_queue_table *circularQ,
 589                         void **messagePtr1, u8 *pBC);
 590 int pm8001_chip_set_dev_state_req(struct pm8001_hba_info *pm8001_ha,
 591                         struct pm8001_device *pm8001_dev, u32 state);
 592 int pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha,
 593                                         void *payload);
 594 int pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha,
 595                                         void *fw_flash_updata_info, u32 tag);
 596 int pm8001_chip_set_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
 597 int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
 598 int pm8001_chip_ssp_tm_req(struct pm8001_hba_info *pm8001_ha,
 599                                 struct pm8001_ccb_info *ccb,
 600                                 struct pm8001_tmf_task *tmf);
 601 int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
 602                                 struct pm8001_device *pm8001_dev,
 603                                 u8 flag, u32 task_tag, u32 cmd_tag);
 604 int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha, u32 device_id);
 605 void pm8001_chip_make_sg(struct scatterlist *scatter, int nr, void *prd);
 606 void pm8001_work_fn(struct work_struct *work);
 607 int pm8001_handle_event(struct pm8001_hba_info *pm8001_ha,
 608                                         void *data, int handler);
 609 void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha,
 610                                                         void *piomb);
 611 void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
 612                                                         void *piomb);
 613 void pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
 614                                                         void *piomb);
 615 int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha,
 616                                                         void *piomb);
 617 void pm8001_get_lrate_mode(struct pm8001_phy *phy, u8 link_rate);
 618 void pm8001_get_attached_sas_addr(struct pm8001_phy *phy, u8 *sas_addr);
 619 void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i);
 620 int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 621 int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 622 int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha,
 623                                                         void *piomb);
 624 int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha , void *piomb);
 625 int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 626 struct sas_task *pm8001_alloc_task(void);
 627 void pm8001_task_done(struct sas_task *task);
 628 void pm8001_free_task(struct sas_task *task);
 629 void pm8001_tag_free(struct pm8001_hba_info *pm8001_ha, u32 tag);
 630 struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
 631                                         u32 device_id);
 632 int pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha);
 633
 634 int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
 635 void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha,
 636         u32 length, u8 *buf);
 637 /* ctl shared API */
 638 extern struct device_attribute *pm8001_host_attrs[];
 639
 640 #endif
 641