2 * ipr.h -- driver for IBM Power Linux RAID adapters
4 * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
6 * Copyright (C) 2003, 2004 IBM Corporation
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
23 * that broke 64bit platforms.
29 #include <linux/types.h>
30 #include <linux/completion.h>
31 #include <linux/list.h>
32 #include <linux/kref.h>
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_cmnd.h>
39 #define IPR_DRIVER_VERSION "2.0.14"
40 #define IPR_DRIVER_DATE "(May 2, 2005)"
43 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
44 * ops per device for devices not running tagged command queuing.
45 * This can be adjusted at runtime through sysfs device attributes.
47 #define IPR_MAX_CMD_PER_LUN 6
50 * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
51 * ops the mid-layer can send to the adapter.
53 #define IPR_NUM_BASE_CMD_BLKS 100
55 #define IPR_SUBS_DEV_ID_2780 0x0264
56 #define IPR_SUBS_DEV_ID_5702 0x0266
57 #define IPR_SUBS_DEV_ID_5703 0x0278
58 #define IPR_SUBS_DEV_ID_572E 0x028D
59 #define IPR_SUBS_DEV_ID_573E 0x02D3
60 #define IPR_SUBS_DEV_ID_573D 0x02D4
61 #define IPR_SUBS_DEV_ID_571A 0x02C0
62 #define IPR_SUBS_DEV_ID_571B 0x02BE
63 #define IPR_SUBS_DEV_ID_571E 0x02BF
65 #define IPR_NAME "ipr"
70 #define IPR_RC_JOB_CONTINUE 1
71 #define IPR_RC_JOB_RETURN 2
76 #define IPR_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
77 #define IPR_IOASC_SYNC_REQUIRED 0x023f0000
78 #define IPR_IOASC_MED_DO_NOT_REALLOC 0x03110C00
79 #define IPR_IOASC_HW_SEL_TIMEOUT 0x04050000
80 #define IPR_IOASC_HW_DEV_BUS_STATUS 0x04448500
81 #define IPR_IOASC_IOASC_MASK 0xFFFFFF00
82 #define IPR_IOASC_SCSI_STATUS_MASK 0x000000FF
83 #define IPR_IOASC_IR_RESOURCE_HANDLE 0x05250000
84 #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA 0x05258100
85 #define IPR_IOASA_IR_DUAL_IOA_DISABLED 0x052C8000
86 #define IPR_IOASC_BUS_WAS_RESET 0x06290000
87 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000
88 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000
90 #define IPR_FIRST_DRIVER_IOASC 0x10000000
91 #define IPR_IOASC_IOA_WAS_RESET 0x10000001
92 #define IPR_IOASC_PCI_ACCESS_ERROR 0x10000002
94 #define IPR_NUM_LOG_HCAMS 2
95 #define IPR_NUM_CFG_CHG_HCAMS 2
96 #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
97 #define IPR_MAX_NUM_TARGETS_PER_BUS 0x10
98 #define IPR_MAX_NUM_LUNS_PER_TARGET 256
99 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8
100 #define IPR_VSET_BUS 0xff
101 #define IPR_IOA_BUS 0xff
102 #define IPR_IOA_TARGET 0xff
103 #define IPR_IOA_LUN 0xff
104 #define IPR_MAX_NUM_BUSES 4
105 #define IPR_MAX_BUS_TO_SCAN IPR_MAX_NUM_BUSES
107 #define IPR_NUM_RESET_RELOAD_RETRIES 3
109 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
110 #define IPR_NUM_INTERNAL_CMD_BLKS (IPR_NUM_HCAMS + \
111 ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
113 #define IPR_MAX_COMMANDS IPR_NUM_BASE_CMD_BLKS
114 #define IPR_NUM_CMD_BLKS (IPR_NUM_BASE_CMD_BLKS + \
115 IPR_NUM_INTERNAL_CMD_BLKS)
117 #define IPR_MAX_PHYSICAL_DEVS 192
119 #define IPR_MAX_SGLIST 64
120 #define IPR_IOA_MAX_SECTORS 32767
121 #define IPR_VSET_MAX_SECTORS 512
122 #define IPR_MAX_CDB_LEN 16
124 #define IPR_DEFAULT_BUS_WIDTH 16
125 #define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
126 #define IPR_U160_SCSI_RATE ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
127 #define IPR_U320_SCSI_RATE ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
128 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
130 #define IPR_IOA_RES_HANDLE 0xffffffff
131 #define IPR_IOA_RES_ADDR 0x00ffffff
136 #define IPR_QUERY_RSRC_STATE 0xC2
137 #define IPR_RESET_DEVICE 0xC3
138 #define IPR_RESET_TYPE_SELECT 0x80
139 #define IPR_LUN_RESET 0x40
140 #define IPR_TARGET_RESET 0x20
141 #define IPR_BUS_RESET 0x10
142 #define IPR_ID_HOST_RR_Q 0xC4
143 #define IPR_QUERY_IOA_CONFIG 0xC5
144 #define IPR_CANCEL_ALL_REQUESTS 0xCE
145 #define IPR_HOST_CONTROLLED_ASYNC 0xCF
146 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE 0x01
147 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA 0x02
148 #define IPR_SET_SUPPORTED_DEVICES 0xFB
149 #define IPR_IOA_SHUTDOWN 0xF7
150 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE 0x05
155 #define IPR_SHUTDOWN_TIMEOUT (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
156 #define IPR_VSET_RW_TIMEOUT (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
157 #define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
158 #define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
159 #define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
160 #define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
161 #define IPR_INTERNAL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
162 #define IPR_WRITE_BUFFER_TIMEOUT (10 * 60 * HZ)
163 #define IPR_SET_SUP_DEVICE_TIMEOUT (2 * 60 * HZ)
164 #define IPR_REQUEST_SENSE_TIMEOUT (10 * HZ)
165 #define IPR_OPERATIONAL_TIMEOUT (5 * 60)
166 #define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
167 #define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
168 #define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
169 #define IPR_DUMP_TIMEOUT (15 * HZ)
174 #define IPR_VENDOR_ID_LEN 8
175 #define IPR_PROD_ID_LEN 16
176 #define IPR_SERIAL_NUM_LEN 8
181 #define IPR_FMT2_MBX_ADDR_MASK 0x0fffffff
182 #define IPR_FMT2_MBX_BAR_SEL_MASK 0xf0000000
183 #define IPR_FMT2_MKR_BAR_SEL_SHIFT 28
184 #define IPR_GET_FMT2_BAR_SEL(mbx) \
185 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
186 #define IPR_SDT_FMT2_BAR0_SEL 0x0
187 #define IPR_SDT_FMT2_BAR1_SEL 0x1
188 #define IPR_SDT_FMT2_BAR2_SEL 0x2
189 #define IPR_SDT_FMT2_BAR3_SEL 0x3
190 #define IPR_SDT_FMT2_BAR4_SEL 0x4
191 #define IPR_SDT_FMT2_BAR5_SEL 0x5
192 #define IPR_SDT_FMT2_EXP_ROM_SEL 0x8
193 #define IPR_FMT2_SDT_READY_TO_USE 0xC4D4E3F2
194 #define IPR_DOORBELL 0x82800000
195 #define IPR_RUNTIME_RESET 0x40000000
197 #define IPR_PCII_IOA_TRANS_TO_OPER (0x80000000 >> 0)
198 #define IPR_PCII_IOARCB_XFER_FAILED (0x80000000 >> 3)
199 #define IPR_PCII_IOA_UNIT_CHECKED (0x80000000 >> 4)
200 #define IPR_PCII_NO_HOST_RRQ (0x80000000 >> 5)
201 #define IPR_PCII_CRITICAL_OPERATION (0x80000000 >> 6)
202 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE (0x80000000 >> 7)
203 #define IPR_PCII_IOARRIN_LOST (0x80000000 >> 27)
204 #define IPR_PCII_MMIO_ERROR (0x80000000 >> 28)
205 #define IPR_PCII_PROC_ERR_STATE (0x80000000 >> 29)
206 #define IPR_PCII_HRRQ_UPDATED (0x80000000 >> 30)
207 #define IPR_PCII_CORE_ISSUED_RST_REQ (0x80000000 >> 31)
209 #define IPR_PCII_ERROR_INTERRUPTS \
210 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
211 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
213 #define IPR_PCII_OPER_INTERRUPTS \
214 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
216 #define IPR_UPROCI_RESET_ALERT (0x80000000 >> 7)
217 #define IPR_UPROCI_IO_DEBUG_ALERT (0x80000000 >> 9)
219 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC 200000 /* 200 ms */
220 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC 200000 /* 200 ms */
225 #define IPR_MAX_IOA_DUMP_SIZE (4 * 1024 * 1024)
226 #define IPR_NUM_SDT_ENTRIES 511
227 #define IPR_MAX_NUM_DUMP_PAGES ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
232 #define IPR_NUM_IOADL_ENTRIES IPR_MAX_SGLIST
235 * Adapter interface types
238 struct ipr_res_addr {
243 #define IPR_GET_PHYS_LOC(res_addr) \
244 (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
245 }__attribute__((packed, aligned (4)));
247 struct ipr_std_inq_vpids {
248 u8 vendor_id[IPR_VENDOR_ID_LEN];
249 u8 product_id[IPR_PROD_ID_LEN];
250 }__attribute__((packed));
253 struct ipr_std_inq_vpids vpids;
254 u8 sn[IPR_SERIAL_NUM_LEN];
255 }__attribute__((packed));
260 }__attribute__((packed));
262 struct ipr_std_inq_data {
263 u8 peri_qual_dev_type;
264 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
265 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
267 u8 removeable_medium_rsvd;
268 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
270 #define IPR_IS_DASD_DEVICE(std_inq) \
271 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
272 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
274 #define IPR_IS_SES_DEVICE(std_inq) \
275 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
284 struct ipr_std_inq_vpids vpids;
286 u8 ros_rsvd_ram_rsvd[4];
288 u8 serial_num[IPR_SERIAL_NUM_LEN];
289 }__attribute__ ((packed));
291 struct ipr_config_table_entry {
295 #define IPR_IS_IOA_RESOURCE 0x80
296 #define IPR_IS_ARRAY_MEMBER 0x20
297 #define IPR_IS_HOT_SPARE 0x10
300 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
301 #define IPR_SUBTYPE_AF_DASD 0
302 #define IPR_SUBTYPE_GENERIC_SCSI 1
303 #define IPR_SUBTYPE_VOLUME_SET 2
305 struct ipr_res_addr res_addr;
308 struct ipr_std_inq_data std_inq_data;
309 }__attribute__ ((packed, aligned (4)));
311 struct ipr_config_table_hdr {
314 #define IPR_UCODE_DOWNLOAD_REQ 0x10
316 }__attribute__((packed, aligned (4)));
318 struct ipr_config_table {
319 struct ipr_config_table_hdr hdr;
320 struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
321 }__attribute__((packed, aligned (4)));
323 struct ipr_hostrcb_cfg_ch_not {
324 struct ipr_config_table_entry cfgte;
326 }__attribute__((packed, aligned (4)));
328 struct ipr_supported_device {
332 struct ipr_std_inq_vpids vpids;
334 }__attribute__((packed, aligned (4)));
336 /* Command packet structure */
338 __be16 reserved; /* Reserved by IOA */
340 #define IPR_RQTYPE_SCSICDB 0x00
341 #define IPR_RQTYPE_IOACMD 0x01
342 #define IPR_RQTYPE_HCAM 0x02
347 #define IPR_FLAGS_HI_WRITE_NOT_READ 0x80
348 #define IPR_FLAGS_HI_NO_ULEN_CHK 0x20
349 #define IPR_FLAGS_HI_SYNC_OVERRIDE 0x10
350 #define IPR_FLAGS_HI_SYNC_COMPLETE 0x08
351 #define IPR_FLAGS_HI_NO_LINK_DESC 0x04
354 #define IPR_FLAGS_LO_ALIGNED_BFR 0x20
355 #define IPR_FLAGS_LO_DELAY_AFTER_RST 0x10
356 #define IPR_FLAGS_LO_UNTAGGED_TASK 0x00
357 #define IPR_FLAGS_LO_SIMPLE_TASK 0x02
358 #define IPR_FLAGS_LO_ORDERED_TASK 0x04
359 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK 0x06
360 #define IPR_FLAGS_LO_ACA_TASK 0x08
364 }__attribute__ ((packed, aligned(4)));
366 /* IOA Request Control Block 128 bytes */
368 __be32 ioarcb_host_pci_addr;
371 __be32 host_response_handle;
376 __be32 write_data_transfer_length;
377 __be32 read_data_transfer_length;
378 __be32 write_ioadl_addr;
379 __be32 write_ioadl_len;
380 __be32 read_ioadl_addr;
381 __be32 read_ioadl_len;
383 __be32 ioasa_host_pci_addr;
387 struct ipr_cmd_pkt cmd_pkt;
389 __be32 add_cmd_parms_len;
390 __be32 add_cmd_parms[10];
391 }__attribute__((packed, aligned (4)));
393 struct ipr_ioadl_desc {
394 __be32 flags_and_data_len;
395 #define IPR_IOADL_FLAGS_MASK 0xff000000
396 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
397 #define IPR_IOADL_DATA_LEN_MASK 0x00ffffff
398 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
399 #define IPR_IOADL_FLAGS_READ 0x48000000
400 #define IPR_IOADL_FLAGS_READ_LAST 0x49000000
401 #define IPR_IOADL_FLAGS_WRITE 0x68000000
402 #define IPR_IOADL_FLAGS_WRITE_LAST 0x69000000
403 #define IPR_IOADL_FLAGS_LAST 0x01000000
406 }__attribute__((packed, aligned (8)));
408 struct ipr_ioasa_vset {
409 __be32 failing_lba_hi;
410 __be32 failing_lba_lo;
412 }__attribute__((packed, aligned (4)));
414 struct ipr_ioasa_af_dasd {
417 }__attribute__((packed, aligned (4)));
419 struct ipr_ioasa_gpdd {
424 }__attribute__((packed, aligned (4)));
426 struct ipr_auto_sense {
427 __be16 auto_sense_len;
429 __be32 data[SCSI_SENSE_BUFFERSIZE/sizeof(__be32)];
434 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
435 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
436 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
437 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
439 __be16 ret_stat_len; /* Length of the returned IOASA */
441 __be16 avail_stat_len; /* Total Length of status available. */
443 __be32 residual_data_len; /* number of bytes in the host data */
444 /* buffers that were not used by the IOARCB command. */
447 #define IPR_NO_ILID 0
448 #define IPR_DRIVER_ILID 0xffffffff
452 __be32 fd_phys_locator;
454 __be32 fd_res_handle;
456 __be32 ioasc_specific; /* status code specific field */
457 #define IPR_ADDITIONAL_STATUS_FMT 0x80000000
458 #define IPR_AUTOSENSE_VALID 0x40000000
459 #define IPR_IOASC_SPECIFIC_MASK 0x00ffffff
460 #define IPR_FIELD_POINTER_VALID (0x80000000 >> 8)
461 #define IPR_FIELD_POINTER_MASK 0x0000ffff
464 struct ipr_ioasa_vset vset;
465 struct ipr_ioasa_af_dasd dasd;
466 struct ipr_ioasa_gpdd gpdd;
469 struct ipr_auto_sense auto_sense;
470 }__attribute__((packed, aligned (4)));
472 struct ipr_mode_parm_hdr {
475 u8 device_spec_parms;
477 }__attribute__((packed));
479 struct ipr_mode_pages {
480 struct ipr_mode_parm_hdr hdr;
481 u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
482 }__attribute__((packed));
484 struct ipr_mode_page_hdr {
486 #define IPR_MODE_PAGE_PS 0x80
487 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
489 }__attribute__ ((packed));
491 struct ipr_dev_bus_entry {
492 struct ipr_res_addr res_addr;
494 #define IPR_SCSI_ATTR_ENABLE_QAS 0x80
495 #define IPR_SCSI_ATTR_DISABLE_QAS 0x40
496 #define IPR_SCSI_ATTR_QAS_MASK 0xC0
497 #define IPR_SCSI_ATTR_ENABLE_TM 0x20
498 #define IPR_SCSI_ATTR_NO_TERM_PWR 0x10
499 #define IPR_SCSI_ATTR_TM_SUPPORTED 0x08
500 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED 0x04
504 u8 extended_reset_delay;
505 #define IPR_EXTENDED_RESET_DELAY 7
507 __be32 max_xfer_rate;
512 }__attribute__((packed, aligned (4)));
514 struct ipr_mode_page28 {
515 struct ipr_mode_page_hdr hdr;
518 struct ipr_dev_bus_entry bus[0];
519 }__attribute__((packed));
522 struct ipr_std_inq_data std_inq_data;
523 u8 ascii_part_num[12];
525 u8 ascii_plant_code[4];
526 }__attribute__((packed));
528 struct ipr_inquiry_page3 {
529 u8 peri_qual_dev_type;
541 }__attribute__((packed));
543 #define IPR_INQUIRY_PAGE0_ENTRIES 20
544 struct ipr_inquiry_page0 {
545 u8 peri_qual_dev_type;
549 u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
550 }__attribute__((packed));
552 struct ipr_hostrcb_device_data_entry {
554 struct ipr_res_addr dev_res_addr;
555 struct ipr_vpd new_vpd;
556 struct ipr_vpd ioa_last_with_dev_vpd;
557 struct ipr_vpd cfc_last_with_dev_vpd;
559 }__attribute__((packed, aligned (4)));
561 struct ipr_hostrcb_device_data_entry_enhanced {
562 struct ipr_ext_vpd vpd;
564 struct ipr_res_addr dev_res_addr;
565 struct ipr_ext_vpd new_vpd;
567 struct ipr_ext_vpd ioa_last_with_dev_vpd;
568 struct ipr_ext_vpd cfc_last_with_dev_vpd;
569 }__attribute__((packed, aligned (4)));
571 struct ipr_hostrcb_array_data_entry {
573 struct ipr_res_addr expected_dev_res_addr;
574 struct ipr_res_addr dev_res_addr;
575 }__attribute__((packed, aligned (4)));
577 struct ipr_hostrcb_array_data_entry_enhanced {
578 struct ipr_ext_vpd vpd;
580 struct ipr_res_addr expected_dev_res_addr;
581 struct ipr_res_addr dev_res_addr;
582 }__attribute__((packed, aligned (4)));
584 struct ipr_hostrcb_type_ff_error {
585 __be32 ioa_data[502];
586 }__attribute__((packed, aligned (4)));
588 struct ipr_hostrcb_type_01_error {
592 __be32 ioa_data[236];
593 }__attribute__((packed, aligned (4)));
595 struct ipr_hostrcb_type_02_error {
596 struct ipr_vpd ioa_vpd;
597 struct ipr_vpd cfc_vpd;
598 struct ipr_vpd ioa_last_attached_to_cfc_vpd;
599 struct ipr_vpd cfc_last_attached_to_ioa_vpd;
601 }__attribute__((packed, aligned (4)));
603 struct ipr_hostrcb_type_12_error {
604 struct ipr_ext_vpd ioa_vpd;
605 struct ipr_ext_vpd cfc_vpd;
606 struct ipr_ext_vpd ioa_last_attached_to_cfc_vpd;
607 struct ipr_ext_vpd cfc_last_attached_to_ioa_vpd;
609 }__attribute__((packed, aligned (4)));
611 struct ipr_hostrcb_type_03_error {
612 struct ipr_vpd ioa_vpd;
613 struct ipr_vpd cfc_vpd;
614 __be32 errors_detected;
615 __be32 errors_logged;
617 struct ipr_hostrcb_device_data_entry dev[3];
618 }__attribute__((packed, aligned (4)));
620 struct ipr_hostrcb_type_13_error {
621 struct ipr_ext_vpd ioa_vpd;
622 struct ipr_ext_vpd cfc_vpd;
623 __be32 errors_detected;
624 __be32 errors_logged;
625 struct ipr_hostrcb_device_data_entry_enhanced dev[3];
626 }__attribute__((packed, aligned (4)));
628 struct ipr_hostrcb_type_04_error {
629 struct ipr_vpd ioa_vpd;
630 struct ipr_vpd cfc_vpd;
632 struct ipr_hostrcb_array_data_entry array_member[10];
633 __be32 exposed_mode_adn;
635 struct ipr_vpd incomp_dev_vpd;
637 struct ipr_hostrcb_array_data_entry array_member2[8];
638 struct ipr_res_addr last_func_vset_res_addr;
639 u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
640 u8 protection_level[8];
641 }__attribute__((packed, aligned (4)));
643 struct ipr_hostrcb_type_14_error {
644 struct ipr_ext_vpd ioa_vpd;
645 struct ipr_ext_vpd cfc_vpd;
646 __be32 exposed_mode_adn;
648 struct ipr_res_addr last_func_vset_res_addr;
649 u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
650 u8 protection_level[8];
652 struct ipr_hostrcb_array_data_entry_enhanced array_member[18];
653 }__attribute__((packed, aligned (4)));
655 struct ipr_hostrcb_type_07_error {
656 u8 failure_reason[64];
659 }__attribute__((packed, aligned (4)));
661 struct ipr_hostrcb_type_17_error {
662 u8 failure_reason[64];
663 struct ipr_ext_vpd vpd;
665 }__attribute__((packed, aligned (4)));
667 struct ipr_hostrcb_error {
668 __be32 failing_dev_ioasc;
669 struct ipr_res_addr failing_dev_res_addr;
670 __be32 failing_dev_res_handle;
673 struct ipr_hostrcb_type_ff_error type_ff_error;
674 struct ipr_hostrcb_type_01_error type_01_error;
675 struct ipr_hostrcb_type_02_error type_02_error;
676 struct ipr_hostrcb_type_03_error type_03_error;
677 struct ipr_hostrcb_type_04_error type_04_error;
678 struct ipr_hostrcb_type_07_error type_07_error;
679 struct ipr_hostrcb_type_12_error type_12_error;
680 struct ipr_hostrcb_type_13_error type_13_error;
681 struct ipr_hostrcb_type_14_error type_14_error;
682 struct ipr_hostrcb_type_17_error type_17_error;
684 }__attribute__((packed, aligned (4)));
686 struct ipr_hostrcb_raw {
687 __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
688 }__attribute__((packed, aligned (4)));
692 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE 0xE1
693 #define IPR_HOST_RCB_OP_CODE_LOG_DATA 0xE2
696 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED 0x00
697 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY 0x01
698 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY 0x02
699 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY 0x10
700 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY 0x11
702 u8 notifications_lost;
703 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST 0
704 #define IPR_HOST_RCB_NOTIFICATIONS_LOST 0x80
707 #define IPR_HOSTRCB_INTERNAL_OPER 0x80
708 #define IPR_HOSTRCB_ERR_RESP_SENT 0x40
711 #define IPR_HOST_RCB_OVERLAY_ID_1 0x01
712 #define IPR_HOST_RCB_OVERLAY_ID_2 0x02
713 #define IPR_HOST_RCB_OVERLAY_ID_3 0x03
714 #define IPR_HOST_RCB_OVERLAY_ID_4 0x04
715 #define IPR_HOST_RCB_OVERLAY_ID_6 0x06
716 #define IPR_HOST_RCB_OVERLAY_ID_7 0x07
717 #define IPR_HOST_RCB_OVERLAY_ID_12 0x12
718 #define IPR_HOST_RCB_OVERLAY_ID_13 0x13
719 #define IPR_HOST_RCB_OVERLAY_ID_14 0x14
720 #define IPR_HOST_RCB_OVERLAY_ID_16 0x16
721 #define IPR_HOST_RCB_OVERLAY_ID_17 0x17
722 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF
726 __be32 time_since_last_ioa_reset;
731 struct ipr_hostrcb_error error;
732 struct ipr_hostrcb_cfg_ch_not ccn;
733 struct ipr_hostrcb_raw raw;
735 }__attribute__((packed, aligned (4)));
738 struct ipr_hcam hcam;
739 dma_addr_t hostrcb_dma;
740 struct list_head queue;
743 /* IPR smart dump table structures */
744 struct ipr_sdt_entry {
745 __be32 bar_str_offset;
751 #define IPR_SDT_ENDIAN 0x80
752 #define IPR_SDT_VALID_ENTRY 0x20
756 }__attribute__((packed, aligned (4)));
758 struct ipr_sdt_header {
761 __be32 num_entries_used;
763 }__attribute__((packed, aligned (4)));
766 struct ipr_sdt_header hdr;
767 struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
768 }__attribute__((packed, aligned (4)));
771 struct ipr_sdt_header hdr;
772 struct ipr_sdt_entry entry[1];
773 }__attribute__((packed, aligned (4)));
778 struct ipr_bus_attributes {
786 struct ipr_resource_entry {
787 struct ipr_config_table_entry cfgte;
788 u8 needs_sync_complete:1;
792 u8 resetting_device:1;
794 struct scsi_device *sdev;
795 struct list_head queue;
798 struct ipr_resource_hdr {
803 struct ipr_resource_table {
804 struct ipr_resource_hdr hdr;
805 struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
808 struct ipr_misc_cbs {
809 struct ipr_ioa_vpd ioa_vpd;
810 struct ipr_inquiry_page0 page0_data;
811 struct ipr_inquiry_page3 page3_data;
812 struct ipr_mode_pages mode_pages;
813 struct ipr_supported_device supp_dev;
816 struct ipr_interrupt_offsets {
817 unsigned long set_interrupt_mask_reg;
818 unsigned long clr_interrupt_mask_reg;
819 unsigned long sense_interrupt_mask_reg;
820 unsigned long clr_interrupt_reg;
822 unsigned long sense_interrupt_reg;
823 unsigned long ioarrin_reg;
824 unsigned long sense_uproc_interrupt_reg;
825 unsigned long set_uproc_interrupt_reg;
826 unsigned long clr_uproc_interrupt_reg;
829 struct ipr_interrupts {
830 void __iomem *set_interrupt_mask_reg;
831 void __iomem *clr_interrupt_mask_reg;
832 void __iomem *sense_interrupt_mask_reg;
833 void __iomem *clr_interrupt_reg;
835 void __iomem *sense_interrupt_reg;
836 void __iomem *ioarrin_reg;
837 void __iomem *sense_uproc_interrupt_reg;
838 void __iomem *set_uproc_interrupt_reg;
839 void __iomem *clr_uproc_interrupt_reg;
842 struct ipr_chip_cfg_t {
845 struct ipr_interrupt_offsets regs;
851 const struct ipr_chip_cfg_t *cfg;
854 enum ipr_shutdown_type {
855 IPR_SHUTDOWN_NORMAL = 0x00,
856 IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
857 IPR_SHUTDOWN_ABBREV = 0x80,
858 IPR_SHUTDOWN_NONE = 0x100
861 struct ipr_trace_entry {
866 #define IPR_TRACE_START 0x00
867 #define IPR_TRACE_FINISH 0xff
883 struct scatterlist scatterlist[1];
894 enum ipr_cache_state {
901 /* Per-controller data */
904 #define IPR_EYECATCHER "iprcfg"
906 struct list_head queue;
908 u8 allow_interrupts:1;
909 u8 in_reset_reload:1;
910 u8 in_ioa_bringdown:1;
911 u8 ioa_unit_checked:1;
915 u8 allow_ml_add_del:1;
917 enum ipr_cache_state cache_state;
918 u16 type; /* CCIN of the card */
921 #define IPR_MAX_LOG_LEVEL 4
922 #define IPR_DEFAULT_LOG_LEVEL 2
924 #define IPR_NUM_TRACE_INDEX_BITS 8
925 #define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)
926 #define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
928 #define IPR_TRACE_START_LABEL "trace"
929 struct ipr_trace_entry *trace;
930 u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
933 * Queue for free command blocks
935 char ipr_free_label[8];
936 #define IPR_FREEQ_LABEL "free-q"
937 struct list_head free_q;
940 * Queue for command blocks outstanding to the adapter
942 char ipr_pending_label[8];
943 #define IPR_PENDQ_LABEL "pend-q"
944 struct list_head pending_q;
946 char cfg_table_start[8];
947 #define IPR_CFG_TBL_START "cfg"
948 struct ipr_config_table *cfg_table;
949 dma_addr_t cfg_table_dma;
951 char resource_table_label[8];
952 #define IPR_RES_TABLE_LABEL "res_tbl"
953 struct ipr_resource_entry *res_entries;
954 struct list_head free_res_q;
955 struct list_head used_res_q;
957 char ipr_hcam_label[8];
958 #define IPR_HCAM_LABEL "hcams"
959 struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
960 dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
961 struct list_head hostrcb_free_q;
962 struct list_head hostrcb_pending_q;
965 dma_addr_t host_rrq_dma;
966 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK 0xfffffffc
967 #define IPR_HRRQ_RESP_BIT_SET 0x00000002
968 #define IPR_HRRQ_TOGGLE_BIT 0x00000001
969 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT 2
970 volatile __be32 *hrrq_start;
971 volatile __be32 *hrrq_end;
972 volatile __be32 *hrrq_curr;
973 volatile u32 toggle_bit;
975 struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
977 const struct ipr_chip_cfg_t *chip_cfg;
979 void __iomem *hdw_dma_regs; /* iomapped PCI memory space */
980 unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
981 void __iomem *ioa_mailbox;
982 struct ipr_interrupts regs;
984 u16 saved_pcix_cmd_reg;
990 struct Scsi_Host *host;
991 struct pci_dev *pdev;
992 struct ipr_sglist *ucode_sglist;
993 struct ipr_mode_pages *saved_mode_pages;
994 u8 saved_mode_page_len;
996 struct work_struct work_q;
998 wait_queue_head_t reset_wait_q;
1000 struct ipr_dump *dump;
1001 enum ipr_sdt_state sdt_state;
1003 struct ipr_misc_cbs *vpd_cbs;
1004 dma_addr_t vpd_cbs_dma;
1006 struct pci_pool *ipr_cmd_pool;
1008 struct ipr_cmnd *reset_cmd;
1010 char ipr_cmd_label[8];
1011 #define IPR_CMD_LABEL "ipr_cmnd"
1012 struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
1013 u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
1017 struct ipr_ioarcb ioarcb;
1018 struct ipr_ioasa ioasa;
1019 struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
1020 struct list_head queue;
1021 struct scsi_cmnd *scsi_cmd;
1022 struct completion completion;
1023 struct timer_list timer;
1024 void (*done) (struct ipr_cmnd *);
1025 int (*job_step) (struct ipr_cmnd *);
1027 u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
1028 dma_addr_t sense_buffer_dma;
1029 unsigned short dma_use_sg;
1030 dma_addr_t dma_handle;
1031 struct ipr_cmnd *sibling;
1033 enum ipr_shutdown_type shutdown_type;
1034 struct ipr_hostrcb *hostrcb;
1035 unsigned long time_left;
1036 unsigned long scratch;
1037 struct ipr_resource_entry *res;
1038 struct scsi_device *sdev;
1041 struct ipr_ioa_cfg *ioa_cfg;
1044 struct ipr_ses_table_entry {
1045 char product_id[17];
1046 char compare_product_id_byte[17];
1047 u32 max_bus_speed_limit; /* MB/sec limit for this backplane */
1050 struct ipr_dump_header {
1052 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
1055 u32 first_entry_offset;
1057 #define IPR_DUMP_STATUS_SUCCESS 0
1058 #define IPR_DUMP_STATUS_QUAL_SUCCESS 2
1059 #define IPR_DUMP_STATUS_FAILED 0xffffffff
1061 #define IPR_DUMP_OS_LINUX 0x4C4E5558
1063 #define IPR_DUMP_DRIVER_NAME 0x49505232
1064 }__attribute__((packed, aligned (4)));
1066 struct ipr_dump_entry_header {
1068 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
1073 #define IPR_DUMP_DATA_TYPE_ASCII 0x41534349
1074 #define IPR_DUMP_DATA_TYPE_BINARY 0x42494E41
1076 #define IPR_DUMP_IOA_DUMP_ID 0x494F4131
1077 #define IPR_DUMP_LOCATION_ID 0x4C4F4341
1078 #define IPR_DUMP_TRACE_ID 0x54524143
1079 #define IPR_DUMP_DRIVER_VERSION_ID 0x44525652
1080 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1081 #define IPR_DUMP_IOA_CTRL_BLK 0x494F4342
1082 #define IPR_DUMP_PEND_OPS 0x414F5053
1084 }__attribute__((packed, aligned (4)));
1086 struct ipr_dump_location_entry {
1087 struct ipr_dump_entry_header hdr;
1088 u8 location[BUS_ID_SIZE];
1089 }__attribute__((packed));
1091 struct ipr_dump_trace_entry {
1092 struct ipr_dump_entry_header hdr;
1093 u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1094 }__attribute__((packed, aligned (4)));
1096 struct ipr_dump_version_entry {
1097 struct ipr_dump_entry_header hdr;
1098 u8 version[sizeof(IPR_DRIVER_VERSION)];
1101 struct ipr_dump_ioa_type_entry {
1102 struct ipr_dump_entry_header hdr;
1107 struct ipr_driver_dump {
1108 struct ipr_dump_header hdr;
1109 struct ipr_dump_version_entry version_entry;
1110 struct ipr_dump_location_entry location_entry;
1111 struct ipr_dump_ioa_type_entry ioa_type_entry;
1112 struct ipr_dump_trace_entry trace_entry;
1113 }__attribute__((packed));
1115 struct ipr_ioa_dump {
1116 struct ipr_dump_entry_header hdr;
1118 __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1120 u32 next_page_index;
1123 #define IPR_SDT_FMT2 2
1124 #define IPR_SDT_UNKNOWN 3
1125 }__attribute__((packed, aligned (4)));
1129 struct ipr_ioa_cfg *ioa_cfg;
1130 struct ipr_driver_dump driver_dump;
1131 struct ipr_ioa_dump ioa_dump;
1134 struct ipr_error_table_t {
1141 struct ipr_software_inq_lid_info {
1143 __be32 timestamp[3];
1144 }__attribute__((packed, aligned (4)));
1146 struct ipr_ucode_image_header {
1147 __be32 header_length;
1148 __be32 lid_table_offset;
1151 u8 minor_release[2];
1153 char eyecatcher[16];
1155 struct ipr_software_inq_lid_info lid[1];
1156 }__attribute__((packed, aligned (4)));
1161 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1163 #ifdef CONFIG_SCSI_IPR_TRACE
1164 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1165 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1167 #define ipr_create_trace_file(kobj, attr) 0
1168 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1171 #ifdef CONFIG_SCSI_IPR_DUMP
1172 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1173 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1175 #define ipr_create_dump_file(kobj, attr) 0
1176 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1180 * Error logging macros
1182 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1183 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1184 #define ipr_crit(...) printk(KERN_CRIT IPR_NAME ": "__VA_ARGS__)
1185 #define ipr_warn(...) printk(KERN_WARNING IPR_NAME": "__VA_ARGS__)
1186 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1188 #define ipr_sdev_printk(level, sdev, fmt, args...) \
1189 sdev_printk(level, sdev, fmt, ## args)
1191 #define ipr_sdev_err(sdev, fmt, ...) \
1192 ipr_sdev_printk(KERN_ERR, sdev, fmt, ##__VA_ARGS__)
1194 #define ipr_sdev_info(sdev, fmt, ...) \
1195 ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__)
1197 #define ipr_sdev_dbg(sdev, fmt, ...) \
1198 IPR_DBG_CMD(ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__))
1200 #define ipr_res_printk(level, ioa_cfg, res, fmt, ...) \
1201 printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, ioa_cfg->host->host_no, \
1202 res.bus, res.target, res.lun, ##__VA_ARGS__)
1204 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1205 ipr_res_printk(KERN_ERR, ioa_cfg, res, fmt, ##__VA_ARGS__)
1206 #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \
1207 IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__))
1209 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...) \
1211 if ((res).bus >= IPR_MAX_NUM_BUSES) { \
1212 ipr_err(fmt": unknown\n", ##__VA_ARGS__); \
1214 ipr_err(fmt": %d:%d:%d:%d\n", \
1215 ##__VA_ARGS__, (ioa_cfg)->host->host_no, \
1216 (res).bus, (res).target, (res).lun); \
1220 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1221 __FILE__, __FUNCTION__, __LINE__)
1223 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1224 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1226 #define ipr_err_separator \
1227 ipr_err("----------------------------------------------------------\n")
1235 * ipr_is_ioa_resource - Determine if a resource is the IOA
1236 * @res: resource entry struct
1239 * 1 if IOA / 0 if not IOA
1241 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1243 return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1247 * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1248 * @res: resource entry struct
1251 * 1 if AF DASD / 0 if not AF DASD
1253 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1255 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1256 !ipr_is_ioa_resource(res) &&
1257 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1264 * ipr_is_vset_device - Determine if a resource is a VSET
1265 * @res: resource entry struct
1268 * 1 if VSET / 0 if not VSET
1270 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1272 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1273 !ipr_is_ioa_resource(res) &&
1274 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1281 * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1282 * @res: resource entry struct
1285 * 1 if GSCSI / 0 if not GSCSI
1287 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1289 if (!ipr_is_ioa_resource(res) &&
1290 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1297 * ipr_is_device - Determine if resource address is that of a device
1298 * @res_addr: resource address struct
1301 * 1 if AF / 0 if not AF
1303 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1305 if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1306 (res_addr->target < IPR_MAX_NUM_TARGETS_PER_BUS))
1313 * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1314 * @sdt_word: SDT address
1317 * 1 if format 2 / 0 if not
1319 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1321 u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1324 case IPR_SDT_FMT2_BAR0_SEL:
1325 case IPR_SDT_FMT2_BAR1_SEL:
1326 case IPR_SDT_FMT2_BAR2_SEL:
1327 case IPR_SDT_FMT2_BAR3_SEL:
1328 case IPR_SDT_FMT2_BAR4_SEL:
1329 case IPR_SDT_FMT2_BAR5_SEL:
1330 case IPR_SDT_FMT2_EXP_ROM_SEL: