2 * ipr.h -- driver for IBM Power Linux RAID adapters
4 * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
6 * Copyright (C) 2003, 2004 IBM Corporation
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
23 * that broke 64bit platforms.
29 #include <linux/types.h>
30 #include <linux/completion.h>
31 #include <linux/list.h>
32 #include <linux/kref.h>
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_cmnd.h>
39 #define IPR_DRIVER_VERSION "2.0.14"
40 #define IPR_DRIVER_DATE "(May 2, 2005)"
43 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
44 * ops per device for devices not running tagged command queuing.
45 * This can be adjusted at runtime through sysfs device attributes.
47 #define IPR_MAX_CMD_PER_LUN 6
50 * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
51 * ops the mid-layer can send to the adapter.
53 #define IPR_NUM_BASE_CMD_BLKS 100
55 #define IPR_SUBS_DEV_ID_2780 0x0264
56 #define IPR_SUBS_DEV_ID_5702 0x0266
57 #define IPR_SUBS_DEV_ID_5703 0x0278
58 #define IPR_SUBS_DEV_ID_572E 0x028D
59 #define IPR_SUBS_DEV_ID_573E 0x02D3
60 #define IPR_SUBS_DEV_ID_573D 0x02D4
61 #define IPR_SUBS_DEV_ID_571A 0x02C0
62 #define IPR_SUBS_DEV_ID_571B 0x02BE
63 #define IPR_SUBS_DEV_ID_571E 0x02BF
65 #define IPR_NAME "ipr"
70 #define IPR_RC_JOB_CONTINUE 1
71 #define IPR_RC_JOB_RETURN 2
76 #define IPR_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
77 #define IPR_IOASC_SYNC_REQUIRED 0x023f0000
78 #define IPR_IOASC_MED_DO_NOT_REALLOC 0x03110C00
79 #define IPR_IOASC_HW_SEL_TIMEOUT 0x04050000
80 #define IPR_IOASC_HW_DEV_BUS_STATUS 0x04448500
81 #define IPR_IOASC_IOASC_MASK 0xFFFFFF00
82 #define IPR_IOASC_SCSI_STATUS_MASK 0x000000FF
83 #define IPR_IOASC_IR_RESOURCE_HANDLE 0x05250000
84 #define IPR_IOASC_BUS_WAS_RESET 0x06290000
85 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000
86 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000
88 #define IPR_FIRST_DRIVER_IOASC 0x10000000
89 #define IPR_IOASC_IOA_WAS_RESET 0x10000001
90 #define IPR_IOASC_PCI_ACCESS_ERROR 0x10000002
92 #define IPR_NUM_LOG_HCAMS 2
93 #define IPR_NUM_CFG_CHG_HCAMS 2
94 #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
95 #define IPR_MAX_NUM_TARGETS_PER_BUS 0x10
96 #define IPR_MAX_NUM_LUNS_PER_TARGET 256
97 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8
98 #define IPR_VSET_BUS 0xff
99 #define IPR_IOA_BUS 0xff
100 #define IPR_IOA_TARGET 0xff
101 #define IPR_IOA_LUN 0xff
102 #define IPR_MAX_NUM_BUSES 4
103 #define IPR_MAX_BUS_TO_SCAN IPR_MAX_NUM_BUSES
105 #define IPR_NUM_RESET_RELOAD_RETRIES 3
107 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
108 #define IPR_NUM_INTERNAL_CMD_BLKS (IPR_NUM_HCAMS + \
109 ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
111 #define IPR_MAX_COMMANDS IPR_NUM_BASE_CMD_BLKS
112 #define IPR_NUM_CMD_BLKS (IPR_NUM_BASE_CMD_BLKS + \
113 IPR_NUM_INTERNAL_CMD_BLKS)
115 #define IPR_MAX_PHYSICAL_DEVS 192
117 #define IPR_MAX_SGLIST 64
118 #define IPR_IOA_MAX_SECTORS 32767
119 #define IPR_VSET_MAX_SECTORS 512
120 #define IPR_MAX_CDB_LEN 16
122 #define IPR_DEFAULT_BUS_WIDTH 16
123 #define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
124 #define IPR_U160_SCSI_RATE ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
125 #define IPR_U320_SCSI_RATE ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
126 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
128 #define IPR_IOA_RES_HANDLE 0xffffffff
129 #define IPR_IOA_RES_ADDR 0x00ffffff
134 #define IPR_QUERY_RSRC_STATE 0xC2
135 #define IPR_RESET_DEVICE 0xC3
136 #define IPR_RESET_TYPE_SELECT 0x80
137 #define IPR_LUN_RESET 0x40
138 #define IPR_TARGET_RESET 0x20
139 #define IPR_BUS_RESET 0x10
140 #define IPR_ID_HOST_RR_Q 0xC4
141 #define IPR_QUERY_IOA_CONFIG 0xC5
142 #define IPR_CANCEL_ALL_REQUESTS 0xCE
143 #define IPR_HOST_CONTROLLED_ASYNC 0xCF
144 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE 0x01
145 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA 0x02
146 #define IPR_SET_SUPPORTED_DEVICES 0xFB
147 #define IPR_IOA_SHUTDOWN 0xF7
148 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE 0x05
153 #define IPR_SHUTDOWN_TIMEOUT (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
154 #define IPR_VSET_RW_TIMEOUT (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
155 #define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
156 #define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
157 #define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
158 #define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
159 #define IPR_INTERNAL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
160 #define IPR_WRITE_BUFFER_TIMEOUT (10 * 60 * HZ)
161 #define IPR_SET_SUP_DEVICE_TIMEOUT (2 * 60 * HZ)
162 #define IPR_REQUEST_SENSE_TIMEOUT (10 * HZ)
163 #define IPR_OPERATIONAL_TIMEOUT (5 * 60)
164 #define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
165 #define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
166 #define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
167 #define IPR_DUMP_TIMEOUT (15 * HZ)
172 #define IPR_VENDOR_ID_LEN 8
173 #define IPR_PROD_ID_LEN 16
174 #define IPR_SERIAL_NUM_LEN 8
179 #define IPR_FMT2_MBX_ADDR_MASK 0x0fffffff
180 #define IPR_FMT2_MBX_BAR_SEL_MASK 0xf0000000
181 #define IPR_FMT2_MKR_BAR_SEL_SHIFT 28
182 #define IPR_GET_FMT2_BAR_SEL(mbx) \
183 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
184 #define IPR_SDT_FMT2_BAR0_SEL 0x0
185 #define IPR_SDT_FMT2_BAR1_SEL 0x1
186 #define IPR_SDT_FMT2_BAR2_SEL 0x2
187 #define IPR_SDT_FMT2_BAR3_SEL 0x3
188 #define IPR_SDT_FMT2_BAR4_SEL 0x4
189 #define IPR_SDT_FMT2_BAR5_SEL 0x5
190 #define IPR_SDT_FMT2_EXP_ROM_SEL 0x8
191 #define IPR_FMT2_SDT_READY_TO_USE 0xC4D4E3F2
192 #define IPR_DOORBELL 0x82800000
194 #define IPR_PCII_IOA_TRANS_TO_OPER (0x80000000 >> 0)
195 #define IPR_PCII_IOARCB_XFER_FAILED (0x80000000 >> 3)
196 #define IPR_PCII_IOA_UNIT_CHECKED (0x80000000 >> 4)
197 #define IPR_PCII_NO_HOST_RRQ (0x80000000 >> 5)
198 #define IPR_PCII_CRITICAL_OPERATION (0x80000000 >> 6)
199 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE (0x80000000 >> 7)
200 #define IPR_PCII_IOARRIN_LOST (0x80000000 >> 27)
201 #define IPR_PCII_MMIO_ERROR (0x80000000 >> 28)
202 #define IPR_PCII_PROC_ERR_STATE (0x80000000 >> 29)
203 #define IPR_PCII_HRRQ_UPDATED (0x80000000 >> 30)
204 #define IPR_PCII_CORE_ISSUED_RST_REQ (0x80000000 >> 31)
206 #define IPR_PCII_ERROR_INTERRUPTS \
207 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
208 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
210 #define IPR_PCII_OPER_INTERRUPTS \
211 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
213 #define IPR_UPROCI_RESET_ALERT (0x80000000 >> 7)
214 #define IPR_UPROCI_IO_DEBUG_ALERT (0x80000000 >> 9)
216 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC 200000 /* 200 ms */
217 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC 200000 /* 200 ms */
222 #define IPR_MAX_IOA_DUMP_SIZE (4 * 1024 * 1024)
223 #define IPR_NUM_SDT_ENTRIES 511
224 #define IPR_MAX_NUM_DUMP_PAGES ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
229 #define IPR_NUM_IOADL_ENTRIES IPR_MAX_SGLIST
232 * Adapter interface types
235 struct ipr_res_addr {
240 #define IPR_GET_PHYS_LOC(res_addr) \
241 (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
242 }__attribute__((packed, aligned (4)));
244 struct ipr_std_inq_vpids {
245 u8 vendor_id[IPR_VENDOR_ID_LEN];
246 u8 product_id[IPR_PROD_ID_LEN];
247 }__attribute__((packed));
250 struct ipr_std_inq_vpids vpids;
251 u8 sn[IPR_SERIAL_NUM_LEN];
252 }__attribute__((packed));
254 struct ipr_std_inq_data {
255 u8 peri_qual_dev_type;
256 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
257 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
259 u8 removeable_medium_rsvd;
260 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
262 #define IPR_IS_DASD_DEVICE(std_inq) \
263 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
264 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
266 #define IPR_IS_SES_DEVICE(std_inq) \
267 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
276 struct ipr_std_inq_vpids vpids;
278 u8 ros_rsvd_ram_rsvd[4];
280 u8 serial_num[IPR_SERIAL_NUM_LEN];
281 }__attribute__ ((packed));
283 struct ipr_config_table_entry {
287 #define IPR_IS_IOA_RESOURCE 0x80
288 #define IPR_IS_ARRAY_MEMBER 0x20
289 #define IPR_IS_HOT_SPARE 0x10
292 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
293 #define IPR_SUBTYPE_AF_DASD 0
294 #define IPR_SUBTYPE_GENERIC_SCSI 1
295 #define IPR_SUBTYPE_VOLUME_SET 2
297 struct ipr_res_addr res_addr;
300 struct ipr_std_inq_data std_inq_data;
301 }__attribute__ ((packed, aligned (4)));
303 struct ipr_config_table_hdr {
306 #define IPR_UCODE_DOWNLOAD_REQ 0x10
308 }__attribute__((packed, aligned (4)));
310 struct ipr_config_table {
311 struct ipr_config_table_hdr hdr;
312 struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
313 }__attribute__((packed, aligned (4)));
315 struct ipr_hostrcb_cfg_ch_not {
316 struct ipr_config_table_entry cfgte;
318 }__attribute__((packed, aligned (4)));
320 struct ipr_supported_device {
324 struct ipr_std_inq_vpids vpids;
326 }__attribute__((packed, aligned (4)));
328 /* Command packet structure */
330 __be16 reserved; /* Reserved by IOA */
332 #define IPR_RQTYPE_SCSICDB 0x00
333 #define IPR_RQTYPE_IOACMD 0x01
334 #define IPR_RQTYPE_HCAM 0x02
339 #define IPR_FLAGS_HI_WRITE_NOT_READ 0x80
340 #define IPR_FLAGS_HI_NO_ULEN_CHK 0x20
341 #define IPR_FLAGS_HI_SYNC_OVERRIDE 0x10
342 #define IPR_FLAGS_HI_SYNC_COMPLETE 0x08
343 #define IPR_FLAGS_HI_NO_LINK_DESC 0x04
346 #define IPR_FLAGS_LO_ALIGNED_BFR 0x20
347 #define IPR_FLAGS_LO_DELAY_AFTER_RST 0x10
348 #define IPR_FLAGS_LO_UNTAGGED_TASK 0x00
349 #define IPR_FLAGS_LO_SIMPLE_TASK 0x02
350 #define IPR_FLAGS_LO_ORDERED_TASK 0x04
351 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK 0x06
352 #define IPR_FLAGS_LO_ACA_TASK 0x08
356 }__attribute__ ((packed, aligned(4)));
358 /* IOA Request Control Block 128 bytes */
360 __be32 ioarcb_host_pci_addr;
363 __be32 host_response_handle;
368 __be32 write_data_transfer_length;
369 __be32 read_data_transfer_length;
370 __be32 write_ioadl_addr;
371 __be32 write_ioadl_len;
372 __be32 read_ioadl_addr;
373 __be32 read_ioadl_len;
375 __be32 ioasa_host_pci_addr;
379 struct ipr_cmd_pkt cmd_pkt;
381 __be32 add_cmd_parms_len;
382 __be32 add_cmd_parms[10];
383 }__attribute__((packed, aligned (4)));
385 struct ipr_ioadl_desc {
386 __be32 flags_and_data_len;
387 #define IPR_IOADL_FLAGS_MASK 0xff000000
388 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
389 #define IPR_IOADL_DATA_LEN_MASK 0x00ffffff
390 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
391 #define IPR_IOADL_FLAGS_READ 0x48000000
392 #define IPR_IOADL_FLAGS_READ_LAST 0x49000000
393 #define IPR_IOADL_FLAGS_WRITE 0x68000000
394 #define IPR_IOADL_FLAGS_WRITE_LAST 0x69000000
395 #define IPR_IOADL_FLAGS_LAST 0x01000000
398 }__attribute__((packed, aligned (8)));
400 struct ipr_ioasa_vset {
401 __be32 failing_lba_hi;
402 __be32 failing_lba_lo;
404 }__attribute__((packed, aligned (4)));
406 struct ipr_ioasa_af_dasd {
408 }__attribute__((packed, aligned (4)));
410 struct ipr_ioasa_gpdd {
415 }__attribute__((packed, aligned (4)));
417 struct ipr_ioasa_raw {
419 }__attribute__((packed, aligned (4)));
423 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
424 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
425 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
426 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
428 __be16 ret_stat_len; /* Length of the returned IOASA */
430 __be16 avail_stat_len; /* Total Length of status available. */
432 __be32 residual_data_len; /* number of bytes in the host data */
433 /* buffers that were not used by the IOARCB command. */
436 #define IPR_NO_ILID 0
437 #define IPR_DRIVER_ILID 0xffffffff
441 __be32 fd_phys_locator;
443 __be32 fd_res_handle;
445 __be32 ioasc_specific; /* status code specific field */
446 #define IPR_IOASC_SPECIFIC_MASK 0x00ffffff
447 #define IPR_FIELD_POINTER_VALID (0x80000000 >> 8)
448 #define IPR_FIELD_POINTER_MASK 0x0000ffff
451 struct ipr_ioasa_vset vset;
452 struct ipr_ioasa_af_dasd dasd;
453 struct ipr_ioasa_gpdd gpdd;
454 struct ipr_ioasa_raw raw;
456 }__attribute__((packed, aligned (4)));
458 struct ipr_mode_parm_hdr {
461 u8 device_spec_parms;
463 }__attribute__((packed));
465 struct ipr_mode_pages {
466 struct ipr_mode_parm_hdr hdr;
467 u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
468 }__attribute__((packed));
470 struct ipr_mode_page_hdr {
472 #define IPR_MODE_PAGE_PS 0x80
473 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
475 }__attribute__ ((packed));
477 struct ipr_dev_bus_entry {
478 struct ipr_res_addr res_addr;
480 #define IPR_SCSI_ATTR_ENABLE_QAS 0x80
481 #define IPR_SCSI_ATTR_DISABLE_QAS 0x40
482 #define IPR_SCSI_ATTR_QAS_MASK 0xC0
483 #define IPR_SCSI_ATTR_ENABLE_TM 0x20
484 #define IPR_SCSI_ATTR_NO_TERM_PWR 0x10
485 #define IPR_SCSI_ATTR_TM_SUPPORTED 0x08
486 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED 0x04
490 u8 extended_reset_delay;
491 #define IPR_EXTENDED_RESET_DELAY 7
493 __be32 max_xfer_rate;
498 }__attribute__((packed, aligned (4)));
500 struct ipr_mode_page28 {
501 struct ipr_mode_page_hdr hdr;
504 struct ipr_dev_bus_entry bus[0];
505 }__attribute__((packed));
508 struct ipr_std_inq_data std_inq_data;
509 u8 ascii_part_num[12];
511 u8 ascii_plant_code[4];
512 }__attribute__((packed));
514 struct ipr_inquiry_page3 {
515 u8 peri_qual_dev_type;
527 }__attribute__((packed));
529 #define IPR_INQUIRY_PAGE0_ENTRIES 20
530 struct ipr_inquiry_page0 {
531 u8 peri_qual_dev_type;
535 u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
536 }__attribute__((packed));
538 struct ipr_hostrcb_device_data_entry {
540 struct ipr_res_addr dev_res_addr;
541 struct ipr_vpd new_vpd;
542 struct ipr_vpd ioa_last_with_dev_vpd;
543 struct ipr_vpd cfc_last_with_dev_vpd;
545 }__attribute__((packed, aligned (4)));
547 struct ipr_hostrcb_array_data_entry {
549 struct ipr_res_addr expected_dev_res_addr;
550 struct ipr_res_addr dev_res_addr;
551 }__attribute__((packed, aligned (4)));
553 struct ipr_hostrcb_type_ff_error {
554 __be32 ioa_data[246];
555 }__attribute__((packed, aligned (4)));
557 struct ipr_hostrcb_type_01_error {
561 __be32 ioa_data[236];
562 }__attribute__((packed, aligned (4)));
564 struct ipr_hostrcb_type_02_error {
565 struct ipr_vpd ioa_vpd;
566 struct ipr_vpd cfc_vpd;
567 struct ipr_vpd ioa_last_attached_to_cfc_vpd;
568 struct ipr_vpd cfc_last_attached_to_ioa_vpd;
570 }__attribute__((packed, aligned (4)));
572 struct ipr_hostrcb_type_03_error {
573 struct ipr_vpd ioa_vpd;
574 struct ipr_vpd cfc_vpd;
575 __be32 errors_detected;
576 __be32 errors_logged;
578 struct ipr_hostrcb_device_data_entry dev[3];
579 }__attribute__((packed, aligned (4)));
581 struct ipr_hostrcb_type_04_error {
582 struct ipr_vpd ioa_vpd;
583 struct ipr_vpd cfc_vpd;
585 struct ipr_hostrcb_array_data_entry array_member[10];
586 __be32 exposed_mode_adn;
588 struct ipr_vpd incomp_dev_vpd;
590 struct ipr_hostrcb_array_data_entry array_member2[8];
591 struct ipr_res_addr last_func_vset_res_addr;
592 u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
593 u8 protection_level[8];
594 }__attribute__((packed, aligned (4)));
596 struct ipr_hostrcb_error {
597 __be32 failing_dev_ioasc;
598 struct ipr_res_addr failing_dev_res_addr;
599 __be32 failing_dev_res_handle;
602 struct ipr_hostrcb_type_ff_error type_ff_error;
603 struct ipr_hostrcb_type_01_error type_01_error;
604 struct ipr_hostrcb_type_02_error type_02_error;
605 struct ipr_hostrcb_type_03_error type_03_error;
606 struct ipr_hostrcb_type_04_error type_04_error;
608 }__attribute__((packed, aligned (4)));
610 struct ipr_hostrcb_raw {
611 __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
612 }__attribute__((packed, aligned (4)));
616 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE 0xE1
617 #define IPR_HOST_RCB_OP_CODE_LOG_DATA 0xE2
620 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED 0x00
621 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY 0x01
622 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY 0x02
623 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY 0x10
624 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY 0x11
626 u8 notifications_lost;
627 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST 0
628 #define IPR_HOST_RCB_NOTIFICATIONS_LOST 0x80
631 #define IPR_HOSTRCB_INTERNAL_OPER 0x80
632 #define IPR_HOSTRCB_ERR_RESP_SENT 0x40
635 #define IPR_HOST_RCB_OVERLAY_ID_1 0x01
636 #define IPR_HOST_RCB_OVERLAY_ID_2 0x02
637 #define IPR_HOST_RCB_OVERLAY_ID_3 0x03
638 #define IPR_HOST_RCB_OVERLAY_ID_4 0x04
639 #define IPR_HOST_RCB_OVERLAY_ID_6 0x06
640 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF
644 __be32 time_since_last_ioa_reset;
649 struct ipr_hostrcb_error error;
650 struct ipr_hostrcb_cfg_ch_not ccn;
651 struct ipr_hostrcb_raw raw;
653 }__attribute__((packed, aligned (4)));
656 struct ipr_hcam hcam;
657 dma_addr_t hostrcb_dma;
658 struct list_head queue;
661 /* IPR smart dump table structures */
662 struct ipr_sdt_entry {
663 __be32 bar_str_offset;
669 #define IPR_SDT_ENDIAN 0x80
670 #define IPR_SDT_VALID_ENTRY 0x20
674 }__attribute__((packed, aligned (4)));
676 struct ipr_sdt_header {
679 __be32 num_entries_used;
681 }__attribute__((packed, aligned (4)));
684 struct ipr_sdt_header hdr;
685 struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
686 }__attribute__((packed, aligned (4)));
689 struct ipr_sdt_header hdr;
690 struct ipr_sdt_entry entry[1];
691 }__attribute__((packed, aligned (4)));
696 struct ipr_bus_attributes {
704 struct ipr_resource_entry {
705 struct ipr_config_table_entry cfgte;
706 u8 needs_sync_complete:1;
710 u8 resetting_device:1;
712 struct scsi_device *sdev;
713 struct list_head queue;
716 struct ipr_resource_hdr {
721 struct ipr_resource_table {
722 struct ipr_resource_hdr hdr;
723 struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
726 struct ipr_misc_cbs {
727 struct ipr_ioa_vpd ioa_vpd;
728 struct ipr_inquiry_page0 page0_data;
729 struct ipr_inquiry_page3 page3_data;
730 struct ipr_mode_pages mode_pages;
731 struct ipr_supported_device supp_dev;
734 struct ipr_interrupt_offsets {
735 unsigned long set_interrupt_mask_reg;
736 unsigned long clr_interrupt_mask_reg;
737 unsigned long sense_interrupt_mask_reg;
738 unsigned long clr_interrupt_reg;
740 unsigned long sense_interrupt_reg;
741 unsigned long ioarrin_reg;
742 unsigned long sense_uproc_interrupt_reg;
743 unsigned long set_uproc_interrupt_reg;
744 unsigned long clr_uproc_interrupt_reg;
747 struct ipr_interrupts {
748 void __iomem *set_interrupt_mask_reg;
749 void __iomem *clr_interrupt_mask_reg;
750 void __iomem *sense_interrupt_mask_reg;
751 void __iomem *clr_interrupt_reg;
753 void __iomem *sense_interrupt_reg;
754 void __iomem *ioarrin_reg;
755 void __iomem *sense_uproc_interrupt_reg;
756 void __iomem *set_uproc_interrupt_reg;
757 void __iomem *clr_uproc_interrupt_reg;
760 struct ipr_chip_cfg_t {
763 struct ipr_interrupt_offsets regs;
769 const struct ipr_chip_cfg_t *cfg;
772 enum ipr_shutdown_type {
773 IPR_SHUTDOWN_NORMAL = 0x00,
774 IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
775 IPR_SHUTDOWN_ABBREV = 0x80,
776 IPR_SHUTDOWN_NONE = 0x100
779 struct ipr_trace_entry {
784 #define IPR_TRACE_START 0x00
785 #define IPR_TRACE_FINISH 0xff
801 struct scatterlist scatterlist[1];
812 enum ipr_cache_state {
819 /* Per-controller data */
822 #define IPR_EYECATCHER "iprcfg"
824 struct list_head queue;
826 u8 allow_interrupts:1;
827 u8 in_reset_reload:1;
828 u8 in_ioa_bringdown:1;
829 u8 ioa_unit_checked:1;
833 u8 allow_ml_add_del:1;
835 enum ipr_cache_state cache_state;
836 u16 type; /* CCIN of the card */
839 #define IPR_MAX_LOG_LEVEL 4
840 #define IPR_DEFAULT_LOG_LEVEL 2
842 #define IPR_NUM_TRACE_INDEX_BITS 8
843 #define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)
844 #define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
846 #define IPR_TRACE_START_LABEL "trace"
847 struct ipr_trace_entry *trace;
848 u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
851 * Queue for free command blocks
853 char ipr_free_label[8];
854 #define IPR_FREEQ_LABEL "free-q"
855 struct list_head free_q;
858 * Queue for command blocks outstanding to the adapter
860 char ipr_pending_label[8];
861 #define IPR_PENDQ_LABEL "pend-q"
862 struct list_head pending_q;
864 char cfg_table_start[8];
865 #define IPR_CFG_TBL_START "cfg"
866 struct ipr_config_table *cfg_table;
867 dma_addr_t cfg_table_dma;
869 char resource_table_label[8];
870 #define IPR_RES_TABLE_LABEL "res_tbl"
871 struct ipr_resource_entry *res_entries;
872 struct list_head free_res_q;
873 struct list_head used_res_q;
875 char ipr_hcam_label[8];
876 #define IPR_HCAM_LABEL "hcams"
877 struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
878 dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
879 struct list_head hostrcb_free_q;
880 struct list_head hostrcb_pending_q;
883 dma_addr_t host_rrq_dma;
884 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK 0xfffffffc
885 #define IPR_HRRQ_RESP_BIT_SET 0x00000002
886 #define IPR_HRRQ_TOGGLE_BIT 0x00000001
887 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT 2
888 volatile __be32 *hrrq_start;
889 volatile __be32 *hrrq_end;
890 volatile __be32 *hrrq_curr;
891 volatile u32 toggle_bit;
893 struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
895 const struct ipr_chip_cfg_t *chip_cfg;
897 void __iomem *hdw_dma_regs; /* iomapped PCI memory space */
898 unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
899 void __iomem *ioa_mailbox;
900 struct ipr_interrupts regs;
902 u16 saved_pcix_cmd_reg;
907 struct Scsi_Host *host;
908 struct pci_dev *pdev;
909 struct ipr_sglist *ucode_sglist;
910 struct ipr_mode_pages *saved_mode_pages;
911 u8 saved_mode_page_len;
913 struct work_struct work_q;
915 wait_queue_head_t reset_wait_q;
917 struct ipr_dump *dump;
918 enum ipr_sdt_state sdt_state;
920 struct ipr_misc_cbs *vpd_cbs;
921 dma_addr_t vpd_cbs_dma;
923 struct pci_pool *ipr_cmd_pool;
925 struct ipr_cmnd *reset_cmd;
927 char ipr_cmd_label[8];
928 #define IPR_CMD_LABEL "ipr_cmnd"
929 struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
930 u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
934 struct ipr_ioarcb ioarcb;
935 struct ipr_ioasa ioasa;
936 struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
937 struct list_head queue;
938 struct scsi_cmnd *scsi_cmd;
939 struct completion completion;
940 struct timer_list timer;
941 void (*done) (struct ipr_cmnd *);
942 int (*job_step) (struct ipr_cmnd *);
944 u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
945 dma_addr_t sense_buffer_dma;
946 unsigned short dma_use_sg;
947 dma_addr_t dma_handle;
948 struct ipr_cmnd *sibling;
950 enum ipr_shutdown_type shutdown_type;
951 struct ipr_hostrcb *hostrcb;
952 unsigned long time_left;
953 unsigned long scratch;
954 struct ipr_resource_entry *res;
955 struct scsi_device *sdev;
958 struct ipr_ioa_cfg *ioa_cfg;
961 struct ipr_ses_table_entry {
963 char compare_product_id_byte[17];
964 u32 max_bus_speed_limit; /* MB/sec limit for this backplane */
967 struct ipr_dump_header {
969 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
972 u32 first_entry_offset;
974 #define IPR_DUMP_STATUS_SUCCESS 0
975 #define IPR_DUMP_STATUS_QUAL_SUCCESS 2
976 #define IPR_DUMP_STATUS_FAILED 0xffffffff
978 #define IPR_DUMP_OS_LINUX 0x4C4E5558
980 #define IPR_DUMP_DRIVER_NAME 0x49505232
981 }__attribute__((packed, aligned (4)));
983 struct ipr_dump_entry_header {
985 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
990 #define IPR_DUMP_DATA_TYPE_ASCII 0x41534349
991 #define IPR_DUMP_DATA_TYPE_BINARY 0x42494E41
993 #define IPR_DUMP_IOA_DUMP_ID 0x494F4131
994 #define IPR_DUMP_LOCATION_ID 0x4C4F4341
995 #define IPR_DUMP_TRACE_ID 0x54524143
996 #define IPR_DUMP_DRIVER_VERSION_ID 0x44525652
997 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
998 #define IPR_DUMP_IOA_CTRL_BLK 0x494F4342
999 #define IPR_DUMP_PEND_OPS 0x414F5053
1001 }__attribute__((packed, aligned (4)));
1003 struct ipr_dump_location_entry {
1004 struct ipr_dump_entry_header hdr;
1005 u8 location[BUS_ID_SIZE];
1006 }__attribute__((packed));
1008 struct ipr_dump_trace_entry {
1009 struct ipr_dump_entry_header hdr;
1010 u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1011 }__attribute__((packed, aligned (4)));
1013 struct ipr_dump_version_entry {
1014 struct ipr_dump_entry_header hdr;
1015 u8 version[sizeof(IPR_DRIVER_VERSION)];
1018 struct ipr_dump_ioa_type_entry {
1019 struct ipr_dump_entry_header hdr;
1024 struct ipr_driver_dump {
1025 struct ipr_dump_header hdr;
1026 struct ipr_dump_version_entry version_entry;
1027 struct ipr_dump_location_entry location_entry;
1028 struct ipr_dump_ioa_type_entry ioa_type_entry;
1029 struct ipr_dump_trace_entry trace_entry;
1030 }__attribute__((packed));
1032 struct ipr_ioa_dump {
1033 struct ipr_dump_entry_header hdr;
1035 __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1037 u32 next_page_index;
1040 #define IPR_SDT_FMT2 2
1041 #define IPR_SDT_UNKNOWN 3
1042 }__attribute__((packed, aligned (4)));
1046 struct ipr_ioa_cfg *ioa_cfg;
1047 struct ipr_driver_dump driver_dump;
1048 struct ipr_ioa_dump ioa_dump;
1051 struct ipr_error_table_t {
1058 struct ipr_software_inq_lid_info {
1060 __be32 timestamp[3];
1061 }__attribute__((packed, aligned (4)));
1063 struct ipr_ucode_image_header {
1064 __be32 header_length;
1065 __be32 lid_table_offset;
1068 u8 minor_release[2];
1070 char eyecatcher[16];
1072 struct ipr_software_inq_lid_info lid[1];
1073 }__attribute__((packed, aligned (4)));
1078 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1080 #ifdef CONFIG_SCSI_IPR_TRACE
1081 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1082 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1084 #define ipr_create_trace_file(kobj, attr) 0
1085 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1088 #ifdef CONFIG_SCSI_IPR_DUMP
1089 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1090 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1092 #define ipr_create_dump_file(kobj, attr) 0
1093 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1097 * Error logging macros
1099 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1100 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1101 #define ipr_crit(...) printk(KERN_CRIT IPR_NAME ": "__VA_ARGS__)
1102 #define ipr_warn(...) printk(KERN_WARNING IPR_NAME": "__VA_ARGS__)
1103 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1105 #define ipr_sdev_printk(level, sdev, fmt, args...) \
1106 sdev_printk(level, sdev, fmt, ## args)
1108 #define ipr_sdev_err(sdev, fmt, ...) \
1109 ipr_sdev_printk(KERN_ERR, sdev, fmt, ##__VA_ARGS__)
1111 #define ipr_sdev_info(sdev, fmt, ...) \
1112 ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__)
1114 #define ipr_sdev_dbg(sdev, fmt, ...) \
1115 IPR_DBG_CMD(ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__))
1117 #define ipr_res_printk(level, ioa_cfg, res, fmt, ...) \
1118 printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, ioa_cfg->host->host_no, \
1119 res.bus, res.target, res.lun, ##__VA_ARGS__)
1121 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1122 ipr_res_printk(KERN_ERR, ioa_cfg, res, fmt, ##__VA_ARGS__)
1123 #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \
1124 IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__))
1126 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...) \
1128 if ((res).bus >= IPR_MAX_NUM_BUSES) { \
1129 ipr_err(fmt": unknown\n", ##__VA_ARGS__); \
1131 ipr_err(fmt": %d:%d:%d:%d\n", \
1132 ##__VA_ARGS__, (ioa_cfg)->host->host_no, \
1133 (res).bus, (res).target, (res).lun); \
1137 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1138 __FILE__, __FUNCTION__, __LINE__)
1140 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1141 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1143 #define ipr_err_separator \
1144 ipr_err("----------------------------------------------------------\n")
1152 * ipr_is_ioa_resource - Determine if a resource is the IOA
1153 * @res: resource entry struct
1156 * 1 if IOA / 0 if not IOA
1158 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1160 return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1164 * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1165 * @res: resource entry struct
1168 * 1 if AF DASD / 0 if not AF DASD
1170 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1172 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1173 !ipr_is_ioa_resource(res) &&
1174 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1181 * ipr_is_vset_device - Determine if a resource is a VSET
1182 * @res: resource entry struct
1185 * 1 if VSET / 0 if not VSET
1187 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1189 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1190 !ipr_is_ioa_resource(res) &&
1191 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1198 * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1199 * @res: resource entry struct
1202 * 1 if GSCSI / 0 if not GSCSI
1204 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1206 if (!ipr_is_ioa_resource(res) &&
1207 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1214 * ipr_is_device - Determine if resource address is that of a device
1215 * @res_addr: resource address struct
1218 * 1 if AF / 0 if not AF
1220 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1222 if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1223 (res_addr->target < IPR_MAX_NUM_TARGETS_PER_BUS))
1230 * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1231 * @sdt_word: SDT address
1234 * 1 if format 2 / 0 if not
1236 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1238 u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1241 case IPR_SDT_FMT2_BAR0_SEL:
1242 case IPR_SDT_FMT2_BAR1_SEL:
1243 case IPR_SDT_FMT2_BAR2_SEL:
1244 case IPR_SDT_FMT2_BAR3_SEL:
1245 case IPR_SDT_FMT2_BAR4_SEL:
1246 case IPR_SDT_FMT2_BAR5_SEL:
1247 case IPR_SDT_FMT2_EXP_ROM_SEL: