Pileus Git - ~andy/linux/blob - drivers/scsi/gdth.c

   1 /************************************************************************
   2  * Linux driver for                                                     *
   3  * ICP vortex GmbH:    GDT ISA/EISA/PCI Disk Array Controllers          *
   4  * Intel Corporation:  Storage RAID Controllers                         *
   5  *                                                                      *
   6  * gdth.c                                                               *
   7  * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner                 *
   8  * Copyright (C) 2002-04 Intel Corporation                              *
   9  * Copyright (C) 2003-06 Adaptec Inc.                                   *
  10  * <achim_leubner@adaptec.com>                                          *
  11  *                                                                      *
  12  * Additions/Fixes:                                                     *
  13  * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>               *
  14  * Johannes Dinner <johannes_dinner@adaptec.com>                        *
  15  *                                                                      *
  16  * This program is free software; you can redistribute it and/or modify *
  17  * it under the terms of the GNU General Public License as published    *
  18  * by the Free Software Foundation; either version 2 of the License,    *
  19  * or (at your option) any later version.                               *
  20  *                                                                      *
  21  * This program is distributed in the hope that it will be useful,      *
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of       *
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the         *
  24  * GNU General Public License for more details.                         *
  25  *                                                                      *
  26  * You should have received a copy of the GNU General Public License    *
  27  * along with this kernel; if not, write to the Free Software           *
  28  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.            *
  29  *                                                                      *
  30  * Linux kernel 2.6.x supported                                         *
  31  *                                                                      *
  32  ************************************************************************/
  33
  34 /* All GDT Disk Array Controllers are fully supported by this driver.
  35  * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
  36  * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
  37  * list of all controller types.
  38  *
  39  * If you have one or more GDT3000/3020 EISA controllers with
  40  * controller BIOS disabled, you have to set the IRQ values with the
  41  * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
  42  * the IRQ values for the EISA controllers.
  43  *
  44  * After the optional list of IRQ values, other possible
  45  * command line options are:
  46  * disable:Y                    disable driver
  47  * disable:N                    enable driver
  48  * reserve_mode:0               reserve no drives for the raw service
  49  * reserve_mode:1               reserve all not init., removable drives
  50  * reserve_mode:2               reserve all not init. drives
  51  * reserve_list:h,b,t,l,h,b,t,l,...     reserve particular drive(s) with
  52  *                              h- controller no., b- channel no.,
  53  *                              t- target ID, l- LUN
  54  * reverse_scan:Y               reverse scan order for PCI controllers
  55  * reverse_scan:N               scan PCI controllers like BIOS
  56  * max_ids:x                    x - target ID count per channel (1..MAXID)
  57  * rescan:Y                     rescan all channels/IDs
  58  * rescan:N                     use all devices found until now
  59  * hdr_channel:x                x - number of virtual bus for host drives
  60  * shared_access:Y              disable driver reserve/release protocol to
  61  *                              access a shared resource from several nodes,
  62  *                              appropriate controller firmware required
  63  * shared_access:N              enable driver reserve/release protocol
  64  * probe_eisa_isa:Y             scan for EISA/ISA controllers
  65  * probe_eisa_isa:N             do not scan for EISA/ISA controllers
  66  * force_dma32:Y                use only 32 bit DMA mode
  67  * force_dma32:N                use 64 bit DMA mode, if supported
  68  *
  69  * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
  70  *                          max_ids:127,rescan:N,hdr_channel:0,
  71  *                          shared_access:Y,probe_eisa_isa:N,force_dma32:N".
  72  * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
  73  *
  74  * When loading the gdth driver as a module, the same options are available.
  75  * You can set the IRQs with "IRQ=...". However, the syntax to specify the
  76  * options changes slightly. You must replace all ',' between options
  77  * with ' ' and all ':' with '=' and you must use
  78  * '1' in place of 'Y' and '0' in place of 'N'.
  79  *
  80  * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
  81  *           max_ids=127 rescan=0 hdr_channel=0 shared_access=0
  82  *           probe_eisa_isa=0 force_dma32=0"
  83  * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
  84  */
  85
  86 /* The meaning of the Scsi_Pointer members in this driver is as follows:
  87  * ptr:                     Chaining
  88  * this_residual:           gdth_bufflen
  89  * buffer:                  gdth_sglist
  90  * dma_handle:              unused
  91  * buffers_residual:        gdth_sg_count
  92  * Status:                  unused
  93  * Message:                 unused
  94  * have_data_in:            unused
  95  * sent_command:            unused
  96  * phase:                   unused
  97  */
  98
  99
 100 /* interrupt coalescing */
 101 /* #define INT_COAL */
 102
 103 /* statistics */
 104 #define GDTH_STATISTICS
 105
 106 #include <linux/module.h>
 107
 108 #include <linux/version.h>
 109 #include <linux/kernel.h>
 110 #include <linux/types.h>
 111 #include <linux/pci.h>
 112 #include <linux/string.h>
 113 #include <linux/ctype.h>
 114 #include <linux/ioport.h>
 115 #include <linux/delay.h>
 116 #include <linux/interrupt.h>
 117 #include <linux/in.h>
 118 #include <linux/proc_fs.h>
 119 #include <linux/time.h>
 120 #include <linux/timer.h>
 121 #include <linux/dma-mapping.h>
 122 #include <linux/list.h>
 123
 124 #ifdef GDTH_RTC
 125 #include <linux/mc146818rtc.h>
 126 #endif
 127 #include <linux/reboot.h>
 128
 129 #include <asm/dma.h>
 130 #include <asm/system.h>
 131 #include <asm/io.h>
 132 #include <asm/uaccess.h>
 133 #include <linux/spinlock.h>
 134 #include <linux/blkdev.h>
 135 #include <linux/scatterlist.h>
 136
 137 #include "scsi.h"
 138 #include <scsi/scsi_host.h>
 139 #include "gdth.h"
 140
 141 static void gdth_delay(int milliseconds);
 142 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs);
 143 static irqreturn_t gdth_interrupt(int irq, void *dev_id);
 144 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
 145                                     int gdth_from_wait, int* pIndex);
 146 static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index,
 147                                                                Scsi_Cmnd *scp);
 148 static int gdth_async_event(gdth_ha_str *ha);
 149 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
 150
 151 static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar priority);
 152 static void gdth_next(gdth_ha_str *ha);
 153 static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b);
 154 static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp);
 155 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
 156                                       ushort idx, gdth_evt_data *evt);
 157 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
 158 static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
 159                                gdth_evt_str *estr);
 160 static void gdth_clear_events(void);
 161
 162 static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp,
 163                                     char *buffer, ushort count);
 164 static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp);
 165 static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive);
 166
 167 static void gdth_enable_int(gdth_ha_str *ha);
 168 static int gdth_test_busy(gdth_ha_str *ha);
 169 static int gdth_get_cmd_index(gdth_ha_str *ha);
 170 static void gdth_release_event(gdth_ha_str *ha);
 171 static int gdth_wait(gdth_ha_str *ha, int index,ulong32 time);
 172 static int gdth_internal_cmd(gdth_ha_str *ha, unchar service, ushort opcode,
 173                                              ulong32 p1, ulong64 p2,ulong64 p3);
 174 static int gdth_search_drives(gdth_ha_str *ha);
 175 static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive);
 176
 177 static const char *gdth_ctr_name(gdth_ha_str *ha);
 178
 179 static int gdth_open(struct inode *inode, struct file *filep);
 180 static int gdth_close(struct inode *inode, struct file *filep);
 181 static int gdth_ioctl(struct inode *inode, struct file *filep,
 182                       unsigned int cmd, unsigned long arg);
 183
 184 static void gdth_flush(gdth_ha_str *ha);
 185 static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *));
 186 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp,
 187                                 struct gdth_cmndinfo *cmndinfo);
 188 static void gdth_scsi_done(struct scsi_cmnd *scp);
 189
 190 #ifdef DEBUG_GDTH
 191 static unchar   DebugState = DEBUG_GDTH;
 192
 193 #ifdef __SERIAL__
 194 #define MAX_SERBUF 160
 195 static void ser_init(void);
 196 static void ser_puts(char *str);
 197 static void ser_putc(char c);
 198 static int  ser_printk(const char *fmt, ...);
 199 static char strbuf[MAX_SERBUF+1];
 200 #ifdef __COM2__
 201 #define COM_BASE 0x2f8
 202 #else
 203 #define COM_BASE 0x3f8
 204 #endif
 205 static void ser_init()
 206 {
 207     unsigned port=COM_BASE;
 208
 209     outb(0x80,port+3);
 210     outb(0,port+1);
 211     /* 19200 Baud, if 9600: outb(12,port) */
 212     outb(6, port);
 213     outb(3,port+3);
 214     outb(0,port+1);
 215     /*
 216     ser_putc('I');
 217     ser_putc(' ');
 218     */
 219 }
 220
 221 static void ser_puts(char *str)
 222 {
 223     char *ptr;
 224
 225     ser_init();
 226     for (ptr=str;*ptr;++ptr)
 227         ser_putc(*ptr);
 228 }
 229
 230 static void ser_putc(char c)
 231 {
 232     unsigned port=COM_BASE;
 233
 234     while ((inb(port+5) & 0x20)==0);
 235     outb(c,port);
 236     if (c==0x0a)
 237     {
 238         while ((inb(port+5) & 0x20)==0);
 239         outb(0x0d,port);
 240     }
 241 }
 242
 243 static int ser_printk(const char *fmt, ...)
 244 {
 245     va_list args;
 246     int i;
 247
 248     va_start(args,fmt);
 249     i = vsprintf(strbuf,fmt,args);
 250     ser_puts(strbuf);
 251     va_end(args);
 252     return i;
 253 }
 254
 255 #define TRACE(a)    {if (DebugState==1) {ser_printk a;}}
 256 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {ser_printk a;}}
 257 #define TRACE3(a)   {if (DebugState!=0) {ser_printk a;}}
 258
 259 #else /* !__SERIAL__ */
 260 #define TRACE(a)    {if (DebugState==1) {printk a;}}
 261 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {printk a;}}
 262 #define TRACE3(a)   {if (DebugState!=0) {printk a;}}
 263 #endif
 264
 265 #else /* !DEBUG */
 266 #define TRACE(a)
 267 #define TRACE2(a)
 268 #define TRACE3(a)
 269 #endif
 270
 271 #ifdef GDTH_STATISTICS
 272 static ulong32 max_rq=0, max_index=0, max_sg=0;
 273 #ifdef INT_COAL
 274 static ulong32 max_int_coal=0;
 275 #endif
 276 static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
 277 static struct timer_list gdth_timer;
 278 #endif
 279
 280 #define PTR2USHORT(a)   (ushort)(ulong)(a)
 281 #define GDTOFFSOF(a,b)  (size_t)&(((a*)0)->b)
 282 #define INDEX_OK(i,t)   ((i)<ARRAY_SIZE(t))
 283
 284 #define BUS_L2P(a,b)    ((b)>(a)->virt_bus ? (b-1):(b))
 285
 286 #ifdef CONFIG_ISA
 287 static unchar   gdth_drq_tab[4] = {5,6,7,7};            /* DRQ table */
 288 #endif
 289 #if defined(CONFIG_EISA) || defined(CONFIG_ISA)
 290 static unchar   gdth_irq_tab[6] = {0,10,11,12,14,0};    /* IRQ table */
 291 #endif
 292 static unchar   gdth_polling;                           /* polling if TRUE */
 293 static int      gdth_ctr_count  = 0;                    /* controller count */
 294 static LIST_HEAD(gdth_instances);                       /* controller list */
 295 static unchar   gdth_write_through = FALSE;             /* write through */
 296 static gdth_evt_str ebuffer[MAX_EVENTS];                /* event buffer */
 297 static int elastidx;
 298 static int eoldidx;
 299 static int major;
 300
 301 #define DIN     1                               /* IN data direction */
 302 #define DOU     2                               /* OUT data direction */
 303 #define DNO     DIN                             /* no data transfer */
 304 #define DUN     DIN                             /* unknown data direction */
 305 static unchar gdth_direction_tab[0x100] = {
 306     DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
 307     DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
 308     DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
 309     DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
 310     DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
 311     DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
 312     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 313     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 314     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 315     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
 316     DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
 317     DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 318     DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 319     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 320     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 321     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
 322 };
 323
 324 /* LILO and modprobe/insmod parameters */
 325 /* IRQ list for GDT3000/3020 EISA controllers */
 326 static int irq[MAXHA] __initdata =
 327 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 328  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 329 /* disable driver flag */
 330 static int disable __initdata = 0;
 331 /* reserve flag */
 332 static int reserve_mode = 1;
 333 /* reserve list */
 334 static int reserve_list[MAX_RES_ARGS] =
 335 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 336  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 337  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 338 /* scan order for PCI controllers */
 339 static int reverse_scan = 0;
 340 /* virtual channel for the host drives */
 341 static int hdr_channel = 0;
 342 /* max. IDs per channel */
 343 static int max_ids = MAXID;
 344 /* rescan all IDs */
 345 static int rescan = 0;
 346 /* shared access */
 347 static int shared_access = 1;
 348 /* enable support for EISA and ISA controllers */
 349 static int probe_eisa_isa = 0;
 350 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
 351 static int force_dma32 = 0;
 352
 353 /* parameters for modprobe/insmod */
 354 module_param_array(irq, int, NULL, 0);
 355 module_param(disable, int, 0);
 356 module_param(reserve_mode, int, 0);
 357 module_param_array(reserve_list, int, NULL, 0);
 358 module_param(reverse_scan, int, 0);
 359 module_param(hdr_channel, int, 0);
 360 module_param(max_ids, int, 0);
 361 module_param(rescan, int, 0);
 362 module_param(shared_access, int, 0);
 363 module_param(probe_eisa_isa, int, 0);
 364 module_param(force_dma32, int, 0);
 365 MODULE_AUTHOR("Achim Leubner");
 366 MODULE_LICENSE("GPL");
 367
 368 /* ioctl interface */
 369 static const struct file_operations gdth_fops = {
 370     .ioctl   = gdth_ioctl,
 371     .open    = gdth_open,
 372     .release = gdth_close,
 373 };
 374
 375 /*
 376  * gdth scsi_command access wrappers.
 377  *   below 6 functions are used throughout the driver to access scsi_command's
 378  *   io parameters. The reason we do not use the regular accessors from
 379  *   scsi_cmnd.h is because of gdth_execute(). Since it is unrecommended for
 380  *   llds to directly set scsi_cmnd's IO members. This driver will use SCp
 381  *   members for IO parameters, and will copy scsi_cmnd's members to Scp
 382  *   members in queuecommand. For internal commands through gdth_execute()
 383  *   SCp's members will be set directly.
 384  */
 385 static inline unsigned gdth_bufflen(struct scsi_cmnd *cmd)
 386 {
 387         return (unsigned)cmd->SCp.this_residual;
 388 }
 389
 390 static inline void gdth_set_bufflen(struct scsi_cmnd *cmd, unsigned bufflen)
 391 {
 392         cmd->SCp.this_residual = bufflen;
 393 }
 394
 395 static inline unsigned gdth_sg_count(struct scsi_cmnd *cmd)
 396 {
 397         return (unsigned)cmd->SCp.buffers_residual;
 398 }
 399
 400 static inline void gdth_set_sg_count(struct scsi_cmnd *cmd, unsigned sg_count)
 401 {
 402         cmd->SCp.buffers_residual = sg_count;
 403 }
 404
 405 static inline struct scatterlist *gdth_sglist(struct scsi_cmnd *cmd)
 406 {
 407         return cmd->SCp.buffer;
 408 }
 409
 410 static inline void gdth_set_sglist(struct scsi_cmnd *cmd,
 411                                    struct scatterlist *sglist)
 412 {
 413         cmd->SCp.buffer = sglist;
 414 }
 415
 416 #include "gdth_proc.h"
 417 #include "gdth_proc.c"
 418
 419 static gdth_ha_str *gdth_find_ha(int hanum)
 420 {
 421         gdth_ha_str *ha;
 422
 423         list_for_each_entry(ha, &gdth_instances, list)
 424                 if (hanum == ha->hanum)
 425                         return ha;
 426
 427         return NULL;
 428 }
 429
 430 static struct gdth_cmndinfo *gdth_get_cmndinfo(gdth_ha_str *ha)
 431 {
 432         struct gdth_cmndinfo *priv = NULL;
 433         ulong flags;
 434         int i;
 435
 436         spin_lock_irqsave(&ha->smp_lock, flags);
 437
 438         for (i=0; i<GDTH_MAXCMDS; ++i) {
 439                 if (ha->cmndinfo[i].index == 0) {
 440                         priv = &ha->cmndinfo[i];
 441                         memset(priv, 0, sizeof(*priv));
 442                         priv->index = i+1;
 443                         break;
 444                 }
 445         }
 446
 447         spin_unlock_irqrestore(&ha->smp_lock, flags);
 448
 449         return priv;
 450 }
 451
 452 static void gdth_put_cmndinfo(struct gdth_cmndinfo *priv)
 453 {
 454         BUG_ON(!priv);
 455         priv->index = 0;
 456 }
 457
 458 static void gdth_delay(int milliseconds)
 459 {
 460     if (milliseconds == 0) {
 461         udelay(1);
 462     } else {
 463         mdelay(milliseconds);
 464     }
 465 }
 466
 467 static void gdth_scsi_done(struct scsi_cmnd *scp)
 468 {
 469         struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
 470         int internal_command = cmndinfo->internal_command;
 471
 472         TRACE2(("gdth_scsi_done()\n"));
 473
 474         gdth_put_cmndinfo(cmndinfo);
 475         scp->host_scribble = NULL;
 476
 477         if (internal_command)
 478                 complete((struct completion *)scp->request);
 479         else
 480                 scp->scsi_done(scp);
 481 }
 482
 483 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
 484                    int timeout, u32 *info)
 485 {
 486     gdth_ha_str *ha = shost_priv(sdev->host);
 487     Scsi_Cmnd *scp;
 488     struct gdth_cmndinfo cmndinfo;
 489     DECLARE_COMPLETION_ONSTACK(wait);
 490     int rval;
 491
 492     scp = kzalloc(sizeof(*scp), GFP_KERNEL);
 493     if (!scp)
 494         return -ENOMEM;
 495
 496     scp->sense_buffer = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
 497     if (!scp->sense_buffer) {
 498         kfree(scp);
 499         return -ENOMEM;
 500     }
 501
 502     scp->device = sdev;
 503     memset(&cmndinfo, 0, sizeof(cmndinfo));
 504
 505     /* use request field to save the ptr. to completion struct. */
 506     scp->request = (struct request *)&wait;
 507     scp->timeout_per_command = timeout*HZ;
 508     scp->cmd_len = 12;
 509     memcpy(scp->cmnd, cmnd, 12);
 510     cmndinfo.priority = IOCTL_PRI;
 511     cmndinfo.internal_cmd_str = gdtcmd;
 512     cmndinfo.internal_command = 1;
 513
 514     TRACE(("__gdth_execute() cmd 0x%x\n", scp->cmnd[0]));
 515     __gdth_queuecommand(ha, scp, &cmndinfo);
 516
 517     wait_for_completion(&wait);
 518
 519     rval = cmndinfo.status;
 520     if (info)
 521         *info = cmndinfo.info;
 522     kfree(scp->sense_buffer);
 523     kfree(scp);
 524     return rval;
 525 }
 526
 527 int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
 528                  int timeout, u32 *info)
 529 {
 530     struct scsi_device *sdev = scsi_get_host_dev(shost);
 531     int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info);
 532
 533     scsi_free_host_dev(sdev);
 534     return rval;
 535 }
 536
 537 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs)
 538 {
 539     *cyls = size /HEADS/SECS;
 540     if (*cyls <= MAXCYLS) {
 541         *heads = HEADS;
 542         *secs = SECS;
 543     } else {                                        /* too high for 64*32 */
 544         *cyls = size /MEDHEADS/MEDSECS;
 545         if (*cyls <= MAXCYLS) {
 546             *heads = MEDHEADS;
 547             *secs = MEDSECS;
 548         } else {                                    /* too high for 127*63 */
 549             *cyls = size /BIGHEADS/BIGSECS;
 550             *heads = BIGHEADS;
 551             *secs = BIGSECS;
 552         }
 553     }
 554 }
 555
 556 /* controller search and initialization functions */
 557 #ifdef CONFIG_EISA
 558 static int __init gdth_search_eisa(ushort eisa_adr)
 559 {
 560     ulong32 id;
 561
 562     TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
 563     id = inl(eisa_adr+ID0REG);
 564     if (id == GDT3A_ID || id == GDT3B_ID) {     /* GDT3000A or GDT3000B */
 565         if ((inb(eisa_adr+EISAREG) & 8) == 0)
 566             return 0;                           /* not EISA configured */
 567         return 1;
 568     }
 569     if (id == GDT3_ID)                          /* GDT3000 */
 570         return 1;
 571
 572     return 0;
 573 }
 574 #endif /* CONFIG_EISA */
 575
 576 #ifdef CONFIG_ISA
 577 static int __init gdth_search_isa(ulong32 bios_adr)
 578 {
 579     void __iomem *addr;
 580     ulong32 id;
 581
 582     TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
 583     if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
 584         id = readl(addr);
 585         iounmap(addr);
 586         if (id == GDT2_ID)                          /* GDT2000 */
 587             return 1;
 588     }
 589     return 0;
 590 }
 591 #endif /* CONFIG_ISA */
 592
 593 #ifdef CONFIG_PCI
 594 static bool gdth_pci_registered;
 595
 596 static bool gdth_search_vortex(ushort device)
 597 {
 598         if (device <= PCI_DEVICE_ID_VORTEX_GDT6555)
 599                 return true;
 600         if (device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP &&
 601             device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP)
 602                 return true;
 603         if (device == PCI_DEVICE_ID_VORTEX_GDTNEWRX ||
 604             device == PCI_DEVICE_ID_VORTEX_GDTNEWRX2)
 605                 return true;
 606         return false;
 607 }
 608
 609 static int gdth_pci_probe_one(gdth_pci_str *pcistr, gdth_ha_str **ha_out);
 610 static int gdth_pci_init_one(struct pci_dev *pdev,
 611                              const struct pci_device_id *ent);
 612 static void gdth_pci_remove_one(struct pci_dev *pdev);
 613 static void gdth_remove_one(gdth_ha_str *ha);
 614
 615 /* Vortex only makes RAID controllers.
 616  * We do not really want to specify all 550 ids here, so wildcard match.
 617  */
 618 static const struct pci_device_id gdthtable[] = {
 619         { PCI_VDEVICE(VORTEX, PCI_ANY_ID) },
 620         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC) },
 621         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC_XSCALE) },
 622         { }     /* terminate list */
 623 };
 624 MODULE_DEVICE_TABLE(pci, gdthtable);
 625
 626 static struct pci_driver gdth_pci_driver = {
 627         .name           = "gdth",
 628         .id_table       = gdthtable,
 629         .probe          = gdth_pci_init_one,
 630         .remove         = gdth_pci_remove_one,
 631 };
 632
 633 static void gdth_pci_remove_one(struct pci_dev *pdev)
 634 {
 635         gdth_ha_str *ha = pci_get_drvdata(pdev);
 636
 637         pci_set_drvdata(pdev, NULL);
 638
 639         list_del(&ha->list);
 640         gdth_remove_one(ha);
 641
 642         pci_disable_device(pdev);
 643 }
 644
 645 static int gdth_pci_init_one(struct pci_dev *pdev,
 646                                        const struct pci_device_id *ent)
 647 {
 648         ushort vendor = pdev->vendor;
 649         ushort device = pdev->device;
 650         ulong base0, base1, base2;
 651         int rc;
 652         gdth_pci_str gdth_pcistr;
 653         gdth_ha_str *ha = NULL;
 654
 655         TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
 656                gdth_ctr_count, vendor, device));
 657
 658         memset(&gdth_pcistr, 0, sizeof(gdth_pcistr));
 659
 660         if (vendor == PCI_VENDOR_ID_VORTEX && !gdth_search_vortex(device))
 661                 return -ENODEV;
 662
 663         rc = pci_enable_device(pdev);
 664         if (rc)
 665                 return rc;
 666
 667         if (gdth_ctr_count >= MAXHA)
 668                 return -EBUSY;
 669
 670         /* GDT PCI controller found, resources are already in pdev */
 671         gdth_pcistr.pdev = pdev;
 672         base0 = pci_resource_flags(pdev, 0);
 673         base1 = pci_resource_flags(pdev, 1);
 674         base2 = pci_resource_flags(pdev, 2);
 675         if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B ||   /* GDT6000/B */
 676             device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) {  /* MPR */
 677             if (!(base0 & IORESOURCE_MEM))
 678                 return -ENODEV;
 679             gdth_pcistr.dpmem = pci_resource_start(pdev, 0);
 680         } else {                                  /* GDT6110, GDT6120, .. */
 681             if (!(base0 & IORESOURCE_MEM) ||
 682                 !(base2 & IORESOURCE_MEM) ||
 683                 !(base1 & IORESOURCE_IO))
 684                 return -ENODEV;
 685             gdth_pcistr.dpmem = pci_resource_start(pdev, 2);
 686             gdth_pcistr.io    = pci_resource_start(pdev, 1);
 687         }
 688         TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
 689                 gdth_pcistr.pdev->bus->number,
 690                 PCI_SLOT(gdth_pcistr.pdev->devfn),
 691                 gdth_pcistr.irq,
 692                 gdth_pcistr.dpmem));
 693
 694         rc = gdth_pci_probe_one(&gdth_pcistr, &ha);
 695         if (rc)
 696                 return rc;
 697
 698         return 0;
 699 }
 700 #endif /* CONFIG_PCI */
 701
 702 #ifdef CONFIG_EISA
 703 static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
 704 {
 705     ulong32 retries,id;
 706     unchar prot_ver,eisacf,i,irq_found;
 707
 708     TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
 709
 710     /* disable board interrupts, deinitialize services */
 711     outb(0xff,eisa_adr+EDOORREG);
 712     outb(0x00,eisa_adr+EDENABREG);
 713     outb(0x00,eisa_adr+EINTENABREG);
 714
 715     outb(0xff,eisa_adr+LDOORREG);
 716     retries = INIT_RETRIES;
 717     gdth_delay(20);
 718     while (inb(eisa_adr+EDOORREG) != 0xff) {
 719         if (--retries == 0) {
 720             printk("GDT-EISA: Initialization error (DEINIT failed)\n");
 721             return 0;
 722         }
 723         gdth_delay(1);
 724         TRACE2(("wait for DEINIT: retries=%d\n",retries));
 725     }
 726     prot_ver = inb(eisa_adr+MAILBOXREG);
 727     outb(0xff,eisa_adr+EDOORREG);
 728     if (prot_ver != PROTOCOL_VERSION) {
 729         printk("GDT-EISA: Illegal protocol version\n");
 730         return 0;
 731     }
 732     ha->bmic = eisa_adr;
 733     ha->brd_phys = (ulong32)eisa_adr >> 12;
 734
 735     outl(0,eisa_adr+MAILBOXREG);
 736     outl(0,eisa_adr+MAILBOXREG+4);
 737     outl(0,eisa_adr+MAILBOXREG+8);
 738     outl(0,eisa_adr+MAILBOXREG+12);
 739
 740     /* detect IRQ */
 741     if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
 742         ha->oem_id = OEM_ID_ICP;
 743         ha->type = GDT_EISA;
 744         ha->stype = id;
 745         outl(1,eisa_adr+MAILBOXREG+8);
 746         outb(0xfe,eisa_adr+LDOORREG);
 747         retries = INIT_RETRIES;
 748         gdth_delay(20);
 749         while (inb(eisa_adr+EDOORREG) != 0xfe) {
 750             if (--retries == 0) {
 751                 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
 752                 return 0;
 753             }
 754             gdth_delay(1);
 755         }
 756         ha->irq = inb(eisa_adr+MAILBOXREG);
 757         outb(0xff,eisa_adr+EDOORREG);
 758         TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
 759         /* check the result */
 760         if (ha->irq == 0) {
 761                 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
 762                 for (i = 0, irq_found = FALSE;
 763                      i < MAXHA && irq[i] != 0xff; ++i) {
 764                 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
 765                     irq_found = TRUE;
 766                     break;
 767                 }
 768                 }
 769             if (irq_found) {
 770                 ha->irq = irq[i];
 771                 irq[i] = 0;
 772                 printk("GDT-EISA: Can not detect controller IRQ,\n");
 773                 printk("Use IRQ setting from command line (IRQ = %d)\n",
 774                        ha->irq);
 775             } else {
 776                 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
 777                 printk("the controller BIOS or use command line parameters\n");
 778                 return 0;
 779             }
 780         }
 781     } else {
 782         eisacf = inb(eisa_adr+EISAREG) & 7;
 783         if (eisacf > 4)                         /* level triggered */
 784             eisacf -= 4;
 785         ha->irq = gdth_irq_tab[eisacf];
 786         ha->oem_id = OEM_ID_ICP;
 787         ha->type = GDT_EISA;
 788         ha->stype = id;
 789     }
 790
 791     ha->dma64_support = 0;
 792     return 1;
 793 }
 794 #endif /* CONFIG_EISA */
 795
 796 #ifdef CONFIG_ISA
 797 static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
 798 {
 799     register gdt2_dpram_str __iomem *dp2_ptr;
 800     int i;
 801     unchar irq_drq,prot_ver;
 802     ulong32 retries;
 803
 804     TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
 805
 806     ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
 807     if (ha->brd == NULL) {
 808         printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
 809         return 0;
 810     }
 811     dp2_ptr = ha->brd;
 812     writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
 813     /* reset interface area */
 814     memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
 815     if (readl(&dp2_ptr->u) != 0) {
 816         printk("GDT-ISA: Initialization error (DPMEM write error)\n");
 817         iounmap(ha->brd);
 818         return 0;
 819     }
 820
 821     /* disable board interrupts, read DRQ and IRQ */
 822     writeb(0xff, &dp2_ptr->io.irqdel);
 823     writeb(0x00, &dp2_ptr->io.irqen);
 824     writeb(0x00, &dp2_ptr->u.ic.S_Status);
 825     writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
 826
 827     irq_drq = readb(&dp2_ptr->io.rq);
 828     for (i=0; i<3; ++i) {
 829         if ((irq_drq & 1)==0)
 830             break;
 831         irq_drq >>= 1;
 832     }
 833     ha->drq = gdth_drq_tab[i];
 834
 835     irq_drq = readb(&dp2_ptr->io.rq) >> 3;
 836     for (i=1; i<5; ++i) {
 837         if ((irq_drq & 1)==0)
 838             break;
 839         irq_drq >>= 1;
 840     }
 841     ha->irq = gdth_irq_tab[i];
 842
 843     /* deinitialize services */
 844     writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
 845     writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
 846     writeb(0, &dp2_ptr->io.event);
 847     retries = INIT_RETRIES;
 848     gdth_delay(20);
 849     while (readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
 850         if (--retries == 0) {
 851             printk("GDT-ISA: Initialization error (DEINIT failed)\n");
 852             iounmap(ha->brd);
 853             return 0;
 854         }
 855         gdth_delay(1);
 856     }
 857     prot_ver = (unchar)readl(&dp2_ptr->u.ic.S_Info[0]);
 858     writeb(0, &dp2_ptr->u.ic.Status);
 859     writeb(0xff, &dp2_ptr->io.irqdel);
 860     if (prot_ver != PROTOCOL_VERSION) {
 861         printk("GDT-ISA: Illegal protocol version\n");
 862         iounmap(ha->brd);
 863         return 0;
 864     }
 865
 866     ha->oem_id = OEM_ID_ICP;
 867     ha->type = GDT_ISA;
 868     ha->ic_all_size = sizeof(dp2_ptr->u);
 869     ha->stype= GDT2_ID;
 870     ha->brd_phys = bios_adr >> 4;
 871
 872     /* special request to controller BIOS */
 873     writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
 874     writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
 875     writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
 876     writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
 877     writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
 878     writeb(0, &dp2_ptr->io.event);
 879     retries = INIT_RETRIES;
 880     gdth_delay(20);
 881     while (readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
 882         if (--retries == 0) {
 883             printk("GDT-ISA: Initialization error\n");
 884             iounmap(ha->brd);
 885             return 0;
 886         }
 887         gdth_delay(1);
 888     }
 889     writeb(0, &dp2_ptr->u.ic.Status);
 890     writeb(0xff, &dp2_ptr->io.irqdel);
 891
 892     ha->dma64_support = 0;
 893     return 1;
 894 }
 895 #endif /* CONFIG_ISA */
 896
 897 #ifdef CONFIG_PCI
 898 static int gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
 899                                    gdth_ha_str *ha)
 900 {
 901     register gdt6_dpram_str __iomem *dp6_ptr;
 902     register gdt6c_dpram_str __iomem *dp6c_ptr;
 903     register gdt6m_dpram_str __iomem *dp6m_ptr;
 904     ulong32 retries;
 905     unchar prot_ver;
 906     ushort command;
 907     int i, found = FALSE;
 908
 909     TRACE(("gdth_init_pci()\n"));
 910
 911     if (pdev->vendor == PCI_VENDOR_ID_INTEL)
 912         ha->oem_id = OEM_ID_INTEL;
 913     else
 914         ha->oem_id = OEM_ID_ICP;
 915     ha->brd_phys = (pdev->bus->number << 8) | (pdev->devfn & 0xf8);
 916     ha->stype = (ulong32)pdev->device;
 917     ha->irq = pdev->irq;
 918     ha->pdev = pdev;
 919
 920     if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) {  /* GDT6000/B */
 921         TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
 922         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
 923         if (ha->brd == NULL) {
 924             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 925             return 0;
 926         }
 927         /* check and reset interface area */
 928         dp6_ptr = ha->brd;
 929         writel(DPMEM_MAGIC, &dp6_ptr->u);
 930         if (readl(&dp6_ptr->u) != DPMEM_MAGIC) {
 931             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
 932                    pcistr->dpmem);
 933             found = FALSE;
 934             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
 935                 iounmap(ha->brd);
 936                 ha->brd = ioremap(i, sizeof(ushort));
 937                 if (ha->brd == NULL) {
 938                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 939                     return 0;
 940                 }
 941                 if (readw(ha->brd) != 0xffff) {
 942                     TRACE2(("init_pci_old() address 0x%x busy\n", i));
 943                     continue;
 944                 }
 945                 iounmap(ha->brd);
 946                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i);
 947                 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
 948                 if (ha->brd == NULL) {
 949                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 950                     return 0;
 951                 }
 952                 dp6_ptr = ha->brd;
 953                 writel(DPMEM_MAGIC, &dp6_ptr->u);
 954                 if (readl(&dp6_ptr->u) == DPMEM_MAGIC) {
 955                     printk("GDT-PCI: Use free address at 0x%x\n", i);
 956                     found = TRUE;
 957                     break;
 958                 }
 959             }
 960             if (!found) {
 961                 printk("GDT-PCI: No free address found!\n");
 962                 iounmap(ha->brd);
 963                 return 0;
 964             }
 965         }
 966         memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
 967         if (readl(&dp6_ptr->u) != 0) {
 968             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
 969             iounmap(ha->brd);
 970             return 0;
 971         }
 972
 973         /* disable board interrupts, deinit services */
 974         writeb(0xff, &dp6_ptr->io.irqdel);
 975         writeb(0x00, &dp6_ptr->io.irqen);
 976         writeb(0x00, &dp6_ptr->u.ic.S_Status);
 977         writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
 978
 979         writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
 980         writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
 981         writeb(0, &dp6_ptr->io.event);
 982         retries = INIT_RETRIES;
 983         gdth_delay(20);
 984         while (readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
 985             if (--retries == 0) {
 986                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
 987                 iounmap(ha->brd);
 988                 return 0;
 989             }
 990             gdth_delay(1);
 991         }
 992         prot_ver = (unchar)readl(&dp6_ptr->u.ic.S_Info[0]);
 993         writeb(0, &dp6_ptr->u.ic.S_Status);
 994         writeb(0xff, &dp6_ptr->io.irqdel);
 995         if (prot_ver != PROTOCOL_VERSION) {
 996             printk("GDT-PCI: Illegal protocol version\n");
 997             iounmap(ha->brd);
 998             return 0;
 999         }
1000
1001         ha->type = GDT_PCI;
1002         ha->ic_all_size = sizeof(dp6_ptr->u);
1003
1004         /* special command to controller BIOS */
1005         writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
1006         writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
1007         writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
1008         writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
1009         writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
1010         writeb(0, &dp6_ptr->io.event);
1011         retries = INIT_RETRIES;
1012         gdth_delay(20);
1013         while (readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
1014             if (--retries == 0) {
1015                 printk("GDT-PCI: Initialization error\n");
1016                 iounmap(ha->brd);
1017                 return 0;
1018             }
1019             gdth_delay(1);
1020         }
1021         writeb(0, &dp6_ptr->u.ic.S_Status);
1022         writeb(0xff, &dp6_ptr->io.irqdel);
1023
1024         ha->dma64_support = 0;
1025
1026     } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
1027         ha->plx = (gdt6c_plx_regs *)pcistr->io;
1028         TRACE2(("init_pci_new() dpmem %lx irq %d\n",
1029             pcistr->dpmem,ha->irq));
1030         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
1031         if (ha->brd == NULL) {
1032             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1033             iounmap(ha->brd);
1034             return 0;
1035         }
1036         /* check and reset interface area */
1037         dp6c_ptr = ha->brd;
1038         writel(DPMEM_MAGIC, &dp6c_ptr->u);
1039         if (readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
1040             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1041                    pcistr->dpmem);
1042             found = FALSE;
1043             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1044                 iounmap(ha->brd);
1045                 ha->brd = ioremap(i, sizeof(ushort));
1046                 if (ha->brd == NULL) {
1047                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1048                     return 0;
1049                 }
1050                 if (readw(ha->brd) != 0xffff) {
1051                     TRACE2(("init_pci_plx() address 0x%x busy\n", i));
1052                     continue;
1053                 }
1054                 iounmap(ha->brd);
1055                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_2, i);
1056                 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
1057                 if (ha->brd == NULL) {
1058                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1059                     return 0;
1060                 }
1061                 dp6c_ptr = ha->brd;
1062                 writel(DPMEM_MAGIC, &dp6c_ptr->u);
1063                 if (readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1064                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1065                     found = TRUE;
1066                     break;
1067                 }
1068             }
1069             if (!found) {
1070                 printk("GDT-PCI: No free address found!\n");
1071                 iounmap(ha->brd);
1072                 return 0;
1073             }
1074         }
1075         memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1076         if (readl(&dp6c_ptr->u) != 0) {
1077             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1078             iounmap(ha->brd);
1079             return 0;
1080         }
1081
1082         /* disable board interrupts, deinit services */
1083         outb(0x00,PTR2USHORT(&ha->plx->control1));
1084         outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1085
1086         writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1087         writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1088
1089         writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1090         writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1091
1092         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1093
1094         retries = INIT_RETRIES;
1095         gdth_delay(20);
1096         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1097             if (--retries == 0) {
1098                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1099                 iounmap(ha->brd);
1100                 return 0;
1101             }
1102             gdth_delay(1);
1103         }
1104         prot_ver = (unchar)readl(&dp6c_ptr->u.ic.S_Info[0]);
1105         writeb(0, &dp6c_ptr->u.ic.Status);
1106         if (prot_ver != PROTOCOL_VERSION) {
1107             printk("GDT-PCI: Illegal protocol version\n");
1108             iounmap(ha->brd);
1109             return 0;
1110         }
1111
1112         ha->type = GDT_PCINEW;
1113         ha->ic_all_size = sizeof(dp6c_ptr->u);
1114
1115         /* special command to controller BIOS */
1116         writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1117         writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1118         writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1119         writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1120         writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1121
1122         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1123
1124         retries = INIT_RETRIES;
1125         gdth_delay(20);
1126         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1127             if (--retries == 0) {
1128                 printk("GDT-PCI: Initialization error\n");
1129                 iounmap(ha->brd);
1130                 return 0;
1131             }
1132             gdth_delay(1);
1133         }
1134         writeb(0, &dp6c_ptr->u.ic.S_Status);
1135
1136         ha->dma64_support = 0;
1137
1138     } else {                                            /* MPR */
1139         TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1140         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1141         if (ha->brd == NULL) {
1142             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1143             return 0;
1144         }
1145
1146         /* manipulate config. space to enable DPMEM, start RP controller */
1147         pci_read_config_word(pdev, PCI_COMMAND, &command);
1148         command |= 6;
1149         pci_write_config_word(pdev, PCI_COMMAND, command);
1150         if (pci_resource_start(pdev, 8) == 1UL)
1151             pci_resource_start(pdev, 8) = 0UL;
1152         i = 0xFEFF0001UL;
1153         pci_write_config_dword(pdev, PCI_ROM_ADDRESS, i);
1154         gdth_delay(1);
1155         pci_write_config_dword(pdev, PCI_ROM_ADDRESS,
1156                                pci_resource_start(pdev, 8));
1157
1158         dp6m_ptr = ha->brd;
1159
1160         /* Ensure that it is safe to access the non HW portions of DPMEM.
1161          * Aditional check needed for Xscale based RAID controllers */
1162         while( ((int)readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1163             gdth_delay(1);
1164
1165         /* check and reset interface area */
1166         writel(DPMEM_MAGIC, &dp6m_ptr->u);
1167         if (readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1168             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1169                    pcistr->dpmem);
1170             found = FALSE;
1171             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1172                 iounmap(ha->brd);
1173                 ha->brd = ioremap(i, sizeof(ushort));
1174                 if (ha->brd == NULL) {
1175                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1176                     return 0;
1177                 }
1178                 if (readw(ha->brd) != 0xffff) {
1179                     TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1180                     continue;
1181                 }
1182                 iounmap(ha->brd);
1183                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i);
1184                 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1185                 if (ha->brd == NULL) {
1186                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1187                     return 0;
1188                 }
1189                 dp6m_ptr = ha->brd;
1190                 writel(DPMEM_MAGIC, &dp6m_ptr->u);
1191                 if (readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1192                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1193                     found = TRUE;
1194                     break;
1195                 }
1196             }
1197             if (!found) {
1198                 printk("GDT-PCI: No free address found!\n");
1199                 iounmap(ha->brd);
1200                 return 0;
1201             }
1202         }
1203         memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1204
1205         /* disable board interrupts, deinit services */
1206         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1207                     &dp6m_ptr->i960r.edoor_en_reg);
1208         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1209         writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1210         writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1211
1212         writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1213         writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1214         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1215         retries = INIT_RETRIES;
1216         gdth_delay(20);
1217         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1218             if (--retries == 0) {
1219                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1220                 iounmap(ha->brd);
1221                 return 0;
1222             }
1223             gdth_delay(1);
1224         }
1225         prot_ver = (unchar)readl(&dp6m_ptr->u.ic.S_Info[0]);
1226         writeb(0, &dp6m_ptr->u.ic.S_Status);
1227         if (prot_ver != PROTOCOL_VERSION) {
1228             printk("GDT-PCI: Illegal protocol version\n");
1229             iounmap(ha->brd);
1230             return 0;
1231         }
1232
1233         ha->type = GDT_PCIMPR;
1234         ha->ic_all_size = sizeof(dp6m_ptr->u);
1235
1236         /* special command to controller BIOS */
1237         writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1238         writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1239         writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1240         writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1241         writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1242         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1243         retries = INIT_RETRIES;
1244         gdth_delay(20);
1245         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1246             if (--retries == 0) {
1247                 printk("GDT-PCI: Initialization error\n");
1248                 iounmap(ha->brd);
1249                 return 0;
1250             }
1251             gdth_delay(1);
1252         }
1253         writeb(0, &dp6m_ptr->u.ic.S_Status);
1254
1255         /* read FW version to detect 64-bit DMA support */
1256         writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1257         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1258         retries = INIT_RETRIES;
1259         gdth_delay(20);
1260         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1261             if (--retries == 0) {
1262                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1263                 iounmap(ha->brd);
1264                 return 0;
1265             }
1266             gdth_delay(1);
1267         }
1268         prot_ver = (unchar)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1269         writeb(0, &dp6m_ptr->u.ic.S_Status);
1270         if (prot_ver < 0x2b)      /* FW < x.43: no 64-bit DMA support */
1271             ha->dma64_support = 0;
1272         else
1273             ha->dma64_support = 1;
1274     }
1275
1276     return 1;
1277 }
1278 #endif /* CONFIG_PCI */
1279
1280 /* controller protocol functions */
1281
1282 static void __init gdth_enable_int(gdth_ha_str *ha)
1283 {
1284     ulong flags;
1285     gdt2_dpram_str __iomem *dp2_ptr;
1286     gdt6_dpram_str __iomem *dp6_ptr;
1287     gdt6m_dpram_str __iomem *dp6m_ptr;
1288
1289     TRACE(("gdth_enable_int() hanum %d\n",ha->hanum));
1290     spin_lock_irqsave(&ha->smp_lock, flags);
1291
1292     if (ha->type == GDT_EISA) {
1293         outb(0xff, ha->bmic + EDOORREG);
1294         outb(0xff, ha->bmic + EDENABREG);
1295         outb(0x01, ha->bmic + EINTENABREG);
1296     } else if (ha->type == GDT_ISA) {
1297         dp2_ptr = ha->brd;
1298         writeb(1, &dp2_ptr->io.irqdel);
1299         writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1300         writeb(1, &dp2_ptr->io.irqen);
1301     } else if (ha->type == GDT_PCI) {
1302         dp6_ptr = ha->brd;
1303         writeb(1, &dp6_ptr->io.irqdel);
1304         writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1305         writeb(1, &dp6_ptr->io.irqen);
1306     } else if (ha->type == GDT_PCINEW) {
1307         outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1308         outb(0x03, PTR2USHORT(&ha->plx->control1));
1309     } else if (ha->type == GDT_PCIMPR) {
1310         dp6m_ptr = ha->brd;
1311         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1312         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1313                     &dp6m_ptr->i960r.edoor_en_reg);
1314     }
1315     spin_unlock_irqrestore(&ha->smp_lock, flags);
1316 }
1317
1318 /* return IStatus if interrupt was from this card else 0 */
1319 static unchar gdth_get_status(gdth_ha_str *ha)
1320 {
1321     unchar IStatus = 0;
1322
1323     TRACE(("gdth_get_status() irq %d ctr_count %d\n", ha->irq, gdth_ctr_count));
1324
1325         if (ha->type == GDT_EISA)
1326             IStatus = inb((ushort)ha->bmic + EDOORREG);
1327         else if (ha->type == GDT_ISA)
1328             IStatus =
1329                 readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1330         else if (ha->type == GDT_PCI)
1331             IStatus =
1332                 readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1333         else if (ha->type == GDT_PCINEW)
1334             IStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1335         else if (ha->type == GDT_PCIMPR)
1336             IStatus =
1337                 readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1338
1339         return IStatus;
1340 }
1341
1342 static int gdth_test_busy(gdth_ha_str *ha)
1343 {
1344     register int gdtsema0 = 0;
1345
1346     TRACE(("gdth_test_busy() hanum %d\n", ha->hanum));
1347
1348     if (ha->type == GDT_EISA)
1349         gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1350     else if (ha->type == GDT_ISA)
1351         gdtsema0 = (int)readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1352     else if (ha->type == GDT_PCI)
1353         gdtsema0 = (int)readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1354     else if (ha->type == GDT_PCINEW)
1355         gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1356     else if (ha->type == GDT_PCIMPR)
1357         gdtsema0 =
1358             (int)readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1359
1360     return (gdtsema0 & 1);
1361 }
1362
1363
1364 static int gdth_get_cmd_index(gdth_ha_str *ha)
1365 {
1366     int i;
1367
1368     TRACE(("gdth_get_cmd_index() hanum %d\n", ha->hanum));
1369
1370     for (i=0; i<GDTH_MAXCMDS; ++i) {
1371         if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1372             ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1373             ha->cmd_tab[i].service = ha->pccb->Service;
1374             ha->pccb->CommandIndex = (ulong32)i+2;
1375             return (i+2);
1376         }
1377     }
1378     return 0;
1379 }
1380
1381
1382 static void gdth_set_sema0(gdth_ha_str *ha)
1383 {
1384     TRACE(("gdth_set_sema0() hanum %d\n", ha->hanum));
1385
1386     if (ha->type == GDT_EISA) {
1387         outb(1, ha->bmic + SEMA0REG);
1388     } else if (ha->type == GDT_ISA) {
1389         writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1390     } else if (ha->type == GDT_PCI) {
1391         writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1392     } else if (ha->type == GDT_PCINEW) {
1393         outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1394     } else if (ha->type == GDT_PCIMPR) {
1395         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1396     }
1397 }
1398
1399
1400 static void gdth_copy_command(gdth_ha_str *ha)
1401 {
1402     register gdth_cmd_str *cmd_ptr;
1403     register gdt6m_dpram_str __iomem *dp6m_ptr;
1404     register gdt6c_dpram_str __iomem *dp6c_ptr;
1405     gdt6_dpram_str __iomem *dp6_ptr;
1406     gdt2_dpram_str __iomem *dp2_ptr;
1407     ushort cp_count,dp_offset,cmd_no;
1408
1409     TRACE(("gdth_copy_command() hanum %d\n", ha->hanum));
1410
1411     cp_count = ha->cmd_len;
1412     dp_offset= ha->cmd_offs_dpmem;
1413     cmd_no   = ha->cmd_cnt;
1414     cmd_ptr  = ha->pccb;
1415
1416     ++ha->cmd_cnt;
1417     if (ha->type == GDT_EISA)
1418         return;                                 /* no DPMEM, no copy */
1419
1420     /* set cpcount dword aligned */
1421     if (cp_count & 3)
1422         cp_count += (4 - (cp_count & 3));
1423
1424     ha->cmd_offs_dpmem += cp_count;
1425
1426     /* set offset and service, copy command to DPMEM */
1427     if (ha->type == GDT_ISA) {
1428         dp2_ptr = ha->brd;
1429         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1430                     &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1431         writew((ushort)cmd_ptr->Service,
1432                     &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1433         memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1434     } else if (ha->type == GDT_PCI) {
1435         dp6_ptr = ha->brd;
1436         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1437                     &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1438         writew((ushort)cmd_ptr->Service,
1439                     &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1440         memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1441     } else if (ha->type == GDT_PCINEW) {
1442         dp6c_ptr = ha->brd;
1443         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1444                     &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1445         writew((ushort)cmd_ptr->Service,
1446                     &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1447         memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1448     } else if (ha->type == GDT_PCIMPR) {
1449         dp6m_ptr = ha->brd;
1450         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1451                     &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1452         writew((ushort)cmd_ptr->Service,
1453                     &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1454         memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1455     }
1456 }
1457
1458
1459 static void gdth_release_event(gdth_ha_str *ha)
1460 {
1461     TRACE(("gdth_release_event() hanum %d\n", ha->hanum));
1462
1463 #ifdef GDTH_STATISTICS
1464     {
1465         ulong32 i,j;
1466         for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1467             if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1468                 ++i;
1469         }
1470         if (max_index < i) {
1471             max_index = i;
1472             TRACE3(("GDT: max_index = %d\n",(ushort)i));
1473         }
1474     }
1475 #endif
1476
1477     if (ha->pccb->OpCode == GDT_INIT)
1478         ha->pccb->Service |= 0x80;
1479
1480     if (ha->type == GDT_EISA) {
1481         if (ha->pccb->OpCode == GDT_INIT)               /* store DMA buffer */
1482             outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1483         outb(ha->pccb->Service, ha->bmic + LDOORREG);
1484     } else if (ha->type == GDT_ISA) {
1485         writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1486     } else if (ha->type == GDT_PCI) {
1487         writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1488     } else if (ha->type == GDT_PCINEW) {
1489         outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1490     } else if (ha->type == GDT_PCIMPR) {
1491         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1492     }
1493 }
1494
1495 static int gdth_wait(gdth_ha_str *ha, int index, ulong32 time)
1496 {
1497     int answer_found = FALSE;
1498     int wait_index = 0;
1499
1500     TRACE(("gdth_wait() hanum %d index %d time %d\n", ha->hanum, index, time));
1501
1502     if (index == 0)
1503         return 1;                               /* no wait required */
1504
1505     do {
1506         __gdth_interrupt(ha, true, &wait_index);
1507         if (wait_index == index) {
1508             answer_found = TRUE;
1509             break;
1510         }
1511         gdth_delay(1);
1512     } while (--time);
1513
1514     while (gdth_test_busy(ha))
1515         gdth_delay(0);
1516
1517     return (answer_found);
1518 }
1519
1520
1521 static int gdth_internal_cmd(gdth_ha_str *ha, unchar service, ushort opcode,
1522                                             ulong32 p1, ulong64 p2, ulong64 p3)
1523 {
1524     register gdth_cmd_str *cmd_ptr;
1525     int retries,index;
1526
1527     TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1528
1529     cmd_ptr = ha->pccb;
1530     memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1531
1532     /* make command  */
1533     for (retries = INIT_RETRIES;;) {
1534         cmd_ptr->Service          = service;
1535         cmd_ptr->RequestBuffer    = INTERNAL_CMND;
1536         if (!(index=gdth_get_cmd_index(ha))) {
1537             TRACE(("GDT: No free command index found\n"));
1538             return 0;
1539         }
1540         gdth_set_sema0(ha);
1541         cmd_ptr->OpCode           = opcode;
1542         cmd_ptr->BoardNode        = LOCALBOARD;
1543         if (service == CACHESERVICE) {
1544             if (opcode == GDT_IOCTL) {
1545                 cmd_ptr->u.ioctl.subfunc = p1;
1546                 cmd_ptr->u.ioctl.channel = (ulong32)p2;
1547                 cmd_ptr->u.ioctl.param_size = (ushort)p3;
1548                 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1549             } else {
1550                 if (ha->cache_feat & GDT_64BIT) {
1551                     cmd_ptr->u.cache64.DeviceNo = (ushort)p1;
1552                     cmd_ptr->u.cache64.BlockNo  = p2;
1553                 } else {
1554                     cmd_ptr->u.cache.DeviceNo = (ushort)p1;
1555                     cmd_ptr->u.cache.BlockNo  = (ulong32)p2;
1556                 }
1557             }
1558         } else if (service == SCSIRAWSERVICE) {
1559             if (ha->raw_feat & GDT_64BIT) {
1560                 cmd_ptr->u.raw64.direction  = p1;
1561                 cmd_ptr->u.raw64.bus        = (unchar)p2;
1562                 cmd_ptr->u.raw64.target     = (unchar)p3;
1563                 cmd_ptr->u.raw64.lun        = (unchar)(p3 >> 8);
1564             } else {
1565                 cmd_ptr->u.raw.direction  = p1;
1566                 cmd_ptr->u.raw.bus        = (unchar)p2;
1567                 cmd_ptr->u.raw.target     = (unchar)p3;
1568                 cmd_ptr->u.raw.lun        = (unchar)(p3 >> 8);
1569             }
1570         } else if (service == SCREENSERVICE) {
1571             if (opcode == GDT_REALTIME) {
1572                 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1573                 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = (ulong32)p2;
1574                 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = (ulong32)p3;
1575             }
1576         }
1577         ha->cmd_len          = sizeof(gdth_cmd_str);
1578         ha->cmd_offs_dpmem   = 0;
1579         ha->cmd_cnt          = 0;
1580         gdth_copy_command(ha);
1581         gdth_release_event(ha);
1582         gdth_delay(20);
1583         if (!gdth_wait(ha, index, INIT_TIMEOUT)) {
1584             printk("GDT: Initialization error (timeout service %d)\n",service);
1585             return 0;
1586         }
1587         if (ha->status != S_BSY || --retries == 0)
1588             break;
1589         gdth_delay(1);
1590     }
1591
1592     return (ha->status != S_OK ? 0:1);
1593 }
1594
1595
1596 /* search for devices */
1597
1598 static int __init gdth_search_drives(gdth_ha_str *ha)
1599 {
1600     ushort cdev_cnt, i;
1601     int ok;
1602     ulong32 bus_no, drv_cnt, drv_no, j;
1603     gdth_getch_str *chn;
1604     gdth_drlist_str *drl;
1605     gdth_iochan_str *ioc;
1606     gdth_raw_iochan_str *iocr;
1607     gdth_arcdl_str *alst;
1608     gdth_alist_str *alst2;
1609     gdth_oem_str_ioctl *oemstr;
1610 #ifdef INT_COAL
1611     gdth_perf_modes *pmod;
1612 #endif
1613
1614 #ifdef GDTH_RTC
1615     unchar rtc[12];
1616     ulong flags;
1617 #endif
1618
1619     TRACE(("gdth_search_drives() hanum %d\n", ha->hanum));
1620     ok = 0;
1621
1622     /* initialize controller services, at first: screen service */
1623     ha->screen_feat = 0;
1624     if (!force_dma32) {
1625         ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_X_INIT_SCR, 0, 0, 0);
1626         if (ok)
1627             ha->screen_feat = GDT_64BIT;
1628     }
1629     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1630         ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_INIT, 0, 0, 0);
1631     if (!ok) {
1632         printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1633                ha->hanum, ha->status);
1634         return 0;
1635     }
1636     TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1637
1638 #ifdef GDTH_RTC
1639     /* read realtime clock info, send to controller */
1640     /* 1. wait for the falling edge of update flag */
1641     spin_lock_irqsave(&rtc_lock, flags);
1642     for (j = 0; j < 1000000; ++j)
1643         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1644             break;
1645     for (j = 0; j < 1000000; ++j)
1646         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1647             break;
1648     /* 2. read info */
1649     do {
1650         for (j = 0; j < 12; ++j)
1651             rtc[j] = CMOS_READ(j);
1652     } while (rtc[0] != CMOS_READ(0));
1653     spin_unlock_irqrestore(&rtc_lock, flags);
1654     TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
1655             *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
1656     /* 3. send to controller firmware */
1657     gdth_internal_cmd(ha, SCREENSERVICE, GDT_REALTIME, *(ulong32 *)&rtc[0],
1658                       *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
1659 #endif
1660
1661     /* unfreeze all IOs */
1662     gdth_internal_cmd(ha, CACHESERVICE, GDT_UNFREEZE_IO, 0, 0, 0);
1663
1664     /* initialize cache service */
1665     ha->cache_feat = 0;
1666     if (!force_dma32) {
1667         ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INIT_HOST, LINUX_OS,
1668                                                                          0, 0);
1669         if (ok)
1670             ha->cache_feat = GDT_64BIT;
1671     }
1672     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1673         ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_INIT, LINUX_OS, 0, 0);
1674     if (!ok) {
1675         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1676                ha->hanum, ha->status);
1677         return 0;
1678     }
1679     TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1680     cdev_cnt = (ushort)ha->info;
1681     ha->fw_vers = ha->service;
1682
1683 #ifdef INT_COAL
1684     if (ha->type == GDT_PCIMPR) {
1685         /* set perf. modes */
1686         pmod = (gdth_perf_modes *)ha->pscratch;
1687         pmod->version          = 1;
1688         pmod->st_mode          = 1;    /* enable one status buffer */
1689         *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1690         pmod->st_buff_indx1    = COALINDEX;
1691         pmod->st_buff_addr2    = 0;
1692         pmod->st_buff_u_addr2  = 0;
1693         pmod->st_buff_indx2    = 0;
1694         pmod->st_buff_size     = sizeof(gdth_coal_status) * MAXOFFSETS;
1695         pmod->cmd_mode         = 0;    // disable all cmd buffers
1696         pmod->cmd_buff_addr1   = 0;
1697         pmod->cmd_buff_u_addr1 = 0;
1698         pmod->cmd_buff_indx1   = 0;
1699         pmod->cmd_buff_addr2   = 0;
1700         pmod->cmd_buff_u_addr2 = 0;
1701         pmod->cmd_buff_indx2   = 0;
1702         pmod->cmd_buff_size    = 0;
1703         pmod->reserved1        = 0;
1704         pmod->reserved2        = 0;
1705         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, SET_PERF_MODES,
1706                               INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
1707             printk("GDT-HA %d: Interrupt coalescing activated\n", ha->hanum);
1708         }
1709     }
1710 #endif
1711
1712     /* detect number of buses - try new IOCTL */
1713     iocr = (gdth_raw_iochan_str *)ha->pscratch;
1714     iocr->hdr.version        = 0xffffffff;
1715     iocr->hdr.list_entries   = MAXBUS;
1716     iocr->hdr.first_chan     = 0;
1717     iocr->hdr.last_chan      = MAXBUS-1;
1718     iocr->hdr.list_offset    = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
1719     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_RAW_DESC,
1720                           INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
1721         TRACE2(("IOCHAN_RAW_DESC supported!\n"));
1722         ha->bus_cnt = iocr->hdr.chan_count;
1723         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1724             if (iocr->list[bus_no].proc_id < MAXID)
1725                 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
1726             else
1727                 ha->bus_id[bus_no] = 0xff;
1728         }
1729     } else {
1730         /* old method */
1731         chn = (gdth_getch_str *)ha->pscratch;
1732         for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
1733             chn->channel_no = bus_no;
1734             if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1735                                    SCSI_CHAN_CNT | L_CTRL_PATTERN,
1736                                    IO_CHANNEL | INVALID_CHANNEL,
1737                                    sizeof(gdth_getch_str))) {
1738                 if (bus_no == 0) {
1739                     printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
1740                            ha->hanum, ha->status);
1741                     return 0;
1742                 }
1743                 break;
1744             }
1745             if (chn->siop_id < MAXID)
1746                 ha->bus_id[bus_no] = chn->siop_id;
1747             else
1748                 ha->bus_id[bus_no] = 0xff;
1749         }
1750         ha->bus_cnt = (unchar)bus_no;
1751     }
1752     TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
1753
1754     /* read cache configuration */
1755     if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_INFO,
1756                            INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
1757         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1758                ha->hanum, ha->status);
1759         return 0;
1760     }
1761     ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
1762     TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
1763             ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
1764             ha->cpar.write_back,ha->cpar.block_size));
1765
1766     /* read board info and features */
1767     ha->more_proc = FALSE;
1768     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_INFO,
1769                           INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
1770         memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
1771                sizeof(gdth_binfo_str));
1772         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_FEATURES,
1773                               INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
1774             TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
1775             ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
1776             ha->more_proc = TRUE;
1777         }
1778     } else {
1779         TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
1780         strcpy(ha->binfo.type_string, gdth_ctr_name(ha));
1781     }
1782     TRACE2(("Controller name: %s\n",ha->binfo.type_string));
1783
1784     /* read more informations */
1785     if (ha->more_proc) {
1786         /* physical drives, channel addresses */
1787         ioc = (gdth_iochan_str *)ha->pscratch;
1788         ioc->hdr.version        = 0xffffffff;
1789         ioc->hdr.list_entries   = MAXBUS;
1790         ioc->hdr.first_chan     = 0;
1791         ioc->hdr.last_chan      = MAXBUS-1;
1792         ioc->hdr.list_offset    = GDTOFFSOF(gdth_iochan_str, list[0]);
1793         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_DESC,
1794                               INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
1795             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1796                 ha->raw[bus_no].address = ioc->list[bus_no].address;
1797                 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
1798             }
1799         } else {
1800             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1801                 ha->raw[bus_no].address = IO_CHANNEL;
1802                 ha->raw[bus_no].local_no = bus_no;
1803             }
1804         }
1805         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1806             chn = (gdth_getch_str *)ha->pscratch;
1807             chn->channel_no = ha->raw[bus_no].local_no;
1808             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1809                                   SCSI_CHAN_CNT | L_CTRL_PATTERN,
1810                                   ha->raw[bus_no].address | INVALID_CHANNEL,
1811                                   sizeof(gdth_getch_str))) {
1812                 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
1813                 TRACE2(("Channel %d: %d phys. drives\n",
1814                         bus_no,chn->drive_cnt));
1815             }
1816             if (ha->raw[bus_no].pdev_cnt > 0) {
1817                 drl = (gdth_drlist_str *)ha->pscratch;
1818                 drl->sc_no = ha->raw[bus_no].local_no;
1819                 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
1820                 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1821                                       SCSI_DR_LIST | L_CTRL_PATTERN,
1822                                       ha->raw[bus_no].address | INVALID_CHANNEL,
1823                                       sizeof(gdth_drlist_str))) {
1824                     for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
1825                         ha->raw[bus_no].id_list[j] = drl->sc_list[j];
1826                 } else {
1827                     ha->raw[bus_no].pdev_cnt = 0;
1828                 }
1829             }
1830         }
1831
1832         /* logical drives */
1833         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_CNT,
1834                               INVALID_CHANNEL,sizeof(ulong32))) {
1835             drv_cnt = *(ulong32 *)ha->pscratch;
1836             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_LIST,
1837                                   INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
1838                 for (j = 0; j < drv_cnt; ++j) {
1839                     drv_no = ((ulong32 *)ha->pscratch)[j];
1840                     if (drv_no < MAX_LDRIVES) {
1841                         ha->hdr[drv_no].is_logdrv = TRUE;
1842                         TRACE2(("Drive %d is log. drive\n",drv_no));
1843                     }
1844                 }
1845             }
1846             alst = (gdth_arcdl_str *)ha->pscratch;
1847             alst->entries_avail = MAX_LDRIVES;
1848             alst->first_entry = 0;
1849             alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
1850             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1851                                   ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
1852                                   INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
1853                                   (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
1854                 for (j = 0; j < alst->entries_init; ++j) {
1855                     ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
1856                     ha->hdr[j].is_master = alst->list[j].is_master;
1857                     ha->hdr[j].is_parity = alst->list[j].is_parity;
1858                     ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
1859                     ha->hdr[j].master_no = alst->list[j].cd_handle;
1860                 }
1861             } else if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1862                                          ARRAY_DRV_LIST | LA_CTRL_PATTERN,
1863                                          0, 35 * sizeof(gdth_alist_str))) {
1864                 for (j = 0; j < 35; ++j) {
1865                     alst2 = &((gdth_alist_str *)ha->pscratch)[j];
1866                     ha->hdr[j].is_arraydrv = alst2->is_arrayd;
1867                     ha->hdr[j].is_master = alst2->is_master;
1868                     ha->hdr[j].is_parity = alst2->is_parity;
1869                     ha->hdr[j].is_hotfix = alst2->is_hotfix;
1870                     ha->hdr[j].master_no = alst2->cd_handle;
1871                 }
1872             }
1873         }
1874     }
1875
1876     /* initialize raw service */
1877     ha->raw_feat = 0;
1878     if (!force_dma32) {
1879         ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_X_INIT_RAW, 0, 0, 0);
1880         if (ok)
1881             ha->raw_feat = GDT_64BIT;
1882     }
1883     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1884         ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_INIT, 0, 0, 0);
1885     if (!ok) {
1886         printk("GDT-HA %d: Initialization error raw service (code %d)\n",
1887                ha->hanum, ha->status);
1888         return 0;
1889     }
1890     TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
1891
1892     /* set/get features raw service (scatter/gather) */
1893     if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_SET_FEAT, SCATTER_GATHER,
1894                           0, 0)) {
1895         TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
1896         if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1897             TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
1898                     ha->info));
1899             ha->raw_feat |= (ushort)ha->info;
1900         }
1901     }
1902
1903     /* set/get features cache service (equal to raw service) */
1904     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_SET_FEAT, 0,
1905                           SCATTER_GATHER,0)) {
1906         TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
1907         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1908             TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
1909                     ha->info));
1910             ha->cache_feat |= (ushort)ha->info;
1911         }
1912     }
1913
1914     /* reserve drives for raw service */
1915     if (reserve_mode != 0) {
1916         gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE_ALL,
1917                           reserve_mode == 1 ? 1 : 3, 0, 0);
1918         TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
1919                 ha->status));
1920     }
1921     for (i = 0; i < MAX_RES_ARGS; i += 4) {
1922         if (reserve_list[i] == ha->hanum && reserve_list[i+1] < ha->bus_cnt &&
1923             reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
1924             TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
1925                     reserve_list[i], reserve_list[i+1],
1926                     reserve_list[i+2], reserve_list[i+3]));
1927             if (!gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE, 0,
1928                                    reserve_list[i+1], reserve_list[i+2] |
1929                                    (reserve_list[i+3] << 8))) {
1930                 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
1931                        ha->hanum, ha->status);
1932              }
1933         }
1934     }
1935
1936     /* Determine OEM string using IOCTL */
1937     oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
1938     oemstr->params.ctl_version = 0x01;
1939     oemstr->params.buffer_size = sizeof(oemstr->text);
1940     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1941                           CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
1942                           sizeof(gdth_oem_str_ioctl))) {
1943         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
1944         printk("GDT-HA %d: Vendor: %s Name: %s\n",
1945                ha->hanum, oemstr->text.oem_company_name, ha->binfo.type_string);
1946         /* Save the Host Drive inquiry data */
1947         strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
1948                 sizeof(ha->oem_name));
1949     } else {
1950         /* Old method, based on PCI ID */
1951         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
1952         printk("GDT-HA %d: Name: %s\n",
1953                ha->hanum, ha->binfo.type_string);
1954         if (ha->oem_id == OEM_ID_INTEL)
1955             strlcpy(ha->oem_name,"Intel  ", sizeof(ha->oem_name));
1956         else
1957             strlcpy(ha->oem_name,"ICP    ", sizeof(ha->oem_name));
1958     }
1959
1960     /* scanning for host drives */
1961     for (i = 0; i < cdev_cnt; ++i)
1962         gdth_analyse_hdrive(ha, i);
1963
1964     TRACE(("gdth_search_drives() OK\n"));
1965     return 1;
1966 }
1967
1968 static int gdth_analyse_hdrive(gdth_ha_str *ha, ushort hdrive)
1969 {
1970     ulong32 drv_cyls;
1971     int drv_hds, drv_secs;
1972
1973     TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n", ha->hanum, hdrive));
1974     if (hdrive >= MAX_HDRIVES)
1975         return 0;
1976
1977     if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_INFO, hdrive, 0, 0))
1978         return 0;
1979     ha->hdr[hdrive].present = TRUE;
1980     ha->hdr[hdrive].size = ha->info;
1981
1982     /* evaluate mapping (sectors per head, heads per cylinder) */
1983     ha->hdr[hdrive].size &= ~SECS32;
1984     if (ha->info2 == 0) {
1985         gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
1986     } else {
1987         drv_hds = ha->info2 & 0xff;
1988         drv_secs = (ha->info2 >> 8) & 0xff;
1989         drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs;
1990     }
1991     ha->hdr[hdrive].heads = (unchar)drv_hds;
1992     ha->hdr[hdrive].secs  = (unchar)drv_secs;
1993     /* round size */
1994     ha->hdr[hdrive].size  = drv_cyls * drv_hds * drv_secs;
1995
1996     if (ha->cache_feat & GDT_64BIT) {
1997         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INFO, hdrive, 0, 0)
1998             && ha->info2 != 0) {
1999             ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info;
2000         }
2001     }
2002     TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
2003             hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
2004
2005     /* get informations about device */
2006     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_DEVTYPE, hdrive, 0, 0)) {
2007         TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
2008                 hdrive,ha->info));
2009         ha->hdr[hdrive].devtype = (ushort)ha->info;
2010     }
2011
2012     /* cluster info */
2013     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_CLUST_INFO, hdrive, 0, 0)) {
2014         TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
2015                 hdrive,ha->info));
2016         if (!shared_access)
2017             ha->hdr[hdrive].cluster_type = (unchar)ha->info;
2018     }
2019
2020     /* R/W attributes */
2021     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_RW_ATTRIBS, hdrive, 0, 0)) {
2022         TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
2023                 hdrive,ha->info));
2024         ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
2025     }
2026
2027     return 1;
2028 }
2029
2030
2031 /* command queueing/sending functions */
2032
2033 static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar priority)
2034 {
2035     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2036     register Scsi_Cmnd *pscp;
2037     register Scsi_Cmnd *nscp;
2038     ulong flags;
2039     unchar b, t;
2040
2041     TRACE(("gdth_putq() priority %d\n",priority));
2042     spin_lock_irqsave(&ha->smp_lock, flags);
2043
2044     if (!cmndinfo->internal_command) {
2045         cmndinfo->priority = priority;
2046         b = scp->device->channel;
2047         t = scp->device->id;
2048         if (priority >= DEFAULT_PRI) {
2049             if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2050                 (b==ha->virt_bus && t<MAX_HDRIVES && ha->hdr[t].lock)) {
2051                 TRACE2(("gdth_putq(): locked IO ->update_timeout()\n"));
2052                 cmndinfo->timeout = gdth_update_timeout(scp, 0);
2053             }
2054         }
2055     }
2056
2057     if (ha->req_first==NULL) {
2058         ha->req_first = scp;                    /* queue was empty */
2059         scp->SCp.ptr = NULL;
2060     } else {                                    /* queue not empty */
2061         pscp = ha->req_first;
2062         nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2063         /* priority: 0-highest,..,0xff-lowest */
2064         while (nscp && gdth_cmnd_priv(nscp)->priority <= priority) {
2065             pscp = nscp;
2066             nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2067         }
2068         pscp->SCp.ptr = (char *)scp;
2069         scp->SCp.ptr  = (char *)nscp;
2070     }
2071     spin_unlock_irqrestore(&ha->smp_lock, flags);
2072
2073 #ifdef GDTH_STATISTICS
2074     flags = 0;
2075     for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2076         ++flags;
2077     if (max_rq < flags) {
2078         max_rq = flags;
2079         TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
2080     }
2081 #endif
2082 }
2083
2084 static void gdth_next(gdth_ha_str *ha)
2085 {
2086     register Scsi_Cmnd *pscp;
2087     register Scsi_Cmnd *nscp;
2088     unchar b, t, l, firsttime;
2089     unchar this_cmd, next_cmd;
2090     ulong flags = 0;
2091     int cmd_index;
2092
2093     TRACE(("gdth_next() hanum %d\n", ha->hanum));
2094     if (!gdth_polling)
2095         spin_lock_irqsave(&ha->smp_lock, flags);
2096
2097     ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2098     this_cmd = firsttime = TRUE;
2099     next_cmd = gdth_polling ? FALSE:TRUE;
2100     cmd_index = 0;
2101
2102     for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2103         struct gdth_cmndinfo *nscp_cmndinfo = gdth_cmnd_priv(nscp);
2104         if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2105             pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2106         if (!nscp_cmndinfo->internal_command) {
2107             b = nscp->device->channel;
2108             t = nscp->device->id;
2109             l = nscp->device->lun;
2110             if (nscp_cmndinfo->priority >= DEFAULT_PRI) {
2111                 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2112                     (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2113                     continue;
2114             }
2115         } else
2116             b = t = l = 0;
2117
2118         if (firsttime) {
2119             if (gdth_test_busy(ha)) {        /* controller busy ? */
2120                 TRACE(("gdth_next() controller %d busy !\n", ha->hanum));
2121                 if (!gdth_polling) {
2122                     spin_unlock_irqrestore(&ha->smp_lock, flags);
2123                     return;
2124                 }
2125                 while (gdth_test_busy(ha))
2126                     gdth_delay(1);
2127             }
2128             firsttime = FALSE;
2129         }
2130
2131         if (!nscp_cmndinfo->internal_command) {
2132         if (nscp_cmndinfo->phase == -1) {
2133             nscp_cmndinfo->phase = CACHESERVICE;           /* default: cache svc. */
2134             if (nscp->cmnd[0] == TEST_UNIT_READY) {
2135                 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2136                         b, t, l));
2137                 /* TEST_UNIT_READY -> set scan mode */
2138                 if ((ha->scan_mode & 0x0f) == 0) {
2139                     if (b == 0 && t == 0 && l == 0) {
2140                         ha->scan_mode |= 1;
2141                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2142                     }
2143                 } else if ((ha->scan_mode & 0x0f) == 1) {
2144                     if (b == 0 && ((t == 0 && l == 1) ||
2145                          (t == 1 && l == 0))) {
2146                         nscp_cmndinfo->OpCode = GDT_SCAN_START;
2147                         nscp_cmndinfo->phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2148                             | SCSIRAWSERVICE;
2149                         ha->scan_mode = 0x12;
2150                         TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2151                                 ha->scan_mode));
2152                     } else {
2153                         ha->scan_mode &= 0x10;
2154                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2155                     }
2156                 } else if (ha->scan_mode == 0x12) {
2157                     if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2158                         nscp_cmndinfo->phase = SCSIRAWSERVICE;
2159                         nscp_cmndinfo->OpCode = GDT_SCAN_END;
2160                         ha->scan_mode &= 0x10;
2161                         TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2162                                 ha->scan_mode));
2163                     }
2164                 }
2165             }
2166             if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2167                 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2168                 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2169                 /* always GDT_CLUST_INFO! */
2170                 nscp_cmndinfo->OpCode = GDT_CLUST_INFO;
2171             }
2172         }
2173         }
2174
2175         if (nscp_cmndinfo->OpCode != -1) {
2176             if ((nscp_cmndinfo->phase & 0xff) == CACHESERVICE) {
2177                 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2178                     this_cmd = FALSE;
2179                 next_cmd = FALSE;
2180             } else if ((nscp_cmndinfo->phase & 0xff) == SCSIRAWSERVICE) {
2181                 if (!(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b))))
2182                     this_cmd = FALSE;
2183                 next_cmd = FALSE;
2184             } else {
2185                 memset((char*)nscp->sense_buffer,0,16);
2186                 nscp->sense_buffer[0] = 0x70;
2187                 nscp->sense_buffer[2] = NOT_READY;
2188                 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2189                 if (!nscp_cmndinfo->wait_for_completion)
2190                     nscp_cmndinfo->wait_for_completion++;
2191                 else
2192                     gdth_scsi_done(nscp);
2193             }
2194         } else if (gdth_cmnd_priv(nscp)->internal_command) {
2195             if (!(cmd_index=gdth_special_cmd(ha, nscp)))
2196                 this_cmd = FALSE;
2197             next_cmd = FALSE;
2198         } else if (b != ha->virt_bus) {
2199             if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2200                 !(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b))))
2201                 this_cmd = FALSE;
2202             else
2203                 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2204         } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2205             TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2206                     nscp->cmnd[0], b, t, l));
2207             nscp->result = DID_BAD_TARGET << 16;
2208             if (!nscp_cmndinfo->wait_for_completion)
2209                 nscp_cmndinfo->wait_for_completion++;
2210             else
2211                 gdth_scsi_done(nscp);
2212         } else {
2213             switch (nscp->cmnd[0]) {
2214               case TEST_UNIT_READY:
2215               case INQUIRY:
2216               case REQUEST_SENSE:
2217               case READ_CAPACITY:
2218               case VERIFY:
2219               case START_STOP:
2220               case MODE_SENSE:
2221               case SERVICE_ACTION_IN:
2222                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2223                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2224                        nscp->cmnd[4],nscp->cmnd[5]));
2225                 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2226                     /* return UNIT_ATTENTION */
2227                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2228                              nscp->cmnd[0], t));
2229                     ha->hdr[t].media_changed = FALSE;
2230                     memset((char*)nscp->sense_buffer,0,16);
2231                     nscp->sense_buffer[0] = 0x70;
2232                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2233                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2234                     if (!nscp_cmndinfo->wait_for_completion)
2235                         nscp_cmndinfo->wait_for_completion++;
2236                     else
2237                         gdth_scsi_done(nscp);
2238                 } else if (gdth_internal_cache_cmd(ha, nscp))
2239                     gdth_scsi_done(nscp);
2240                 break;
2241
2242               case ALLOW_MEDIUM_REMOVAL:
2243                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2244                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2245                        nscp->cmnd[4],nscp->cmnd[5]));
2246                 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2247                     TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2248                     nscp->result = DID_OK << 16;
2249                     nscp->sense_buffer[0] = 0;
2250                     if (!nscp_cmndinfo->wait_for_completion)
2251                         nscp_cmndinfo->wait_for_completion++;
2252                     else
2253                         gdth_scsi_done(nscp);
2254                 } else {
2255                     nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2256                     TRACE(("Prevent/allow r. %d rem. drive %d\n",
2257                            nscp->cmnd[4],nscp->cmnd[3]));
2258                     if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2259                         this_cmd = FALSE;
2260                 }
2261                 break;
2262
2263               case RESERVE:
2264               case RELEASE:
2265                 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2266                         "RESERVE" : "RELEASE"));
2267                 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2268                     this_cmd = FALSE;
2269                 break;
2270
2271               case READ_6:
2272               case WRITE_6:
2273               case READ_10:
2274               case WRITE_10:
2275               case READ_16:
2276               case WRITE_16:
2277                 if (ha->hdr[t].media_changed) {
2278                     /* return UNIT_ATTENTION */
2279                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2280                              nscp->cmnd[0], t));
2281                     ha->hdr[t].media_changed = FALSE;
2282                     memset((char*)nscp->sense_buffer,0,16);
2283                     nscp->sense_buffer[0] = 0x70;
2284                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2285                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2286                     if (!nscp_cmndinfo->wait_for_completion)
2287                         nscp_cmndinfo->wait_for_completion++;
2288                     else
2289                         gdth_scsi_done(nscp);
2290                 } else if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2291                     this_cmd = FALSE;
2292                 break;
2293
2294               default:
2295                 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2296                         nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2297                         nscp->cmnd[4],nscp->cmnd[5]));
2298                 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2299                        ha->hanum, nscp->cmnd[0]);
2300                 nscp->result = DID_ABORT << 16;
2301                 if (!nscp_cmndinfo->wait_for_completion)
2302                     nscp_cmndinfo->wait_for_completion++;
2303                 else
2304                     gdth_scsi_done(nscp);
2305                 break;
2306             }
2307         }
2308
2309         if (!this_cmd)
2310             break;
2311         if (nscp == ha->req_first)
2312             ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2313         else
2314             pscp->SCp.ptr = nscp->SCp.ptr;
2315         if (!next_cmd)
2316             break;
2317     }
2318
2319     if (ha->cmd_cnt > 0) {
2320         gdth_release_event(ha);
2321     }
2322
2323     if (!gdth_polling)
2324         spin_unlock_irqrestore(&ha->smp_lock, flags);
2325
2326     if (gdth_polling && ha->cmd_cnt > 0) {
2327         if (!gdth_wait(ha, cmd_index, POLL_TIMEOUT))
2328             printk("GDT-HA %d: Command %d timed out !\n",
2329                    ha->hanum, cmd_index);
2330     }
2331 }
2332
2333 /*
2334  * gdth_copy_internal_data() - copy to/from a buffer onto a scsi_cmnd's
2335  * buffers, kmap_atomic() as needed.
2336  */
2337 static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp,
2338                                     char *buffer, ushort count)
2339 {
2340     ushort cpcount,i, max_sg = gdth_sg_count(scp);
2341     ushort cpsum,cpnow;
2342     struct scatterlist *sl;
2343     char *address;
2344
2345     cpcount = min_t(ushort, count, gdth_bufflen(scp));
2346
2347     if (cpcount) {
2348         cpsum=0;
2349         scsi_for_each_sg(scp, sl, max_sg, i) {
2350             unsigned long flags;
2351             cpnow = (ushort)sl->length;
2352             TRACE(("copy_internal() now %d sum %d count %d %d\n",
2353                           cpnow, cpsum, cpcount, gdth_bufflen(scp)));
2354             if (cpsum+cpnow > cpcount)
2355                 cpnow = cpcount - cpsum;
2356             cpsum += cpnow;
2357             if (!sg_page(sl)) {
2358                 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2359                        ha->hanum);
2360                 return;
2361             }
2362             local_irq_save(flags);
2363             address = kmap_atomic(sg_page(sl), KM_BIO_SRC_IRQ) + sl->offset;
2364             memcpy(address, buffer, cpnow);
2365             flush_dcache_page(sg_page(sl));
2366             kunmap_atomic(address, KM_BIO_SRC_IRQ);
2367             local_irq_restore(flags);
2368             if (cpsum == cpcount)
2369                 break;
2370             buffer += cpnow;
2371         }
2372     } else if (count) {
2373         printk("GDT-HA %d: SCSI command with no buffers but data transfer expected!\n",
2374                ha->hanum);
2375         WARN_ON(1);
2376     }
2377 }
2378
2379 static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2380 {
2381     unchar t;
2382     gdth_inq_data inq;
2383     gdth_rdcap_data rdc;
2384     gdth_sense_data sd;
2385     gdth_modep_data mpd;
2386     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2387
2388     t  = scp->device->id;
2389     TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2390            scp->cmnd[0],t));
2391
2392     scp->result = DID_OK << 16;
2393     scp->sense_buffer[0] = 0;
2394
2395     switch (scp->cmnd[0]) {
2396       case TEST_UNIT_READY:
2397       case VERIFY:
2398       case START_STOP:
2399         TRACE2(("Test/Verify/Start hdrive %d\n",t));
2400         break;
2401
2402       case INQUIRY:
2403         TRACE2(("Inquiry hdrive %d devtype %d\n",
2404                 t,ha->hdr[t].devtype));
2405         inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2406         /* you can here set all disks to removable, if you want to do
2407            a flush using the ALLOW_MEDIUM_REMOVAL command */
2408         inq.modif_rmb = 0x00;
2409         if ((ha->hdr[t].devtype & 1) ||
2410             (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2411             inq.modif_rmb = 0x80;
2412         inq.version   = 2;
2413         inq.resp_aenc = 2;
2414         inq.add_length= 32;
2415         strcpy(inq.vendor,ha->oem_name);
2416         sprintf(inq.product,"Host Drive  #%02d",t);
2417         strcpy(inq.revision,"   ");
2418         gdth_copy_internal_data(ha, scp, (char*)&inq, sizeof(gdth_inq_data));
2419         break;
2420
2421       case REQUEST_SENSE:
2422         TRACE2(("Request sense hdrive %d\n",t));
2423         sd.errorcode = 0x70;
2424         sd.segno     = 0x00;
2425         sd.key       = NO_SENSE;
2426         sd.info      = 0;
2427         sd.add_length= 0;
2428         gdth_copy_internal_data(ha, scp, (char*)&sd, sizeof(gdth_sense_data));
2429         break;
2430
2431       case MODE_SENSE:
2432         TRACE2(("Mode sense hdrive %d\n",t));
2433         memset((char*)&mpd,0,sizeof(gdth_modep_data));
2434         mpd.hd.data_length = sizeof(gdth_modep_data);
2435         mpd.hd.dev_par     = (ha->hdr[t].devtype&2) ? 0x80:0;
2436         mpd.hd.bd_length   = sizeof(mpd.bd);
2437         mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2438         mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2439         mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2440         gdth_copy_internal_data(ha, scp, (char*)&mpd, sizeof(gdth_modep_data));
2441         break;
2442
2443       case READ_CAPACITY:
2444         TRACE2(("Read capacity hdrive %d\n",t));
2445         if (ha->hdr[t].size > (ulong64)0xffffffff)
2446             rdc.last_block_no = 0xffffffff;
2447         else
2448             rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2449         rdc.block_length  = cpu_to_be32(SECTOR_SIZE);
2450         gdth_copy_internal_data(ha, scp, (char*)&rdc, sizeof(gdth_rdcap_data));
2451         break;
2452
2453       case SERVICE_ACTION_IN:
2454         if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2455             (ha->cache_feat & GDT_64BIT)) {
2456             gdth_rdcap16_data rdc16;
2457
2458             TRACE2(("Read capacity (16) hdrive %d\n",t));
2459             rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2460             rdc16.block_length  = cpu_to_be32(SECTOR_SIZE);
2461             gdth_copy_internal_data(ha, scp, (char*)&rdc16,
2462                                                  sizeof(gdth_rdcap16_data));
2463         } else {
2464             scp->result = DID_ABORT << 16;
2465         }
2466         break;
2467
2468       default:
2469         TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2470         break;
2471     }
2472
2473     if (!cmndinfo->wait_for_completion)
2474         cmndinfo->wait_for_completion++;
2475     else
2476         return 1;
2477
2478     return 0;
2479 }
2480
2481 static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, ushort hdrive)
2482 {
2483     register gdth_cmd_str *cmdp;
2484     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2485     ulong32 cnt, blockcnt;
2486     ulong64 no, blockno;
2487     int i, cmd_index, read_write, sgcnt, mode64;
2488
2489     cmdp = ha->pccb;
2490     TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2491                  scp->cmnd[0],scp->cmd_len,hdrive));
2492
2493     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2494         return 0;
2495
2496     mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2497     /* test for READ_16, WRITE_16 if !mode64 ? ---
2498        not required, should not occur due to error return on
2499        READ_CAPACITY_16 */
2500
2501     cmdp->Service = CACHESERVICE;
2502     cmdp->RequestBuffer = scp;
2503     /* search free command index */
2504     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2505         TRACE(("GDT: No free command index found\n"));
2506         return 0;
2507     }
2508     /* if it's the first command, set command semaphore */
2509     if (ha->cmd_cnt == 0)
2510         gdth_set_sema0(ha);
2511
2512     /* fill command */
2513     read_write = 0;
2514     if (cmndinfo->OpCode != -1)
2515         cmdp->OpCode = cmndinfo->OpCode;   /* special cache cmd. */
2516     else if (scp->cmnd[0] == RESERVE)
2517         cmdp->OpCode = GDT_RESERVE_DRV;
2518     else if (scp->cmnd[0] == RELEASE)
2519         cmdp->OpCode = GDT_RELEASE_DRV;
2520     else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2521         if (scp->cmnd[4] & 1)                   /* prevent ? */
2522             cmdp->OpCode = GDT_MOUNT;
2523         else if (scp->cmnd[3] & 1)              /* removable drive ? */
2524             cmdp->OpCode = GDT_UNMOUNT;
2525         else
2526             cmdp->OpCode = GDT_FLUSH;
2527     } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2528                scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2529     ) {
2530         read_write = 1;
2531         if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2532                                    (ha->cache_feat & GDT_WR_THROUGH)))
2533             cmdp->OpCode = GDT_WRITE_THR;
2534         else
2535             cmdp->OpCode = GDT_WRITE;
2536     } else {
2537         read_write = 2;
2538         cmdp->OpCode = GDT_READ;
2539     }
2540
2541     cmdp->BoardNode = LOCALBOARD;
2542     if (mode64) {
2543         cmdp->u.cache64.DeviceNo = hdrive;
2544         cmdp->u.cache64.BlockNo  = 1;
2545         cmdp->u.cache64.sg_canz  = 0;
2546     } else {
2547         cmdp->u.cache.DeviceNo = hdrive;
2548         cmdp->u.cache.BlockNo  = 1;
2549         cmdp->u.cache.sg_canz  = 0;
2550     }
2551
2552     if (read_write) {
2553         if (scp->cmd_len == 16) {
2554             memcpy(&no, &scp->cmnd[2], sizeof(ulong64));
2555             blockno = be64_to_cpu(no);
2556             memcpy(&cnt, &scp->cmnd[10], sizeof(ulong32));
2557             blockcnt = be32_to_cpu(cnt);
2558         } else if (scp->cmd_len == 10) {
2559             memcpy(&no, &scp->cmnd[2], sizeof(ulong32));
2560             blockno = be32_to_cpu(no);
2561             memcpy(&cnt, &scp->cmnd[7], sizeof(ushort));
2562             blockcnt = be16_to_cpu(cnt);
2563         } else {
2564             memcpy(&no, &scp->cmnd[0], sizeof(ulong32));
2565             blockno = be32_to_cpu(no) & 0x001fffffUL;
2566             blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2567         }
2568         if (mode64) {
2569             cmdp->u.cache64.BlockNo = blockno;
2570             cmdp->u.cache64.BlockCnt = blockcnt;
2571         } else {
2572             cmdp->u.cache.BlockNo = (ulong32)blockno;
2573             cmdp->u.cache.BlockCnt = blockcnt;
2574         }
2575
2576         if (gdth_bufflen(scp)) {
2577             cmndinfo->dma_dir = (read_write == 1 ?
2578                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2579             sgcnt = pci_map_sg(ha->pdev, gdth_sglist(scp), gdth_sg_count(scp),
2580                                cmndinfo->dma_dir);
2581             if (mode64) {
2582                 struct scatterlist *sl;
2583
2584                 cmdp->u.cache64.DestAddr= (ulong64)-1;
2585                 cmdp->u.cache64.sg_canz = sgcnt;
2586                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2587                     cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2588 #ifdef GDTH_DMA_STATISTICS
2589                     if (cmdp->u.cache64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2590                         ha->dma64_cnt++;
2591                     else
2592                         ha->dma32_cnt++;
2593 #endif
2594                     cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2595                 }
2596             } else {
2597                 struct scatterlist *sl;
2598
2599                 cmdp->u.cache.DestAddr= 0xffffffff;
2600                 cmdp->u.cache.sg_canz = sgcnt;
2601                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2602                     cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2603 #ifdef GDTH_DMA_STATISTICS
2604                     ha->dma32_cnt++;
2605 #endif
2606                     cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2607                 }
2608             }
2609
2610 #ifdef GDTH_STATISTICS
2611             if (max_sg < (ulong32)sgcnt) {
2612                 max_sg = (ulong32)sgcnt;
2613                 TRACE3(("GDT: max_sg = %d\n",max_sg));
2614             }
2615 #endif
2616
2617         }
2618     }
2619     /* evaluate command size, check space */
2620     if (mode64) {
2621         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2622                cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2623                cmdp->u.cache64.sg_lst[0].sg_ptr,
2624                cmdp->u.cache64.sg_lst[0].sg_len));
2625         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2626                cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2627         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2628             (ushort)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2629     } else {
2630         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2631                cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2632                cmdp->u.cache.sg_lst[0].sg_ptr,
2633                cmdp->u.cache.sg_lst[0].sg_len));
2634         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2635                cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2636         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2637             (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2638     }
2639     if (ha->cmd_len & 3)
2640         ha->cmd_len += (4 - (ha->cmd_len & 3));
2641
2642     if (ha->cmd_cnt > 0) {
2643         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2644             ha->ic_all_size) {
2645             TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
2646             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2647             return 0;
2648         }
2649     }
2650
2651     /* copy command */
2652     gdth_copy_command(ha);
2653     return cmd_index;
2654 }
2655
2656 static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, unchar b)
2657 {
2658     register gdth_cmd_str *cmdp;
2659     ushort i;
2660     dma_addr_t sense_paddr;
2661     int cmd_index, sgcnt, mode64;
2662     unchar t,l;
2663     struct page *page;
2664     ulong offset;
2665     struct gdth_cmndinfo *cmndinfo;
2666
2667     t = scp->device->id;
2668     l = scp->device->lun;
2669     cmdp = ha->pccb;
2670     TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
2671            scp->cmnd[0],b,t,l));
2672
2673     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2674         return 0;
2675
2676     mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
2677
2678     cmdp->Service = SCSIRAWSERVICE;
2679     cmdp->RequestBuffer = scp;
2680     /* search free command index */
2681     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2682         TRACE(("GDT: No free command index found\n"));
2683         return 0;
2684     }
2685     /* if it's the first command, set command semaphore */
2686     if (ha->cmd_cnt == 0)
2687         gdth_set_sema0(ha);
2688
2689     cmndinfo = gdth_cmnd_priv(scp);
2690     /* fill command */
2691     if (cmndinfo->OpCode != -1) {
2692         cmdp->OpCode           = cmndinfo->OpCode; /* special raw cmd. */
2693         cmdp->BoardNode        = LOCALBOARD;
2694         if (mode64) {
2695             cmdp->u.raw64.direction = (cmndinfo->phase >> 8);
2696             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2697                     cmdp->OpCode, cmdp->u.raw64.direction));
2698             /* evaluate command size */
2699             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
2700         } else {
2701             cmdp->u.raw.direction  = (cmndinfo->phase >> 8);
2702             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2703                     cmdp->OpCode, cmdp->u.raw.direction));
2704             /* evaluate command size */
2705             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
2706         }
2707
2708     } else {
2709         page = virt_to_page(scp->sense_buffer);
2710         offset = (ulong)scp->sense_buffer & ~PAGE_MASK;
2711         sense_paddr = pci_map_page(ha->pdev,page,offset,
2712                                    16,PCI_DMA_FROMDEVICE);
2713
2714         cmndinfo->sense_paddr  = sense_paddr;
2715         cmdp->OpCode           = GDT_WRITE;             /* always */
2716         cmdp->BoardNode        = LOCALBOARD;
2717         if (mode64) {
2718             cmdp->u.raw64.reserved   = 0;
2719             cmdp->u.raw64.mdisc_time = 0;
2720             cmdp->u.raw64.mcon_time  = 0;
2721             cmdp->u.raw64.clen       = scp->cmd_len;
2722             cmdp->u.raw64.target     = t;
2723             cmdp->u.raw64.lun        = l;
2724             cmdp->u.raw64.bus        = b;
2725             cmdp->u.raw64.priority   = 0;
2726             cmdp->u.raw64.sdlen      = gdth_bufflen(scp);
2727             cmdp->u.raw64.sense_len  = 16;
2728             cmdp->u.raw64.sense_data = sense_paddr;
2729             cmdp->u.raw64.direction  =
2730                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2731             memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
2732             cmdp->u.raw64.sg_ranz    = 0;
2733         } else {
2734             cmdp->u.raw.reserved   = 0;
2735             cmdp->u.raw.mdisc_time = 0;
2736             cmdp->u.raw.mcon_time  = 0;
2737             cmdp->u.raw.clen       = scp->cmd_len;
2738             cmdp->u.raw.target     = t;
2739             cmdp->u.raw.lun        = l;
2740             cmdp->u.raw.bus        = b;
2741             cmdp->u.raw.priority   = 0;
2742             cmdp->u.raw.link_p     = 0;
2743             cmdp->u.raw.sdlen      = gdth_bufflen(scp);
2744             cmdp->u.raw.sense_len  = 16;
2745             cmdp->u.raw.sense_data = sense_paddr;
2746             cmdp->u.raw.direction  =
2747                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2748             memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
2749             cmdp->u.raw.sg_ranz    = 0;
2750         }
2751
2752         if (gdth_bufflen(scp)) {
2753             cmndinfo->dma_dir = PCI_DMA_BIDIRECTIONAL;
2754             sgcnt = pci_map_sg(ha->pdev, gdth_sglist(scp), gdth_sg_count(scp),
2755                                cmndinfo->dma_dir);
2756             if (mode64) {
2757                 struct scatterlist *sl;
2758
2759                 cmdp->u.raw64.sdata = (ulong64)-1;
2760                 cmdp->u.raw64.sg_ranz = sgcnt;
2761                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2762                     cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2763 #ifdef GDTH_DMA_STATISTICS
2764                     if (cmdp->u.raw64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2765                         ha->dma64_cnt++;
2766                     else
2767                         ha->dma32_cnt++;
2768 #endif
2769                     cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
2770                 }
2771             } else {
2772                 struct scatterlist *sl;
2773
2774                 cmdp->u.raw.sdata = 0xffffffff;
2775                 cmdp->u.raw.sg_ranz = sgcnt;
2776                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2777                     cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
2778 #ifdef GDTH_DMA_STATISTICS
2779                     ha->dma32_cnt++;
2780 #endif
2781                     cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
2782                 }
2783             }
2784
2785 #ifdef GDTH_STATISTICS
2786             if (max_sg < sgcnt) {
2787                 max_sg = sgcnt;
2788                 TRACE3(("GDT: max_sg = %d\n",sgcnt));
2789             }
2790 #endif
2791
2792         }
2793         if (mode64) {
2794             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2795                    cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
2796                    cmdp->u.raw64.sg_lst[0].sg_ptr,
2797                    cmdp->u.raw64.sg_lst[0].sg_len));
2798             /* evaluate command size */
2799             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
2800                 (ushort)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
2801         } else {
2802             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2803                    cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
2804                    cmdp->u.raw.sg_lst[0].sg_ptr,
2805                    cmdp->u.raw.sg_lst[0].sg_len));
2806             /* evaluate command size */
2807             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
2808                 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
2809         }
2810     }
2811     /* check space */
2812     if (ha->cmd_len & 3)
2813         ha->cmd_len += (4 - (ha->cmd_len & 3));
2814
2815     if (ha->cmd_cnt > 0) {
2816         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2817             ha->ic_all_size) {
2818             TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
2819             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2820             return 0;
2821         }
2822     }
2823
2824     /* copy command */
2825     gdth_copy_command(ha);
2826     return cmd_index;
2827 }
2828
2829 static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2830 {
2831     register gdth_cmd_str *cmdp;
2832     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2833     int cmd_index;
2834
2835     cmdp= ha->pccb;
2836     TRACE2(("gdth_special_cmd(): "));
2837
2838     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2839         return 0;
2840
2841     *cmdp = *cmndinfo->internal_cmd_str;
2842     cmdp->RequestBuffer = scp;
2843
2844     /* search free command index */
2845     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2846         TRACE(("GDT: No free command index found\n"));
2847         return 0;
2848     }
2849
2850     /* if it's the first command, set command semaphore */
2851     if (ha->cmd_cnt == 0)
2852        gdth_set_sema0(ha);
2853
2854     /* evaluate command size, check space */
2855     if (cmdp->OpCode == GDT_IOCTL) {
2856         TRACE2(("IOCTL\n"));
2857         ha->cmd_len =
2858             GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong64);
2859     } else if (cmdp->Service == CACHESERVICE) {
2860         TRACE2(("cache command %d\n",cmdp->OpCode));
2861         if (ha->cache_feat & GDT_64BIT)
2862             ha->cmd_len =
2863                 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
2864         else
2865             ha->cmd_len =
2866                 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
2867     } else if (cmdp->Service == SCSIRAWSERVICE) {
2868         TRACE2(("raw command %d\n",cmdp->OpCode));
2869         if (ha->raw_feat & GDT_64BIT)
2870             ha->cmd_len =
2871                 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
2872         else
2873             ha->cmd_len =
2874                 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
2875     }
2876
2877     if (ha->cmd_len & 3)
2878         ha->cmd_len += (4 - (ha->cmd_len & 3));
2879
2880     if (ha->cmd_cnt > 0) {
2881         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2882             ha->ic_all_size) {
2883             TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
2884             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2885             return 0;
2886         }
2887     }
2888
2889     /* copy command */
2890     gdth_copy_command(ha);
2891     return cmd_index;
2892 }
2893
2894
2895 /* Controller event handling functions */
2896 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
2897                                       ushort idx, gdth_evt_data *evt)
2898 {
2899     gdth_evt_str *e;
2900     struct timeval tv;
2901
2902     /* no GDTH_LOCK_HA() ! */
2903     TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
2904     if (source == 0)                        /* no source -> no event */
2905         return NULL;
2906
2907     if (ebuffer[elastidx].event_source == source &&
2908         ebuffer[elastidx].event_idx == idx &&
2909         ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
2910             !memcmp((char *)&ebuffer[elastidx].event_data.eu,
2911             (char *)&evt->eu, evt->size)) ||
2912         (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
2913             !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
2914             (char *)&evt->event_string)))) {
2915         e = &ebuffer[elastidx];
2916         do_gettimeofday(&tv);
2917         e->last_stamp = tv.tv_sec;
2918         ++e->same_count;
2919     } else {
2920         if (ebuffer[elastidx].event_source != 0) {  /* entry not free ? */
2921             ++elastidx;
2922             if (elastidx == MAX_EVENTS)
2923                 elastidx = 0;
2924             if (elastidx == eoldidx) {              /* reached mark ? */
2925                 ++eoldidx;
2926                 if (eoldidx == MAX_EVENTS)
2927                     eoldidx = 0;
2928             }
2929         }
2930         e = &ebuffer[elastidx];
2931         e->event_source = source;
2932         e->event_idx = idx;
2933         do_gettimeofday(&tv);
2934         e->first_stamp = e->last_stamp = tv.tv_sec;
2935         e->same_count = 1;
2936         e->event_data = *evt;
2937         e->application = 0;
2938     }
2939     return e;
2940 }
2941
2942 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2943 {
2944     gdth_evt_str *e;
2945     int eindex;
2946     ulong flags;
2947
2948     TRACE2(("gdth_read_event() handle %d\n", handle));
2949     spin_lock_irqsave(&ha->smp_lock, flags);
2950     if (handle == -1)
2951         eindex = eoldidx;
2952     else
2953         eindex = handle;
2954     estr->event_source = 0;
2955
2956     if (eindex >= MAX_EVENTS) {
2957         spin_unlock_irqrestore(&ha->smp_lock, flags);
2958         return eindex;
2959     }
2960     e = &ebuffer[eindex];
2961     if (e->event_source != 0) {
2962         if (eindex != elastidx) {
2963             if (++eindex == MAX_EVENTS)
2964                 eindex = 0;
2965         } else {
2966             eindex = -1;
2967         }
2968         memcpy(estr, e, sizeof(gdth_evt_str));
2969     }
2970     spin_unlock_irqrestore(&ha->smp_lock, flags);
2971     return eindex;
2972 }
2973
2974 static void gdth_readapp_event(gdth_ha_str *ha,
2975                                unchar application, gdth_evt_str *estr)
2976 {
2977     gdth_evt_str *e;
2978     int eindex;
2979     ulong flags;
2980     unchar found = FALSE;
2981
2982     TRACE2(("gdth_readapp_event() app. %d\n", application));
2983     spin_lock_irqsave(&ha->smp_lock, flags);
2984     eindex = eoldidx;
2985     for (;;) {
2986         e = &ebuffer[eindex];
2987         if (e->event_source == 0)
2988             break;
2989         if ((e->application & application) == 0) {
2990             e->application |= application;
2991             found = TRUE;
2992             break;
2993         }
2994         if (eindex == elastidx)
2995             break;
2996         if (++eindex == MAX_EVENTS)
2997             eindex = 0;
2998     }
2999     if (found)
3000         memcpy(estr, e, sizeof(gdth_evt_str));
3001     else
3002         estr->event_source = 0;
3003     spin_unlock_irqrestore(&ha->smp_lock, flags);
3004 }
3005
3006 static void gdth_clear_events(void)
3007 {
3008     TRACE(("gdth_clear_events()"));
3009
3010     eoldidx = elastidx = 0;
3011     ebuffer[0].event_source = 0;
3012 }
3013
3014
3015 /* SCSI interface functions */
3016
3017 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
3018                                     int gdth_from_wait, int* pIndex)
3019 {
3020     gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
3021     gdt6_dpram_str __iomem *dp6_ptr;
3022     gdt2_dpram_str __iomem *dp2_ptr;
3023     Scsi_Cmnd *scp;
3024     int rval, i;
3025     unchar IStatus;
3026     ushort Service;
3027     ulong flags = 0;
3028 #ifdef INT_COAL
3029     int coalesced = FALSE;
3030     int next = FALSE;
3031     gdth_coal_status *pcs = NULL;
3032     int act_int_coal = 0;
3033 #endif
3034
3035     TRACE(("gdth_interrupt() IRQ %d\n", ha->irq));
3036
3037     /* if polling and not from gdth_wait() -> return */
3038     if (gdth_polling) {
3039         if (!gdth_from_wait) {
3040             return IRQ_HANDLED;
3041         }
3042     }
3043
3044     if (!gdth_polling)
3045         spin_lock_irqsave(&ha->smp_lock, flags);
3046
3047     /* search controller */
3048     IStatus = gdth_get_status(ha);
3049     if (IStatus == 0) {
3050         /* spurious interrupt */
3051         if (!gdth_polling)
3052             spin_unlock_irqrestore(&ha->smp_lock, flags);
3053         return IRQ_HANDLED;
3054     }
3055
3056 #ifdef GDTH_STATISTICS
3057     ++act_ints;
3058 #endif
3059
3060 #ifdef INT_COAL
3061     /* See if the fw is returning coalesced status */
3062     if (IStatus == COALINDEX) {
3063         /* Coalesced status.  Setup the initial status
3064            buffer pointer and flags */
3065         pcs = ha->coal_stat;
3066         coalesced = TRUE;
3067         next = TRUE;
3068     }
3069
3070     do {
3071         if (coalesced) {
3072             /* For coalesced requests all status
3073                information is found in the status buffer */
3074             IStatus = (unchar)(pcs->status & 0xff);
3075         }
3076 #endif
3077
3078         if (ha->type == GDT_EISA) {
3079             if (IStatus & 0x80) {                       /* error flag */
3080                 IStatus &= ~0x80;
3081                 ha->status = inw(ha->bmic + MAILBOXREG+8);
3082                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3083             } else                                      /* no error */
3084                 ha->status = S_OK;
3085             ha->info = inl(ha->bmic + MAILBOXREG+12);
3086             ha->service = inw(ha->bmic + MAILBOXREG+10);
3087             ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3088
3089             outb(0xff, ha->bmic + EDOORREG);    /* acknowledge interrupt */
3090             outb(0x00, ha->bmic + SEMA1REG);    /* reset status semaphore */
3091         } else if (ha->type == GDT_ISA) {
3092             dp2_ptr = ha->brd;
3093             if (IStatus & 0x80) {                       /* error flag */
3094                 IStatus &= ~0x80;
3095                 ha->status = readw(&dp2_ptr->u.ic.Status);
3096                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3097             } else                                      /* no error */
3098                 ha->status = S_OK;
3099             ha->info = readl(&dp2_ptr->u.ic.Info[0]);
3100             ha->service = readw(&dp2_ptr->u.ic.Service);
3101             ha->info2 = readl(&dp2_ptr->u.ic.Info[1]);
3102
3103             writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3104             writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3105             writeb(0, &dp2_ptr->io.Sema1);     /* reset status semaphore */
3106         } else if (ha->type == GDT_PCI) {
3107             dp6_ptr = ha->brd;
3108             if (IStatus & 0x80) {                       /* error flag */
3109                 IStatus &= ~0x80;
3110                 ha->status = readw(&dp6_ptr->u.ic.Status);
3111                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3112             } else                                      /* no error */
3113                 ha->status = S_OK;
3114             ha->info = readl(&dp6_ptr->u.ic.Info[0]);
3115             ha->service = readw(&dp6_ptr->u.ic.Service);
3116             ha->info2 = readl(&dp6_ptr->u.ic.Info[1]);
3117
3118             writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3119             writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3120             writeb(0, &dp6_ptr->io.Sema1);     /* reset status semaphore */
3121         } else if (ha->type == GDT_PCINEW) {
3122             if (IStatus & 0x80) {                       /* error flag */
3123                 IStatus &= ~0x80;
3124                 ha->status = inw(PTR2USHORT(&ha->plx->status));
3125                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3126             } else
3127                 ha->status = S_OK;
3128             ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3129             ha->service = inw(PTR2USHORT(&ha->plx->service));
3130             ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3131
3132             outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3133             outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3134         } else if (ha->type == GDT_PCIMPR) {
3135             dp6m_ptr = ha->brd;
3136             if (IStatus & 0x80) {                       /* error flag */
3137                 IStatus &= ~0x80;
3138 #ifdef INT_COAL
3139                 if (coalesced)
3140                     ha->status = pcs->ext_status & 0xffff;
3141                 else
3142 #endif
3143                     ha->status = readw(&dp6m_ptr->i960r.status);
3144                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3145             } else                                      /* no error */
3146                 ha->status = S_OK;
3147 #ifdef INT_COAL
3148             /* get information */
3149             if (coalesced) {
3150                 ha->info = pcs->info0;
3151                 ha->info2 = pcs->info1;
3152                 ha->service = (pcs->ext_status >> 16) & 0xffff;
3153             } else
3154 #endif
3155             {
3156                 ha->info = readl(&dp6m_ptr->i960r.info[0]);
3157                 ha->service = readw(&dp6m_ptr->i960r.service);
3158                 ha->info2 = readl(&dp6m_ptr->i960r.info[1]);
3159             }
3160             /* event string */
3161             if (IStatus == ASYNCINDEX) {
3162                 if (ha->service != SCREENSERVICE &&
3163                     (ha->fw_vers & 0xff) >= 0x1a) {
3164                     ha->dvr.severity = readb
3165                         (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3166                     for (i = 0; i < 256; ++i) {
3167                         ha->dvr.event_string[i] = readb
3168                             (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3169                         if (ha->dvr.event_string[i] == 0)
3170                             break;
3171                     }
3172                 }
3173             }
3174 #ifdef INT_COAL
3175             /* Make sure that non coalesced interrupts get cleared
3176                before being handled by gdth_async_event/gdth_sync_event */
3177             if (!coalesced)
3178 #endif
3179             {
3180                 writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3181                 writeb(0, &dp6m_ptr->i960r.sema1_reg);
3182             }
3183         } else {
3184             TRACE2(("gdth_interrupt() unknown controller type\n"));
3185             if (!gdth_polling)
3186                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3187             return IRQ_HANDLED;
3188         }
3189
3190         TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3191                IStatus,ha->status,ha->info));
3192
3193         if (gdth_from_wait) {
3194             *pIndex = (int)IStatus;
3195         }
3196
3197         if (IStatus == ASYNCINDEX) {
3198             TRACE2(("gdth_interrupt() async. event\n"));
3199             gdth_async_event(ha);
3200             if (!gdth_polling)
3201                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3202             gdth_next(ha);
3203             return IRQ_HANDLED;
3204         }
3205
3206         if (IStatus == SPEZINDEX) {
3207             TRACE2(("Service unknown or not initialized !\n"));
3208             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3209             ha->dvr.eu.driver.ionode = ha->hanum;
3210             gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3211             if (!gdth_polling)
3212                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3213             return IRQ_HANDLED;
3214         }
3215         scp     = ha->cmd_tab[IStatus-2].cmnd;
3216         Service = ha->cmd_tab[IStatus-2].service;
3217         ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3218         if (scp == UNUSED_CMND) {
3219             TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3220             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3221             ha->dvr.eu.driver.ionode = ha->hanum;
3222             ha->dvr.eu.driver.index = IStatus;
3223             gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3224             if (!gdth_polling)
3225                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3226             return IRQ_HANDLED;
3227         }
3228         if (scp == INTERNAL_CMND) {
3229             TRACE(("gdth_interrupt() answer to internal command\n"));
3230             if (!gdth_polling)
3231                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3232             return IRQ_HANDLED;
3233         }
3234
3235         TRACE(("gdth_interrupt() sync. status\n"));
3236         rval = gdth_sync_event(ha,Service,IStatus,scp);
3237         if (!gdth_polling)
3238             spin_unlock_irqrestore(&ha->smp_lock, flags);
3239         if (rval == 2) {
3240             gdth_putq(ha, scp, gdth_cmnd_priv(scp)->priority);
3241         } else if (rval == 1) {
3242             gdth_scsi_done(scp);
3243         }
3244
3245 #ifdef INT_COAL
3246         if (coalesced) {
3247             /* go to the next status in the status buffer */
3248             ++pcs;
3249 #ifdef GDTH_STATISTICS
3250             ++act_int_coal;
3251             if (act_int_coal > max_int_coal) {
3252                 max_int_coal = act_int_coal;
3253                 printk("GDT: max_int_coal = %d\n",(ushort)max_int_coal);
3254             }
3255 #endif
3256             /* see if there is another status */
3257             if (pcs->status == 0)
3258                 /* Stop the coalesce loop */
3259                 next = FALSE;
3260         }
3261     } while (next);
3262
3263     /* coalescing only for new GDT_PCIMPR controllers available */
3264     if (ha->type == GDT_PCIMPR && coalesced) {
3265         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3266         writeb(0, &dp6m_ptr->i960r.sema1_reg);
3267     }
3268 #endif
3269
3270     gdth_next(ha);
3271     return IRQ_HANDLED;
3272 }
3273
3274 static irqreturn_t gdth_interrupt(int irq, void *dev_id)
3275 {
3276         gdth_ha_str *ha = dev_id;
3277
3278         return __gdth_interrupt(ha, false, NULL);
3279 }
3280
3281 static int gdth_sync_event(gdth_ha_str *ha, int service, unchar index,
3282                                                               Scsi_Cmnd *scp)
3283 {
3284     gdth_msg_str *msg;
3285     gdth_cmd_str *cmdp;
3286     unchar b, t;
3287     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
3288
3289     cmdp = ha->pccb;
3290     TRACE(("gdth_sync_event() serv %d status %d\n",
3291            service,ha->status));
3292
3293     if (service == SCREENSERVICE) {
3294         msg  = ha->pmsg;
3295         TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3296                msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3297         if (msg->msg_len > MSGLEN+1)
3298             msg->msg_len = MSGLEN+1;
3299         if (msg->msg_len)
3300             if (!(msg->msg_answer && msg->msg_ext)) {
3301                 msg->msg_text[msg->msg_len] = '\0';
3302                 printk("%s",msg->msg_text);
3303             }
3304
3305         if (msg->msg_ext && !msg->msg_answer) {
3306             while (gdth_test_busy(ha))
3307                 gdth_delay(0);
3308             cmdp->Service       = SCREENSERVICE;
3309             cmdp->RequestBuffer = SCREEN_CMND;
3310             gdth_get_cmd_index(ha);
3311             gdth_set_sema0(ha);
3312             cmdp->OpCode        = GDT_READ;
3313             cmdp->BoardNode     = LOCALBOARD;
3314             cmdp->u.screen.reserved  = 0;
3315             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3316             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3317             ha->cmd_offs_dpmem = 0;
3318             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3319                 + sizeof(ulong64);
3320             ha->cmd_cnt = 0;
3321             gdth_copy_command(ha);
3322             gdth_release_event(ha);
3323             return 0;
3324         }
3325
3326         if (msg->msg_answer && msg->msg_alen) {
3327             /* default answers (getchar() not possible) */
3328             if (msg->msg_alen == 1) {
3329                 msg->msg_alen = 0;
3330                 msg->msg_len = 1;
3331                 msg->msg_text[0] = 0;
3332             } else {
3333                 msg->msg_alen -= 2;
3334                 msg->msg_len = 2;
3335                 msg->msg_text[0] = 1;
3336                 msg->msg_text[1] = 0;
3337             }
3338             msg->msg_ext    = 0;
3339             msg->msg_answer = 0;
3340             while (gdth_test_busy(ha))
3341                 gdth_delay(0);
3342             cmdp->Service       = SCREENSERVICE;
3343             cmdp->RequestBuffer = SCREEN_CMND;
3344             gdth_get_cmd_index(ha);
3345             gdth_set_sema0(ha);
3346             cmdp->OpCode        = GDT_WRITE;
3347             cmdp->BoardNode     = LOCALBOARD;
3348             cmdp->u.screen.reserved  = 0;
3349             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3350             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3351             ha->cmd_offs_dpmem = 0;
3352             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3353                 + sizeof(ulong64);
3354             ha->cmd_cnt = 0;
3355             gdth_copy_command(ha);
3356             gdth_release_event(ha);
3357             return 0;
3358         }
3359         printk("\n");
3360
3361     } else {
3362         b = scp->device->channel;
3363         t = scp->device->id;
3364         if (cmndinfo->OpCode == -1 && b != ha->virt_bus) {
3365             ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3366         }
3367         /* cache or raw service */
3368         if (ha->status == S_BSY) {
3369             TRACE2(("Controller busy -> retry !\n"));
3370             if (cmndinfo->OpCode == GDT_MOUNT)
3371                 cmndinfo->OpCode = GDT_CLUST_INFO;
3372             /* retry */
3373             return 2;
3374         }
3375         if (gdth_bufflen(scp))
3376             pci_unmap_sg(ha->pdev, gdth_sglist(scp), gdth_sg_count(scp),
3377                          cmndinfo->dma_dir);
3378
3379         if (cmndinfo->sense_paddr)
3380             pci_unmap_page(ha->pdev, cmndinfo->sense_paddr, 16,
3381                                                            PCI_DMA_FROMDEVICE);
3382
3383         if (ha->status == S_OK) {
3384             cmndinfo->status = S_OK;
3385             cmndinfo->info = ha->info;
3386             if (cmndinfo->OpCode != -1) {
3387                 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3388                         cmndinfo->OpCode));
3389                 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3390                 if (cmndinfo->OpCode == GDT_CLUST_INFO) {
3391                     ha->hdr[t].cluster_type = (unchar)ha->info;
3392                     if (!(ha->hdr[t].cluster_type &
3393                         CLUSTER_MOUNTED)) {
3394                         /* NOT MOUNTED -> MOUNT */
3395                         cmndinfo->OpCode = GDT_MOUNT;
3396                         if (ha->hdr[t].cluster_type &
3397                             CLUSTER_RESERVED) {
3398                             /* cluster drive RESERVED (on the other node) */
3399                             cmndinfo->phase = -2;      /* reservation conflict */
3400                         }
3401                     } else {
3402                         cmndinfo->OpCode = -1;
3403                     }
3404                 } else {
3405                     if (cmndinfo->OpCode == GDT_MOUNT) {
3406                         ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3407                         ha->hdr[t].media_changed = TRUE;
3408                     } else if (cmndinfo->OpCode == GDT_UNMOUNT) {
3409                         ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3410                         ha->hdr[t].media_changed = TRUE;
3411                     }
3412                     cmndinfo->OpCode = -1;
3413                 }
3414                 /* retry */
3415                 cmndinfo->priority = HIGH_PRI;
3416                 return 2;
3417             } else {
3418                 /* RESERVE/RELEASE ? */
3419                 if (scp->cmnd[0] == RESERVE) {
3420                     ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3421                 } else if (scp->cmnd[0] == RELEASE) {
3422                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3423                 }
3424                 scp->result = DID_OK << 16;
3425                 scp->sense_buffer[0] = 0;
3426             }
3427         } else {
3428             cmndinfo->status = ha->status;
3429             cmndinfo->info = ha->info;
3430
3431             if (cmndinfo->OpCode != -1) {
3432                 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3433                         cmndinfo->OpCode, ha->status));
3434                 if (cmndinfo->OpCode == GDT_SCAN_START ||
3435                     cmndinfo->OpCode == GDT_SCAN_END) {
3436                     cmndinfo->OpCode = -1;
3437                     /* retry */
3438                     cmndinfo->priority = HIGH_PRI;
3439                     return 2;
3440                 }
3441                 memset((char*)scp->sense_buffer,0,16);
3442                 scp->sense_buffer[0] = 0x70;
3443                 scp->sense_buffer[2] = NOT_READY;
3444                 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3445             } else if (service == CACHESERVICE) {
3446                 if (ha->status == S_CACHE_UNKNOWN &&
3447                     (ha->hdr[t].cluster_type &
3448                      CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3449                     /* bus reset -> force GDT_CLUST_INFO */
3450                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3451                 }
3452                 memset((char*)scp->sense_buffer,0,16);
3453                 if (ha->status == (ushort)S_CACHE_RESERV) {
3454                     scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3455                 } else {
3456                     scp->sense_buffer[0] = 0x70;
3457                     scp->sense_buffer[2] = NOT_READY;
3458                     scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3459                 }
3460                 if (!cmndinfo->internal_command) {
3461                     ha->dvr.size = sizeof(ha->dvr.eu.sync);
3462                     ha->dvr.eu.sync.ionode  = ha->hanum;
3463                     ha->dvr.eu.sync.service = service;
3464                     ha->dvr.eu.sync.status  = ha->status;
3465                     ha->dvr.eu.sync.info    = ha->info;
3466                     ha->dvr.eu.sync.hostdrive = t;
3467                     if (ha->status >= 0x8000)
3468                         gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3469                     else
3470                         gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3471                 }
3472             } else {
3473                 /* sense buffer filled from controller firmware (DMA) */
3474                 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3475                     scp->result = DID_BAD_TARGET << 16;
3476                 } else {
3477                     scp->result = (DID_OK << 16) | ha->info;
3478                 }
3479             }
3480         }
3481         if (!cmndinfo->wait_for_completion)
3482             cmndinfo->wait_for_completion++;
3483         else
3484             return 1;
3485     }
3486
3487     return 0;
3488 }
3489
3490 static char *async_cache_tab[] = {
3491 /* 0*/  "\011\000\002\002\002\004\002\006\004"
3492         "GDT HA %u, service %u, async. status %u/%lu unknown",
3493 /* 1*/  "\011\000\002\002\002\004\002\006\004"
3494         "GDT HA %u, service %u, async. status %u/%lu unknown",
3495 /* 2*/  "\005\000\002\006\004"
3496         "GDT HA %u, Host Drive %lu not ready",
3497 /* 3*/  "\005\000\002\006\004"
3498         "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3499 /* 4*/  "\005\000\002\006\004"
3500         "GDT HA %u, mirror update on Host Drive %lu failed",
3501 /* 5*/  "\005\000\002\006\004"
3502         "GDT HA %u, Mirror Drive %lu failed",
3503 /* 6*/  "\005\000\002\006\004"
3504         "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3505 /* 7*/  "\005\000\002\006\004"
3506         "GDT HA %u, Host Drive %lu write protected",
3507 /* 8*/  "\005\000\002\006\004"
3508         "GDT HA %u, media changed in Host Drive %lu",
3509 /* 9*/  "\005\000\002\006\004"
3510         "GDT HA %u, Host Drive %lu is offline",
3511 /*10*/  "\005\000\002\006\004"
3512         "GDT HA %u, media change of Mirror Drive %lu",
3513 /*11*/  "\005\000\002\006\004"
3514         "GDT HA %u, Mirror Drive %lu is write protected",
3515 /*12*/  "\005\000\002\006\004"
3516         "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3517 /*13*/  "\007\000\002\006\002\010\002"
3518         "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3519 /*14*/  "\005\000\002\006\002"
3520         "GDT HA %u, Array Drive %u: FAIL state entered",
3521 /*15*/  "\005\000\002\006\002"
3522         "GDT HA %u, Array Drive %u: error",
3523 /*16*/  "\007\000\002\006\002\010\002"
3524         "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3525 /*17*/  "\005\000\002\006\002"
3526         "GDT HA %u, Array Drive %u: parity build failed",
3527 /*18*/  "\005\000\002\006\002"
3528         "GDT HA %u, Array Drive %u: drive rebuild failed",
3529 /*19*/  "\005\000\002\010\002"
3530         "GDT HA %u, Test of Hot Fix %u failed",
3531 /*20*/  "\005\000\002\006\002"
3532         "GDT HA %u, Array Drive %u: drive build finished successfully",
3533 /*21*/  "\005\000\002\006\002"
3534         "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3535 /*22*/  "\007\000\002\006\002\010\002"
3536         "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3537 /*23*/  "\005\000\002\006\002"
3538         "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3539 /*24*/  "\005\000\002\010\002"
3540         "GDT HA %u, mirror update on Cache Drive %u completed",
3541 /*25*/  "\005\000\002\010\002"
3542         "GDT HA %u, mirror update on Cache Drive %lu failed",
3543 /*26*/  "\005\000\002\006\002"
3544         "GDT HA %u, Array Drive %u: drive rebuild started",
3545 /*27*/  "\005\000\002\012\001"
3546         "GDT HA %u, Fault bus %u: SHELF OK detected",
3547 /*28*/  "\005\000\002\012\001"
3548         "GDT HA %u, Fault bus %u: SHELF not OK detected",
3549 /*29*/  "\007\000\002\012\001\013\001"
3550         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3551 /*30*/  "\007\000\002\012\001\013\001"
3552         "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3553 /*31*/  "\007\000\002\012\001\013\001"
3554         "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3555 /*32*/  "\007\000\002\012\001\013\001"
3556         "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3557 /*33*/  "\007\000\002\012\001\013\001"
3558         "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3559 /*34*/  "\011\000\002\012\001\013\001\006\004"
3560         "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3561 /*35*/  "\007\000\002\012\001\013\001"
3562         "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3563 /*36*/  "\007\000\002\012\001\013\001"
3564         "GDT HA %u, Fault bus %u, ID %u: disk not available",
3565 /*37*/  "\007\000\002\012\001\006\004"
3566         "GDT HA %u, Fault bus %u: swap detected (%lu)",
3567 /*38*/  "\007\000\002\012\001\013\001"
3568         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3569 /*39*/  "\007\000\002\012\001\013\001"
3570         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3571 /*40*/  "\007\000\002\012\001\013\001"
3572         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3573 /*41*/  "\007\000\002\012\001\013\001"
3574         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3575 /*42*/  "\005\000\002\006\002"
3576         "GDT HA %u, Array Drive %u: drive build started",
3577 /*43*/  "\003\000\002"
3578         "GDT HA %u, DRAM parity error detected",
3579 /*44*/  "\005\000\002\006\002"
3580         "GDT HA %u, Mirror Drive %u: update started",
3581 /*45*/  "\007\000\002\006\002\010\002"
3582         "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3583 /*46*/  "\005\000\002\006\002"
3584         "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3585 /*47*/  "\005\000\002\006\002"
3586         "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3587 /*48*/  "\005\000\002\006\002"
3588         "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3589 /*49*/  "\005\000\002\006\002"
3590         "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3591 /*50*/  "\007\000\002\012\001\013\001"
3592         "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3593 /*51*/  "\005\000\002\006\002"
3594         "GDT HA %u, Array Drive %u: expand started",
3595 /*52*/  "\005\000\002\006\002"
3596         "GDT HA %u, Array Drive %u: expand finished successfully",
3597 /*53*/  "\005\000\002\006\002"
3598         "GDT HA %u, Array Drive %u: expand failed",
3599 /*54*/  "\003\000\002"
3600         "GDT HA %u, CPU temperature critical",
3601 /*55*/  "\003\000\002"
3602         "GDT HA %u, CPU temperature OK",
3603 /*56*/  "\005\000\002\006\004"
3604         "GDT HA %u, Host drive %lu created",
3605 /*57*/  "\005\000\002\006\002"
3606         "GDT HA %u, Array Drive %u: expand restarted",
3607 /*58*/  "\005\000\002\006\002"
3608         "GDT HA %u, Array Drive %u: expand stopped",
3609 /*59*/  "\005\000\002\010\002"
3610         "GDT HA %u, Mirror Drive %u: drive build quited",
3611 /*60*/  "\005\000\002\006\002"
3612         "GDT HA %u, Array Drive %u: parity build quited",
3613 /*61*/  "\005\000\002\006\002"
3614         "GDT HA %u, Array Drive %u: drive rebuild quited",
3615 /*62*/  "\005\000\002\006\002"
3616         "GDT HA %u, Array Drive %u: parity verify started",
3617 /*63*/  "\005\000\002\006\002"
3618         "GDT HA %u, Array Drive %u: parity verify done",
3619 /*64*/  "\005\000\002\006\002"
3620         "GDT HA %u, Array Drive %u: parity verify failed",
3621 /*65*/  "\005\000\002\006\002"
3622         "GDT HA %u, Array Drive %u: parity error detected",
3623 /*66*/  "\005\000\002\006\002"
3624         "GDT HA %u, Array Drive %u: parity verify quited",
3625 /*67*/  "\005\000\002\006\002"
3626         "GDT HA %u, Host Drive %u reserved",
3627 /*68*/  "\005\000\002\006\002"
3628         "GDT HA %u, Host Drive %u mounted and released",
3629 /*69*/  "\005\000\002\006\002"
3630         "GDT HA %u, Host Drive %u released",
3631 /*70*/  "\003\000\002"
3632         "GDT HA %u, DRAM error detected and corrected with ECC",
3633 /*71*/  "\003\000\002"
3634         "GDT HA %u, Uncorrectable DRAM error detected with ECC",
3635 /*72*/  "\011\000\002\012\001\013\001\014\001"
3636         "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
3637 /*73*/  "\005\000\002\006\002"
3638         "GDT HA %u, Host drive %u resetted locally",
3639 /*74*/  "\005\000\002\006\002"
3640         "GDT HA %u, Host drive %u resetted remotely",
3641 /*75*/  "\003\000\002"
3642         "GDT HA %u, async. status 75 unknown",
3643 };
3644
3645
3646 static int gdth_async_event(gdth_ha_str *ha)
3647 {
3648     gdth_cmd_str *cmdp;
3649     int cmd_index;
3650
3651     cmdp= ha->pccb;
3652     TRACE2(("gdth_async_event() ha %d serv %d\n",
3653             ha->hanum, ha->service));
3654
3655     if (ha->service == SCREENSERVICE) {
3656         if (ha->status == MSG_REQUEST) {
3657             while (gdth_test_busy(ha))
3658                 gdth_delay(0);
3659             cmdp->Service       = SCREENSERVICE;
3660             cmdp->RequestBuffer = SCREEN_CMND;
3661             cmd_index = gdth_get_cmd_index(ha);
3662             gdth_set_sema0(ha);
3663             cmdp->OpCode        = GDT_READ;
3664             cmdp->BoardNode     = LOCALBOARD;
3665             cmdp->u.screen.reserved  = 0;
3666             cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
3667             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3668             ha->cmd_offs_dpmem = 0;
3669             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3670                 + sizeof(ulong64);
3671             ha->cmd_cnt = 0;
3672             gdth_copy_command(ha);
3673             if (ha->type == GDT_EISA)
3674                 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
3675             else if (ha->type == GDT_ISA)
3676                 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
3677             else
3678                 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
3679                        (ushort)((ha->brd_phys>>3)&0x1f));
3680             gdth_release_event(ha);
3681         }
3682
3683     } else {
3684         if (ha->type == GDT_PCIMPR &&
3685             (ha->fw_vers & 0xff) >= 0x1a) {
3686             ha->dvr.size = 0;
3687             ha->dvr.eu.async.ionode = ha->hanum;
3688             ha->dvr.eu.async.status  = ha->status;
3689             /* severity and event_string already set! */
3690         } else {
3691             ha->dvr.size = sizeof(ha->dvr.eu.async);
3692             ha->dvr.eu.async.ionode   = ha->hanum;
3693             ha->dvr.eu.async.service = ha->service;
3694             ha->dvr.eu.async.status  = ha->status;
3695             ha->dvr.eu.async.info    = ha->info;
3696             *(ulong32 *)ha->dvr.eu.async.scsi_coord  = ha->info2;
3697         }
3698         gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
3699         gdth_log_event( &ha->dvr, NULL );
3700
3701         /* new host drive from expand? */
3702         if (ha->service == CACHESERVICE && ha->status == 56) {
3703             TRACE2(("gdth_async_event(): new host drive %d created\n",
3704                     (ushort)ha->info));
3705             /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
3706         }
3707     }
3708     return 1;
3709 }
3710
3711 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3712 {
3713     gdth_stackframe stack;
3714     char *f = NULL;
3715     int i,j;
3716
3717     TRACE2(("gdth_log_event()\n"));
3718     if (dvr->size == 0) {
3719         if (buffer == NULL) {
3720             printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
3721         } else {
3722             sprintf(buffer,"Adapter %d: %s\n",
3723                 dvr->eu.async.ionode,dvr->event_string);
3724         }
3725     } else if (dvr->eu.async.service == CACHESERVICE &&
3726         INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
3727         TRACE2(("GDT: Async. event cache service, event no.: %d\n",
3728                 dvr->eu.async.status));
3729
3730         f = async_cache_tab[dvr->eu.async.status];
3731
3732         /* i: parameter to push, j: stack element to fill */
3733         for (j=0,i=1; i < f[0]; i+=2) {
3734             switch (f[i+1]) {
3735               case 4:
3736                 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]];
3737                 break;
3738               case 2:
3739                 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]];
3740                 break;
3741               case 1:
3742                 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]];
3743                 break;
3744               default:
3745                 break;
3746             }
3747         }
3748
3749         if (buffer == NULL) {
3750             printk(&f[(int)f[0]],stack);
3751             printk("\n");
3752         } else {
3753             sprintf(buffer,&f[(int)f[0]],stack);
3754         }
3755
3756     } else {
3757         if (buffer == NULL) {
3758             printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
3759                    dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3760         } else {
3761             sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
3762                     dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3763         }
3764     }
3765 }
3766
3767 #ifdef GDTH_STATISTICS
3768 static void gdth_timeout(ulong data)
3769 {
3770     ulong32 i;
3771     Scsi_Cmnd *nscp;
3772     gdth_ha_str *ha;
3773     ulong flags;
3774
3775     BUG_ON(list_empty(&gdth_instances));
3776
3777     ha = list_first_entry(&gdth_instances, gdth_ha_str, list);
3778     spin_lock_irqsave(&ha->smp_lock, flags);
3779
3780     for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
3781         if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
3782             ++act_stats;
3783
3784     for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
3785         ++act_rq;
3786
3787     TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
3788             act_ints, act_ios, act_stats, act_rq));
3789     act_ints = act_ios = 0;
3790
3791     gdth_timer.expires = jiffies + 30 * HZ;
3792     add_timer(&gdth_timer);
3793     spin_unlock_irqrestore(&ha->smp_lock, flags);
3794 }
3795 #endif
3796
3797 static void __init internal_setup(char *str,int *ints)
3798 {
3799     int i, argc;
3800     char *cur_str, *argv;
3801
3802     TRACE2(("internal_setup() str %s ints[0] %d\n",
3803             str ? str:"NULL", ints ? ints[0]:0));
3804
3805     /* read irq[] from ints[] */
3806     if (ints) {
3807         argc = ints[0];
3808         if (argc > 0) {
3809             if (argc > MAXHA)
3810                 argc = MAXHA;
3811             for (i = 0; i < argc; ++i)
3812                 irq[i] = ints[i+1];
3813         }
3814     }
3815
3816     /* analyse string */
3817     argv = str;
3818     while (argv && (cur_str = strchr(argv, ':'))) {
3819         int val = 0, c = *++cur_str;
3820
3821         if (c == 'n' || c == 'N')
3822             val = 0;
3823         else if (c == 'y' || c == 'Y')
3824             val = 1;
3825         else
3826             val = (int)simple_strtoul(cur_str, NULL, 0);
3827
3828         if (!strncmp(argv, "disable:", 8))
3829             disable = val;
3830         else if (!strncmp(argv, "reserve_mode:", 13))
3831             reserve_mode = val;
3832         else if (!strncmp(argv, "reverse_scan:", 13))
3833             reverse_scan = val;
3834         else if (!strncmp(argv, "hdr_channel:", 12))
3835             hdr_channel = val;
3836         else if (!strncmp(argv, "max_ids:", 8))
3837             max_ids = val;
3838         else if (!strncmp(argv, "rescan:", 7))
3839             rescan = val;
3840         else if (!strncmp(argv, "shared_access:", 14))
3841             shared_access = val;
3842         else if (!strncmp(argv, "probe_eisa_isa:", 15))
3843             probe_eisa_isa = val;
3844         else if (!strncmp(argv, "reserve_list:", 13)) {
3845             reserve_list[0] = val;
3846             for (i = 1; i < MAX_RES_ARGS; i++) {
3847                 cur_str = strchr(cur_str, ',');
3848                 if (!cur_str)
3849                     break;
3850                 if (!isdigit((int)*++cur_str)) {
3851                     --cur_str;
3852                     break;
3853                 }
3854                 reserve_list[i] =
3855                     (int)simple_strtoul(cur_str, NULL, 0);
3856             }
3857             if (!cur_str)
3858                 break;
3859             argv = ++cur_str;
3860             continue;
3861         }
3862
3863         if ((argv = strchr(argv, ',')))
3864             ++argv;
3865     }
3866 }
3867
3868 int __init option_setup(char *str)
3869 {
3870     int ints[MAXHA];
3871     char *cur = str;
3872     int i = 1;
3873
3874     TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
3875
3876     while (cur && isdigit(*cur) && i <= MAXHA) {
3877         ints[i++] = simple_strtoul(cur, NULL, 0);
3878         if ((cur = strchr(cur, ',')) != NULL) cur++;
3879     }
3880
3881     ints[0] = i - 1;
3882     internal_setup(cur, ints);
3883     return 1;
3884 }
3885
3886 static const char *gdth_ctr_name(gdth_ha_str *ha)
3887 {
3888     TRACE2(("gdth_ctr_name()\n"));
3889
3890     if (ha->type == GDT_EISA) {
3891         switch (ha->stype) {
3892           case GDT3_ID:
3893             return("GDT3000/3020");
3894           case GDT3A_ID:
3895             return("GDT3000A/3020A/3050A");
3896           case GDT3B_ID:
3897             return("GDT3000B/3010A");
3898         }
3899     } else if (ha->type == GDT_ISA) {
3900         return("GDT2000/2020");
3901     } else if (ha->type == GDT_PCI) {
3902         switch (ha->pdev->device) {
3903           case PCI_DEVICE_ID_VORTEX_GDT60x0:
3904             return("GDT6000/6020/6050");
3905           case PCI_DEVICE_ID_VORTEX_GDT6000B:
3906             return("GDT6000B/6010");
3907         }
3908     }
3909     /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
3910
3911     return("");
3912 }
3913
3914 static const char *gdth_info(struct Scsi_Host *shp)
3915 {
3916     gdth_ha_str *ha = shost_priv(shp);
3917
3918     TRACE2(("gdth_info()\n"));
3919     return ((const char *)ha->binfo.type_string);
3920 }
3921
3922 static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
3923 {
3924     gdth_ha_str *ha = shost_priv(scp->device->host);
3925     int i;
3926     ulong flags;
3927     Scsi_Cmnd *cmnd;
3928     unchar b;
3929
3930     TRACE2(("gdth_eh_bus_reset()\n"));
3931
3932     b = scp->device->channel;
3933
3934     /* clear command tab */
3935     spin_lock_irqsave(&ha->smp_lock, flags);
3936     for (i = 0; i < GDTH_MAXCMDS; ++i) {
3937         cmnd = ha->cmd_tab[i].cmnd;
3938         if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
3939             ha->cmd_tab[i].cmnd = UNUSED_CMND;
3940     }
3941     spin_unlock_irqrestore(&ha->smp_lock, flags);
3942
3943     if (b == ha->virt_bus) {
3944         /* host drives */
3945         for (i = 0; i < MAX_HDRIVES; ++i) {
3946             if (ha->hdr[i].present) {
3947                 spin_lock_irqsave(&ha->smp_lock, flags);
3948                 gdth_polling = TRUE;
3949                 while (gdth_test_busy(ha))
3950                     gdth_delay(0);
3951                 if (gdth_internal_cmd(ha, CACHESERVICE,
3952                                       GDT_CLUST_RESET, i, 0, 0))
3953                     ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
3954                 gdth_polling = FALSE;
3955                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3956             }
3957         }
3958     } else {
3959         /* raw devices */
3960         spin_lock_irqsave(&ha->smp_lock, flags);
3961         for (i = 0; i < MAXID; ++i)
3962             ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
3963         gdth_polling = TRUE;
3964         while (gdth_test_busy(ha))
3965             gdth_delay(0);
3966         gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESET_BUS,
3967                           BUS_L2P(ha,b), 0, 0);
3968         gdth_polling = FALSE;
3969         spin_unlock_irqrestore(&ha->smp_lock, flags);
3970     }
3971     return SUCCESS;
3972 }
3973
3974 static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
3975 {
3976     unchar b, t;
3977     gdth_ha_str *ha = shost_priv(sdev->host);
3978     struct scsi_device *sd;
3979     unsigned capacity;
3980
3981     sd = sdev;
3982     capacity = cap;
3983     b = sd->channel;
3984     t = sd->id;
3985     TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", ha->hanum, b, t));
3986
3987     if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
3988         /* raw device or host drive without mapping information */
3989         TRACE2(("Evaluate mapping\n"));
3990         gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
3991     } else {
3992         ip[0] = ha->hdr[t].heads;
3993         ip[1] = ha->hdr[t].secs;
3994         ip[2] = capacity / ip[0] / ip[1];
3995     }
3996
3997     TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
3998             ip[0],ip[1],ip[2]));
3999     return 0;
4000 }
4001
4002
4003 static int gdth_queuecommand(struct scsi_cmnd *scp,
4004                                 void (*done)(struct scsi_cmnd *))
4005 {
4006     gdth_ha_str *ha = shost_priv(scp->device->host);
4007     struct gdth_cmndinfo *cmndinfo;
4008
4009     TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
4010
4011     cmndinfo = gdth_get_cmndinfo(ha);
4012     BUG_ON(!cmndinfo);
4013
4014     scp->scsi_done = done;
4015     gdth_update_timeout(scp, scp->timeout_per_command * 6);
4016     cmndinfo->priority = DEFAULT_PRI;
4017
4018     gdth_set_bufflen(scp, scsi_bufflen(scp));
4019     gdth_set_sg_count(scp, scsi_sg_count(scp));
4020     gdth_set_sglist(scp, scsi_sglist(scp));
4021
4022     return __gdth_queuecommand(ha, scp, cmndinfo);
4023 }
4024
4025 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp,
4026                                 struct gdth_cmndinfo *cmndinfo)
4027 {
4028     scp->host_scribble = (unsigned char *)cmndinfo;
4029     cmndinfo->wait_for_completion = 1;
4030     cmndinfo->phase = -1;
4031     cmndinfo->OpCode = -1;
4032
4033 #ifdef GDTH_STATISTICS
4034     ++act_ios;
4035 #endif
4036
4037     gdth_putq(ha, scp, cmndinfo->priority);
4038     gdth_next(ha);
4039     return 0;
4040 }
4041
4042
4043 static int gdth_open(struct inode *inode, struct file *filep)
4044 {
4045     gdth_ha_str *ha;
4046
4047     list_for_each_entry(ha, &gdth_instances, list) {
4048         if (!ha->sdev)
4049             ha->sdev = scsi_get_host_dev(ha->shost);
4050     }
4051
4052     TRACE(("gdth_open()\n"));
4053     return 0;
4054 }
4055
4056 static int gdth_close(struct inode *inode, struct file *filep)
4057 {
4058     TRACE(("gdth_close()\n"));
4059     return 0;
4060 }
4061
4062 static int ioc_event(void __user *arg)
4063 {
4064     gdth_ioctl_event evt;
4065     gdth_ha_str *ha;
4066     ulong flags;
4067
4068     if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)))
4069         return -EFAULT;
4070     ha = gdth_find_ha(evt.ionode);
4071     if (!ha)
4072         return -EFAULT;
4073
4074     if (evt.erase == 0xff) {
4075         if (evt.event.event_source == ES_TEST)
4076             evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
4077         else if (evt.event.event_source == ES_DRIVER)
4078             evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
4079         else if (evt.event.event_source == ES_SYNC)
4080             evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
4081         else
4082             evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
4083         spin_lock_irqsave(&ha->smp_lock, flags);
4084         gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
4085                          &evt.event.event_data);
4086         spin_unlock_irqrestore(&ha->smp_lock, flags);
4087     } else if (evt.erase == 0xfe) {
4088         gdth_clear_events();
4089     } else if (evt.erase == 0) {
4090         evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
4091     } else {
4092         gdth_readapp_event(ha, evt.erase, &evt.event);
4093     }
4094     if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
4095         return -EFAULT;
4096     return 0;
4097 }
4098
4099 static int ioc_lockdrv(void __user *arg)
4100 {
4101     gdth_ioctl_lockdrv ldrv;
4102     unchar i, j;
4103     ulong flags;
4104     gdth_ha_str *ha;
4105
4106     if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)))
4107         return -EFAULT;
4108     ha = gdth_find_ha(ldrv.ionode);
4109     if (!ha)
4110         return -EFAULT;
4111
4112     for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
4113         j = ldrv.drives[i];
4114         if (j >= MAX_HDRIVES || !ha->hdr[j].present)
4115             continue;
4116         if (ldrv.lock) {
4117             spin_lock_irqsave(&ha->smp_lock, flags);
4118             ha->hdr[j].lock = 1;
4119             spin_unlock_irqrestore(&ha->smp_lock, flags);
4120             gdth_wait_completion(ha, ha->bus_cnt, j);
4121             gdth_stop_timeout(ha, ha->bus_cnt, j);
4122         } else {
4123             spin_lock_irqsave(&ha->smp_lock, flags);
4124             ha->hdr[j].lock = 0;
4125             spin_unlock_irqrestore(&ha->smp_lock, flags);
4126             gdth_start_timeout(ha, ha->bus_cnt, j);
4127             gdth_next(ha);
4128         }
4129     }
4130     return 0;
4131 }
4132
4133 static int ioc_resetdrv(void __user *arg, char *cmnd)
4134 {
4135     gdth_ioctl_reset res;
4136     gdth_cmd_str cmd;
4137     gdth_ha_str *ha;
4138     int rval;
4139
4140     if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
4141         res.number >= MAX_HDRIVES)
4142         return -EFAULT;
4143     ha = gdth_find_ha(res.ionode);
4144     if (!ha)
4145         return -EFAULT;
4146
4147     if (!ha->hdr[res.number].present)
4148         return 0;
4149     memset(&cmd, 0, sizeof(gdth_cmd_str));
4150     cmd.Service = CACHESERVICE;
4151     cmd.OpCode = GDT_CLUST_RESET;
4152     if (ha->cache_feat & GDT_64BIT)
4153         cmd.u.cache64.DeviceNo = res.number;
4154     else
4155         cmd.u.cache.DeviceNo = res.number;
4156
4157     rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
4158     if (rval < 0)
4159         return rval;
4160     res.status = rval;
4161
4162     if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
4163         return -EFAULT;
4164     return 0;
4165 }
4166
4167 static int ioc_general(void __user *arg, char *cmnd)
4168 {
4169     gdth_ioctl_general gen;
4170     char *buf = NULL;
4171     ulong64 paddr;
4172     gdth_ha_str *ha;
4173     int rval;
4174
4175     if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)))
4176         return -EFAULT;
4177     ha = gdth_find_ha(gen.ionode);
4178     if (!ha)
4179         return -EFAULT;
4180     if (gen.data_len + gen.sense_len != 0) {
4181         if (!(buf = gdth_ioctl_alloc(ha, gen.data_len + gen.sense_len,
4182                                      FALSE, &paddr)))
4183             return -EFAULT;
4184         if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
4185                            gen.data_len + gen.sense_len)) {
4186             gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4187             return -EFAULT;
4188         }
4189
4190         if (gen.command.OpCode == GDT_IOCTL) {
4191             gen.command.u.ioctl.p_param = paddr;
4192         } else if (gen.command.Service == CACHESERVICE) {
4193             if (ha->cache_feat & GDT_64BIT) {
4194                 /* copy elements from 32-bit IOCTL structure */
4195                 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
4196                 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
4197                 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
4198                 /* addresses */
4199                 if (ha->cache_feat & SCATTER_GATHER) {
4200                     gen.command.u.cache64.DestAddr = (ulong64)-1;
4201                     gen.command.u.cache64.sg_canz = 1;
4202                     gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
4203                     gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
4204                     gen.command.u.cache64.sg_lst[1].sg_len = 0;
4205                 } else {
4206                     gen.command.u.cache64.DestAddr = paddr;
4207                     gen.command.u.cache64.sg_canz = 0;
4208                 }
4209             } else {
4210                 if (ha->cache_feat & SCATTER_GATHER) {
4211                     gen.command.u.cache.DestAddr = 0xffffffff;
4212                     gen.command.u.cache.sg_canz = 1;
4213                     gen.command.u.cache.sg_lst[0].sg_ptr = (ulong32)paddr;
4214                     gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
4215                     gen.command.u.cache.sg_lst[1].sg_len = 0;
4216                 } else {
4217                     gen.command.u.cache.DestAddr = paddr;
4218                     gen.command.u.cache.sg_canz = 0;
4219                 }
4220             }
4221         } else if (gen.command.Service == SCSIRAWSERVICE) {
4222             if (ha->raw_feat & GDT_64BIT) {
4223                 /* copy elements from 32-bit IOCTL structure */
4224                 char cmd[16];
4225                 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
4226                 gen.command.u.raw64.bus = gen.command.u.raw.bus;
4227                 gen.command.u.raw64.lun = gen.command.u.raw.lun;
4228                 gen.command.u.raw64.target = gen.command.u.raw.target;
4229                 memcpy(cmd, gen.command.u.raw.cmd, 16);
4230                 memcpy(gen.command.u.raw64.cmd, cmd, 16);
4231                 gen.command.u.raw64.clen = gen.command.u.raw.clen;
4232                 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
4233                 gen.command.u.raw64.direction = gen.command.u.raw.direction;
4234                 /* addresses */
4235                 if (ha->raw_feat & SCATTER_GATHER) {
4236                     gen.command.u.raw64.sdata = (ulong64)-1;
4237                     gen.command.u.raw64.sg_ranz = 1;
4238                     gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
4239                     gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
4240                     gen.command.u.raw64.sg_lst[1].sg_len = 0;
4241                 } else {
4242                     gen.command.u.raw64.sdata = paddr;
4243                     gen.command.u.raw64.sg_ranz = 0;
4244                 }
4245                 gen.command.u.raw64.sense_data = paddr + gen.data_len;
4246             } else {
4247                 if (ha->raw_feat & SCATTER_GATHER) {
4248                     gen.command.u.raw.sdata = 0xffffffff;
4249                     gen.command.u.raw.sg_ranz = 1;
4250                     gen.command.u.raw.sg_lst[0].sg_ptr = (ulong32)paddr;
4251                     gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
4252                     gen.command.u.raw.sg_lst[1].sg_len = 0;
4253                 } else {
4254                     gen.command.u.raw.sdata = paddr;
4255                     gen.command.u.raw.sg_ranz = 0;
4256                 }
4257                 gen.command.u.raw.sense_data = (ulong32)paddr + gen.data_len;
4258             }
4259         } else {
4260             gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4261             return -EFAULT;
4262         }
4263     }
4264
4265     rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
4266     if (rval < 0)
4267         return rval;
4268     gen.status = rval;
4269
4270     if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
4271                      gen.data_len + gen.sense_len)) {
4272         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4273         return -EFAULT;
4274     }
4275     if (copy_to_user(arg, &gen,
4276         sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
4277         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4278         return -EFAULT;
4279     }
4280     gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4281     return 0;
4282 }
4283
4284 static int ioc_hdrlist(void __user *arg, char *cmnd)
4285 {
4286     gdth_ioctl_rescan *rsc;
4287     gdth_cmd_str *cmd;
4288     gdth_ha_str *ha;
4289     unchar i;
4290     int rc = -ENOMEM;
4291     u32 cluster_type = 0;
4292
4293     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4294     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4295     if (!rsc || !cmd)
4296         goto free_fail;
4297
4298     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4299         (NULL == (ha = gdth_find_ha(rsc->ionode)))) {
4300         rc = -EFAULT;
4301         goto free_fail;
4302     }
4303     memset(cmd, 0, sizeof(gdth_cmd_str));
4304
4305     for (i = 0; i < MAX_HDRIVES; ++i) {
4306         if (!ha->hdr[i].present) {
4307             rsc->hdr_list[i].bus = 0xff;
4308             continue;
4309         }
4310         rsc->hdr_list[i].bus = ha->virt_bus;
4311         rsc->hdr_list[i].target = i;
4312         rsc->hdr_list[i].lun = 0;
4313         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4314         if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
4315             cmd->Service = CACHESERVICE;
4316             cmd->OpCode = GDT_CLUST_INFO;
4317             if (ha->cache_feat & GDT_64BIT)
4318                 cmd->u.cache64.DeviceNo = i;
4319             else
4320                 cmd->u.cache.DeviceNo = i;
4321             if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
4322                 rsc->hdr_list[i].cluster_type = cluster_type;
4323         }
4324     }
4325
4326     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4327         rc = -EFAULT;
4328     else
4329         rc = 0;
4330
4331 free_fail:
4332     kfree(rsc);
4333     kfree(cmd);
4334     return rc;
4335 }
4336
4337 static int ioc_rescan(void __user *arg, char *cmnd)
4338 {
4339     gdth_ioctl_rescan *rsc;
4340     gdth_cmd_str *cmd;
4341     ushort i, status, hdr_cnt;
4342     ulong32 info;
4343     int cyls, hds, secs;
4344     int rc = -ENOMEM;
4345     ulong flags;
4346     gdth_ha_str *ha;
4347
4348     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4349     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4350     if (!cmd || !rsc)
4351         goto free_fail;
4352
4353     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4354         (NULL == (ha = gdth_find_ha(rsc->ionode)))) {
4355         rc = -EFAULT;
4356         goto free_fail;
4357     }
4358     memset(cmd, 0, sizeof(gdth_cmd_str));
4359
4360     if (rsc->flag == 0) {
4361         /* old method: re-init. cache service */
4362         cmd->Service = CACHESERVICE;
4363         if (ha->cache_feat & GDT_64BIT) {
4364             cmd->OpCode = GDT_X_INIT_HOST;
4365             cmd->u.cache64.DeviceNo = LINUX_OS;
4366         } else {
4367             cmd->OpCode = GDT_INIT;
4368             cmd->u.cache.DeviceNo = LINUX_OS;
4369         }
4370
4371         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4372         i = 0;
4373         hdr_cnt = (status == S_OK ? (ushort)info : 0);
4374     } else {
4375         i = rsc->hdr_no;
4376         hdr_cnt = i + 1;
4377     }
4378
4379     for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
4380         cmd->Service = CACHESERVICE;
4381         cmd->OpCode = GDT_INFO;
4382         if (ha->cache_feat & GDT_64BIT)
4383             cmd->u.cache64.DeviceNo = i;
4384         else
4385             cmd->u.cache.DeviceNo = i;
4386
4387         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4388
4389         spin_lock_irqsave(&ha->smp_lock, flags);
4390         rsc->hdr_list[i].bus = ha->virt_bus;
4391         rsc->hdr_list[i].target = i;
4392         rsc->hdr_list[i].lun = 0;
4393         if (status != S_OK) {
4394             ha->hdr[i].present = FALSE;
4395         } else {
4396             ha->hdr[i].present = TRUE;
4397             ha->hdr[i].size = info;
4398             /* evaluate mapping */
4399             ha->hdr[i].size &= ~SECS32;
4400             gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
4401             ha->hdr[i].heads = hds;
4402             ha->hdr[i].secs = secs;
4403             /* round size */
4404             ha->hdr[i].size = cyls * hds * secs;
4405         }
4406         spin_unlock_irqrestore(&ha->smp_lock, flags);
4407         if (status != S_OK)
4408             continue;
4409
4410         /* extended info, if GDT_64BIT, for drives > 2 TB */
4411         /* but we need ha->info2, not yet stored in scp->SCp */
4412
4413         /* devtype, cluster info, R/W attribs */
4414         cmd->Service = CACHESERVICE;
4415         cmd->OpCode = GDT_DEVTYPE;
4416         if (ha->cache_feat & GDT_64BIT)
4417             cmd->u.cache64.DeviceNo = i;
4418         else
4419             cmd->u.cache.DeviceNo = i;
4420
4421         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4422
4423         spin_lock_irqsave(&ha->smp_lock, flags);
4424         ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0);
4425         spin_unlock_irqrestore(&ha->smp_lock, flags);
4426
4427         cmd->Service = CACHESERVICE;
4428         cmd->OpCode = GDT_CLUST_INFO;
4429         if (ha->cache_feat & GDT_64BIT)
4430             cmd->u.cache64.DeviceNo = i;
4431         else
4432             cmd->u.cache.DeviceNo = i;
4433
4434         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4435
4436         spin_lock_irqsave(&ha->smp_lock, flags);
4437         ha->hdr[i].cluster_type =
4438             ((status == S_OK && !shared_access) ? (ushort)info : 0);
4439         spin_unlock_irqrestore(&ha->smp_lock, flags);
4440         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4441
4442         cmd->Service = CACHESERVICE;
4443         cmd->OpCode = GDT_RW_ATTRIBS;
4444         if (ha->cache_feat & GDT_64BIT)
4445             cmd->u.cache64.DeviceNo = i;
4446         else
4447             cmd->u.cache.DeviceNo = i;
4448
4449         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4450
4451         spin_lock_irqsave(&ha->smp_lock, flags);
4452         ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0);
4453         spin_unlock_irqrestore(&ha->smp_lock, flags);
4454     }
4455
4456     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4457         rc = -EFAULT;
4458     else
4459         rc = 0;
4460
4461 free_fail:
4462     kfree(rsc);
4463     kfree(cmd);
4464     return rc;
4465 }
4466
4467 static int gdth_ioctl(struct inode *inode, struct file *filep,
4468                       unsigned int cmd, unsigned long arg)
4469 {
4470     gdth_ha_str *ha;
4471     Scsi_Cmnd *scp;
4472     ulong flags;
4473     char cmnd[MAX_COMMAND_SIZE];
4474     void __user *argp = (void __user *)arg;
4475
4476     memset(cmnd, 0xff, 12);
4477
4478     TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
4479
4480     switch (cmd) {
4481       case GDTIOCTL_CTRCNT:
4482       {
4483         int cnt = gdth_ctr_count;
4484         if (put_user(cnt, (int __user *)argp))
4485                 return -EFAULT;
4486         break;
4487       }
4488
4489       case GDTIOCTL_DRVERS:
4490       {
4491         int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
4492         if (put_user(ver, (int __user *)argp))
4493                 return -EFAULT;
4494         break;
4495       }
4496
4497       case GDTIOCTL_OSVERS:
4498       {
4499         gdth_ioctl_osvers osv;
4500
4501         osv.version = (unchar)(LINUX_VERSION_CODE >> 16);
4502         osv.subversion = (unchar)(LINUX_VERSION_CODE >> 8);
4503         osv.revision = (ushort)(LINUX_VERSION_CODE & 0xff);
4504         if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
4505                 return -EFAULT;
4506         break;
4507       }
4508
4509       case GDTIOCTL_CTRTYPE:
4510       {
4511         gdth_ioctl_ctrtype ctrt;
4512
4513         if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
4514             (NULL == (ha = gdth_find_ha(ctrt.ionode))))
4515             return -EFAULT;
4516
4517         if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
4518             ctrt.type = (unchar)((ha->stype>>20) - 0x10);
4519         } else {
4520             if (ha->type != GDT_PCIMPR) {
4521                 ctrt.type = (unchar)((ha->stype<<4) + 6);
4522             } else {
4523                 ctrt.type =
4524                     (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
4525                 if (ha->stype >= 0x300)
4526                     ctrt.ext_type = 0x6000 | ha->pdev->subsystem_device;
4527                 else
4528                     ctrt.ext_type = 0x6000 | ha->stype;
4529             }
4530             ctrt.device_id = ha->pdev->device;
4531             ctrt.sub_device_id = ha->pdev->subsystem_device;
4532         }
4533         ctrt.info = ha->brd_phys;
4534         ctrt.oem_id = ha->oem_id;
4535         if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
4536             return -EFAULT;
4537         break;
4538       }
4539
4540       case GDTIOCTL_GENERAL:
4541         return ioc_general(argp, cmnd);
4542
4543       case GDTIOCTL_EVENT:
4544         return ioc_event(argp);
4545
4546       case GDTIOCTL_LOCKDRV:
4547         return ioc_lockdrv(argp);
4548
4549       case GDTIOCTL_LOCKCHN:
4550       {
4551         gdth_ioctl_lockchn lchn;
4552         unchar i, j;
4553
4554         if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
4555             (NULL == (ha = gdth_find_ha(lchn.ionode))))
4556             return -EFAULT;
4557
4558         i = lchn.channel;
4559         if (i < ha->bus_cnt) {
4560             if (lchn.lock) {
4561                 spin_lock_irqsave(&ha->smp_lock, flags);
4562                 ha->raw[i].lock = 1;
4563                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4564                 for (j = 0; j < ha->tid_cnt; ++j) {
4565                     gdth_wait_completion(ha, i, j);
4566                     gdth_stop_timeout(ha, i, j);
4567                 }
4568             } else {
4569                 spin_lock_irqsave(&ha->smp_lock, flags);
4570                 ha->raw[i].lock = 0;
4571                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4572                 for (j = 0; j < ha->tid_cnt; ++j) {
4573                     gdth_start_timeout(ha, i, j);
4574                     gdth_next(ha);
4575                 }
4576             }
4577         }
4578         break;
4579       }
4580
4581       case GDTIOCTL_RESCAN:
4582         return ioc_rescan(argp, cmnd);
4583
4584       case GDTIOCTL_HDRLIST:
4585         return ioc_hdrlist(argp, cmnd);
4586
4587       case GDTIOCTL_RESET_BUS:
4588       {
4589         gdth_ioctl_reset res;
4590         int rval;
4591
4592         if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
4593             (NULL == (ha = gdth_find_ha(res.ionode))))
4594             return -EFAULT;
4595
4596         scp  = kzalloc(sizeof(*scp), GFP_KERNEL);
4597         if (!scp)
4598             return -ENOMEM;
4599         scp->device = ha->sdev;
4600         scp->cmd_len = 12;
4601         scp->device->channel = res.number;
4602         rval = gdth_eh_bus_reset(scp);
4603         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
4604         kfree(scp);
4605
4606         if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
4607             return -EFAULT;
4608         break;
4609       }
4610
4611       case GDTIOCTL_RESET_DRV:
4612         return ioc_resetdrv(argp, cmnd);
4613
4614       default:
4615         break;
4616     }
4617     return 0;
4618 }
4619
4620
4621 /* flush routine */
4622 static void gdth_flush(gdth_ha_str *ha)
4623 {
4624     int             i;
4625     gdth_cmd_str    gdtcmd;
4626     char            cmnd[MAX_COMMAND_SIZE];
4627     memset(cmnd, 0xff, MAX_COMMAND_SIZE);
4628
4629     TRACE2(("gdth_flush() hanum %d\n", ha->hanum));
4630
4631     for (i = 0; i < MAX_HDRIVES; ++i) {
4632         if (ha->hdr[i].present) {
4633             gdtcmd.BoardNode = LOCALBOARD;
4634             gdtcmd.Service = CACHESERVICE;
4635             gdtcmd.OpCode = GDT_FLUSH;
4636             if (ha->cache_feat & GDT_64BIT) {
4637                 gdtcmd.u.cache64.DeviceNo = i;
4638                 gdtcmd.u.cache64.BlockNo = 1;
4639                 gdtcmd.u.cache64.sg_canz = 0;
4640             } else {
4641                 gdtcmd.u.cache.DeviceNo = i;
4642                 gdtcmd.u.cache.BlockNo = 1;
4643                 gdtcmd.u.cache.sg_canz = 0;
4644             }
4645             TRACE2(("gdth_flush(): flush ha %d drive %d\n", ha->hanum, i));
4646
4647             gdth_execute(ha->shost, &gdtcmd, cmnd, 30, NULL);
4648         }
4649     }
4650 }
4651
4652 /* configure lun */
4653 static int gdth_slave_configure(struct scsi_device *sdev)
4654 {
4655     scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
4656     sdev->skip_ms_page_3f = 1;
4657     sdev->skip_ms_page_8 = 1;
4658     return 0;
4659 }
4660
4661 static struct scsi_host_template gdth_template = {
4662         .name                   = "GDT SCSI Disk Array Controller",
4663         .info                   = gdth_info,
4664         .queuecommand           = gdth_queuecommand,
4665         .eh_bus_reset_handler   = gdth_eh_bus_reset,
4666         .slave_configure        = gdth_slave_configure,
4667         .bios_param             = gdth_bios_param,
4668         .proc_info              = gdth_proc_info,
4669         .proc_name              = "gdth",
4670         .can_queue              = GDTH_MAXCMDS,
4671         .this_id                = -1,
4672         .sg_tablesize           = GDTH_MAXSG,
4673         .cmd_per_lun            = GDTH_MAXC_P_L,
4674         .unchecked_isa_dma      = 1,
4675         .use_clustering         = ENABLE_CLUSTERING,
4676 };
4677
4678 #ifdef CONFIG_ISA
4679 static int __init gdth_isa_probe_one(ulong32 isa_bios)
4680 {
4681         struct Scsi_Host *shp;
4682         gdth_ha_str *ha;
4683         dma_addr_t scratch_dma_handle = 0;
4684         int error, i;
4685
4686         if (!gdth_search_isa(isa_bios))
4687                 return -ENXIO;
4688
4689         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4690         if (!shp)
4691                 return -ENOMEM;
4692         ha = shost_priv(shp);
4693
4694         error = -ENODEV;
4695         if (!gdth_init_isa(isa_bios,ha))
4696                 goto out_host_put;
4697
4698         /* controller found and initialized */
4699         printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4700                 isa_bios, ha->irq, ha->drq);
4701
4702         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
4703         if (error) {
4704                 printk("GDT-ISA: Unable to allocate IRQ\n");
4705                 goto out_host_put;
4706         }
4707
4708         error = request_dma(ha->drq, "gdth");
4709         if (error) {
4710                 printk("GDT-ISA: Unable to allocate DMA channel\n");
4711                 goto out_free_irq;
4712         }
4713
4714         set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4715         enable_dma(ha->drq);
4716         shp->unchecked_isa_dma = 1;
4717         shp->irq = ha->irq;
4718         shp->dma_channel = ha->drq;
4719
4720         ha->hanum = gdth_ctr_count++;
4721         ha->shost = shp;
4722
4723         ha->pccb = &ha->cmdext;
4724         ha->ccb_phys = 0L;
4725         ha->pdev = NULL;
4726
4727         error = -ENOMEM;
4728
4729         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4730                                                 &scratch_dma_handle);
4731         if (!ha->pscratch)
4732                 goto out_dec_counters;
4733         ha->scratch_phys = scratch_dma_handle;
4734
4735         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4736                                                 &scratch_dma_handle);
4737         if (!ha->pmsg)
4738                 goto out_free_pscratch;
4739         ha->msg_phys = scratch_dma_handle;
4740
4741 #ifdef INT_COAL
4742         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4743                                 sizeof(gdth_coal_status) * MAXOFFSETS,
4744                                 &scratch_dma_handle);
4745         if (!ha->coal_stat)
4746                 goto out_free_pmsg;
4747         ha->coal_stat_phys = scratch_dma_handle;
4748 #endif
4749
4750         ha->scratch_busy = FALSE;
4751         ha->req_first = NULL;
4752         ha->tid_cnt = MAX_HDRIVES;
4753         if (max_ids > 0 && max_ids < ha->tid_cnt)
4754                 ha->tid_cnt = max_ids;
4755         for (i = 0; i < GDTH_MAXCMDS; ++i)
4756                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4757         ha->scan_mode = rescan ? 0x10 : 0;
4758
4759         error = -ENODEV;
4760         if (!gdth_search_drives(ha)) {
4761                 printk("GDT-ISA: Error during device scan\n");
4762                 goto out_free_coal_stat;
4763         }
4764
4765         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4766                 hdr_channel = ha->bus_cnt;
4767         ha->virt_bus = hdr_channel;
4768
4769         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4770                 shp->max_cmd_len = 16;
4771
4772         shp->max_id      = ha->tid_cnt;
4773         shp->max_lun     = MAXLUN;
4774         shp->max_channel = ha->bus_cnt;
4775
4776         spin_lock_init(&ha->smp_lock);
4777         gdth_enable_int(ha);
4778
4779         error = scsi_add_host(shp, NULL);
4780         if (error)
4781                 goto out_free_coal_stat;
4782         list_add_tail(&ha->list, &gdth_instances);
4783
4784         scsi_scan_host(shp);
4785
4786         return 0;
4787
4788  out_free_coal_stat:
4789 #ifdef INT_COAL
4790         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
4791                                 ha->coal_stat, ha->coal_stat_phys);
4792  out_free_pmsg:
4793 #endif
4794         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4795                                 ha->pmsg, ha->msg_phys);
4796  out_free_pscratch:
4797         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4798                                 ha->pscratch, ha->scratch_phys);
4799  out_dec_counters:
4800         gdth_ctr_count--;
4801  out_free_irq:
4802         free_irq(ha->irq, ha);
4803  out_host_put:
4804         scsi_host_put(shp);
4805         return error;
4806 }
4807 #endif /* CONFIG_ISA */
4808
4809 #ifdef CONFIG_EISA
4810 static int __init gdth_eisa_probe_one(ushort eisa_slot)
4811 {
4812         struct Scsi_Host *shp;
4813         gdth_ha_str *ha;
4814         dma_addr_t scratch_dma_handle = 0;
4815         int error, i;
4816
4817         if (!gdth_search_eisa(eisa_slot))
4818                 return -ENXIO;
4819
4820         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4821         if (!shp)
4822                 return -ENOMEM;
4823         ha = shost_priv(shp);
4824
4825         error = -ENODEV;
4826         if (!gdth_init_eisa(eisa_slot,ha))
4827                 goto out_host_put;
4828
4829         /* controller found and initialized */
4830         printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
4831                 eisa_slot >> 12, ha->irq);
4832
4833         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
4834         if (error) {
4835                 printk("GDT-EISA: Unable to allocate IRQ\n");
4836                 goto out_host_put;
4837         }
4838
4839         shp->unchecked_isa_dma = 0;
4840         shp->irq = ha->irq;
4841         shp->dma_channel = 0xff;
4842
4843         ha->hanum = gdth_ctr_count++;
4844         ha->shost = shp;
4845
4846         TRACE2(("EISA detect Bus 0: hanum %d\n", ha->hanum));
4847
4848         ha->pccb = &ha->cmdext;
4849         ha->ccb_phys = 0L;
4850
4851         error = -ENOMEM;
4852
4853         ha->pdev = NULL;
4854         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4855                                                 &scratch_dma_handle);
4856         if (!ha->pscratch)
4857                 goto out_free_irq;
4858         ha->scratch_phys = scratch_dma_handle;
4859
4860         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4861                                                 &scratch_dma_handle);
4862         if (!ha->pmsg)
4863                 goto out_free_pscratch;
4864         ha->msg_phys = scratch_dma_handle;
4865
4866 #ifdef INT_COAL
4867         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4868                         sizeof(gdth_coal_status) * MAXOFFSETS,
4869                         &scratch_dma_handle);
4870         if (!ha->coal_stat)
4871                 goto out_free_pmsg;
4872         ha->coal_stat_phys = scratch_dma_handle;
4873 #endif
4874
4875         ha->ccb_phys = pci_map_single(ha->pdev,ha->pccb,
4876                         sizeof(gdth_cmd_str), PCI_DMA_BIDIRECTIONAL);
4877         if (!ha->ccb_phys)
4878                 goto out_free_coal_stat;
4879
4880         ha->scratch_busy = FALSE;
4881         ha->req_first = NULL;
4882         ha->tid_cnt = MAX_HDRIVES;
4883         if (max_ids > 0 && max_ids < ha->tid_cnt)
4884                 ha->tid_cnt = max_ids;
4885         for (i = 0; i < GDTH_MAXCMDS; ++i)
4886                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4887         ha->scan_mode = rescan ? 0x10 : 0;
4888
4889         if (!gdth_search_drives(ha)) {
4890                 printk("GDT-EISA: Error during device scan\n");
4891                 error = -ENODEV;
4892                 goto out_free_ccb_phys;
4893         }
4894
4895         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4896                 hdr_channel = ha->bus_cnt;
4897         ha->virt_bus = hdr_channel;
4898
4899         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4900                 shp->max_cmd_len = 16;
4901
4902         shp->max_id      = ha->tid_cnt;
4903         shp->max_lun     = MAXLUN;
4904         shp->max_channel = ha->bus_cnt;
4905
4906         spin_lock_init(&ha->smp_lock);
4907         gdth_enable_int(ha);
4908
4909         error = scsi_add_host(shp, NULL);
4910         if (error)
4911                 goto out_free_coal_stat;
4912         list_add_tail(&ha->list, &gdth_instances);
4913
4914         scsi_scan_host(shp);
4915
4916         return 0;
4917
4918  out_free_ccb_phys:
4919         pci_unmap_single(ha->pdev,ha->ccb_phys, sizeof(gdth_cmd_str),
4920                         PCI_DMA_BIDIRECTIONAL);
4921  out_free_coal_stat:
4922 #ifdef INT_COAL
4923         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
4924                                 ha->coal_stat, ha->coal_stat_phys);
4925  out_free_pmsg:
4926 #endif
4927         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4928                                 ha->pmsg, ha->msg_phys);
4929  out_free_pscratch:
4930         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4931                                 ha->pscratch, ha->scratch_phys);
4932  out_free_irq:
4933         free_irq(ha->irq, ha);
4934         gdth_ctr_count--;
4935  out_host_put:
4936         scsi_host_put(shp);
4937         return error;
4938 }
4939 #endif /* CONFIG_EISA */
4940
4941 #ifdef CONFIG_PCI
4942 static int gdth_pci_probe_one(gdth_pci_str *pcistr,
4943                              gdth_ha_str **ha_out)
4944 {
4945         struct Scsi_Host *shp;
4946         gdth_ha_str *ha;
4947         dma_addr_t scratch_dma_handle = 0;
4948         int error, i;
4949         struct pci_dev *pdev = pcistr->pdev;
4950
4951         *ha_out = NULL;
4952
4953         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4954         if (!shp)
4955                 return -ENOMEM;
4956         ha = shost_priv(shp);
4957
4958         error = -ENODEV;
4959         if (!gdth_init_pci(pdev, pcistr, ha))
4960                 goto out_host_put;
4961
4962         /* controller found and initialized */
4963         printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
4964                 pdev->bus->number,
4965                 PCI_SLOT(pdev->devfn),
4966                 ha->irq);
4967
4968         error = request_irq(ha->irq, gdth_interrupt,
4969                                 IRQF_DISABLED|IRQF_SHARED, "gdth", ha);
4970         if (error) {
4971                 printk("GDT-PCI: Unable to allocate IRQ\n");
4972                 goto out_host_put;
4973         }
4974
4975         shp->unchecked_isa_dma = 0;
4976         shp->irq = ha->irq;
4977         shp->dma_channel = 0xff;
4978
4979         ha->hanum = gdth_ctr_count++;
4980         ha->shost = shp;
4981
4982         ha->pccb = &ha->cmdext;
4983         ha->ccb_phys = 0L;
4984
4985         error = -ENOMEM;
4986
4987         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4988                                                 &scratch_dma_handle);
4989         if (!ha->pscratch)
4990                 goto out_free_irq;
4991         ha->scratch_phys = scratch_dma_handle;
4992
4993         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4994                                         &scratch_dma_handle);
4995         if (!ha->pmsg)
4996                 goto out_free_pscratch;
4997         ha->msg_phys = scratch_dma_handle;
4998
4999 #ifdef INT_COAL
5000         ha->coal_stat = pci_alloc_consistent(ha->pdev,
5001                         sizeof(gdth_coal_status) * MAXOFFSETS,
5002                         &scratch_dma_handle);
5003         if (!ha->coal_stat)
5004                 goto out_free_pmsg;
5005         ha->coal_stat_phys = scratch_dma_handle;
5006 #endif
5007
5008         ha->scratch_busy = FALSE;
5009         ha->req_first = NULL;
5010         ha->tid_cnt = pdev->device >= 0x200 ? MAXID : MAX_HDRIVES;
5011         if (max_ids > 0 && max_ids < ha->tid_cnt)
5012                 ha->tid_cnt = max_ids;
5013         for (i = 0; i < GDTH_MAXCMDS; ++i)
5014                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5015         ha->scan_mode = rescan ? 0x10 : 0;
5016
5017         error = -ENODEV;
5018         if (!gdth_search_drives(ha)) {
5019                 printk("GDT-PCI %d: Error during device scan\n", ha->hanum);
5020                 goto out_free_coal_stat;
5021         }
5022
5023         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5024                 hdr_channel = ha->bus_cnt;
5025         ha->virt_bus = hdr_channel;
5026
5027         /* 64-bit DMA only supported from FW >= x.43 */
5028         if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) ||
5029             !ha->dma64_support) {
5030                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
5031                         printk(KERN_WARNING "GDT-PCI %d: "
5032                                 "Unable to set 32-bit DMA\n", ha->hanum);
5033                                 goto out_free_coal_stat;
5034                 }
5035         } else {
5036                 shp->max_cmd_len = 16;
5037                 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
5038                         printk("GDT-PCI %d: 64-bit DMA enabled\n", ha->hanum);
5039                 } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
5040                         printk(KERN_WARNING "GDT-PCI %d: "
5041                                 "Unable to set 64/32-bit DMA\n", ha->hanum);
5042                         goto out_free_coal_stat;
5043                 }
5044         }
5045
5046         shp->max_id      = ha->tid_cnt;
5047         shp->max_lun     = MAXLUN;
5048         shp->max_channel = ha->bus_cnt;
5049
5050         spin_lock_init(&ha->smp_lock);
5051         gdth_enable_int(ha);
5052
5053         error = scsi_add_host(shp, &pdev->dev);
5054         if (error)
5055                 goto out_free_coal_stat;
5056         list_add_tail(&ha->list, &gdth_instances);
5057
5058         pci_set_drvdata(ha->pdev, ha);
5059
5060         scsi_scan_host(shp);
5061
5062         *ha_out = ha;
5063
5064         return 0;
5065
5066  out_free_coal_stat:
5067 #ifdef INT_COAL
5068         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5069                                 ha->coal_stat, ha->coal_stat_phys);
5070  out_free_pmsg:
5071 #endif
5072         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5073                                 ha->pmsg, ha->msg_phys);
5074  out_free_pscratch:
5075         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5076                                 ha->pscratch, ha->scratch_phys);
5077  out_free_irq:
5078         free_irq(ha->irq, ha);
5079         gdth_ctr_count--;
5080  out_host_put:
5081         scsi_host_put(shp);
5082         return error;
5083 }
5084 #endif /* CONFIG_PCI */
5085
5086 static void gdth_remove_one(gdth_ha_str *ha)
5087 {
5088         struct Scsi_Host *shp = ha->shost;
5089
5090         TRACE2(("gdth_remove_one()\n"));
5091
5092         scsi_remove_host(shp);
5093
5094         gdth_flush(ha);
5095
5096         if (ha->sdev) {
5097                 scsi_free_host_dev(ha->sdev);
5098                 ha->sdev = NULL;
5099         }
5100
5101         if (shp->irq)
5102                 free_irq(shp->irq,ha);
5103
5104 #ifdef CONFIG_ISA
5105         if (shp->dma_channel != 0xff)
5106                 free_dma(shp->dma_channel);
5107 #endif
5108 #ifdef INT_COAL
5109         if (ha->coal_stat)
5110                 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
5111                         MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
5112 #endif
5113         if (ha->pscratch)
5114                 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5115                         ha->pscratch, ha->scratch_phys);
5116         if (ha->pmsg)
5117                 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5118                         ha->pmsg, ha->msg_phys);
5119         if (ha->ccb_phys)
5120                 pci_unmap_single(ha->pdev,ha->ccb_phys,
5121                         sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
5122
5123         scsi_host_put(shp);
5124 }
5125
5126 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf)
5127 {
5128         gdth_ha_str *ha;
5129
5130         TRACE2(("gdth_halt() event %d\n", (int)event));
5131         if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
5132                 return NOTIFY_DONE;
5133
5134         list_for_each_entry(ha, &gdth_instances, list)
5135                 gdth_flush(ha);
5136
5137         return NOTIFY_OK;
5138 }
5139
5140 static struct notifier_block gdth_notifier = {
5141     gdth_halt, NULL, 0
5142 };
5143
5144 static int __init gdth_init(void)
5145 {
5146         if (disable) {
5147                 printk("GDT-HA: Controller driver disabled from"
5148                        " command line !\n");
5149                 return 0;
5150         }
5151
5152         printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",
5153                GDTH_VERSION_STR);
5154
5155         /* initializations */
5156         gdth_polling = TRUE;
5157         gdth_clear_events();
5158
5159         /* As default we do not probe for EISA or ISA controllers */
5160         if (probe_eisa_isa) {
5161                 /* scanning for controllers, at first: ISA controller */
5162 #ifdef CONFIG_ISA
5163                 ulong32 isa_bios;
5164                 for (isa_bios = 0xc8000UL; isa_bios <= 0xd8000UL;
5165                                 isa_bios += 0x8000UL)
5166                         gdth_isa_probe_one(isa_bios);
5167 #endif
5168 #ifdef CONFIG_EISA
5169                 {
5170                         ushort eisa_slot;
5171                         for (eisa_slot = 0x1000; eisa_slot <= 0x8000;
5172                                                  eisa_slot += 0x1000)
5173                                 gdth_eisa_probe_one(eisa_slot);
5174                 }
5175 #endif
5176         }
5177
5178 #ifdef CONFIG_PCI
5179         /* scanning for PCI controllers */
5180         if (pci_register_driver(&gdth_pci_driver) == 0)
5181                 gdth_pci_registered = true;
5182 #endif /* CONFIG_PCI */
5183
5184         TRACE2(("gdth_detect() %d controller detected\n", gdth_ctr_count));
5185
5186         if (list_empty(&gdth_instances))
5187                 return -ENODEV;
5188
5189 #ifdef GDTH_STATISTICS
5190         TRACE2(("gdth_detect(): Initializing timer !\n"));
5191         init_timer(&gdth_timer);
5192         gdth_timer.expires = jiffies + HZ;
5193         gdth_timer.data = 0L;
5194         gdth_timer.function = gdth_timeout;
5195         add_timer(&gdth_timer);
5196 #endif
5197         major = register_chrdev(0,"gdth", &gdth_fops);
5198         register_reboot_notifier(&gdth_notifier);
5199         gdth_polling = FALSE;
5200         return 0;
5201 }
5202
5203 static void __exit gdth_exit(void)
5204 {
5205         gdth_ha_str *ha;
5206
5207         unregister_chrdev(major, "gdth");
5208         unregister_reboot_notifier(&gdth_notifier);
5209
5210 #ifdef GDTH_STATISTICS
5211         del_timer_sync(&gdth_timer);
5212 #endif
5213
5214 #ifdef CONFIG_PCI
5215         if (gdth_pci_registered)
5216                 pci_unregister_driver(&gdth_pci_driver);
5217 #endif
5218
5219         list_for_each_entry(ha, &gdth_instances, list)
5220                 gdth_remove_one(ha);
5221 }
5222
5223 module_init(gdth_init);
5224 module_exit(gdth_exit);
5225
5226 #ifndef MODULE
5227 __setup("gdth=", option_setup);
5228 #endif