2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
22 #include "bfa_defs_svc.h"
26 /* Per dma segment max size */
27 #define BFI_MEM_DMA_SEG_SZ (131072)
29 /* Get number of dma segments required */
30 #define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz) \
31 ((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) & \
32 ~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ))
34 /* Get num dma reqs - that fit in a segment */
35 #define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz))
37 /* Get segment num from tag */
38 #define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz))
40 /* Get dma req offset in a segment */
41 #define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz) \
42 ((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz)))
47 #define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
48 #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
51 * Msg header common to all msgs
54 u8 msg_class; /* @ref bfi_mclass_t */
55 u8 msg_id; /* msg opcode with in the class */
59 u8 fn_lpu; /* msg destination */
61 u16 i2htok; /* token in msgs to host */
65 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
66 #define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
68 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
69 (_mh).msg_class = (_mc); \
70 (_mh).msg_id = (_op); \
71 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
74 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
75 (_mh).msg_class = (_mc); \
76 (_mh).msg_id = (_op); \
77 (_mh).mtag.i2htok = (_i2htok); \
81 * Message opcodes: 0-127 to firmware, 128-255 to host
83 #define BFI_I2H_OPCODE_BASE 128
84 #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
87 ****************************************************************************
89 * Scatter Gather Element and Page definition
91 ****************************************************************************
94 #define BFI_SGE_INLINE 1
95 #define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
101 BFI_SGE_DATA = 0, /* data address, not last */
102 BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
103 BFI_SGE_DATA_LAST = 3, /* data address, last */
104 BFI_SGE_LINK = 2, /* link address */
105 BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
119 * Scatter Gather Element used for fast-path IO requests
131 union bfi_addr_u sga;
135 * Generic DMA addr-len pair.
138 union bfi_addr_u al_addr; /* DMA addr of buffer */
139 u32 al_len; /* length of buffer */
143 * Scatter Gather Page
145 #define BFI_SGPG_DATA_SGES 7
146 #define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
147 #define BFI_SGPG_RSVD_WD_LEN 8
149 struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
150 u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
153 /* FCP module definitions */
154 #define BFI_IO_MAX (2000)
155 #define BFI_IOIM_SNSLEN (256)
156 #define BFI_IOIM_SNSBUF_SEGS \
157 BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN)
160 * Large Message structure - 128 Bytes size Msgs
162 #define BFI_LMSG_SZ 128
163 #define BFI_LMSG_PL_WSZ \
164 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
167 struct bfi_mhdr_s mhdr;
168 u32 pl[BFI_LMSG_PL_WSZ];
172 * Mailbox message structure
174 #define BFI_MBMSG_SZ 7
176 struct bfi_mhdr_s mh;
177 u32 pl[BFI_MBMSG_SZ];
181 * Supported PCI function class codes (personality)
183 enum bfi_pcifn_class {
184 BFI_PCIFN_CLASS_FC = 0x0c04,
185 BFI_PCIFN_CLASS_ETH = 0x0200,
192 BFI_MC_IOC = 1, /* IO Controller (IOC) */
193 BFI_MC_DIAG = 2, /* Diagnostic Msgs */
194 BFI_MC_FLASH = 3, /* Flash message class */
195 BFI_MC_CEE = 4, /* CEE */
196 BFI_MC_FCPORT = 5, /* FC port */
197 BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
198 BFI_MC_ABLK = 7, /* ASIC block configuration */
199 BFI_MC_UF = 8, /* Unsolicited frame receive */
200 BFI_MC_FCXP = 9, /* FC Transport */
201 BFI_MC_LPS = 10, /* lport fc login services */
202 BFI_MC_RPORT = 11, /* Remote port */
203 BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */
204 BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
205 BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
206 BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
207 BFI_MC_IOIM = 16, /* IO (Initiator mode) */
208 BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
209 BFI_MC_TSKIM = 18, /* Initiator Task management */
210 BFI_MC_PORT = 21, /* Physical port */
211 BFI_MC_SFP = 22, /* SFP module */
212 BFI_MC_PHY = 25, /* External PHY message class */
216 #define BFI_IOC_MAX_CQS 4
217 #define BFI_IOC_MAX_CQS_ASIC 8
218 #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
221 *----------------------------------------------------------------------
223 *----------------------------------------------------------------------
227 * Different asic generations
230 BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */
231 BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */
232 BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */
236 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
237 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
238 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
239 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
242 enum bfi_ioc_h2i_msgs {
243 BFI_IOC_H2I_ENABLE_REQ = 1,
244 BFI_IOC_H2I_DISABLE_REQ = 2,
245 BFI_IOC_H2I_GETATTR_REQ = 3,
246 BFI_IOC_H2I_DBG_SYNC = 4,
247 BFI_IOC_H2I_DBG_DUMP = 5,
250 enum bfi_ioc_i2h_msgs {
251 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
252 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
253 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
254 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
255 BFI_IOC_I2H_ACQ_ADDR_REPLY = BFA_I2HM(5),
259 * BFI_IOC_H2I_GETATTR_REQ message
261 struct bfi_ioc_getattr_req_s {
262 struct bfi_mhdr_s mh;
263 union bfi_addr_u attr_addr;
266 struct bfi_ioc_attr_s {
267 wwn_t mfg_pwwn; /* Mfg port wwn */
268 wwn_t mfg_nwwn; /* Mfg node wwn */
269 mac_t mfg_mac; /* Mfg mac */
270 u8 port_mode; /* bfi_port_mode */
274 mac_t mac; /* PBC or Mfg mac */
278 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
282 u8 rx_bbcredit; /* receive buffer credits */
283 u32 adapter_prop; /* adapter properties */
284 u16 maxfrsize; /* max receive frame size */
287 char fw_version[BFA_VERSION_LEN];
288 char optrom_version[BFA_VERSION_LEN];
289 struct bfa_mfg_vpd_s vpd;
290 u32 card_type; /* card type */
291 u8 mfg_day; /* manufacturing day */
292 u8 mfg_month; /* manufacturing month */
293 u16 mfg_year; /* manufacturing year */
297 * BFI_IOC_I2H_GETATTR_REPLY message
299 struct bfi_ioc_getattr_reply_s {
300 struct bfi_mhdr_s mh; /* Common msg header */
301 u8 status; /* cfg reply status */
306 * Firmware memory page offsets
308 #define BFI_IOC_SMEM_PG0_CB (0x40)
309 #define BFI_IOC_SMEM_PG0_CT (0x180)
312 * Firmware statistic offset
314 #define BFI_IOC_FWSTATS_OFF (0x6B40)
315 #define BFI_IOC_FWSTATS_SZ (4096)
318 * Firmware trace offset
320 #define BFI_IOC_TRC_OFF (0x4b00)
321 #define BFI_IOC_TRC_ENTS 256
323 #define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
324 #define BFI_IOC_MD5SUM_SZ 4
325 struct bfi_ioc_image_hdr_s {
326 u32 signature; /* constant signature */
327 u8 asic_gen; /* asic generation */
329 u8 port0_mode; /* device mode for port 0 */
330 u8 port1_mode; /* device mode for port 1 */
331 u32 exec; /* exec vector */
332 u32 bootenv; /* fimware boot env */
334 u32 md5sum[BFI_IOC_MD5SUM_SZ];
337 #define BFI_FWBOOT_DEVMODE_OFF 4
338 #define BFI_FWBOOT_TYPE_OFF 8
339 #define BFI_FWBOOT_ENV_OFF 12
340 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
341 (((u32)(__asic_gen)) << 24 | \
342 ((u32)(__asic_mode)) << 16 | \
343 ((u32)(__p0_mode)) << 8 | \
346 #define BFI_FWBOOT_TYPE_NORMAL 0
347 #define BFI_FWBOOT_TYPE_MEMTEST 2
348 #define BFI_FWBOOT_ENV_OS 0
351 BFI_PORT_MODE_FC = 1,
352 BFI_PORT_MODE_ETH = 2,
355 struct bfi_ioc_hbeat_s {
356 struct bfi_mhdr_s mh; /* common msg header */
357 u32 hb_count; /* current heart beat count */
361 * IOC hardware/firmware state
364 BFI_IOC_UNINIT = 0, /* not initialized */
365 BFI_IOC_INITING = 1, /* h/w is being initialized */
366 BFI_IOC_HWINIT = 2, /* h/w is initialized */
367 BFI_IOC_CFG = 3, /* IOC configuration in progress */
368 BFI_IOC_OP = 4, /* IOC is operational */
369 BFI_IOC_DISABLING = 5, /* IOC is being disabled */
370 BFI_IOC_DISABLED = 6, /* IOC is disabled */
371 BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
372 BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
373 BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
376 #define BFI_IOC_ENDIAN_SIG 0x12345678
379 BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
380 BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
381 BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
382 BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
383 BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
384 BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
385 BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
386 BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
387 BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
388 BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
391 #define BFI_ADAPTER_GETP(__prop, __adap_prop) \
392 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
393 BFI_ADAPTER_ ## __prop ## _SH)
394 #define BFI_ADAPTER_SETP(__prop, __val) \
395 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
396 #define BFI_ADAPTER_IS_PROTO(__adap_type) \
397 ((__adap_type) & BFI_ADAPTER_PROTO)
398 #define BFI_ADAPTER_IS_TTV(__adap_type) \
399 ((__adap_type) & BFI_ADAPTER_TTV)
400 #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
401 ((__adap_type) & BFI_ADAPTER_UNSUPP)
402 #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
403 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
407 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
409 struct bfi_ioc_ctrl_req_s {
410 struct bfi_mhdr_s mh;
415 #define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
416 #define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
419 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
421 struct bfi_ioc_ctrl_reply_s {
422 struct bfi_mhdr_s mh; /* Common msg header */
423 u8 status; /* enable/disable status */
424 u8 port_mode; /* bfa_mode_s */
425 u8 cap_bm; /* capability bit mask */
428 #define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
429 #define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
431 #define BFI_IOC_MSGSZ 8
435 union bfi_ioc_h2i_msg_u {
436 struct bfi_mhdr_s mh;
437 struct bfi_ioc_ctrl_req_s enable_req;
438 struct bfi_ioc_ctrl_req_s disable_req;
439 struct bfi_ioc_getattr_req_s getattr_req;
440 u32 mboxmsg[BFI_IOC_MSGSZ];
446 union bfi_ioc_i2h_msg_u {
447 struct bfi_mhdr_s mh;
448 struct bfi_ioc_ctrl_reply_s fw_event;
449 u32 mboxmsg[BFI_IOC_MSGSZ];
454 *----------------------------------------------------------------------
456 *----------------------------------------------------------------------
459 #define BFI_PBC_MAX_BLUNS 8
460 #define BFI_PBC_MAX_VPORTS 16
461 #define BFI_PBC_PORT_DISABLED 2
464 * PBC boot lun configuration
466 struct bfi_pbc_blun_s {
468 struct scsi_lun tgt_lun;
472 * PBC virtual port configuration
474 struct bfi_pbc_vport_s {
480 * BFI pre-boot configuration information
492 struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
493 struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
497 *----------------------------------------------------------------------
499 *----------------------------------------------------------------------
501 #define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
502 #define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
503 #define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
504 #define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
506 /* q_depth must be power of 2 */
507 #define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
509 enum bfi_msgq_h2i_msgs_e {
510 BFI_MSGQ_H2I_INIT_REQ = 1,
511 BFI_MSGQ_H2I_DOORBELL = 2,
512 BFI_MSGQ_H2I_SHUTDOWN = 3,
515 enum bfi_msgq_i2h_msgs_e {
516 BFI_MSGQ_I2H_INIT_RSP = 1,
517 BFI_MSGQ_I2H_DOORBELL = 2,
521 /* Messages(commands/responsed/AENS will have the following header */
522 struct bfi_msgq_mhdr_s {
531 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
532 (_mh).msg_class = (_mc); \
533 (_mh).msg_id = (_mid); \
534 (_mh).msg_token = (_tok); \
535 (_mh).enet_id = (_enet_id); \
539 * Mailbox for messaging interface
542 #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
543 #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
544 #define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
547 union bfi_addr_u addr;
548 u16 q_depth; /* Total num of entries in the queue */
552 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
553 struct bfi_msgq_cfg_req_s {
554 struct bfi_mhdr_s mh;
555 struct bfi_msgq_s cmdq;
556 struct bfi_msgq_s rspq;
559 /* BFI_ENET_MSGQ_CFG_RSP */
560 struct bfi_msgq_cfg_rsp_s {
561 struct bfi_mhdr_s mh;
567 /* BFI_MSGQ_H2I_DOORBELL */
568 struct bfi_msgq_h2i_db_s {
569 struct bfi_mhdr_s mh;
574 /* BFI_MSGQ_I2H_DOORBELL */
575 struct bfi_msgq_i2h_db_s {
576 struct bfi_mhdr_s mh;
583 /* BFI port specific */
587 BFI_PORT_H2I_ENABLE_REQ = (1),
588 BFI_PORT_H2I_DISABLE_REQ = (2),
589 BFI_PORT_H2I_GET_STATS_REQ = (3),
590 BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
594 BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
595 BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
596 BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
597 BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
603 struct bfi_port_generic_req_s {
604 struct bfi_mhdr_s mh; /* msg header */
605 u32 msgtag; /* msgtag for reply */
612 struct bfi_port_generic_rsp_s {
613 struct bfi_mhdr_s mh; /* common msg header */
614 u8 status; /* port enable status */
616 u32 msgtag; /* msgtag for reply */
620 * BFI_PORT_H2I_GET_STATS_REQ
622 struct bfi_port_get_stats_req_s {
623 struct bfi_mhdr_s mh; /* common msg header */
624 union bfi_addr_u dma_addr;
627 union bfi_port_h2i_msg_u {
628 struct bfi_mhdr_s mh;
629 struct bfi_port_generic_req_s enable_req;
630 struct bfi_port_generic_req_s disable_req;
631 struct bfi_port_get_stats_req_s getstats_req;
632 struct bfi_port_generic_req_s clearstats_req;
635 union bfi_port_i2h_msg_u {
636 struct bfi_mhdr_s mh;
637 struct bfi_port_generic_rsp_s enable_rsp;
638 struct bfi_port_generic_rsp_s disable_rsp;
639 struct bfi_port_generic_rsp_s getstats_rsp;
640 struct bfi_port_generic_rsp_s clearstats_rsp;
644 *----------------------------------------------------------------------
646 *----------------------------------------------------------------------
648 enum bfi_ablk_h2i_msgs_e {
649 BFI_ABLK_H2I_QUERY = 1,
650 BFI_ABLK_H2I_ADPT_CONFIG = 2,
651 BFI_ABLK_H2I_PORT_CONFIG = 3,
652 BFI_ABLK_H2I_PF_CREATE = 4,
653 BFI_ABLK_H2I_PF_DELETE = 5,
654 BFI_ABLK_H2I_PF_UPDATE = 6,
655 BFI_ABLK_H2I_OPTROM_ENABLE = 7,
656 BFI_ABLK_H2I_OPTROM_DISABLE = 8,
659 enum bfi_ablk_i2h_msgs_e {
660 BFI_ABLK_I2H_QUERY = BFA_I2HM(BFI_ABLK_H2I_QUERY),
661 BFI_ABLK_I2H_ADPT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
662 BFI_ABLK_I2H_PORT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
663 BFI_ABLK_I2H_PF_CREATE = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
664 BFI_ABLK_I2H_PF_DELETE = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
665 BFI_ABLK_I2H_PF_UPDATE = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
666 BFI_ABLK_I2H_OPTROM_ENABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
667 BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
670 /* BFI_ABLK_H2I_QUERY */
671 struct bfi_ablk_h2i_query_s {
672 struct bfi_mhdr_s mh;
673 union bfi_addr_u addr;
676 /* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
677 struct bfi_ablk_h2i_cfg_req_s {
678 struct bfi_mhdr_s mh;
686 * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
688 struct bfi_ablk_h2i_pf_req_s {
689 struct bfi_mhdr_s mh;
696 /* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
697 struct bfi_ablk_h2i_optrom_s {
698 struct bfi_mhdr_s mh;
703 * BFI_ABLK_I2H_PORT_CONFIG
704 * BFI_ABLK_I2H_PF_CREATE
705 * BFI_ABLK_I2H_PF_DELETE
706 * BFI_ABLK_I2H_PF_UPDATE
707 * BFI_ABLK_I2H_OPTROM_ENABLE
708 * BFI_ABLK_I2H_OPTROM_DISABLE
710 struct bfi_ablk_i2h_rsp_s {
711 struct bfi_mhdr_s mh;
719 * CEE module specific messages
722 /* Mailbox commands from host to firmware */
723 enum bfi_cee_h2i_msgs_e {
724 BFI_CEE_H2I_GET_CFG_REQ = 1,
725 BFI_CEE_H2I_RESET_STATS = 2,
726 BFI_CEE_H2I_GET_STATS_REQ = 3,
729 enum bfi_cee_i2h_msgs_e {
730 BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1),
731 BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2),
732 BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3),
736 * H2I command structure for resetting the stats
738 struct bfi_cee_reset_stats_s {
739 struct bfi_mhdr_s mh;
743 * Get configuration command from host
745 struct bfi_cee_get_req_s {
746 struct bfi_mhdr_s mh;
747 union bfi_addr_u dma_addr;
751 * Reply message from firmware
753 struct bfi_cee_get_rsp_s {
754 struct bfi_mhdr_s mh;
760 * Reply message from firmware
762 struct bfi_cee_stats_rsp_s {
763 struct bfi_mhdr_s mh;
768 /* Mailbox message structures from firmware to host */
769 union bfi_cee_i2h_msg_u {
770 struct bfi_mhdr_s mh;
771 struct bfi_cee_get_rsp_s get_rsp;
772 struct bfi_cee_stats_rsp_s stats_rsp;
780 BFI_SFP_H2I_SHOW = 1,
785 BFI_SFP_I2H_SHOW = BFA_I2HM(BFI_SFP_H2I_SHOW),
786 BFI_SFP_I2H_SCN = BFA_I2HM(BFI_SFP_H2I_SCN),
790 * SFP state change notification
792 struct bfi_sfp_scn_s {
793 struct bfi_mhdr_s mhr; /* host msg header */
796 u8 pomlvl; /* pom level: normal/warning/alarm */
797 u8 is_elb; /* e-loopback */
803 enum bfa_sfp_stat_e {
804 BFA_SFP_STATE_INIT = 0, /* SFP state is uninit */
805 BFA_SFP_STATE_REMOVED = 1, /* SFP is removed */
806 BFA_SFP_STATE_INSERTED = 2, /* SFP is inserted */
807 BFA_SFP_STATE_VALID = 3, /* SFP is valid */
808 BFA_SFP_STATE_UNSUPPORT = 4, /* SFP is unsupport */
809 BFA_SFP_STATE_FAILED = 5, /* SFP i2c read fail */
813 * SFP memory access type
816 BFI_SFP_MEM_ALL = 0x1, /* access all data field */
817 BFI_SFP_MEM_DIAGEXT = 0x2, /* access diag ext data field only */
820 struct bfi_sfp_req_s {
821 struct bfi_mhdr_s mh;
824 struct bfi_alen_s alen;
827 struct bfi_sfp_rsp_s {
828 struct bfi_mhdr_s mh;
835 * FLASH module specific
837 enum bfi_flash_h2i_msgs {
838 BFI_FLASH_H2I_QUERY_REQ = 1,
839 BFI_FLASH_H2I_ERASE_REQ = 2,
840 BFI_FLASH_H2I_WRITE_REQ = 3,
841 BFI_FLASH_H2I_READ_REQ = 4,
842 BFI_FLASH_H2I_BOOT_VER_REQ = 5,
845 enum bfi_flash_i2h_msgs {
846 BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
847 BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
848 BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
849 BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
850 BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
851 BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
855 * Flash query request
857 struct bfi_flash_query_req_s {
858 struct bfi_mhdr_s mh; /* Common msg header */
859 struct bfi_alen_s alen;
863 * Flash erase request
865 struct bfi_flash_erase_req_s {
866 struct bfi_mhdr_s mh; /* Common msg header */
867 u32 type; /* partition type */
868 u8 instance; /* partition instance */
873 * Flash write request
875 struct bfi_flash_write_req_s {
876 struct bfi_mhdr_s mh; /* Common msg header */
877 struct bfi_alen_s alen;
878 u32 type; /* partition type */
879 u8 instance; /* partition instance */
889 struct bfi_flash_read_req_s {
890 struct bfi_mhdr_s mh; /* Common msg header */
891 u32 type; /* partition type */
892 u8 instance; /* partition instance */
896 struct bfi_alen_s alen;
900 * Flash query response
902 struct bfi_flash_query_rsp_s {
903 struct bfi_mhdr_s mh; /* Common msg header */
908 * Flash read response
910 struct bfi_flash_read_rsp_s {
911 struct bfi_mhdr_s mh; /* Common msg header */
912 u32 type; /* partition type */
913 u8 instance; /* partition instance */
920 * Flash write response
922 struct bfi_flash_write_rsp_s {
923 struct bfi_mhdr_s mh; /* Common msg header */
924 u32 type; /* partition type */
925 u8 instance; /* partition instance */
932 * Flash erase response
934 struct bfi_flash_erase_rsp_s {
935 struct bfi_mhdr_s mh; /* Common msg header */
936 u32 type; /* partition type */
937 u8 instance; /* partition instance */
943 * Flash event notification
945 struct bfi_flash_event_s {
946 struct bfi_mhdr_s mh; /* Common msg header */
952 *----------------------------------------------------------------------
954 *----------------------------------------------------------------------
957 BFI_DIAG_H2I_PORTBEACON = 1,
958 BFI_DIAG_H2I_LOOPBACK = 2,
959 BFI_DIAG_H2I_FWPING = 3,
960 BFI_DIAG_H2I_TEMPSENSOR = 4,
961 BFI_DIAG_H2I_LEDTEST = 5,
962 BFI_DIAG_H2I_QTEST = 6,
966 BFI_DIAG_I2H_PORTBEACON = BFA_I2HM(BFI_DIAG_H2I_PORTBEACON),
967 BFI_DIAG_I2H_LOOPBACK = BFA_I2HM(BFI_DIAG_H2I_LOOPBACK),
968 BFI_DIAG_I2H_FWPING = BFA_I2HM(BFI_DIAG_H2I_FWPING),
969 BFI_DIAG_I2H_TEMPSENSOR = BFA_I2HM(BFI_DIAG_H2I_TEMPSENSOR),
970 BFI_DIAG_I2H_LEDTEST = BFA_I2HM(BFI_DIAG_H2I_LEDTEST),
971 BFI_DIAG_I2H_QTEST = BFA_I2HM(BFI_DIAG_H2I_QTEST),
974 #define BFI_DIAG_MAX_SGES 2
975 #define BFI_DIAG_DMA_BUF_SZ (2 * 1024)
976 #define BFI_BOOT_MEMTEST_RES_ADDR 0x900
977 #define BFI_BOOT_MEMTEST_RES_SIG 0xA0A1A2A3
979 struct bfi_diag_lb_req_s {
980 struct bfi_mhdr_s mh;
983 u8 lb_mode; /*!< bfa_port_opmode_t */
984 u8 speed; /*!< bfa_port_speed_t */
988 struct bfi_diag_lb_rsp_s {
989 struct bfi_mhdr_s mh; /* 4 bytes */
990 struct bfa_diag_loopback_result_s res; /* 16 bytes */
993 struct bfi_diag_fwping_req_s {
994 struct bfi_mhdr_s mh; /* 4 bytes */
995 struct bfi_alen_s alen; /* 12 bytes */
996 u32 data; /* user input data pattern */
997 u32 count; /* user input dma count */
998 u8 qtag; /* track CPE vc */
1002 struct bfi_diag_fwping_rsp_s {
1003 struct bfi_mhdr_s mh; /* 4 bytes */
1004 u32 data; /* user input data pattern */
1005 u8 qtag; /* track CPE vc */
1006 u8 dma_status; /* dma status */
1011 * Temperature Sensor
1013 struct bfi_diag_ts_req_s {
1014 struct bfi_mhdr_s mh; /* 4 bytes */
1015 u16 temp; /* 10-bit A/D value */
1016 u16 brd_temp; /* 9-bit board temp */
1018 u8 ts_junc; /* show junction tempsensor */
1019 u8 ts_brd; /* show board tempsensor */
1022 #define bfi_diag_ts_rsp_t struct bfi_diag_ts_req_s
1024 struct bfi_diag_ledtest_req_s {
1025 struct bfi_mhdr_s mh; /* 4 bytes */
1029 u8 led; /* bitmap of LEDs to be tested */
1030 u16 freq; /* no. of blinks every 10 secs */
1034 /* notify host led operation is done */
1035 struct bfi_diag_ledtest_rsp_s {
1036 struct bfi_mhdr_s mh; /* 4 bytes */
1039 struct bfi_diag_portbeacon_req_s {
1040 struct bfi_mhdr_s mh; /* 4 bytes */
1041 u32 period; /* beaconing period */
1042 u8 beacon; /* 1: beacon on */
1046 /* notify host the beacon is off */
1047 struct bfi_diag_portbeacon_rsp_s {
1048 struct bfi_mhdr_s mh; /* 4 bytes */
1051 struct bfi_diag_qtest_req_s {
1052 struct bfi_mhdr_s mh; /* 4 bytes */
1053 u32 data[BFI_LMSG_PL_WSZ]; /* fill up tcm prefetch area */
1055 #define bfi_diag_qtest_rsp_t struct bfi_diag_qtest_req_s
1058 * PHY module specific
1060 enum bfi_phy_h2i_msgs_e {
1061 BFI_PHY_H2I_QUERY_REQ = 1,
1062 BFI_PHY_H2I_STATS_REQ = 2,
1063 BFI_PHY_H2I_WRITE_REQ = 3,
1064 BFI_PHY_H2I_READ_REQ = 4,
1067 enum bfi_phy_i2h_msgs_e {
1068 BFI_PHY_I2H_QUERY_RSP = BFA_I2HM(1),
1069 BFI_PHY_I2H_STATS_RSP = BFA_I2HM(2),
1070 BFI_PHY_I2H_WRITE_RSP = BFA_I2HM(3),
1071 BFI_PHY_I2H_READ_RSP = BFA_I2HM(4),
1075 * External PHY query request
1077 struct bfi_phy_query_req_s {
1078 struct bfi_mhdr_s mh; /* Common msg header */
1081 struct bfi_alen_s alen;
1085 * External PHY stats request
1087 struct bfi_phy_stats_req_s {
1088 struct bfi_mhdr_s mh; /* Common msg header */
1091 struct bfi_alen_s alen;
1095 * External PHY write request
1097 struct bfi_phy_write_req_s {
1098 struct bfi_mhdr_s mh; /* Common msg header */
1104 struct bfi_alen_s alen;
1108 * External PHY read request
1110 struct bfi_phy_read_req_s {
1111 struct bfi_mhdr_s mh; /* Common msg header */
1116 struct bfi_alen_s alen;
1120 * External PHY query response
1122 struct bfi_phy_query_rsp_s {
1123 struct bfi_mhdr_s mh; /* Common msg header */
1128 * External PHY stats response
1130 struct bfi_phy_stats_rsp_s {
1131 struct bfi_mhdr_s mh; /* Common msg header */
1136 * External PHY read response
1138 struct bfi_phy_read_rsp_s {
1139 struct bfi_mhdr_s mh; /* Common msg header */
1145 * External PHY write response
1147 struct bfi_phy_write_rsp_s {
1148 struct bfi_mhdr_s mh; /* Common msg header */
1155 #endif /* __BFI_H__ */