Pileus Git - ~andy/linux/blob - drivers/regulator/lp8788-ldo.c

   1 /*
   2  * TI LP8788 MFD - ldo regulator driver
   3  *
   4  * Copyright 2012 Texas Instruments
   5  *
   6  * Author: Milo(Woogyom) Kim <milo.kim@ti.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/slab.h>
  16 #include <linux/err.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/regulator/driver.h>
  19 #include <linux/gpio.h>
  20 #include <linux/mfd/lp8788.h>
  21
  22 /* register address */
  23 #define LP8788_EN_LDO_A                 0x0D    /* DLDO 1 ~ 8 */
  24 #define LP8788_EN_LDO_B                 0x0E    /* DLDO 9 ~ 12, ALDO 1 ~ 4 */
  25 #define LP8788_EN_LDO_C                 0x0F    /* ALDO 5 ~ 10 */
  26 #define LP8788_EN_SEL                   0x10
  27 #define LP8788_DLDO1_VOUT               0x2E
  28 #define LP8788_DLDO2_VOUT               0x2F
  29 #define LP8788_DLDO3_VOUT               0x30
  30 #define LP8788_DLDO4_VOUT               0x31
  31 #define LP8788_DLDO5_VOUT               0x32
  32 #define LP8788_DLDO6_VOUT               0x33
  33 #define LP8788_DLDO7_VOUT               0x34
  34 #define LP8788_DLDO8_VOUT               0x35
  35 #define LP8788_DLDO9_VOUT               0x36
  36 #define LP8788_DLDO10_VOUT              0x37
  37 #define LP8788_DLDO11_VOUT              0x38
  38 #define LP8788_DLDO12_VOUT              0x39
  39 #define LP8788_ALDO1_VOUT               0x3A
  40 #define LP8788_ALDO2_VOUT               0x3B
  41 #define LP8788_ALDO3_VOUT               0x3C
  42 #define LP8788_ALDO4_VOUT               0x3D
  43 #define LP8788_ALDO5_VOUT               0x3E
  44 #define LP8788_ALDO6_VOUT               0x3F
  45 #define LP8788_ALDO7_VOUT               0x40
  46 #define LP8788_ALDO8_VOUT               0x41
  47 #define LP8788_ALDO9_VOUT               0x42
  48 #define LP8788_ALDO10_VOUT              0x43
  49 #define LP8788_DLDO1_TIMESTEP           0x44
  50
  51 /* mask/shift bits */
  52 #define LP8788_EN_DLDO1_M               BIT(0)  /* Addr 0Dh ~ 0Fh */
  53 #define LP8788_EN_DLDO2_M               BIT(1)
  54 #define LP8788_EN_DLDO3_M               BIT(2)
  55 #define LP8788_EN_DLDO4_M               BIT(3)
  56 #define LP8788_EN_DLDO5_M               BIT(4)
  57 #define LP8788_EN_DLDO6_M               BIT(5)
  58 #define LP8788_EN_DLDO7_M               BIT(6)
  59 #define LP8788_EN_DLDO8_M               BIT(7)
  60 #define LP8788_EN_DLDO9_M               BIT(0)
  61 #define LP8788_EN_DLDO10_M              BIT(1)
  62 #define LP8788_EN_DLDO11_M              BIT(2)
  63 #define LP8788_EN_DLDO12_M              BIT(3)
  64 #define LP8788_EN_ALDO1_M               BIT(4)
  65 #define LP8788_EN_ALDO2_M               BIT(5)
  66 #define LP8788_EN_ALDO3_M               BIT(6)
  67 #define LP8788_EN_ALDO4_M               BIT(7)
  68 #define LP8788_EN_ALDO5_M               BIT(0)
  69 #define LP8788_EN_ALDO6_M               BIT(1)
  70 #define LP8788_EN_ALDO7_M               BIT(2)
  71 #define LP8788_EN_ALDO8_M               BIT(3)
  72 #define LP8788_EN_ALDO9_M               BIT(4)
  73 #define LP8788_EN_ALDO10_M              BIT(5)
  74 #define LP8788_EN_SEL_DLDO911_M         BIT(0)  /* Addr 10h */
  75 #define LP8788_EN_SEL_DLDO7_M           BIT(1)
  76 #define LP8788_EN_SEL_ALDO7_M           BIT(2)
  77 #define LP8788_EN_SEL_ALDO5_M           BIT(3)
  78 #define LP8788_EN_SEL_ALDO234_M         BIT(4)
  79 #define LP8788_EN_SEL_ALDO1_M           BIT(5)
  80 #define LP8788_VOUT_5BIT_M              0x1F    /* Addr 2Eh ~ 43h */
  81 #define LP8788_VOUT_4BIT_M              0x0F
  82 #define LP8788_VOUT_3BIT_M              0x07
  83 #define LP8788_VOUT_1BIT_M              0x01
  84 #define LP8788_STARTUP_TIME_M           0xF8    /* Addr 44h ~ 59h */
  85 #define LP8788_STARTUP_TIME_S           3
  86
  87 #define ENABLE_TIME_USEC                32
  88 #define ENABLE                          GPIOF_OUT_INIT_HIGH
  89 #define DISABLE                         GPIOF_OUT_INIT_LOW
  90
  91 enum lp8788_ldo_id {
  92         DLDO1,
  93         DLDO2,
  94         DLDO3,
  95         DLDO4,
  96         DLDO5,
  97         DLDO6,
  98         DLDO7,
  99         DLDO8,
 100         DLDO9,
 101         DLDO10,
 102         DLDO11,
 103         DLDO12,
 104         ALDO1,
 105         ALDO2,
 106         ALDO3,
 107         ALDO4,
 108         ALDO5,
 109         ALDO6,
 110         ALDO7,
 111         ALDO8,
 112         ALDO9,
 113         ALDO10,
 114 };
 115
 116 struct lp8788_ldo {
 117         struct lp8788 *lp;
 118         struct regulator_desc *desc;
 119         struct regulator_dev *regulator;
 120         struct lp8788_ldo_enable_pin *en_pin;
 121 };
 122
 123 /* DLDO 1, 2, 3, 9 voltage table */
 124 static const int lp8788_dldo1239_vtbl[] = {
 125         1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
 126         2600000, 2700000, 2800000, 2900000, 3000000, 2850000, 2850000, 2850000,
 127         2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000,
 128         2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000,
 129 };
 130
 131 /* DLDO 4 voltage table */
 132 static const int lp8788_dldo4_vtbl[] = { 1800000, 3000000 };
 133
 134 /* DLDO 5, 7, 8 and ALDO 6 voltage table */
 135 static const int lp8788_dldo578_aldo6_vtbl[] = {
 136         1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
 137         2600000, 2700000, 2800000, 2900000, 3000000, 3000000, 3000000, 3000000,
 138 };
 139
 140 /* DLDO 6 voltage table */
 141 static const int lp8788_dldo6_vtbl[] = {
 142         3000000, 3100000, 3200000, 3300000, 3400000, 3500000, 3600000, 3600000,
 143 };
 144
 145 /* DLDO 10, 11 voltage table */
 146 static const int lp8788_dldo1011_vtbl[] = {
 147         1100000, 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000,
 148         1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000,
 149 };
 150
 151 /* ALDO 1 voltage table */
 152 static const int lp8788_aldo1_vtbl[] = { 1800000, 2850000 };
 153
 154 /* ALDO 7 voltage table */
 155 static const int lp8788_aldo7_vtbl[] = {
 156         1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000,
 157 };
 158
 159 static int lp8788_ldo_enable_time(struct regulator_dev *rdev)
 160 {
 161         struct lp8788_ldo *ldo = rdev_get_drvdata(rdev);
 162         enum lp8788_ldo_id id = rdev_get_id(rdev);
 163         u8 val, addr = LP8788_DLDO1_TIMESTEP + id;
 164
 165         if (lp8788_read_byte(ldo->lp, addr, &val))
 166                 return -EINVAL;
 167
 168         val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S;
 169
 170         return ENABLE_TIME_USEC * val;
 171 }
 172
 173 static int lp8788_ldo_fixed_get_voltage(struct regulator_dev *rdev)
 174 {
 175         enum lp8788_ldo_id id = rdev_get_id(rdev);
 176
 177         switch (id) {
 178         case ALDO2 ... ALDO5:
 179                 return 2850000;
 180         case DLDO12:
 181         case ALDO8 ... ALDO9:
 182                 return 2500000;
 183         case ALDO10:
 184                 return 1100000;
 185         default:
 186                 return -EINVAL;
 187         }
 188 }
 189
 190 static struct regulator_ops lp8788_ldo_voltage_table_ops = {
 191         .list_voltage = regulator_list_voltage_table,
 192         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 193         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 194         .enable = regulator_enable_regmap,
 195         .disable = regulator_disable_regmap,
 196         .is_enabled = regulator_is_enabled_regmap,
 197         .enable_time = lp8788_ldo_enable_time,
 198 };
 199
 200 static struct regulator_ops lp8788_ldo_voltage_fixed_ops = {
 201         .get_voltage = lp8788_ldo_fixed_get_voltage,
 202         .enable = regulator_enable_regmap,
 203         .disable = regulator_disable_regmap,
 204         .is_enabled = regulator_is_enabled_regmap,
 205         .enable_time = lp8788_ldo_enable_time,
 206 };
 207
 208 static struct regulator_desc lp8788_dldo_desc[] = {
 209         {
 210                 .name = "dldo1",
 211                 .id = DLDO1,
 212                 .ops = &lp8788_ldo_voltage_table_ops,
 213                 .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
 214                 .volt_table = lp8788_dldo1239_vtbl,
 215                 .type = REGULATOR_VOLTAGE,
 216                 .owner = THIS_MODULE,
 217                 .vsel_reg = LP8788_DLDO1_VOUT,
 218                 .vsel_mask = LP8788_VOUT_5BIT_M,
 219                 .enable_reg = LP8788_EN_LDO_A,
 220                 .enable_mask = LP8788_EN_DLDO1_M,
 221         },
 222         {
 223                 .name = "dldo2",
 224                 .id = DLDO2,
 225                 .ops = &lp8788_ldo_voltage_table_ops,
 226                 .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
 227                 .volt_table = lp8788_dldo1239_vtbl,
 228                 .type = REGULATOR_VOLTAGE,
 229                 .owner = THIS_MODULE,
 230                 .vsel_reg = LP8788_DLDO2_VOUT,
 231                 .vsel_mask = LP8788_VOUT_5BIT_M,
 232                 .enable_reg = LP8788_EN_LDO_A,
 233                 .enable_mask = LP8788_EN_DLDO2_M,
 234         },
 235         {
 236                 .name = "dldo3",
 237                 .id = DLDO3,
 238                 .ops = &lp8788_ldo_voltage_table_ops,
 239                 .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
 240                 .volt_table = lp8788_dldo1239_vtbl,
 241                 .type = REGULATOR_VOLTAGE,
 242                 .owner = THIS_MODULE,
 243                 .vsel_reg = LP8788_DLDO3_VOUT,
 244                 .vsel_mask = LP8788_VOUT_5BIT_M,
 245                 .enable_reg = LP8788_EN_LDO_A,
 246                 .enable_mask = LP8788_EN_DLDO3_M,
 247         },
 248         {
 249                 .name = "dldo4",
 250                 .id = DLDO4,
 251                 .ops = &lp8788_ldo_voltage_table_ops,
 252                 .n_voltages = ARRAY_SIZE(lp8788_dldo4_vtbl),
 253                 .volt_table = lp8788_dldo4_vtbl,
 254                 .type = REGULATOR_VOLTAGE,
 255                 .owner = THIS_MODULE,
 256                 .vsel_reg = LP8788_DLDO4_VOUT,
 257                 .vsel_mask = LP8788_VOUT_1BIT_M,
 258                 .enable_reg = LP8788_EN_LDO_A,
 259                 .enable_mask = LP8788_EN_DLDO4_M,
 260         },
 261         {
 262                 .name = "dldo5",
 263                 .id = DLDO5,
 264                 .ops = &lp8788_ldo_voltage_table_ops,
 265                 .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
 266                 .volt_table = lp8788_dldo578_aldo6_vtbl,
 267                 .type = REGULATOR_VOLTAGE,
 268                 .owner = THIS_MODULE,
 269                 .vsel_reg = LP8788_DLDO5_VOUT,
 270                 .vsel_mask = LP8788_VOUT_4BIT_M,
 271                 .enable_reg = LP8788_EN_LDO_A,
 272                 .enable_mask = LP8788_EN_DLDO5_M,
 273         },
 274         {
 275                 .name = "dldo6",
 276                 .id = DLDO6,
 277                 .ops = &lp8788_ldo_voltage_table_ops,
 278                 .n_voltages = ARRAY_SIZE(lp8788_dldo6_vtbl),
 279                 .volt_table = lp8788_dldo6_vtbl,
 280                 .type = REGULATOR_VOLTAGE,
 281                 .owner = THIS_MODULE,
 282                 .vsel_reg = LP8788_DLDO6_VOUT,
 283                 .vsel_mask = LP8788_VOUT_3BIT_M,
 284                 .enable_reg = LP8788_EN_LDO_A,
 285                 .enable_mask = LP8788_EN_DLDO6_M,
 286         },
 287         {
 288                 .name = "dldo7",
 289                 .id = DLDO7,
 290                 .ops = &lp8788_ldo_voltage_table_ops,
 291                 .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
 292                 .volt_table = lp8788_dldo578_aldo6_vtbl,
 293                 .type = REGULATOR_VOLTAGE,
 294                 .owner = THIS_MODULE,
 295                 .vsel_reg = LP8788_DLDO7_VOUT,
 296                 .vsel_mask = LP8788_VOUT_4BIT_M,
 297                 .enable_reg = LP8788_EN_LDO_A,
 298                 .enable_mask = LP8788_EN_DLDO7_M,
 299         },
 300         {
 301                 .name = "dldo8",
 302                 .id = DLDO8,
 303                 .ops = &lp8788_ldo_voltage_table_ops,
 304                 .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
 305                 .volt_table = lp8788_dldo578_aldo6_vtbl,
 306                 .type = REGULATOR_VOLTAGE,
 307                 .owner = THIS_MODULE,
 308                 .vsel_reg = LP8788_DLDO8_VOUT,
 309                 .vsel_mask = LP8788_VOUT_4BIT_M,
 310                 .enable_reg = LP8788_EN_LDO_A,
 311                 .enable_mask = LP8788_EN_DLDO8_M,
 312         },
 313         {
 314                 .name = "dldo9",
 315                 .id = DLDO9,
 316                 .ops = &lp8788_ldo_voltage_table_ops,
 317                 .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
 318                 .volt_table = lp8788_dldo1239_vtbl,
 319                 .type = REGULATOR_VOLTAGE,
 320                 .owner = THIS_MODULE,
 321                 .vsel_reg = LP8788_DLDO9_VOUT,
 322                 .vsel_mask = LP8788_VOUT_5BIT_M,
 323                 .enable_reg = LP8788_EN_LDO_B,
 324                 .enable_mask = LP8788_EN_DLDO9_M,
 325         },
 326         {
 327                 .name = "dldo10",
 328                 .id = DLDO10,
 329                 .ops = &lp8788_ldo_voltage_table_ops,
 330                 .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl),
 331                 .volt_table = lp8788_dldo1011_vtbl,
 332                 .type = REGULATOR_VOLTAGE,
 333                 .owner = THIS_MODULE,
 334                 .vsel_reg = LP8788_DLDO10_VOUT,
 335                 .vsel_mask = LP8788_VOUT_4BIT_M,
 336                 .enable_reg = LP8788_EN_LDO_B,
 337                 .enable_mask = LP8788_EN_DLDO10_M,
 338         },
 339         {
 340                 .name = "dldo11",
 341                 .id = DLDO11,
 342                 .ops = &lp8788_ldo_voltage_table_ops,
 343                 .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl),
 344                 .volt_table = lp8788_dldo1011_vtbl,
 345                 .type = REGULATOR_VOLTAGE,
 346                 .owner = THIS_MODULE,
 347                 .vsel_reg = LP8788_DLDO11_VOUT,
 348                 .vsel_mask = LP8788_VOUT_4BIT_M,
 349                 .enable_reg = LP8788_EN_LDO_B,
 350                 .enable_mask = LP8788_EN_DLDO11_M,
 351         },
 352         {
 353                 .name = "dldo12",
 354                 .id = DLDO12,
 355                 .ops = &lp8788_ldo_voltage_fixed_ops,
 356                 .n_voltages = 1,
 357                 .type = REGULATOR_VOLTAGE,
 358                 .owner = THIS_MODULE,
 359                 .enable_reg = LP8788_EN_LDO_B,
 360                 .enable_mask = LP8788_EN_DLDO12_M,
 361         },
 362 };
 363
 364 static struct regulator_desc lp8788_aldo_desc[] = {
 365         {
 366                 .name = "aldo1",
 367                 .id = ALDO1,
 368                 .ops = &lp8788_ldo_voltage_table_ops,
 369                 .n_voltages = ARRAY_SIZE(lp8788_aldo1_vtbl),
 370                 .volt_table = lp8788_aldo1_vtbl,
 371                 .type = REGULATOR_VOLTAGE,
 372                 .owner = THIS_MODULE,
 373                 .vsel_reg = LP8788_ALDO1_VOUT,
 374                 .vsel_mask = LP8788_VOUT_1BIT_M,
 375                 .enable_reg = LP8788_EN_LDO_B,
 376                 .enable_mask = LP8788_EN_ALDO1_M,
 377         },
 378         {
 379                 .name = "aldo2",
 380                 .id = ALDO2,
 381                 .ops = &lp8788_ldo_voltage_fixed_ops,
 382                 .n_voltages = 1,
 383                 .type = REGULATOR_VOLTAGE,
 384                 .owner = THIS_MODULE,
 385                 .enable_reg = LP8788_EN_LDO_B,
 386                 .enable_mask = LP8788_EN_ALDO2_M,
 387         },
 388         {
 389                 .name = "aldo3",
 390                 .id = ALDO3,
 391                 .ops = &lp8788_ldo_voltage_fixed_ops,
 392                 .n_voltages = 1,
 393                 .type = REGULATOR_VOLTAGE,
 394                 .owner = THIS_MODULE,
 395                 .enable_reg = LP8788_EN_LDO_B,
 396                 .enable_mask = LP8788_EN_ALDO3_M,
 397         },
 398         {
 399                 .name = "aldo4",
 400                 .id = ALDO4,
 401                 .ops = &lp8788_ldo_voltage_fixed_ops,
 402                 .n_voltages = 1,
 403                 .type = REGULATOR_VOLTAGE,
 404                 .owner = THIS_MODULE,
 405                 .enable_reg = LP8788_EN_LDO_B,
 406                 .enable_mask = LP8788_EN_ALDO4_M,
 407         },
 408         {
 409                 .name = "aldo5",
 410                 .id = ALDO5,
 411                 .ops = &lp8788_ldo_voltage_fixed_ops,
 412                 .n_voltages = 1,
 413                 .type = REGULATOR_VOLTAGE,
 414                 .owner = THIS_MODULE,
 415                 .enable_reg = LP8788_EN_LDO_C,
 416                 .enable_mask = LP8788_EN_ALDO5_M,
 417         },
 418         {
 419                 .name = "aldo6",
 420                 .id = ALDO6,
 421                 .ops = &lp8788_ldo_voltage_table_ops,
 422                 .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
 423                 .volt_table = lp8788_dldo578_aldo6_vtbl,
 424                 .type = REGULATOR_VOLTAGE,
 425                 .owner = THIS_MODULE,
 426                 .vsel_reg = LP8788_ALDO6_VOUT,
 427                 .vsel_mask = LP8788_VOUT_4BIT_M,
 428                 .enable_reg = LP8788_EN_LDO_C,
 429                 .enable_mask = LP8788_EN_ALDO6_M,
 430         },
 431         {
 432                 .name = "aldo7",
 433                 .id = ALDO7,
 434                 .ops = &lp8788_ldo_voltage_table_ops,
 435                 .n_voltages = ARRAY_SIZE(lp8788_aldo7_vtbl),
 436                 .volt_table = lp8788_aldo7_vtbl,
 437                 .type = REGULATOR_VOLTAGE,
 438                 .owner = THIS_MODULE,
 439                 .vsel_reg = LP8788_ALDO7_VOUT,
 440                 .vsel_mask = LP8788_VOUT_3BIT_M,
 441                 .enable_reg = LP8788_EN_LDO_C,
 442                 .enable_mask = LP8788_EN_ALDO7_M,
 443         },
 444         {
 445                 .name = "aldo8",
 446                 .id = ALDO8,
 447                 .ops = &lp8788_ldo_voltage_fixed_ops,
 448                 .n_voltages = 1,
 449                 .type = REGULATOR_VOLTAGE,
 450                 .owner = THIS_MODULE,
 451                 .enable_reg = LP8788_EN_LDO_C,
 452                 .enable_mask = LP8788_EN_ALDO8_M,
 453         },
 454         {
 455                 .name = "aldo9",
 456                 .id = ALDO9,
 457                 .ops = &lp8788_ldo_voltage_fixed_ops,
 458                 .n_voltages = 1,
 459                 .type = REGULATOR_VOLTAGE,
 460                 .owner = THIS_MODULE,
 461                 .enable_reg = LP8788_EN_LDO_C,
 462                 .enable_mask = LP8788_EN_ALDO9_M,
 463         },
 464         {
 465                 .name = "aldo10",
 466                 .id = ALDO10,
 467                 .ops = &lp8788_ldo_voltage_fixed_ops,
 468                 .n_voltages = 1,
 469                 .type = REGULATOR_VOLTAGE,
 470                 .owner = THIS_MODULE,
 471                 .enable_reg = LP8788_EN_LDO_C,
 472                 .enable_mask = LP8788_EN_ALDO10_M,
 473         },
 474 };
 475
 476 static int lp8788_config_ldo_enable_mode(struct platform_device *pdev,
 477                                         struct lp8788_ldo *ldo,
 478                                         enum lp8788_ldo_id id)
 479 {
 480         struct lp8788 *lp = ldo->lp;
 481         struct lp8788_platform_data *pdata = lp->pdata;
 482         enum lp8788_ext_ldo_en_id enable_id;
 483         u8 en_mask[] = {
 484                 [EN_ALDO1]   = LP8788_EN_SEL_ALDO1_M,
 485                 [EN_ALDO234] = LP8788_EN_SEL_ALDO234_M,
 486                 [EN_ALDO5]   = LP8788_EN_SEL_ALDO5_M,
 487                 [EN_ALDO7]   = LP8788_EN_SEL_ALDO7_M,
 488                 [EN_DLDO7]   = LP8788_EN_SEL_DLDO7_M,
 489                 [EN_DLDO911] = LP8788_EN_SEL_DLDO911_M,
 490         };
 491
 492         switch (id) {
 493         case DLDO7:
 494                 enable_id = EN_DLDO7;
 495                 break;
 496         case DLDO9:
 497         case DLDO11:
 498                 enable_id = EN_DLDO911;
 499                 break;
 500         case ALDO1:
 501                 enable_id = EN_ALDO1;
 502                 break;
 503         case ALDO2 ... ALDO4:
 504                 enable_id = EN_ALDO234;
 505                 break;
 506         case ALDO5:
 507                 enable_id = EN_ALDO5;
 508                 break;
 509         case ALDO7:
 510                 enable_id = EN_ALDO7;
 511                 break;
 512         default:
 513                 return 0;
 514         }
 515
 516         /* if no platform data for ldo pin, then set default enable mode */
 517         if (!pdata || !pdata->ldo_pin || !pdata->ldo_pin[enable_id])
 518                 goto set_default_ldo_enable_mode;
 519
 520         ldo->en_pin = pdata->ldo_pin[enable_id];
 521         return 0;
 522
 523 set_default_ldo_enable_mode:
 524         return lp8788_update_bits(lp, LP8788_EN_SEL, en_mask[enable_id], 0);
 525 }
 526
 527 static int lp8788_dldo_probe(struct platform_device *pdev)
 528 {
 529         struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent);
 530         int id = pdev->id;
 531         struct lp8788_ldo *ldo;
 532         struct regulator_config cfg = { };
 533         struct regulator_dev *rdev;
 534         int ret;
 535
 536         ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL);
 537         if (!ldo)
 538                 return -ENOMEM;
 539
 540         ldo->lp = lp;
 541         ret = lp8788_config_ldo_enable_mode(pdev, ldo, id);
 542         if (ret)
 543                 return ret;
 544
 545         if (ldo->en_pin) {
 546                 cfg.ena_gpio = ldo->en_pin->gpio;
 547                 cfg.ena_gpio_flags = ldo->en_pin->init_state;
 548         }
 549
 550         cfg.dev = pdev->dev.parent;
 551         cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL;
 552         cfg.driver_data = ldo;
 553         cfg.regmap = lp->regmap;
 554
 555         rdev = regulator_register(&lp8788_dldo_desc[id], &cfg);
 556         if (IS_ERR(rdev)) {
 557                 ret = PTR_ERR(rdev);
 558                 dev_err(&pdev->dev, "DLDO%d regulator register err = %d\n",
 559                                 id + 1, ret);
 560                 return ret;
 561         }
 562
 563         ldo->regulator = rdev;
 564         platform_set_drvdata(pdev, ldo);
 565
 566         return 0;
 567 }
 568
 569 static int lp8788_dldo_remove(struct platform_device *pdev)
 570 {
 571         struct lp8788_ldo *ldo = platform_get_drvdata(pdev);
 572
 573         platform_set_drvdata(pdev, NULL);
 574         regulator_unregister(ldo->regulator);
 575
 576         return 0;
 577 }
 578
 579 static struct platform_driver lp8788_dldo_driver = {
 580         .probe = lp8788_dldo_probe,
 581         .remove = lp8788_dldo_remove,
 582         .driver = {
 583                 .name = LP8788_DEV_DLDO,
 584                 .owner = THIS_MODULE,
 585         },
 586 };
 587
 588 static int lp8788_aldo_probe(struct platform_device *pdev)
 589 {
 590         struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent);
 591         int id = pdev->id;
 592         struct lp8788_ldo *ldo;
 593         struct regulator_config cfg = { };
 594         struct regulator_dev *rdev;
 595         int ret;
 596
 597         ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL);
 598         if (!ldo)
 599                 return -ENOMEM;
 600
 601         ldo->lp = lp;
 602         ret = lp8788_config_ldo_enable_mode(pdev, ldo, id + ALDO1);
 603         if (ret)
 604                 return ret;
 605
 606         if (ldo->en_pin) {
 607                 cfg.ena_gpio = ldo->en_pin->gpio;
 608                 cfg.ena_gpio_flags = ldo->en_pin->init_state;
 609         }
 610
 611         cfg.dev = pdev->dev.parent;
 612         cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL;
 613         cfg.driver_data = ldo;
 614         cfg.regmap = lp->regmap;
 615
 616         rdev = regulator_register(&lp8788_aldo_desc[id], &cfg);
 617         if (IS_ERR(rdev)) {
 618                 ret = PTR_ERR(rdev);
 619                 dev_err(&pdev->dev, "ALDO%d regulator register err = %d\n",
 620                                 id + 1, ret);
 621                 return ret;
 622         }
 623
 624         ldo->regulator = rdev;
 625         platform_set_drvdata(pdev, ldo);
 626
 627         return 0;
 628 }
 629
 630 static int lp8788_aldo_remove(struct platform_device *pdev)
 631 {
 632         struct lp8788_ldo *ldo = platform_get_drvdata(pdev);
 633
 634         platform_set_drvdata(pdev, NULL);
 635         regulator_unregister(ldo->regulator);
 636
 637         return 0;
 638 }
 639
 640 static struct platform_driver lp8788_aldo_driver = {
 641         .probe = lp8788_aldo_probe,
 642         .remove = lp8788_aldo_remove,
 643         .driver = {
 644                 .name = LP8788_DEV_ALDO,
 645                 .owner = THIS_MODULE,
 646         },
 647 };
 648
 649 static int __init lp8788_ldo_init(void)
 650 {
 651         int ret;
 652
 653         ret = platform_driver_register(&lp8788_dldo_driver);
 654         if (ret)
 655                 return ret;
 656
 657         return platform_driver_register(&lp8788_aldo_driver);
 658 }
 659 subsys_initcall(lp8788_ldo_init);
 660
 661 static void __exit lp8788_ldo_exit(void)
 662 {
 663         platform_driver_unregister(&lp8788_aldo_driver);
 664         platform_driver_unregister(&lp8788_dldo_driver);
 665 }
 666 module_exit(lp8788_ldo_exit);
 667
 668 MODULE_DESCRIPTION("TI LP8788 LDO Driver");
 669 MODULE_AUTHOR("Milo Kim");
 670 MODULE_LICENSE("GPL");
 671 MODULE_ALIAS("platform:lp8788-dldo");
 672 MODULE_ALIAS("platform:lp8788-aldo");