Pileus Git - ~andy/linux/blob - drivers/regulator/ab8500.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * License Terms: GNU General Public License v2
   5  *
   6  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
   7  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
   8  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
   9  *
  10  * AB8500 peripheral regulators
  11  *
  12  * AB8500 supports the following regulators:
  13  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  14  *
  15  * AB8505 supports the following regulators:
  16  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  17  */
  18 #include <linux/init.h>
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/err.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/mfd/abx500.h>
  24 #include <linux/mfd/abx500/ab8500.h>
  25 #include <linux/of.h>
  26 #include <linux/regulator/of_regulator.h>
  27 #include <linux/regulator/driver.h>
  28 #include <linux/regulator/machine.h>
  29 #include <linux/regulator/ab8500.h>
  30 #include <linux/slab.h>
  31
  32 /**
  33  * struct ab8500_shared_mode - is used when mode is shared between
  34  * two regulators.
  35  * @shared_regulator: pointer to the other sharing regulator
  36  * @lp_mode_req: low power mode requested by this regulator
  37  */
  38 struct ab8500_shared_mode {
  39         struct ab8500_regulator_info *shared_regulator;
  40         bool lp_mode_req;
  41 };
  42
  43 /**
  44  * struct ab8500_regulator_info - ab8500 regulator information
  45  * @dev: device pointer
  46  * @desc: regulator description
  47  * @regulator_dev: regulator device
  48  * @shared_mode: used when mode is shared between two regulators
  49  * @is_enabled: status of regulator (on/off)
  50  * @load_lp_uA: maximum load in idle (low power) mode
  51  * @update_bank: bank to control on/off
  52  * @update_reg: register to control on/off
  53  * @update_mask: mask to enable/disable and set mode of regulator
  54  * @update_val: bits holding the regulator current mode
  55  * @update_val_idle: bits to enable the regulator in idle (low power) mode
  56  * @update_val_normal: bits to enable the regulator in normal (high power) mode
  57  * @mode_bank: bank with location of mode register
  58  * @mode_reg: mode register
  59  * @mode_mask: mask for setting mode
  60  * @mode_val_idle: mode setting for low power
  61  * @mode_val_normal: mode setting for normal power
  62  * @voltage_bank: bank to control regulator voltage
  63  * @voltage_reg: register to control regulator voltage
  64  * @voltage_mask: mask to control regulator voltage
  65  * @voltage_shift: shift to control regulator voltage
  66  */
  67 struct ab8500_regulator_info {
  68         struct device           *dev;
  69         struct regulator_desc   desc;
  70         struct regulator_dev    *regulator;
  71         struct ab8500_shared_mode *shared_mode;
  72         bool is_enabled;
  73         int load_lp_uA;
  74         u8 update_bank;
  75         u8 update_reg;
  76         u8 update_mask;
  77         u8 update_val;
  78         u8 update_val_idle;
  79         u8 update_val_normal;
  80         u8 mode_bank;
  81         u8 mode_reg;
  82         u8 mode_mask;
  83         u8 mode_val_idle;
  84         u8 mode_val_normal;
  85         u8 voltage_bank;
  86         u8 voltage_reg;
  87         u8 voltage_mask;
  88         u8 voltage_shift;
  89         struct {
  90                 u8 voltage_limit;
  91                 u8 voltage_bank;
  92                 u8 voltage_reg;
  93                 u8 voltage_mask;
  94                 u8 voltage_shift;
  95         } expand_register;
  96 };
  97
  98 /* voltage tables for the vauxn/vintcore supplies */
  99 static const unsigned int ldo_vauxn_voltages[] = {
 100         1100000,
 101         1200000,
 102         1300000,
 103         1400000,
 104         1500000,
 105         1800000,
 106         1850000,
 107         1900000,
 108         2500000,
 109         2650000,
 110         2700000,
 111         2750000,
 112         2800000,
 113         2900000,
 114         3000000,
 115         3300000,
 116 };
 117
 118 static const unsigned int ldo_vaux3_voltages[] = {
 119         1200000,
 120         1500000,
 121         1800000,
 122         2100000,
 123         2500000,
 124         2750000,
 125         2790000,
 126         2910000,
 127 };
 128
 129 static const unsigned int ldo_vaux56_voltages[] = {
 130         1800000,
 131         1050000,
 132         1100000,
 133         1200000,
 134         1500000,
 135         2200000,
 136         2500000,
 137         2790000,
 138 };
 139
 140 static const unsigned int ldo_vaux3_ab8540_voltages[] = {
 141         1200000,
 142         1500000,
 143         1800000,
 144         2100000,
 145         2500000,
 146         2750000,
 147         2790000,
 148         2910000,
 149         3050000,
 150 };
 151
 152 static const unsigned int ldo_vaux56_ab8540_voltages[] = {
 153         750000, 760000, 770000, 780000, 790000, 800000,
 154         810000, 820000, 830000, 840000, 850000, 860000,
 155         870000, 880000, 890000, 900000, 910000, 920000,
 156         930000, 940000, 950000, 960000, 970000, 980000,
 157         990000, 1000000, 1010000, 1020000, 1030000,
 158         1040000, 1050000, 1060000, 1070000, 1080000,
 159         1090000, 1100000, 1110000, 1120000, 1130000,
 160         1140000, 1150000, 1160000, 1170000, 1180000,
 161         1190000, 1200000, 1210000, 1220000, 1230000,
 162         1240000, 1250000, 1260000, 1270000, 1280000,
 163         1290000, 1300000, 1310000, 1320000, 1330000,
 164         1340000, 1350000, 1360000, 1800000, 2790000,
 165 };
 166
 167 static const unsigned int ldo_vintcore_voltages[] = {
 168         1200000,
 169         1225000,
 170         1250000,
 171         1275000,
 172         1300000,
 173         1325000,
 174         1350000,
 175 };
 176
 177 static const unsigned int ldo_sdio_voltages[] = {
 178         1160000,
 179         1050000,
 180         1100000,
 181         1500000,
 182         1800000,
 183         2200000,
 184         2910000,
 185         3050000,
 186 };
 187
 188 static const unsigned int fixed_1200000_voltage[] = {
 189         1200000,
 190 };
 191
 192 static const unsigned int fixed_1800000_voltage[] = {
 193         1800000,
 194 };
 195
 196 static const unsigned int fixed_2000000_voltage[] = {
 197         2000000,
 198 };
 199
 200 static const unsigned int fixed_2050000_voltage[] = {
 201         2050000,
 202 };
 203
 204 static const unsigned int fixed_3300000_voltage[] = {
 205         3300000,
 206 };
 207
 208 static const unsigned int ldo_vana_voltages[] = {
 209         1050000,
 210         1075000,
 211         1100000,
 212         1125000,
 213         1150000,
 214         1175000,
 215         1200000,
 216         1225000,
 217 };
 218
 219 static const unsigned int ldo_vaudio_voltages[] = {
 220         2000000,
 221         2100000,
 222         2200000,
 223         2300000,
 224         2400000,
 225         2500000,
 226         2600000,
 227         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 228 };
 229
 230 static const unsigned int ldo_vdmic_voltages[] = {
 231         1800000,
 232         1900000,
 233         2000000,
 234         2850000,
 235 };
 236
 237 static DEFINE_MUTEX(shared_mode_mutex);
 238 static struct ab8500_shared_mode ldo_anamic1_shared;
 239 static struct ab8500_shared_mode ldo_anamic2_shared;
 240 static struct ab8500_shared_mode ab8540_ldo_anamic1_shared;
 241 static struct ab8500_shared_mode ab8540_ldo_anamic2_shared;
 242
 243 static int ab8500_regulator_enable(struct regulator_dev *rdev)
 244 {
 245         int ret;
 246         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 247
 248         if (info == NULL) {
 249                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 250                 return -EINVAL;
 251         }
 252
 253         ret = abx500_mask_and_set_register_interruptible(info->dev,
 254                 info->update_bank, info->update_reg,
 255                 info->update_mask, info->update_val);
 256         if (ret < 0) {
 257                 dev_err(rdev_get_dev(rdev),
 258                         "couldn't set enable bits for regulator\n");
 259                 return ret;
 260         }
 261
 262         info->is_enabled = true;
 263
 264         dev_vdbg(rdev_get_dev(rdev),
 265                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 266                 info->desc.name, info->update_bank, info->update_reg,
 267                 info->update_mask, info->update_val);
 268
 269         return ret;
 270 }
 271
 272 static int ab8500_regulator_disable(struct regulator_dev *rdev)
 273 {
 274         int ret;
 275         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 276
 277         if (info == NULL) {
 278                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 279                 return -EINVAL;
 280         }
 281
 282         ret = abx500_mask_and_set_register_interruptible(info->dev,
 283                 info->update_bank, info->update_reg,
 284                 info->update_mask, 0x0);
 285         if (ret < 0) {
 286                 dev_err(rdev_get_dev(rdev),
 287                         "couldn't set disable bits for regulator\n");
 288                 return ret;
 289         }
 290
 291         info->is_enabled = false;
 292
 293         dev_vdbg(rdev_get_dev(rdev),
 294                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 295                 info->desc.name, info->update_bank, info->update_reg,
 296                 info->update_mask, 0x0);
 297
 298         return ret;
 299 }
 300
 301 static unsigned int ab8500_regulator_get_optimum_mode(
 302                 struct regulator_dev *rdev, int input_uV,
 303                 int output_uV, int load_uA)
 304 {
 305         unsigned int mode;
 306
 307         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 308
 309         if (info == NULL) {
 310                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 311                 return -EINVAL;
 312         }
 313
 314         if (load_uA <= info->load_lp_uA)
 315                 mode = REGULATOR_MODE_IDLE;
 316         else
 317                 mode = REGULATOR_MODE_NORMAL;
 318
 319         return mode;
 320 }
 321
 322 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 323                                      unsigned int mode)
 324 {
 325         int ret = 0;
 326         u8 bank;
 327         u8 reg;
 328         u8 mask;
 329         u8 val;
 330         bool dmr = false; /* Dedicated mode register */
 331         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 332
 333         if (info == NULL) {
 334                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 335                 return -EINVAL;
 336         }
 337
 338         if (info->shared_mode) {
 339                 /*
 340                  * Special case where mode is shared between two regulators.
 341                  */
 342                 struct ab8500_shared_mode *sm = info->shared_mode;
 343                 mutex_lock(&shared_mode_mutex);
 344
 345                 if (mode == REGULATOR_MODE_IDLE) {
 346                         sm->lp_mode_req = true; /* Low power mode requested */
 347                         if (!((sm->shared_regulator)->
 348                               shared_mode->lp_mode_req)) {
 349                                 mutex_unlock(&shared_mode_mutex);
 350                                 return 0; /* Other regulator prevent LP mode */
 351                         }
 352                 } else {
 353                         sm->lp_mode_req = false;
 354                 }
 355         }
 356
 357         if (info->mode_mask) {
 358                 /* Dedicated register for handling mode */
 359
 360                 dmr = true;
 361
 362                 switch (mode) {
 363                 case REGULATOR_MODE_NORMAL:
 364                         val = info->mode_val_normal;
 365                         break;
 366                 case REGULATOR_MODE_IDLE:
 367                         val = info->mode_val_idle;
 368                         break;
 369                 default:
 370                         if (info->shared_mode)
 371                                 mutex_unlock(&shared_mode_mutex);
 372                         return -EINVAL;
 373                 }
 374
 375                 bank = info->mode_bank;
 376                 reg = info->mode_reg;
 377                 mask = info->mode_mask;
 378         } else {
 379                 /* Mode register same as enable register */
 380
 381                 switch (mode) {
 382                 case REGULATOR_MODE_NORMAL:
 383                         info->update_val = info->update_val_normal;
 384                         val = info->update_val_normal;
 385                         break;
 386                 case REGULATOR_MODE_IDLE:
 387                         info->update_val = info->update_val_idle;
 388                         val = info->update_val_idle;
 389                         break;
 390                 default:
 391                         if (info->shared_mode)
 392                                 mutex_unlock(&shared_mode_mutex);
 393                         return -EINVAL;
 394                 }
 395
 396                 bank = info->update_bank;
 397                 reg = info->update_reg;
 398                 mask = info->update_mask;
 399         }
 400
 401         if (info->is_enabled || dmr) {
 402                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 403                         bank, reg, mask, val);
 404                 if (ret < 0)
 405                         dev_err(rdev_get_dev(rdev),
 406                                 "couldn't set regulator mode\n");
 407
 408                 dev_vdbg(rdev_get_dev(rdev),
 409                         "%s-set_mode (bank, reg, mask, value): "
 410                         "0x%x, 0x%x, 0x%x, 0x%x\n",
 411                         info->desc.name, bank, reg,
 412                         mask, val);
 413         }
 414
 415         if (info->shared_mode)
 416                 mutex_unlock(&shared_mode_mutex);
 417
 418         return ret;
 419 }
 420
 421 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 422 {
 423         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 424         int ret;
 425         u8 val;
 426         u8 val_normal;
 427         u8 val_idle;
 428
 429         if (info == NULL) {
 430                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 431                 return -EINVAL;
 432         }
 433
 434         /* Need special handling for shared mode */
 435         if (info->shared_mode) {
 436                 if (info->shared_mode->lp_mode_req)
 437                         return REGULATOR_MODE_IDLE;
 438                 else
 439                         return REGULATOR_MODE_NORMAL;
 440         }
 441
 442         if (info->mode_mask) {
 443                 /* Dedicated register for handling mode */
 444                 ret = abx500_get_register_interruptible(info->dev,
 445                 info->mode_bank, info->mode_reg, &val);
 446                 val = val & info->mode_mask;
 447
 448                 val_normal = info->mode_val_normal;
 449                 val_idle = info->mode_val_idle;
 450         } else {
 451                 /* Mode register same as enable register */
 452                 val = info->update_val;
 453                 val_normal = info->update_val_normal;
 454                 val_idle = info->update_val_idle;
 455         }
 456
 457         if (val == val_normal)
 458                 ret = REGULATOR_MODE_NORMAL;
 459         else if (val == val_idle)
 460                 ret = REGULATOR_MODE_IDLE;
 461         else
 462                 ret = -EINVAL;
 463
 464         return ret;
 465 }
 466
 467 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 468 {
 469         int ret;
 470         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 471         u8 regval;
 472
 473         if (info == NULL) {
 474                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 475                 return -EINVAL;
 476         }
 477
 478         ret = abx500_get_register_interruptible(info->dev,
 479                 info->update_bank, info->update_reg, &regval);
 480         if (ret < 0) {
 481                 dev_err(rdev_get_dev(rdev),
 482                         "couldn't read 0x%x register\n", info->update_reg);
 483                 return ret;
 484         }
 485
 486         dev_vdbg(rdev_get_dev(rdev),
 487                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 488                 " 0x%x\n",
 489                 info->desc.name, info->update_bank, info->update_reg,
 490                 info->update_mask, regval);
 491
 492         if (regval & info->update_mask)
 493                 info->is_enabled = true;
 494         else
 495                 info->is_enabled = false;
 496
 497         return info->is_enabled;
 498 }
 499
 500 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 501 {
 502         int ret, val;
 503         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 504         u8 regval;
 505
 506         if (info == NULL) {
 507                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 508                 return -EINVAL;
 509         }
 510
 511         ret = abx500_get_register_interruptible(info->dev,
 512                         info->voltage_bank, info->voltage_reg, &regval);
 513         if (ret < 0) {
 514                 dev_err(rdev_get_dev(rdev),
 515                         "couldn't read voltage reg for regulator\n");
 516                 return ret;
 517         }
 518
 519         dev_vdbg(rdev_get_dev(rdev),
 520                 "%s-get_voltage (bank, reg, mask, shift, value): "
 521                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 522                 info->desc.name, info->voltage_bank,
 523                 info->voltage_reg, info->voltage_mask,
 524                 info->voltage_shift, regval);
 525
 526         val = regval & info->voltage_mask;
 527         return val >> info->voltage_shift;
 528 }
 529
 530 static int ab8540_aux3_regulator_get_voltage_sel(struct regulator_dev *rdev)
 531 {
 532         int ret, val;
 533         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 534         u8 regval, regval_expand;
 535
 536         if (info == NULL) {
 537                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 538                 return -EINVAL;
 539         }
 540
 541         ret = abx500_get_register_interruptible(info->dev,
 542                         info->voltage_bank, info->voltage_reg, &regval);
 543
 544         if (ret < 0) {
 545                 dev_err(rdev_get_dev(rdev),
 546                         "couldn't read voltage reg for regulator\n");
 547                 return ret;
 548         }
 549
 550         ret = abx500_get_register_interruptible(info->dev,
 551                         info->expand_register.voltage_bank,
 552                         info->expand_register.voltage_reg, &regval_expand);
 553
 554         if (ret < 0) {
 555                 dev_err(rdev_get_dev(rdev),
 556                         "couldn't read voltage reg for regulator\n");
 557                 return ret;
 558         }
 559
 560         dev_vdbg(rdev_get_dev(rdev),
 561                 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 562                 " 0x%x\n",
 563                 info->desc.name, info->voltage_bank, info->voltage_reg,
 564                 info->voltage_mask, regval);
 565         dev_vdbg(rdev_get_dev(rdev),
 566                 "%s-get_voltage expand (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 567                 " 0x%x\n",
 568                 info->desc.name, info->expand_register.voltage_bank,
 569                 info->expand_register.voltage_reg,
 570                 info->expand_register.voltage_mask, regval_expand);
 571
 572         if (regval_expand&(info->expand_register.voltage_mask))
 573                 /* Vaux3 has a different layout */
 574                 val = info->expand_register.voltage_limit;
 575         else
 576                 val = (regval & info->voltage_mask) >> info->voltage_shift;
 577
 578         return val;
 579 }
 580
 581 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 582                                             unsigned selector)
 583 {
 584         int ret;
 585         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 586         u8 regval;
 587
 588         if (info == NULL) {
 589                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 590                 return -EINVAL;
 591         }
 592
 593         /* set the registers for the request */
 594         regval = (u8)selector << info->voltage_shift;
 595         ret = abx500_mask_and_set_register_interruptible(info->dev,
 596                         info->voltage_bank, info->voltage_reg,
 597                         info->voltage_mask, regval);
 598         if (ret < 0)
 599                 dev_err(rdev_get_dev(rdev),
 600                 "couldn't set voltage reg for regulator\n");
 601
 602         dev_vdbg(rdev_get_dev(rdev),
 603                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 604                 " 0x%x\n",
 605                 info->desc.name, info->voltage_bank, info->voltage_reg,
 606                 info->voltage_mask, regval);
 607
 608         return ret;
 609 }
 610
 611 static int ab8540_aux3_regulator_set_voltage_sel(struct regulator_dev *rdev,
 612                                                 unsigned selector)
 613 {
 614         int ret;
 615         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 616         u8 regval;
 617
 618         if (info == NULL) {
 619                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 620                 return -EINVAL;
 621         }
 622
 623         if (selector >= info->expand_register.voltage_limit) {
 624                 /* Vaux3 bit4 has different layout */
 625                 regval = (u8)selector << info->expand_register.voltage_shift;
 626                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 627                                         info->expand_register.voltage_bank,
 628                                         info->expand_register.voltage_reg,
 629                                         info->expand_register.voltage_mask,
 630                                         regval);
 631         } else {
 632                 /* set the registers for the request */
 633                 regval = (u8)selector << info->voltage_shift;
 634                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 635                                 info->voltage_bank, info->voltage_reg,
 636                                 info->voltage_mask, regval);
 637         }
 638         if (ret < 0)
 639                 dev_err(rdev_get_dev(rdev),
 640                         "couldn't set voltage reg for regulator\n");
 641
 642         dev_vdbg(rdev_get_dev(rdev),
 643                         "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 644                         " 0x%x\n",
 645                         info->desc.name, info->voltage_bank, info->voltage_reg,
 646                         info->voltage_mask, regval);
 647
 648         return ret;
 649 }
 650
 651 static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
 652                                              unsigned int old_sel,
 653                                              unsigned int new_sel)
 654 {
 655         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 656
 657         return info->desc.enable_time;
 658 }
 659
 660 static struct regulator_ops ab8500_regulator_volt_mode_ops = {
 661         .enable                 = ab8500_regulator_enable,
 662         .disable                = ab8500_regulator_disable,
 663         .is_enabled             = ab8500_regulator_is_enabled,
 664         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 665         .set_mode               = ab8500_regulator_set_mode,
 666         .get_mode               = ab8500_regulator_get_mode,
 667         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 668         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 669         .list_voltage           = regulator_list_voltage_table,
 670 };
 671
 672 static struct regulator_ops ab8540_aux3_regulator_volt_mode_ops = {
 673         .enable         = ab8500_regulator_enable,
 674         .disable        = ab8500_regulator_disable,
 675         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 676         .set_mode       = ab8500_regulator_set_mode,
 677         .get_mode       = ab8500_regulator_get_mode,
 678         .is_enabled     = ab8500_regulator_is_enabled,
 679         .get_voltage_sel = ab8540_aux3_regulator_get_voltage_sel,
 680         .set_voltage_sel = ab8540_aux3_regulator_set_voltage_sel,
 681         .list_voltage   = regulator_list_voltage_table,
 682         .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
 683 };
 684
 685 static struct regulator_ops ab8500_regulator_volt_ops = {
 686         .enable         = ab8500_regulator_enable,
 687         .disable        = ab8500_regulator_disable,
 688         .is_enabled     = ab8500_regulator_is_enabled,
 689         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 690         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 691         .list_voltage   = regulator_list_voltage_table,
 692         .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
 693 };
 694
 695 static struct regulator_ops ab8500_regulator_mode_ops = {
 696         .enable                 = ab8500_regulator_enable,
 697         .disable                = ab8500_regulator_disable,
 698         .is_enabled             = ab8500_regulator_is_enabled,
 699         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 700         .set_mode               = ab8500_regulator_set_mode,
 701         .get_mode               = ab8500_regulator_get_mode,
 702         .list_voltage           = regulator_list_voltage_table,
 703 };
 704
 705 static struct regulator_ops ab8500_regulator_ops = {
 706         .enable                 = ab8500_regulator_enable,
 707         .disable                = ab8500_regulator_disable,
 708         .is_enabled             = ab8500_regulator_is_enabled,
 709         .list_voltage           = regulator_list_voltage_table,
 710 };
 711
 712 static struct regulator_ops ab8500_regulator_anamic_mode_ops = {
 713         .enable         = ab8500_regulator_enable,
 714         .disable        = ab8500_regulator_disable,
 715         .is_enabled     = ab8500_regulator_is_enabled,
 716         .set_mode       = ab8500_regulator_set_mode,
 717         .get_mode       = ab8500_regulator_get_mode,
 718         .list_voltage   = regulator_list_voltage_table,
 719 };
 720
 721 /* AB8500 regulator information */
 722 static struct ab8500_regulator_info
 723                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 724         /*
 725          * Variable Voltage Regulators
 726          *   name, min mV, max mV,
 727          *   update bank, reg, mask, enable val
 728          *   volt bank, reg, mask
 729          */
 730         [AB8500_LDO_AUX1] = {
 731                 .desc = {
 732                         .name           = "LDO-AUX1",
 733                         .ops            = &ab8500_regulator_volt_mode_ops,
 734                         .type           = REGULATOR_VOLTAGE,
 735                         .id             = AB8500_LDO_AUX1,
 736                         .owner          = THIS_MODULE,
 737                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 738                         .volt_table     = ldo_vauxn_voltages,
 739                         .enable_time    = 200,
 740                 },
 741                 .load_lp_uA             = 5000,
 742                 .update_bank            = 0x04,
 743                 .update_reg             = 0x09,
 744                 .update_mask            = 0x03,
 745                 .update_val             = 0x01,
 746                 .update_val_idle        = 0x03,
 747                 .update_val_normal      = 0x01,
 748                 .voltage_bank           = 0x04,
 749                 .voltage_reg            = 0x1f,
 750                 .voltage_mask           = 0x0f,
 751         },
 752         [AB8500_LDO_AUX2] = {
 753                 .desc = {
 754                         .name           = "LDO-AUX2",
 755                         .ops            = &ab8500_regulator_volt_mode_ops,
 756                         .type           = REGULATOR_VOLTAGE,
 757                         .id             = AB8500_LDO_AUX2,
 758                         .owner          = THIS_MODULE,
 759                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 760                         .volt_table     = ldo_vauxn_voltages,
 761                         .enable_time    = 200,
 762                 },
 763                 .load_lp_uA             = 5000,
 764                 .update_bank            = 0x04,
 765                 .update_reg             = 0x09,
 766                 .update_mask            = 0x0c,
 767                 .update_val             = 0x04,
 768                 .update_val_idle        = 0x0c,
 769                 .update_val_normal      = 0x04,
 770                 .voltage_bank           = 0x04,
 771                 .voltage_reg            = 0x20,
 772                 .voltage_mask           = 0x0f,
 773         },
 774         [AB8500_LDO_AUX3] = {
 775                 .desc = {
 776                         .name           = "LDO-AUX3",
 777                         .ops            = &ab8500_regulator_volt_mode_ops,
 778                         .type           = REGULATOR_VOLTAGE,
 779                         .id             = AB8500_LDO_AUX3,
 780                         .owner          = THIS_MODULE,
 781                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 782                         .volt_table     = ldo_vaux3_voltages,
 783                         .enable_time    = 450,
 784                 },
 785                 .load_lp_uA             = 5000,
 786                 .update_bank            = 0x04,
 787                 .update_reg             = 0x0a,
 788                 .update_mask            = 0x03,
 789                 .update_val             = 0x01,
 790                 .update_val_idle        = 0x03,
 791                 .update_val_normal      = 0x01,
 792                 .voltage_bank           = 0x04,
 793                 .voltage_reg            = 0x21,
 794                 .voltage_mask           = 0x07,
 795         },
 796         [AB8500_LDO_INTCORE] = {
 797                 .desc = {
 798                         .name           = "LDO-INTCORE",
 799                         .ops            = &ab8500_regulator_volt_mode_ops,
 800                         .type           = REGULATOR_VOLTAGE,
 801                         .id             = AB8500_LDO_INTCORE,
 802                         .owner          = THIS_MODULE,
 803                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 804                         .volt_table     = ldo_vintcore_voltages,
 805                         .enable_time    = 750,
 806                 },
 807                 .load_lp_uA             = 5000,
 808                 .update_bank            = 0x03,
 809                 .update_reg             = 0x80,
 810                 .update_mask            = 0x44,
 811                 .update_val             = 0x44,
 812                 .update_val_idle        = 0x44,
 813                 .update_val_normal      = 0x04,
 814                 .voltage_bank           = 0x03,
 815                 .voltage_reg            = 0x80,
 816                 .voltage_mask           = 0x38,
 817                 .voltage_shift          = 3,
 818         },
 819
 820         /*
 821          * Fixed Voltage Regulators
 822          *   name, fixed mV,
 823          *   update bank, reg, mask, enable val
 824          */
 825         [AB8500_LDO_TVOUT] = {
 826                 .desc = {
 827                         .name           = "LDO-TVOUT",
 828                         .ops            = &ab8500_regulator_mode_ops,
 829                         .type           = REGULATOR_VOLTAGE,
 830                         .id             = AB8500_LDO_TVOUT,
 831                         .owner          = THIS_MODULE,
 832                         .n_voltages     = 1,
 833                         .volt_table     = fixed_2000000_voltage,
 834                         .enable_time    = 500,
 835                 },
 836                 .load_lp_uA             = 1000,
 837                 .update_bank            = 0x03,
 838                 .update_reg             = 0x80,
 839                 .update_mask            = 0x82,
 840                 .update_val             = 0x02,
 841                 .update_val_idle        = 0x82,
 842                 .update_val_normal      = 0x02,
 843         },
 844         [AB8500_LDO_AUDIO] = {
 845                 .desc = {
 846                         .name           = "LDO-AUDIO",
 847                         .ops            = &ab8500_regulator_ops,
 848                         .type           = REGULATOR_VOLTAGE,
 849                         .id             = AB8500_LDO_AUDIO,
 850                         .owner          = THIS_MODULE,
 851                         .n_voltages     = 1,
 852                         .enable_time    = 140,
 853                         .volt_table     = fixed_2000000_voltage,
 854                 },
 855                 .update_bank            = 0x03,
 856                 .update_reg             = 0x83,
 857                 .update_mask            = 0x02,
 858                 .update_val             = 0x02,
 859         },
 860         [AB8500_LDO_ANAMIC1] = {
 861                 .desc = {
 862                         .name           = "LDO-ANAMIC1",
 863                         .ops            = &ab8500_regulator_ops,
 864                         .type           = REGULATOR_VOLTAGE,
 865                         .id             = AB8500_LDO_ANAMIC1,
 866                         .owner          = THIS_MODULE,
 867                         .n_voltages     = 1,
 868                         .enable_time    = 500,
 869                         .volt_table     = fixed_2050000_voltage,
 870                 },
 871                 .update_bank            = 0x03,
 872                 .update_reg             = 0x83,
 873                 .update_mask            = 0x08,
 874                 .update_val             = 0x08,
 875         },
 876         [AB8500_LDO_ANAMIC2] = {
 877                 .desc = {
 878                         .name           = "LDO-ANAMIC2",
 879                         .ops            = &ab8500_regulator_ops,
 880                         .type           = REGULATOR_VOLTAGE,
 881                         .id             = AB8500_LDO_ANAMIC2,
 882                         .owner          = THIS_MODULE,
 883                         .n_voltages     = 1,
 884                         .enable_time    = 500,
 885                         .volt_table     = fixed_2050000_voltage,
 886                 },
 887                 .update_bank            = 0x03,
 888                 .update_reg             = 0x83,
 889                 .update_mask            = 0x10,
 890                 .update_val             = 0x10,
 891         },
 892         [AB8500_LDO_DMIC] = {
 893                 .desc = {
 894                         .name           = "LDO-DMIC",
 895                         .ops            = &ab8500_regulator_ops,
 896                         .type           = REGULATOR_VOLTAGE,
 897                         .id             = AB8500_LDO_DMIC,
 898                         .owner          = THIS_MODULE,
 899                         .n_voltages     = 1,
 900                         .enable_time    = 420,
 901                         .volt_table     = fixed_1800000_voltage,
 902                 },
 903                 .update_bank            = 0x03,
 904                 .update_reg             = 0x83,
 905                 .update_mask            = 0x04,
 906                 .update_val             = 0x04,
 907         },
 908
 909         /*
 910          * Regulators with fixed voltage and normal/idle modes
 911          */
 912         [AB8500_LDO_ANA] = {
 913                 .desc = {
 914                         .name           = "LDO-ANA",
 915                         .ops            = &ab8500_regulator_mode_ops,
 916                         .type           = REGULATOR_VOLTAGE,
 917                         .id             = AB8500_LDO_ANA,
 918                         .owner          = THIS_MODULE,
 919                         .n_voltages     = 1,
 920                         .enable_time    = 140,
 921                         .volt_table     = fixed_1200000_voltage,
 922                 },
 923                 .load_lp_uA             = 1000,
 924                 .update_bank            = 0x04,
 925                 .update_reg             = 0x06,
 926                 .update_mask            = 0x0c,
 927                 .update_val             = 0x04,
 928                 .update_val_idle        = 0x0c,
 929                 .update_val_normal      = 0x04,
 930         },
 931 };
 932
 933 /* AB8505 regulator information */
 934 static struct ab8500_regulator_info
 935                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 936         /*
 937          * Variable Voltage Regulators
 938          *   name, min mV, max mV,
 939          *   update bank, reg, mask, enable val
 940          *   volt bank, reg, mask
 941          */
 942         [AB8505_LDO_AUX1] = {
 943                 .desc = {
 944                         .name           = "LDO-AUX1",
 945                         .ops            = &ab8500_regulator_volt_mode_ops,
 946                         .type           = REGULATOR_VOLTAGE,
 947                         .id             = AB8505_LDO_AUX1,
 948                         .owner          = THIS_MODULE,
 949                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 950                         .volt_table     = ldo_vauxn_voltages,
 951                 },
 952                 .load_lp_uA             = 5000,
 953                 .update_bank            = 0x04,
 954                 .update_reg             = 0x09,
 955                 .update_mask            = 0x03,
 956                 .update_val             = 0x01,
 957                 .update_val_idle        = 0x03,
 958                 .update_val_normal      = 0x01,
 959                 .voltage_bank           = 0x04,
 960                 .voltage_reg            = 0x1f,
 961                 .voltage_mask           = 0x0f,
 962         },
 963         [AB8505_LDO_AUX2] = {
 964                 .desc = {
 965                         .name           = "LDO-AUX2",
 966                         .ops            = &ab8500_regulator_volt_mode_ops,
 967                         .type           = REGULATOR_VOLTAGE,
 968                         .id             = AB8505_LDO_AUX2,
 969                         .owner          = THIS_MODULE,
 970                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 971                         .volt_table     = ldo_vauxn_voltages,
 972                 },
 973                 .load_lp_uA             = 5000,
 974                 .update_bank            = 0x04,
 975                 .update_reg             = 0x09,
 976                 .update_mask            = 0x0c,
 977                 .update_val             = 0x04,
 978                 .update_val_idle        = 0x0c,
 979                 .update_val_normal      = 0x04,
 980                 .voltage_bank           = 0x04,
 981                 .voltage_reg            = 0x20,
 982                 .voltage_mask           = 0x0f,
 983         },
 984         [AB8505_LDO_AUX3] = {
 985                 .desc = {
 986                         .name           = "LDO-AUX3",
 987                         .ops            = &ab8500_regulator_volt_mode_ops,
 988                         .type           = REGULATOR_VOLTAGE,
 989                         .id             = AB8505_LDO_AUX3,
 990                         .owner          = THIS_MODULE,
 991                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 992                         .volt_table     = ldo_vaux3_voltages,
 993                 },
 994                 .load_lp_uA             = 5000,
 995                 .update_bank            = 0x04,
 996                 .update_reg             = 0x0a,
 997                 .update_mask            = 0x03,
 998                 .update_val             = 0x01,
 999                 .update_val_idle        = 0x03,
1000                 .update_val_normal      = 0x01,
1001                 .voltage_bank           = 0x04,
1002                 .voltage_reg            = 0x21,
1003                 .voltage_mask           = 0x07,
1004         },
1005         [AB8505_LDO_AUX4] = {
1006                 .desc = {
1007                         .name           = "LDO-AUX4",
1008                         .ops            = &ab8500_regulator_volt_mode_ops,
1009                         .type           = REGULATOR_VOLTAGE,
1010                         .id             = AB8505_LDO_AUX4,
1011                         .owner          = THIS_MODULE,
1012                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1013                         .volt_table     = ldo_vauxn_voltages,
1014                 },
1015                 .load_lp_uA             = 5000,
1016                 /* values for Vaux4Regu register */
1017                 .update_bank            = 0x04,
1018                 .update_reg             = 0x2e,
1019                 .update_mask            = 0x03,
1020                 .update_val             = 0x01,
1021                 .update_val_idle        = 0x03,
1022                 .update_val_normal      = 0x01,
1023                 /* values for Vaux4SEL register */
1024                 .voltage_bank           = 0x04,
1025                 .voltage_reg            = 0x2f,
1026                 .voltage_mask           = 0x0f,
1027         },
1028         [AB8505_LDO_AUX5] = {
1029                 .desc = {
1030                         .name           = "LDO-AUX5",
1031                         .ops            = &ab8500_regulator_volt_mode_ops,
1032                         .type           = REGULATOR_VOLTAGE,
1033                         .id             = AB8505_LDO_AUX5,
1034                         .owner          = THIS_MODULE,
1035                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
1036                         .volt_table     = ldo_vaux56_voltages,
1037                 },
1038                 .load_lp_uA             = 2000,
1039                 /* values for CtrlVaux5 register */
1040                 .update_bank            = 0x01,
1041                 .update_reg             = 0x55,
1042                 .update_mask            = 0x18,
1043                 .update_val             = 0x10,
1044                 .update_val_idle        = 0x18,
1045                 .update_val_normal      = 0x10,
1046                 .voltage_bank           = 0x01,
1047                 .voltage_reg            = 0x55,
1048                 .voltage_mask           = 0x07,
1049         },
1050         [AB8505_LDO_AUX6] = {
1051                 .desc = {
1052                         .name           = "LDO-AUX6",
1053                         .ops            = &ab8500_regulator_volt_mode_ops,
1054                         .type           = REGULATOR_VOLTAGE,
1055                         .id             = AB8505_LDO_AUX6,
1056                         .owner          = THIS_MODULE,
1057                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
1058                         .volt_table     = ldo_vaux56_voltages,
1059                 },
1060                 .load_lp_uA             = 2000,
1061                 /* values for CtrlVaux6 register */
1062                 .update_bank            = 0x01,
1063                 .update_reg             = 0x56,
1064                 .update_mask            = 0x18,
1065                 .update_val             = 0x10,
1066                 .update_val_idle        = 0x18,
1067                 .update_val_normal      = 0x10,
1068                 .voltage_bank           = 0x01,
1069                 .voltage_reg            = 0x56,
1070                 .voltage_mask           = 0x07,
1071         },
1072         [AB8505_LDO_INTCORE] = {
1073                 .desc = {
1074                         .name           = "LDO-INTCORE",
1075                         .ops            = &ab8500_regulator_volt_mode_ops,
1076                         .type           = REGULATOR_VOLTAGE,
1077                         .id             = AB8505_LDO_INTCORE,
1078                         .owner          = THIS_MODULE,
1079                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1080                         .volt_table     = ldo_vintcore_voltages,
1081                 },
1082                 .load_lp_uA             = 5000,
1083                 .update_bank            = 0x03,
1084                 .update_reg             = 0x80,
1085                 .update_mask            = 0x44,
1086                 .update_val             = 0x04,
1087                 .update_val_idle        = 0x44,
1088                 .update_val_normal      = 0x04,
1089                 .voltage_bank           = 0x03,
1090                 .voltage_reg            = 0x80,
1091                 .voltage_mask           = 0x38,
1092                 .voltage_shift          = 3,
1093         },
1094
1095         /*
1096          * Fixed Voltage Regulators
1097          *   name, fixed mV,
1098          *   update bank, reg, mask, enable val
1099          */
1100         [AB8505_LDO_ADC] = {
1101                 .desc = {
1102                         .name           = "LDO-ADC",
1103                         .ops            = &ab8500_regulator_mode_ops,
1104                         .type           = REGULATOR_VOLTAGE,
1105                         .id             = AB8505_LDO_ADC,
1106                         .owner          = THIS_MODULE,
1107                         .n_voltages     = 1,
1108                         .volt_table     = fixed_2000000_voltage,
1109                         .enable_time    = 10000,
1110                 },
1111                 .load_lp_uA             = 1000,
1112                 .update_bank            = 0x03,
1113                 .update_reg             = 0x80,
1114                 .update_mask            = 0x82,
1115                 .update_val             = 0x02,
1116                 .update_val_idle        = 0x82,
1117                 .update_val_normal      = 0x02,
1118         },
1119         [AB8505_LDO_USB] = {
1120                 .desc = {
1121                         .name           = "LDO-USB",
1122                         .ops            = &ab8500_regulator_mode_ops,
1123                         .type           = REGULATOR_VOLTAGE,
1124                         .id             = AB8505_LDO_USB,
1125                         .owner          = THIS_MODULE,
1126                         .n_voltages     = 1,
1127                         .volt_table     = fixed_3300000_voltage,
1128                 },
1129                 .update_bank            = 0x03,
1130                 .update_reg             = 0x82,
1131                 .update_mask            = 0x03,
1132                 .update_val             = 0x01,
1133                 .update_val_idle        = 0x03,
1134                 .update_val_normal      = 0x01,
1135         },
1136         [AB8505_LDO_AUDIO] = {
1137                 .desc = {
1138                         .name           = "LDO-AUDIO",
1139                         .ops            = &ab8500_regulator_volt_ops,
1140                         .type           = REGULATOR_VOLTAGE,
1141                         .id             = AB8505_LDO_AUDIO,
1142                         .owner          = THIS_MODULE,
1143                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
1144                         .volt_table     = ldo_vaudio_voltages,
1145                 },
1146                 .update_bank            = 0x03,
1147                 .update_reg             = 0x83,
1148                 .update_mask            = 0x02,
1149                 .update_val             = 0x02,
1150                 .voltage_bank           = 0x01,
1151                 .voltage_reg            = 0x57,
1152                 .voltage_mask           = 0x7,
1153                 .voltage_shift          = 4,
1154         },
1155         [AB8505_LDO_ANAMIC1] = {
1156                 .desc = {
1157                         .name           = "LDO-ANAMIC1",
1158                         .ops            = &ab8500_regulator_anamic_mode_ops,
1159                         .type           = REGULATOR_VOLTAGE,
1160                         .id             = AB8505_LDO_ANAMIC1,
1161                         .owner          = THIS_MODULE,
1162                         .n_voltages     = 1,
1163                         .volt_table     = fixed_2050000_voltage,
1164                 },
1165                 .shared_mode            = &ldo_anamic1_shared,
1166                 .update_bank            = 0x03,
1167                 .update_reg             = 0x83,
1168                 .update_mask            = 0x08,
1169                 .update_val             = 0x08,
1170                 .mode_bank              = 0x01,
1171                 .mode_reg               = 0x54,
1172                 .mode_mask              = 0x04,
1173                 .mode_val_idle          = 0x04,
1174                 .mode_val_normal        = 0x00,
1175         },
1176         [AB8505_LDO_ANAMIC2] = {
1177                 .desc = {
1178                         .name           = "LDO-ANAMIC2",
1179                         .ops            = &ab8500_regulator_anamic_mode_ops,
1180                         .type           = REGULATOR_VOLTAGE,
1181                         .id             = AB8505_LDO_ANAMIC2,
1182                         .owner          = THIS_MODULE,
1183                         .n_voltages     = 1,
1184                         .volt_table     = fixed_2050000_voltage,
1185                 },
1186                 .shared_mode            = &ldo_anamic2_shared,
1187                 .update_bank            = 0x03,
1188                 .update_reg             = 0x83,
1189                 .update_mask            = 0x10,
1190                 .update_val             = 0x10,
1191                 .mode_bank              = 0x01,
1192                 .mode_reg               = 0x54,
1193                 .mode_mask              = 0x04,
1194                 .mode_val_idle          = 0x04,
1195                 .mode_val_normal        = 0x00,
1196         },
1197         [AB8505_LDO_AUX8] = {
1198                 .desc = {
1199                         .name           = "LDO-AUX8",
1200                         .ops            = &ab8500_regulator_ops,
1201                         .type           = REGULATOR_VOLTAGE,
1202                         .id             = AB8505_LDO_AUX8,
1203                         .owner          = THIS_MODULE,
1204                         .n_voltages     = 1,
1205                         .volt_table     = fixed_1800000_voltage,
1206                 },
1207                 .update_bank            = 0x03,
1208                 .update_reg             = 0x83,
1209                 .update_mask            = 0x04,
1210                 .update_val             = 0x04,
1211         },
1212         /*
1213          * Regulators with fixed voltage and normal/idle modes
1214          */
1215         [AB8505_LDO_ANA] = {
1216                 .desc = {
1217                         .name           = "LDO-ANA",
1218                         .ops            = &ab8500_regulator_volt_mode_ops,
1219                         .type           = REGULATOR_VOLTAGE,
1220                         .id             = AB8505_LDO_ANA,
1221                         .owner          = THIS_MODULE,
1222                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1223                         .volt_table     = ldo_vana_voltages,
1224                 },
1225                 .load_lp_uA             = 1000,
1226                 .update_bank            = 0x04,
1227                 .update_reg             = 0x06,
1228                 .update_mask            = 0x0c,
1229                 .update_val             = 0x04,
1230                 .update_val_idle        = 0x0c,
1231                 .update_val_normal      = 0x04,
1232                 .voltage_bank           = 0x04,
1233                 .voltage_reg            = 0x29,
1234                 .voltage_mask           = 0x7,
1235         },
1236 };
1237
1238 /* AB9540 regulator information */
1239 static struct ab8500_regulator_info
1240                 ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
1241         /*
1242          * Variable Voltage Regulators
1243          *   name, min mV, max mV,
1244          *   update bank, reg, mask, enable val
1245          *   volt bank, reg, mask
1246          */
1247         [AB9540_LDO_AUX1] = {
1248                 .desc = {
1249                         .name           = "LDO-AUX1",
1250                         .ops            = &ab8500_regulator_volt_mode_ops,
1251                         .type           = REGULATOR_VOLTAGE,
1252                         .id             = AB9540_LDO_AUX1,
1253                         .owner          = THIS_MODULE,
1254                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1255                         .volt_table     = ldo_vauxn_voltages,
1256                 },
1257                 .load_lp_uA             = 5000,
1258                 .update_bank            = 0x04,
1259                 .update_reg             = 0x09,
1260                 .update_mask            = 0x03,
1261                 .update_val             = 0x01,
1262                 .update_val_idle        = 0x03,
1263                 .update_val_normal      = 0x01,
1264                 .voltage_bank           = 0x04,
1265                 .voltage_reg            = 0x1f,
1266                 .voltage_mask           = 0x0f,
1267         },
1268         [AB9540_LDO_AUX2] = {
1269                 .desc = {
1270                         .name           = "LDO-AUX2",
1271                         .ops            = &ab8500_regulator_volt_mode_ops,
1272                         .type           = REGULATOR_VOLTAGE,
1273                         .id             = AB9540_LDO_AUX2,
1274                         .owner          = THIS_MODULE,
1275                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1276                         .volt_table     = ldo_vauxn_voltages,
1277                 },
1278                 .load_lp_uA             = 5000,
1279                 .update_bank            = 0x04,
1280                 .update_reg             = 0x09,
1281                 .update_mask            = 0x0c,
1282                 .update_val             = 0x04,
1283                 .update_val_idle        = 0x0c,
1284                 .update_val_normal      = 0x04,
1285                 .voltage_bank           = 0x04,
1286                 .voltage_reg            = 0x20,
1287                 .voltage_mask           = 0x0f,
1288         },
1289         [AB9540_LDO_AUX3] = {
1290                 .desc = {
1291                         .name           = "LDO-AUX3",
1292                         .ops            = &ab8500_regulator_volt_mode_ops,
1293                         .type           = REGULATOR_VOLTAGE,
1294                         .id             = AB9540_LDO_AUX3,
1295                         .owner          = THIS_MODULE,
1296                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
1297                         .volt_table     = ldo_vaux3_voltages,
1298                 },
1299                 .load_lp_uA             = 5000,
1300                 .update_bank            = 0x04,
1301                 .update_reg             = 0x0a,
1302                 .update_mask            = 0x03,
1303                 .update_val             = 0x01,
1304                 .update_val_idle        = 0x03,
1305                 .update_val_normal      = 0x01,
1306                 .voltage_bank           = 0x04,
1307                 .voltage_reg            = 0x21,
1308                 .voltage_mask           = 0x07,
1309         },
1310         [AB9540_LDO_AUX4] = {
1311                 .desc = {
1312                         .name           = "LDO-AUX4",
1313                         .ops            = &ab8500_regulator_volt_mode_ops,
1314                         .type           = REGULATOR_VOLTAGE,
1315                         .id             = AB9540_LDO_AUX4,
1316                         .owner          = THIS_MODULE,
1317                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1318                         .volt_table     = ldo_vauxn_voltages,
1319                 },
1320                 .load_lp_uA             = 5000,
1321                 /* values for Vaux4Regu register */
1322                 .update_bank            = 0x04,
1323                 .update_reg             = 0x2e,
1324                 .update_mask            = 0x03,
1325                 .update_val             = 0x01,
1326                 .update_val_idle        = 0x03,
1327                 .update_val_normal      = 0x01,
1328                 /* values for Vaux4SEL register */
1329                 .voltage_bank           = 0x04,
1330                 .voltage_reg            = 0x2f,
1331                 .voltage_mask           = 0x0f,
1332         },
1333         [AB9540_LDO_INTCORE] = {
1334                 .desc = {
1335                         .name           = "LDO-INTCORE",
1336                         .ops            = &ab8500_regulator_volt_mode_ops,
1337                         .type           = REGULATOR_VOLTAGE,
1338                         .id             = AB9540_LDO_INTCORE,
1339                         .owner          = THIS_MODULE,
1340                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1341                         .volt_table     = ldo_vintcore_voltages,
1342                 },
1343                 .load_lp_uA             = 5000,
1344                 .update_bank            = 0x03,
1345                 .update_reg             = 0x80,
1346                 .update_mask            = 0x44,
1347                 .update_val             = 0x44,
1348                 .update_val_idle        = 0x44,
1349                 .update_val_normal      = 0x04,
1350                 .voltage_bank           = 0x03,
1351                 .voltage_reg            = 0x80,
1352                 .voltage_mask           = 0x38,
1353                 .voltage_shift          = 3,
1354         },
1355
1356         /*
1357          * Fixed Voltage Regulators
1358          *   name, fixed mV,
1359          *   update bank, reg, mask, enable val
1360          */
1361         [AB9540_LDO_TVOUT] = {
1362                 .desc = {
1363                         .name           = "LDO-TVOUT",
1364                         .ops            = &ab8500_regulator_mode_ops,
1365                         .type           = REGULATOR_VOLTAGE,
1366                         .id             = AB9540_LDO_TVOUT,
1367                         .owner          = THIS_MODULE,
1368                         .n_voltages     = 1,
1369                         .volt_table     = fixed_2000000_voltage,
1370                         .enable_time    = 10000,
1371                 },
1372                 .load_lp_uA             = 1000,
1373                 .update_bank            = 0x03,
1374                 .update_reg             = 0x80,
1375                 .update_mask            = 0x82,
1376                 .update_val             = 0x02,
1377                 .update_val_idle        = 0x82,
1378                 .update_val_normal      = 0x02,
1379         },
1380         [AB9540_LDO_USB] = {
1381                 .desc = {
1382                         .name           = "LDO-USB",
1383                         .ops            = &ab8500_regulator_ops,
1384                         .type           = REGULATOR_VOLTAGE,
1385                         .id             = AB9540_LDO_USB,
1386                         .owner          = THIS_MODULE,
1387                         .n_voltages     = 1,
1388                         .volt_table     = fixed_3300000_voltage,
1389                 },
1390                 .update_bank            = 0x03,
1391                 .update_reg             = 0x82,
1392                 .update_mask            = 0x03,
1393                 .update_val             = 0x01,
1394                 .update_val_idle        = 0x03,
1395                 .update_val_normal      = 0x01,
1396         },
1397         [AB9540_LDO_AUDIO] = {
1398                 .desc = {
1399                         .name           = "LDO-AUDIO",
1400                         .ops            = &ab8500_regulator_ops,
1401                         .type           = REGULATOR_VOLTAGE,
1402                         .id             = AB9540_LDO_AUDIO,
1403                         .owner          = THIS_MODULE,
1404                         .n_voltages     = 1,
1405                         .volt_table     = fixed_2000000_voltage,
1406                 },
1407                 .update_bank            = 0x03,
1408                 .update_reg             = 0x83,
1409                 .update_mask            = 0x02,
1410                 .update_val             = 0x02,
1411         },
1412         [AB9540_LDO_ANAMIC1] = {
1413                 .desc = {
1414                         .name           = "LDO-ANAMIC1",
1415                         .ops            = &ab8500_regulator_ops,
1416                         .type           = REGULATOR_VOLTAGE,
1417                         .id             = AB9540_LDO_ANAMIC1,
1418                         .owner          = THIS_MODULE,
1419                         .n_voltages     = 1,
1420                         .volt_table     = fixed_2050000_voltage,
1421                 },
1422                 .update_bank            = 0x03,
1423                 .update_reg             = 0x83,
1424                 .update_mask            = 0x08,
1425                 .update_val             = 0x08,
1426         },
1427         [AB9540_LDO_ANAMIC2] = {
1428                 .desc = {
1429                         .name           = "LDO-ANAMIC2",
1430                         .ops            = &ab8500_regulator_ops,
1431                         .type           = REGULATOR_VOLTAGE,
1432                         .id             = AB9540_LDO_ANAMIC2,
1433                         .owner          = THIS_MODULE,
1434                         .n_voltages     = 1,
1435                         .volt_table     = fixed_2050000_voltage,
1436                 },
1437                 .update_bank            = 0x03,
1438                 .update_reg             = 0x83,
1439                 .update_mask            = 0x10,
1440                 .update_val             = 0x10,
1441         },
1442         [AB9540_LDO_DMIC] = {
1443                 .desc = {
1444                         .name           = "LDO-DMIC",
1445                         .ops            = &ab8500_regulator_ops,
1446                         .type           = REGULATOR_VOLTAGE,
1447                         .id             = AB9540_LDO_DMIC,
1448                         .owner          = THIS_MODULE,
1449                         .n_voltages     = 1,
1450                         .volt_table     = fixed_1800000_voltage,
1451                 },
1452                 .update_bank            = 0x03,
1453                 .update_reg             = 0x83,
1454                 .update_mask            = 0x04,
1455                 .update_val             = 0x04,
1456         },
1457
1458         /*
1459          * Regulators with fixed voltage and normal/idle modes
1460          */
1461         [AB9540_LDO_ANA] = {
1462                 .desc = {
1463                         .name           = "LDO-ANA",
1464                         .ops            = &ab8500_regulator_mode_ops,
1465                         .type           = REGULATOR_VOLTAGE,
1466                         .id             = AB9540_LDO_ANA,
1467                         .owner          = THIS_MODULE,
1468                         .n_voltages     = 1,
1469                         .volt_table     = fixed_1200000_voltage,
1470                 },
1471                 .load_lp_uA             = 1000,
1472                 .update_bank            = 0x04,
1473                 .update_reg             = 0x06,
1474                 .update_mask            = 0x0c,
1475                 .update_val             = 0x08,
1476                 .update_val_idle        = 0x0c,
1477                 .update_val_normal      = 0x08,
1478         },
1479 };
1480
1481 /* AB8540 regulator information */
1482 static struct ab8500_regulator_info
1483                 ab8540_regulator_info[AB8540_NUM_REGULATORS] = {
1484         /*
1485          * Variable Voltage Regulators
1486          *   name, min mV, max mV,
1487          *   update bank, reg, mask, enable val
1488          *   volt bank, reg, mask
1489          */
1490         [AB8540_LDO_AUX1] = {
1491                 .desc = {
1492                         .name           = "LDO-AUX1",
1493                         .ops            = &ab8500_regulator_volt_mode_ops,
1494                         .type           = REGULATOR_VOLTAGE,
1495                         .id             = AB8540_LDO_AUX1,
1496                         .owner          = THIS_MODULE,
1497                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1498                         .volt_table     = ldo_vauxn_voltages,
1499                 },
1500                 .load_lp_uA             = 5000,
1501                 .update_bank            = 0x04,
1502                 .update_reg             = 0x09,
1503                 .update_mask            = 0x03,
1504                 .update_val             = 0x01,
1505                 .update_val_idle        = 0x03,
1506                 .update_val_normal      = 0x01,
1507                 .voltage_bank           = 0x04,
1508                 .voltage_reg            = 0x1f,
1509                 .voltage_mask           = 0x0f,
1510         },
1511         [AB8540_LDO_AUX2] = {
1512                 .desc = {
1513                         .name           = "LDO-AUX2",
1514                         .ops            = &ab8500_regulator_volt_mode_ops,
1515                         .type           = REGULATOR_VOLTAGE,
1516                         .id             = AB8540_LDO_AUX2,
1517                         .owner          = THIS_MODULE,
1518                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1519                         .volt_table     = ldo_vauxn_voltages,
1520                 },
1521                 .load_lp_uA             = 5000,
1522                 .update_bank            = 0x04,
1523                 .update_reg             = 0x09,
1524                 .update_mask            = 0x0c,
1525                 .update_val             = 0x04,
1526                 .update_val_idle        = 0x0c,
1527                 .update_val_normal      = 0x04,
1528                 .voltage_bank           = 0x04,
1529                 .voltage_reg            = 0x20,
1530                 .voltage_mask           = 0x0f,
1531         },
1532         [AB8540_LDO_AUX3] = {
1533                 .desc = {
1534                         .name           = "LDO-AUX3",
1535                         .ops            = &ab8540_aux3_regulator_volt_mode_ops,
1536                         .type           = REGULATOR_VOLTAGE,
1537                         .id             = AB8540_LDO_AUX3,
1538                         .owner          = THIS_MODULE,
1539                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_ab8540_voltages),
1540                         .volt_table     = ldo_vaux3_ab8540_voltages,
1541                 },
1542                 .load_lp_uA             = 5000,
1543                 .update_bank            = 0x04,
1544                 .update_reg             = 0x0a,
1545                 .update_mask            = 0x03,
1546                 .update_val             = 0x01,
1547                 .update_val_idle        = 0x03,
1548                 .update_val_normal      = 0x01,
1549                 .voltage_bank           = 0x04,
1550                 .voltage_reg            = 0x21,
1551                 .voltage_mask           = 0x07,
1552                 .expand_register = {
1553                         .voltage_limit          = 8,
1554                         .voltage_bank           = 0x04,
1555                         .voltage_reg            = 0x01,
1556                         .voltage_mask           = 0x10,
1557                         .voltage_shift          = 1,
1558                 }
1559         },
1560         [AB8540_LDO_AUX4] = {
1561                 .desc = {
1562                         .name           = "LDO-AUX4",
1563                         .ops            = &ab8500_regulator_volt_mode_ops,
1564                         .type           = REGULATOR_VOLTAGE,
1565                         .id             = AB8540_LDO_AUX4,
1566                         .owner          = THIS_MODULE,
1567                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1568                         .volt_table     = ldo_vauxn_voltages,
1569                 },
1570                 .load_lp_uA             = 5000,
1571                 /* values for Vaux4Regu register */
1572                 .update_bank            = 0x04,
1573                 .update_reg             = 0x2e,
1574                 .update_mask            = 0x03,
1575                 .update_val             = 0x01,
1576                 .update_val_idle        = 0x03,
1577                 .update_val_normal      = 0x01,
1578                 /* values for Vaux4SEL register */
1579                 .voltage_bank           = 0x04,
1580                 .voltage_reg            = 0x2f,
1581                 .voltage_mask           = 0x0f,
1582         },
1583         [AB8540_LDO_AUX5] = {
1584                 .desc = {
1585                         .name           = "LDO-AUX5",
1586                         .ops            = &ab8500_regulator_volt_mode_ops,
1587                         .type           = REGULATOR_VOLTAGE,
1588                         .id             = AB8540_LDO_AUX5,
1589                         .owner          = THIS_MODULE,
1590                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1591                         .volt_table     = ldo_vaux56_ab8540_voltages,
1592                 },
1593                 .load_lp_uA             = 20000,
1594                 /* values for Vaux5Regu register */
1595                 .update_bank            = 0x04,
1596                 .update_reg             = 0x32,
1597                 .update_mask            = 0x03,
1598                 .update_val             = 0x01,
1599                 .update_val_idle        = 0x03,
1600                 .update_val_normal      = 0x01,
1601                 /* values for Vaux5SEL register */
1602                 .voltage_bank           = 0x04,
1603                 .voltage_reg            = 0x33,
1604                 .voltage_mask           = 0x3f,
1605         },
1606         [AB8540_LDO_AUX6] = {
1607                 .desc = {
1608                         .name           = "LDO-AUX6",
1609                         .ops            = &ab8500_regulator_volt_mode_ops,
1610                         .type           = REGULATOR_VOLTAGE,
1611                         .id             = AB8540_LDO_AUX6,
1612                         .owner          = THIS_MODULE,
1613                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1614                         .volt_table     = ldo_vaux56_ab8540_voltages,
1615                 },
1616                 .load_lp_uA             = 20000,
1617                 /* values for Vaux6Regu register */
1618                 .update_bank            = 0x04,
1619                 .update_reg             = 0x35,
1620                 .update_mask            = 0x03,
1621                 .update_val             = 0x01,
1622                 .update_val_idle        = 0x03,
1623                 .update_val_normal      = 0x01,
1624                 /* values for Vaux6SEL register */
1625                 .voltage_bank           = 0x04,
1626                 .voltage_reg            = 0x36,
1627                 .voltage_mask           = 0x3f,
1628         },
1629         [AB8540_LDO_INTCORE] = {
1630                 .desc = {
1631                         .name           = "LDO-INTCORE",
1632                         .ops            = &ab8500_regulator_volt_mode_ops,
1633                         .type           = REGULATOR_VOLTAGE,
1634                         .id             = AB8540_LDO_INTCORE,
1635                         .owner          = THIS_MODULE,
1636                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1637                         .volt_table     = ldo_vintcore_voltages,
1638                 },
1639                 .load_lp_uA             = 5000,
1640                 .update_bank            = 0x03,
1641                 .update_reg             = 0x80,
1642                 .update_mask            = 0x44,
1643                 .update_val             = 0x44,
1644                 .update_val_idle        = 0x44,
1645                 .update_val_normal      = 0x04,
1646                 .voltage_bank           = 0x03,
1647                 .voltage_reg            = 0x80,
1648                 .voltage_mask           = 0x38,
1649                 .voltage_shift          = 3,
1650         },
1651
1652         /*
1653          * Fixed Voltage Regulators
1654          *   name, fixed mV,
1655          *   update bank, reg, mask, enable val
1656          */
1657         [AB8540_LDO_TVOUT] = {
1658                 .desc = {
1659                         .name           = "LDO-TVOUT",
1660                         .ops            = &ab8500_regulator_mode_ops,
1661                         .type           = REGULATOR_VOLTAGE,
1662                         .id             = AB8540_LDO_TVOUT,
1663                         .owner          = THIS_MODULE,
1664                         .n_voltages     = 1,
1665                         .volt_table     = fixed_2000000_voltage,
1666                         .enable_time    = 10000,
1667                 },
1668                 .load_lp_uA             = 1000,
1669                 .update_bank            = 0x03,
1670                 .update_reg             = 0x80,
1671                 .update_mask            = 0x82,
1672                 .update_val             = 0x02,
1673                 .update_val_idle        = 0x82,
1674                 .update_val_normal      = 0x02,
1675         },
1676         [AB8540_LDO_AUDIO] = {
1677                 .desc = {
1678                         .name           = "LDO-AUDIO",
1679                         .ops            = &ab8500_regulator_ops,
1680                         .type           = REGULATOR_VOLTAGE,
1681                         .id             = AB8540_LDO_AUDIO,
1682                         .owner          = THIS_MODULE,
1683                         .n_voltages     = 1,
1684                         .volt_table     = fixed_2000000_voltage,
1685                 },
1686                 .update_bank            = 0x03,
1687                 .update_reg             = 0x83,
1688                 .update_mask            = 0x02,
1689                 .update_val             = 0x02,
1690         },
1691         [AB8540_LDO_ANAMIC1] = {
1692                 .desc = {
1693                         .name           = "LDO-ANAMIC1",
1694                         .ops            = &ab8500_regulator_anamic_mode_ops,
1695                         .type           = REGULATOR_VOLTAGE,
1696                         .id             = AB8540_LDO_ANAMIC1,
1697                         .owner          = THIS_MODULE,
1698                         .n_voltages     = 1,
1699                         .volt_table     = fixed_2050000_voltage,
1700                 },
1701                 .shared_mode            = &ab8540_ldo_anamic1_shared,
1702                 .update_bank            = 0x03,
1703                 .update_reg             = 0x83,
1704                 .update_mask            = 0x08,
1705                 .update_val             = 0x08,
1706                 .mode_bank              = 0x03,
1707                 .mode_reg               = 0x83,
1708                 .mode_mask              = 0x20,
1709                 .mode_val_idle          = 0x20,
1710                 .mode_val_normal        = 0x00,
1711         },
1712         [AB8540_LDO_ANAMIC2] = {
1713                 .desc = {
1714                         .name           = "LDO-ANAMIC2",
1715                         .ops            = &ab8500_regulator_anamic_mode_ops,
1716                         .type           = REGULATOR_VOLTAGE,
1717                         .id             = AB8540_LDO_ANAMIC2,
1718                         .owner          = THIS_MODULE,
1719                         .n_voltages     = 1,
1720                         .volt_table     = fixed_2050000_voltage,
1721                 },
1722                 .shared_mode            = &ab8540_ldo_anamic2_shared,
1723                 .update_bank            = 0x03,
1724                 .update_reg             = 0x83,
1725                 .update_mask            = 0x10,
1726                 .update_val             = 0x10,
1727                 .mode_bank              = 0x03,
1728                 .mode_reg               = 0x83,
1729                 .mode_mask              = 0x20,
1730                 .mode_val_idle          = 0x20,
1731                 .mode_val_normal        = 0x00,
1732         },
1733         [AB8540_LDO_DMIC] = {
1734                 .desc = {
1735                         .name           = "LDO-DMIC",
1736                         .ops            = &ab8500_regulator_volt_mode_ops,
1737                         .type           = REGULATOR_VOLTAGE,
1738                         .id             = AB8540_LDO_DMIC,
1739                         .owner          = THIS_MODULE,
1740                         .n_voltages     = ARRAY_SIZE(ldo_vdmic_voltages),
1741                         .volt_table     = ldo_vdmic_voltages,
1742                 },
1743                 .load_lp_uA             = 1000,
1744                 .update_bank            = 0x03,
1745                 .update_reg             = 0x83,
1746                 .update_mask            = 0x04,
1747                 .update_val             = 0x04,
1748                 .voltage_bank           = 0x03,
1749                 .voltage_reg            = 0x83,
1750                 .voltage_mask           = 0xc0,
1751         },
1752
1753         /*
1754          * Regulators with fixed voltage and normal/idle modes
1755          */
1756         [AB8540_LDO_ANA] = {
1757                 .desc = {
1758                         .name           = "LDO-ANA",
1759                         .ops            = &ab8500_regulator_mode_ops,
1760                         .type           = REGULATOR_VOLTAGE,
1761                         .id             = AB8540_LDO_ANA,
1762                         .owner          = THIS_MODULE,
1763                         .n_voltages     = 1,
1764                         .volt_table     = fixed_1200000_voltage,
1765                 },
1766                 .load_lp_uA             = 1000,
1767                 .update_bank            = 0x04,
1768                 .update_reg             = 0x06,
1769                 .update_mask            = 0x0c,
1770                 .update_val             = 0x04,
1771                 .update_val_idle        = 0x0c,
1772                 .update_val_normal      = 0x04,
1773         },
1774         [AB8540_LDO_SDIO] = {
1775                 .desc = {
1776                         .name           = "LDO-SDIO",
1777                         .ops            = &ab8500_regulator_volt_mode_ops,
1778                         .type           = REGULATOR_VOLTAGE,
1779                         .id             = AB8540_LDO_SDIO,
1780                         .owner          = THIS_MODULE,
1781                         .n_voltages     = ARRAY_SIZE(ldo_sdio_voltages),
1782                         .volt_table     = ldo_sdio_voltages,
1783                 },
1784                 .load_lp_uA             = 5000,
1785                 .update_bank            = 0x03,
1786                 .update_reg             = 0x88,
1787                 .update_mask            = 0x30,
1788                 .update_val             = 0x10,
1789                 .update_val_idle        = 0x30,
1790                 .update_val_normal      = 0x10,
1791                 .voltage_bank           = 0x03,
1792                 .voltage_reg            = 0x88,
1793                 .voltage_mask           = 0x07,
1794         },
1795 };
1796
1797 static struct ab8500_shared_mode ldo_anamic1_shared = {
1798         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1799 };
1800
1801 static struct ab8500_shared_mode ldo_anamic2_shared = {
1802         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1803 };
1804
1805 static struct ab8500_shared_mode ab8540_ldo_anamic1_shared = {
1806         .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC2],
1807 };
1808
1809 static struct ab8500_shared_mode ab8540_ldo_anamic2_shared = {
1810         .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC1],
1811 };
1812
1813 struct ab8500_reg_init {
1814         u8 bank;
1815         u8 addr;
1816         u8 mask;
1817 };
1818
1819 #define REG_INIT(_id, _bank, _addr, _mask)      \
1820         [_id] = {                               \
1821                 .bank = _bank,                  \
1822                 .addr = _addr,                  \
1823                 .mask = _mask,                  \
1824         }
1825
1826 /* AB8500 register init */
1827 static struct ab8500_reg_init ab8500_reg_init[] = {
1828         /*
1829          * 0x30, VanaRequestCtrl
1830          * 0xc0, VextSupply1RequestCtrl
1831          */
1832         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1833         /*
1834          * 0x03, VextSupply2RequestCtrl
1835          * 0x0c, VextSupply3RequestCtrl
1836          * 0x30, Vaux1RequestCtrl
1837          * 0xc0, Vaux2RequestCtrl
1838          */
1839         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1840         /*
1841          * 0x03, Vaux3RequestCtrl
1842          * 0x04, SwHPReq
1843          */
1844         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1845         /*
1846          * 0x08, VanaSysClkReq1HPValid
1847          * 0x20, Vaux1SysClkReq1HPValid
1848          * 0x40, Vaux2SysClkReq1HPValid
1849          * 0x80, Vaux3SysClkReq1HPValid
1850          */
1851         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1852         /*
1853          * 0x10, VextSupply1SysClkReq1HPValid
1854          * 0x20, VextSupply2SysClkReq1HPValid
1855          * 0x40, VextSupply3SysClkReq1HPValid
1856          */
1857         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1858         /*
1859          * 0x08, VanaHwHPReq1Valid
1860          * 0x20, Vaux1HwHPReq1Valid
1861          * 0x40, Vaux2HwHPReq1Valid
1862          * 0x80, Vaux3HwHPReq1Valid
1863          */
1864         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1865         /*
1866          * 0x01, VextSupply1HwHPReq1Valid
1867          * 0x02, VextSupply2HwHPReq1Valid
1868          * 0x04, VextSupply3HwHPReq1Valid
1869          */
1870         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1871         /*
1872          * 0x08, VanaHwHPReq2Valid
1873          * 0x20, Vaux1HwHPReq2Valid
1874          * 0x40, Vaux2HwHPReq2Valid
1875          * 0x80, Vaux3HwHPReq2Valid
1876          */
1877         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1878         /*
1879          * 0x01, VextSupply1HwHPReq2Valid
1880          * 0x02, VextSupply2HwHPReq2Valid
1881          * 0x04, VextSupply3HwHPReq2Valid
1882          */
1883         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1884         /*
1885          * 0x20, VanaSwHPReqValid
1886          * 0x80, Vaux1SwHPReqValid
1887          */
1888         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1889         /*
1890          * 0x01, Vaux2SwHPReqValid
1891          * 0x02, Vaux3SwHPReqValid
1892          * 0x04, VextSupply1SwHPReqValid
1893          * 0x08, VextSupply2SwHPReqValid
1894          * 0x10, VextSupply3SwHPReqValid
1895          */
1896         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1897         /*
1898          * 0x02, SysClkReq2Valid1
1899          * 0x04, SysClkReq3Valid1
1900          * 0x08, SysClkReq4Valid1
1901          * 0x10, SysClkReq5Valid1
1902          * 0x20, SysClkReq6Valid1
1903          * 0x40, SysClkReq7Valid1
1904          * 0x80, SysClkReq8Valid1
1905          */
1906         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1907         /*
1908          * 0x02, SysClkReq2Valid2
1909          * 0x04, SysClkReq3Valid2
1910          * 0x08, SysClkReq4Valid2
1911          * 0x10, SysClkReq5Valid2
1912          * 0x20, SysClkReq6Valid2
1913          * 0x40, SysClkReq7Valid2
1914          * 0x80, SysClkReq8Valid2
1915          */
1916         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1917         /*
1918          * 0x02, VTVoutEna
1919          * 0x04, Vintcore12Ena
1920          * 0x38, Vintcore12Sel
1921          * 0x40, Vintcore12LP
1922          * 0x80, VTVoutLP
1923          */
1924         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1925         /*
1926          * 0x02, VaudioEna
1927          * 0x04, VdmicEna
1928          * 0x08, Vamic1Ena
1929          * 0x10, Vamic2Ena
1930          */
1931         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1932         /*
1933          * 0x01, Vamic1_dzout
1934          * 0x02, Vamic2_dzout
1935          */
1936         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1937         /*
1938          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1939          * 0x0c, VanaRegu
1940          */
1941         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1942         /*
1943          * 0x01, VrefDDREna
1944          * 0x02, VrefDDRSleepMode
1945          */
1946         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1947         /*
1948          * 0x03, VextSupply1Regu
1949          * 0x0c, VextSupply2Regu
1950          * 0x30, VextSupply3Regu
1951          * 0x40, ExtSupply2Bypass
1952          * 0x80, ExtSupply3Bypass
1953          */
1954         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1955         /*
1956          * 0x03, Vaux1Regu
1957          * 0x0c, Vaux2Regu
1958          */
1959         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1960         /*
1961          * 0x03, Vaux3Regu
1962          */
1963         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1964         /*
1965          * 0x0f, Vaux1Sel
1966          */
1967         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1968         /*
1969          * 0x0f, Vaux2Sel
1970          */
1971         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1972         /*
1973          * 0x07, Vaux3Sel
1974          */
1975         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1976         /*
1977          * 0x01, VextSupply12LP
1978          */
1979         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1980         /*
1981          * 0x04, Vaux1Disch
1982          * 0x08, Vaux2Disch
1983          * 0x10, Vaux3Disch
1984          * 0x20, Vintcore12Disch
1985          * 0x40, VTVoutDisch
1986          * 0x80, VaudioDisch
1987          */
1988         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1989         /*
1990          * 0x02, VanaDisch
1991          * 0x04, VdmicPullDownEna
1992          * 0x10, VdmicDisch
1993          */
1994         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1995 };
1996
1997 /* AB8505 register init */
1998 static struct ab8500_reg_init ab8505_reg_init[] = {
1999         /*
2000          * 0x03, VarmRequestCtrl
2001          * 0x0c, VsmpsCRequestCtrl
2002          * 0x30, VsmpsARequestCtrl
2003          * 0xc0, VsmpsBRequestCtrl
2004          */
2005         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2006         /*
2007          * 0x03, VsafeRequestCtrl
2008          * 0x0c, VpllRequestCtrl
2009          * 0x30, VanaRequestCtrl
2010          */
2011         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
2012         /*
2013          * 0x30, Vaux1RequestCtrl
2014          * 0xc0, Vaux2RequestCtrl
2015          */
2016         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
2017         /*
2018          * 0x03, Vaux3RequestCtrl
2019          * 0x04, SwHPReq
2020          */
2021         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2022         /*
2023          * 0x01, VsmpsASysClkReq1HPValid
2024          * 0x02, VsmpsBSysClkReq1HPValid
2025          * 0x04, VsafeSysClkReq1HPValid
2026          * 0x08, VanaSysClkReq1HPValid
2027          * 0x10, VpllSysClkReq1HPValid
2028          * 0x20, Vaux1SysClkReq1HPValid
2029          * 0x40, Vaux2SysClkReq1HPValid
2030          * 0x80, Vaux3SysClkReq1HPValid
2031          */
2032         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2033         /*
2034          * 0x01, VsmpsCSysClkReq1HPValid
2035          * 0x02, VarmSysClkReq1HPValid
2036          * 0x04, VbbSysClkReq1HPValid
2037          * 0x08, VsmpsMSysClkReq1HPValid
2038          */
2039         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
2040         /*
2041          * 0x01, VsmpsAHwHPReq1Valid
2042          * 0x02, VsmpsBHwHPReq1Valid
2043          * 0x04, VsafeHwHPReq1Valid
2044          * 0x08, VanaHwHPReq1Valid
2045          * 0x10, VpllHwHPReq1Valid
2046          * 0x20, Vaux1HwHPReq1Valid
2047          * 0x40, Vaux2HwHPReq1Valid
2048          * 0x80, Vaux3HwHPReq1Valid
2049          */
2050         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2051         /*
2052          * 0x08, VsmpsMHwHPReq1Valid
2053          */
2054         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
2055         /*
2056          * 0x01, VsmpsAHwHPReq2Valid
2057          * 0x02, VsmpsBHwHPReq2Valid
2058          * 0x04, VsafeHwHPReq2Valid
2059          * 0x08, VanaHwHPReq2Valid
2060          * 0x10, VpllHwHPReq2Valid
2061          * 0x20, Vaux1HwHPReq2Valid
2062          * 0x40, Vaux2HwHPReq2Valid
2063          * 0x80, Vaux3HwHPReq2Valid
2064          */
2065         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2066         /*
2067          * 0x08, VsmpsMHwHPReq2Valid
2068          */
2069         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
2070         /*
2071          * 0x01, VsmpsCSwHPReqValid
2072          * 0x02, VarmSwHPReqValid
2073          * 0x04, VsmpsASwHPReqValid
2074          * 0x08, VsmpsBSwHPReqValid
2075          * 0x10, VsafeSwHPReqValid
2076          * 0x20, VanaSwHPReqValid
2077          * 0x40, VpllSwHPReqValid
2078          * 0x80, Vaux1SwHPReqValid
2079          */
2080         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2081         /*
2082          * 0x01, Vaux2SwHPReqValid
2083          * 0x02, Vaux3SwHPReqValid
2084          * 0x20, VsmpsMSwHPReqValid
2085          */
2086         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
2087         /*
2088          * 0x02, SysClkReq2Valid1
2089          * 0x04, SysClkReq3Valid1
2090          * 0x08, SysClkReq4Valid1
2091          */
2092         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
2093         /*
2094          * 0x02, SysClkReq2Valid2
2095          * 0x04, SysClkReq3Valid2
2096          * 0x08, SysClkReq4Valid2
2097          */
2098         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
2099         /*
2100          * 0x01, Vaux4SwHPReqValid
2101          * 0x02, Vaux4HwHPReq2Valid
2102          * 0x04, Vaux4HwHPReq1Valid
2103          * 0x08, Vaux4SysClkReq1HPValid
2104          */
2105         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2106         /*
2107          * 0x02, VadcEna
2108          * 0x04, VintCore12Ena
2109          * 0x38, VintCore12Sel
2110          * 0x40, VintCore12LP
2111          * 0x80, VadcLP
2112          */
2113         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
2114         /*
2115          * 0x02, VaudioEna
2116          * 0x04, VdmicEna
2117          * 0x08, Vamic1Ena
2118          * 0x10, Vamic2Ena
2119          */
2120         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2121         /*
2122          * 0x01, Vamic1_dzout
2123          * 0x02, Vamic2_dzout
2124          */
2125         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2126         /*
2127          * 0x03, VsmpsARegu
2128          * 0x0c, VsmpsASelCtrl
2129          * 0x10, VsmpsAAutoMode
2130          * 0x20, VsmpsAPWMMode
2131          */
2132         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
2133         /*
2134          * 0x03, VsmpsBRegu
2135          * 0x0c, VsmpsBSelCtrl
2136          * 0x10, VsmpsBAutoMode
2137          * 0x20, VsmpsBPWMMode
2138          */
2139         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
2140         /*
2141          * 0x03, VsafeRegu
2142          * 0x0c, VsafeSelCtrl
2143          * 0x10, VsafeAutoMode
2144          * 0x20, VsafePWMMode
2145          */
2146         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
2147         /*
2148          * 0x03, VpllRegu (NOTE! PRCMU register bits)
2149          * 0x0c, VanaRegu
2150          */
2151         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2152         /*
2153          * 0x03, VextSupply1Regu
2154          * 0x0c, VextSupply2Regu
2155          * 0x30, VextSupply3Regu
2156          * 0x40, ExtSupply2Bypass
2157          * 0x80, ExtSupply3Bypass
2158          */
2159         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2160         /*
2161          * 0x03, Vaux1Regu
2162          * 0x0c, Vaux2Regu
2163          */
2164         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
2165         /*
2166          * 0x0f, Vaux3Regu
2167          */
2168         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2169         /*
2170          * 0x3f, VsmpsASel1
2171          */
2172         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
2173         /*
2174          * 0x3f, VsmpsASel2
2175          */
2176         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
2177         /*
2178          * 0x3f, VsmpsASel3
2179          */
2180         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
2181         /*
2182          * 0x3f, VsmpsBSel1
2183          */
2184         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
2185         /*
2186          * 0x3f, VsmpsBSel2
2187          */
2188         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
2189         /*
2190          * 0x3f, VsmpsBSel3
2191          */
2192         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
2193         /*
2194          * 0x7f, VsafeSel1
2195          */
2196         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
2197         /*
2198          * 0x3f, VsafeSel2
2199          */
2200         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
2201         /*
2202          * 0x3f, VsafeSel3
2203          */
2204         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
2205         /*
2206          * 0x0f, Vaux1Sel
2207          */
2208         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
2209         /*
2210          * 0x0f, Vaux2Sel
2211          */
2212         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
2213         /*
2214          * 0x07, Vaux3Sel
2215          * 0x30, VRF1Sel
2216          */
2217         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2218         /*
2219          * 0x03, Vaux4RequestCtrl
2220          */
2221         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2222         /*
2223          * 0x03, Vaux4Regu
2224          */
2225         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
2226         /*
2227          * 0x0f, Vaux4Sel
2228          */
2229         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
2230         /*
2231          * 0x04, Vaux1Disch
2232          * 0x08, Vaux2Disch
2233          * 0x10, Vaux3Disch
2234          * 0x20, Vintcore12Disch
2235          * 0x40, VTVoutDisch
2236          * 0x80, VaudioDisch
2237          */
2238         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
2239         /*
2240          * 0x02, VanaDisch
2241          * 0x04, VdmicPullDownEna
2242          * 0x10, VdmicDisch
2243          */
2244         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
2245         /*
2246          * 0x01, Vaux4Disch
2247          */
2248         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2249         /*
2250          * 0x07, Vaux5Sel
2251          * 0x08, Vaux5LP
2252          * 0x10, Vaux5Ena
2253          * 0x20, Vaux5Disch
2254          * 0x40, Vaux5DisSfst
2255          * 0x80, Vaux5DisPulld
2256          */
2257         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
2258         /*
2259          * 0x07, Vaux6Sel
2260          * 0x08, Vaux6LP
2261          * 0x10, Vaux6Ena
2262          * 0x80, Vaux6DisPulld
2263          */
2264         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
2265 };
2266
2267 /* AB9540 register init */
2268 static struct ab8500_reg_init ab9540_reg_init[] = {
2269         /*
2270          * 0x03, VarmRequestCtrl
2271          * 0x0c, VapeRequestCtrl
2272          * 0x30, Vsmps1RequestCtrl
2273          * 0xc0, Vsmps2RequestCtrl
2274          */
2275         REG_INIT(AB9540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2276         /*
2277          * 0x03, Vsmps3RequestCtrl
2278          * 0x0c, VpllRequestCtrl
2279          * 0x30, VanaRequestCtrl
2280          * 0xc0, VextSupply1RequestCtrl
2281          */
2282         REG_INIT(AB9540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2283         /*
2284          * 0x03, VextSupply2RequestCtrl
2285          * 0x0c, VextSupply3RequestCtrl
2286          * 0x30, Vaux1RequestCtrl
2287          * 0xc0, Vaux2RequestCtrl
2288          */
2289         REG_INIT(AB9540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2290         /*
2291          * 0x03, Vaux3RequestCtrl
2292          * 0x04, SwHPReq
2293          */
2294         REG_INIT(AB9540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2295         /*
2296          * 0x01, Vsmps1SysClkReq1HPValid
2297          * 0x02, Vsmps2SysClkReq1HPValid
2298          * 0x04, Vsmps3SysClkReq1HPValid
2299          * 0x08, VanaSysClkReq1HPValid
2300          * 0x10, VpllSysClkReq1HPValid
2301          * 0x20, Vaux1SysClkReq1HPValid
2302          * 0x40, Vaux2SysClkReq1HPValid
2303          * 0x80, Vaux3SysClkReq1HPValid
2304          */
2305         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2306         /*
2307          * 0x01, VapeSysClkReq1HPValid
2308          * 0x02, VarmSysClkReq1HPValid
2309          * 0x04, VbbSysClkReq1HPValid
2310          * 0x08, VmodSysClkReq1HPValid
2311          * 0x10, VextSupply1SysClkReq1HPValid
2312          * 0x20, VextSupply2SysClkReq1HPValid
2313          * 0x40, VextSupply3SysClkReq1HPValid
2314          */
2315         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
2316         /*
2317          * 0x01, Vsmps1HwHPReq1Valid
2318          * 0x02, Vsmps2HwHPReq1Valid
2319          * 0x04, Vsmps3HwHPReq1Valid
2320          * 0x08, VanaHwHPReq1Valid
2321          * 0x10, VpllHwHPReq1Valid
2322          * 0x20, Vaux1HwHPReq1Valid
2323          * 0x40, Vaux2HwHPReq1Valid
2324          * 0x80, Vaux3HwHPReq1Valid
2325          */
2326         REG_INIT(AB9540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2327         /*
2328          * 0x01, VextSupply1HwHPReq1Valid
2329          * 0x02, VextSupply2HwHPReq1Valid
2330          * 0x04, VextSupply3HwHPReq1Valid
2331          * 0x08, VmodHwHPReq1Valid
2332          */
2333         REG_INIT(AB9540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x0f),
2334         /*
2335          * 0x01, Vsmps1HwHPReq2Valid
2336          * 0x02, Vsmps2HwHPReq2Valid
2337          * 0x03, Vsmps3HwHPReq2Valid
2338          * 0x08, VanaHwHPReq2Valid
2339          * 0x10, VpllHwHPReq2Valid
2340          * 0x20, Vaux1HwHPReq2Valid
2341          * 0x40, Vaux2HwHPReq2Valid
2342          * 0x80, Vaux3HwHPReq2Valid
2343          */
2344         REG_INIT(AB9540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2345         /*
2346          * 0x01, VextSupply1HwHPReq2Valid
2347          * 0x02, VextSupply2HwHPReq2Valid
2348          * 0x04, VextSupply3HwHPReq2Valid
2349          * 0x08, VmodHwHPReq2Valid
2350          */
2351         REG_INIT(AB9540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x0f),
2352         /*
2353          * 0x01, VapeSwHPReqValid
2354          * 0x02, VarmSwHPReqValid
2355          * 0x04, Vsmps1SwHPReqValid
2356          * 0x08, Vsmps2SwHPReqValid
2357          * 0x10, Vsmps3SwHPReqValid
2358          * 0x20, VanaSwHPReqValid
2359          * 0x40, VpllSwHPReqValid
2360          * 0x80, Vaux1SwHPReqValid
2361          */
2362         REG_INIT(AB9540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2363         /*
2364          * 0x01, Vaux2SwHPReqValid
2365          * 0x02, Vaux3SwHPReqValid
2366          * 0x04, VextSupply1SwHPReqValid
2367          * 0x08, VextSupply2SwHPReqValid
2368          * 0x10, VextSupply3SwHPReqValid
2369          * 0x20, VmodSwHPReqValid
2370          */
2371         REG_INIT(AB9540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x3f),
2372         /*
2373          * 0x02, SysClkReq2Valid1
2374          * ...
2375          * 0x80, SysClkReq8Valid1
2376          */
2377         REG_INIT(AB9540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
2378         /*
2379          * 0x02, SysClkReq2Valid2
2380          * ...
2381          * 0x80, SysClkReq8Valid2
2382          */
2383         REG_INIT(AB9540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
2384         /*
2385          * 0x01, Vaux4SwHPReqValid
2386          * 0x02, Vaux4HwHPReq2Valid
2387          * 0x04, Vaux4HwHPReq1Valid
2388          * 0x08, Vaux4SysClkReq1HPValid
2389          */
2390         REG_INIT(AB9540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2391         /*
2392          * 0x02, VTVoutEna
2393          * 0x04, Vintcore12Ena
2394          * 0x38, Vintcore12Sel
2395          * 0x40, Vintcore12LP
2396          * 0x80, VTVoutLP
2397          */
2398         REG_INIT(AB9540_REGUMISC1,              0x03, 0x80, 0xfe),
2399         /*
2400          * 0x02, VaudioEna
2401          * 0x04, VdmicEna
2402          * 0x08, Vamic1Ena
2403          * 0x10, Vamic2Ena
2404          */
2405         REG_INIT(AB9540_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2406         /*
2407          * 0x01, Vamic1_dzout
2408          * 0x02, Vamic2_dzout
2409          */
2410         REG_INIT(AB9540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2411         /*
2412          * 0x03, Vsmps1Regu
2413          * 0x0c, Vsmps1SelCtrl
2414          * 0x10, Vsmps1AutoMode
2415          * 0x20, Vsmps1PWMMode
2416          */
2417         REG_INIT(AB9540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2418         /*
2419          * 0x03, Vsmps2Regu
2420          * 0x0c, Vsmps2SelCtrl
2421          * 0x10, Vsmps2AutoMode
2422          * 0x20, Vsmps2PWMMode
2423          */
2424         REG_INIT(AB9540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2425         /*
2426          * 0x03, Vsmps3Regu
2427          * 0x0c, Vsmps3SelCtrl
2428          * NOTE! PRCMU register
2429          */
2430         REG_INIT(AB9540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2431         /*
2432          * 0x03, VpllRegu
2433          * 0x0c, VanaRegu
2434          */
2435         REG_INIT(AB9540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2436         /*
2437          * 0x03, VextSupply1Regu
2438          * 0x0c, VextSupply2Regu
2439          * 0x30, VextSupply3Regu
2440          * 0x40, ExtSupply2Bypass
2441          * 0x80, ExtSupply3Bypass
2442          */
2443         REG_INIT(AB9540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2444         /*
2445          * 0x03, Vaux1Regu
2446          * 0x0c, Vaux2Regu
2447          */
2448         REG_INIT(AB9540_VAUX12REGU,             0x04, 0x09, 0x0f),
2449         /*
2450          * 0x0c, Vrf1Regu
2451          * 0x03, Vaux3Regu
2452          */
2453         REG_INIT(AB9540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2454         /*
2455          * 0x3f, Vsmps1Sel1
2456          */
2457         REG_INIT(AB9540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2458         /*
2459          * 0x3f, Vsmps1Sel2
2460          */
2461         REG_INIT(AB9540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2462         /*
2463          * 0x3f, Vsmps1Sel3
2464          */
2465         REG_INIT(AB9540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2466         /*
2467          * 0x3f, Vsmps2Sel1
2468          */
2469         REG_INIT(AB9540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2470         /*
2471          * 0x3f, Vsmps2Sel2
2472          */
2473         REG_INIT(AB9540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2474         /*
2475          * 0x3f, Vsmps2Sel3
2476          */
2477         REG_INIT(AB9540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2478         /*
2479          * 0x7f, Vsmps3Sel1
2480          * NOTE! PRCMU register
2481          */
2482         REG_INIT(AB9540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2483         /*
2484          * 0x7f, Vsmps3Sel2
2485          * NOTE! PRCMU register
2486          */
2487         REG_INIT(AB9540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2488         /*
2489          * 0x0f, Vaux1Sel
2490          */
2491         REG_INIT(AB9540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2492         /*
2493          * 0x0f, Vaux2Sel
2494          */
2495         REG_INIT(AB9540_VAUX2SEL,               0x04, 0x20, 0x0f),
2496         /*
2497          * 0x07, Vaux3Sel
2498          * 0x30, Vrf1Sel
2499          */
2500         REG_INIT(AB9540_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2501         /*
2502          * 0x01, VextSupply12LP
2503          */
2504         REG_INIT(AB9540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2505         /*
2506          * 0x03, Vaux4RequestCtrl
2507          */
2508         REG_INIT(AB9540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2509         /*
2510          * 0x03, Vaux4Regu
2511          */
2512         REG_INIT(AB9540_VAUX4REGU,              0x04, 0x2e, 0x03),
2513         /*
2514          * 0x08, Vaux4Sel
2515          */
2516         REG_INIT(AB9540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2517         /*
2518          * 0x01, VpllDisch
2519          * 0x02, Vrf1Disch
2520          * 0x04, Vaux1Disch
2521          * 0x08, Vaux2Disch
2522          * 0x10, Vaux3Disch
2523          * 0x20, Vintcore12Disch
2524          * 0x40, VTVoutDisch
2525          * 0x80, VaudioDisch
2526          */
2527         REG_INIT(AB9540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2528         /*
2529          * 0x01, VsimDisch
2530          * 0x02, VanaDisch
2531          * 0x04, VdmicPullDownEna
2532          * 0x08, VpllPullDownEna
2533          * 0x10, VdmicDisch
2534          */
2535         REG_INIT(AB9540_REGUCTRLDISCH2,         0x04, 0x44, 0x1f),
2536         /*
2537          * 0x01, Vaux4Disch
2538          */
2539         REG_INIT(AB9540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2540 };
2541
2542 /* AB8540 register init */
2543 static struct ab8500_reg_init ab8540_reg_init[] = {
2544         /*
2545          * 0x01, VSimSycClkReq1Valid
2546          * 0x02, VSimSycClkReq2Valid
2547          * 0x04, VSimSycClkReq3Valid
2548          * 0x08, VSimSycClkReq4Valid
2549          * 0x10, VSimSycClkReq5Valid
2550          * 0x20, VSimSycClkReq6Valid
2551          * 0x40, VSimSycClkReq7Valid
2552          * 0x80, VSimSycClkReq8Valid
2553          */
2554         REG_INIT(AB8540_VSIMSYSCLKCTRL,         0x02, 0x33, 0xff),
2555         /*
2556          * 0x03, VarmRequestCtrl
2557          * 0x0c, VapeRequestCtrl
2558          * 0x30, Vsmps1RequestCtrl
2559          * 0xc0, Vsmps2RequestCtrl
2560          */
2561         REG_INIT(AB8540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2562         /*
2563          * 0x03, Vsmps3RequestCtrl
2564          * 0x0c, VpllRequestCtrl
2565          * 0x30, VanaRequestCtrl
2566          * 0xc0, VextSupply1RequestCtrl
2567          */
2568         REG_INIT(AB8540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2569         /*
2570          * 0x03, VextSupply2RequestCtrl
2571          * 0x0c, VextSupply3RequestCtrl
2572          * 0x30, Vaux1RequestCtrl
2573          * 0xc0, Vaux2RequestCtrl
2574          */
2575         REG_INIT(AB8540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2576         /*
2577          * 0x03, Vaux3RequestCtrl
2578          * 0x04, SwHPReq
2579          */
2580         REG_INIT(AB8540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2581         /*
2582          * 0x01, Vsmps1SysClkReq1HPValid
2583          * 0x02, Vsmps2SysClkReq1HPValid
2584          * 0x04, Vsmps3SysClkReq1HPValid
2585          * 0x08, VanaSysClkReq1HPValid
2586          * 0x10, VpllSysClkReq1HPValid
2587          * 0x20, Vaux1SysClkReq1HPValid
2588          * 0x40, Vaux2SysClkReq1HPValid
2589          * 0x80, Vaux3SysClkReq1HPValid
2590          */
2591         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2592         /*
2593          * 0x01, VapeSysClkReq1HPValid
2594          * 0x02, VarmSysClkReq1HPValid
2595          * 0x04, VbbSysClkReq1HPValid
2596          * 0x10, VextSupply1SysClkReq1HPValid
2597          * 0x20, VextSupply2SysClkReq1HPValid
2598          * 0x40, VextSupply3SysClkReq1HPValid
2599          */
2600         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x77),
2601         /*
2602          * 0x01, Vsmps1HwHPReq1Valid
2603          * 0x02, Vsmps2HwHPReq1Valid
2604          * 0x04, Vsmps3HwHPReq1Valid
2605          * 0x08, VanaHwHPReq1Valid
2606          * 0x10, VpllHwHPReq1Valid
2607          * 0x20, Vaux1HwHPReq1Valid
2608          * 0x40, Vaux2HwHPReq1Valid
2609          * 0x80, Vaux3HwHPReq1Valid
2610          */
2611         REG_INIT(AB8540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2612         /*
2613          * 0x01, VextSupply1HwHPReq1Valid
2614          * 0x02, VextSupply2HwHPReq1Valid
2615          * 0x04, VextSupply3HwHPReq1Valid
2616          */
2617         REG_INIT(AB8540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
2618         /*
2619          * 0x01, Vsmps1HwHPReq2Valid
2620          * 0x02, Vsmps2HwHPReq2Valid
2621          * 0x03, Vsmps3HwHPReq2Valid
2622          * 0x08, VanaHwHPReq2Valid
2623          * 0x10, VpllHwHPReq2Valid
2624          * 0x20, Vaux1HwHPReq2Valid
2625          * 0x40, Vaux2HwHPReq2Valid
2626          * 0x80, Vaux3HwHPReq2Valid
2627          */
2628         REG_INIT(AB8540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2629         /*
2630          * 0x01, VextSupply1HwHPReq2Valid
2631          * 0x02, VextSupply2HwHPReq2Valid
2632          * 0x04, VextSupply3HwHPReq2Valid
2633          */
2634         REG_INIT(AB8540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
2635         /*
2636          * 0x01, VapeSwHPReqValid
2637          * 0x02, VarmSwHPReqValid
2638          * 0x04, Vsmps1SwHPReqValid
2639          * 0x08, Vsmps2SwHPReqValid
2640          * 0x10, Vsmps3SwHPReqValid
2641          * 0x20, VanaSwHPReqValid
2642          * 0x40, VpllSwHPReqValid
2643          * 0x80, Vaux1SwHPReqValid
2644          */
2645         REG_INIT(AB8540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2646         /*
2647          * 0x01, Vaux2SwHPReqValid
2648          * 0x02, Vaux3SwHPReqValid
2649          * 0x04, VextSupply1SwHPReqValid
2650          * 0x08, VextSupply2SwHPReqValid
2651          * 0x10, VextSupply3SwHPReqValid
2652          */
2653         REG_INIT(AB8540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
2654         /*
2655          * 0x02, SysClkReq2Valid1
2656          * ...
2657          * 0x80, SysClkReq8Valid1
2658          */
2659         REG_INIT(AB8540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xff),
2660         /*
2661          * 0x02, SysClkReq2Valid2
2662          * ...
2663          * 0x80, SysClkReq8Valid2
2664          */
2665         REG_INIT(AB8540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xff),
2666         /*
2667          * 0x01, Vaux4SwHPReqValid
2668          * 0x02, Vaux4HwHPReq2Valid
2669          * 0x04, Vaux4HwHPReq1Valid
2670          * 0x08, Vaux4SysClkReq1HPValid
2671          */
2672         REG_INIT(AB8540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2673         /*
2674          * 0x01, Vaux5SwHPReqValid
2675          * 0x02, Vaux5HwHPReq2Valid
2676          * 0x04, Vaux5HwHPReq1Valid
2677          * 0x08, Vaux5SysClkReq1HPValid
2678          */
2679         REG_INIT(AB8540_REGUVAUX5REQVALID,      0x03, 0x12, 0x0f),
2680         /*
2681          * 0x01, Vaux6SwHPReqValid
2682          * 0x02, Vaux6HwHPReq2Valid
2683          * 0x04, Vaux6HwHPReq1Valid
2684          * 0x08, Vaux6SysClkReq1HPValid
2685          */
2686         REG_INIT(AB8540_REGUVAUX6REQVALID,      0x03, 0x13, 0x0f),
2687         /*
2688          * 0x01, VclkbSwHPReqValid
2689          * 0x02, VclkbHwHPReq2Valid
2690          * 0x04, VclkbHwHPReq1Valid
2691          * 0x08, VclkbSysClkReq1HPValid
2692          */
2693         REG_INIT(AB8540_REGUVCLKBREQVALID,      0x03, 0x14, 0x0f),
2694         /*
2695          * 0x01, Vrf1SwHPReqValid
2696          * 0x02, Vrf1HwHPReq2Valid
2697          * 0x04, Vrf1HwHPReq1Valid
2698          * 0x08, Vrf1SysClkReq1HPValid
2699          */
2700         REG_INIT(AB8540_REGUVRF1REQVALID,       0x03, 0x15, 0x0f),
2701         /*
2702          * 0x02, VTVoutEna
2703          * 0x04, Vintcore12Ena
2704          * 0x38, Vintcore12Sel
2705          * 0x40, Vintcore12LP
2706          * 0x80, VTVoutLP
2707          */
2708         REG_INIT(AB8540_REGUMISC1,              0x03, 0x80, 0xfe),
2709         /*
2710          * 0x02, VaudioEna
2711          * 0x04, VdmicEna
2712          * 0x08, Vamic1Ena
2713          * 0x10, Vamic2Ena
2714          * 0x20, Vamic12LP
2715          * 0xC0, VdmicSel
2716          */
2717         REG_INIT(AB8540_VAUDIOSUPPLY,           0x03, 0x83, 0xfe),
2718         /*
2719          * 0x01, Vamic1_dzout
2720          * 0x02, Vamic2_dzout
2721          */
2722         REG_INIT(AB8540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2723         /*
2724          * 0x07, VHSICSel
2725          * 0x08, VHSICOffState
2726          * 0x10, VHSIEna
2727          * 0x20, VHSICLP
2728          */
2729         REG_INIT(AB8540_VHSIC,                  0x03, 0x87, 0x3f),
2730         /*
2731          * 0x07, VSDIOSel
2732          * 0x08, VSDIOOffState
2733          * 0x10, VSDIOEna
2734          * 0x20, VSDIOLP
2735          */
2736         REG_INIT(AB8540_VSDIO,                  0x03, 0x88, 0x3f),
2737         /*
2738          * 0x03, Vsmps1Regu
2739          * 0x0c, Vsmps1SelCtrl
2740          * 0x10, Vsmps1AutoMode
2741          * 0x20, Vsmps1PWMMode
2742          */
2743         REG_INIT(AB8540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2744         /*
2745          * 0x03, Vsmps2Regu
2746          * 0x0c, Vsmps2SelCtrl
2747          * 0x10, Vsmps2AutoMode
2748          * 0x20, Vsmps2PWMMode
2749          */
2750         REG_INIT(AB8540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2751         /*
2752          * 0x03, Vsmps3Regu
2753          * 0x0c, Vsmps3SelCtrl
2754          * 0x10, Vsmps3AutoMode
2755          * 0x20, Vsmps3PWMMode
2756          * NOTE! PRCMU register
2757          */
2758         REG_INIT(AB8540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2759         /*
2760          * 0x03, VpllRegu
2761          * 0x0c, VanaRegu
2762          */
2763         REG_INIT(AB8540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2764         /*
2765          * 0x03, VextSupply1Regu
2766          * 0x0c, VextSupply2Regu
2767          * 0x30, VextSupply3Regu
2768          * 0x40, ExtSupply2Bypass
2769          * 0x80, ExtSupply3Bypass
2770          */
2771         REG_INIT(AB8540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2772         /*
2773          * 0x03, Vaux1Regu
2774          * 0x0c, Vaux2Regu
2775          */
2776         REG_INIT(AB8540_VAUX12REGU,             0x04, 0x09, 0x0f),
2777         /*
2778          * 0x0c, VRF1Regu
2779          * 0x03, Vaux3Regu
2780          */
2781         REG_INIT(AB8540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2782         /*
2783          * 0x3f, Vsmps1Sel1
2784          */
2785         REG_INIT(AB8540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2786         /*
2787          * 0x3f, Vsmps1Sel2
2788          */
2789         REG_INIT(AB8540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2790         /*
2791          * 0x3f, Vsmps1Sel3
2792          */
2793         REG_INIT(AB8540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2794         /*
2795          * 0x3f, Vsmps2Sel1
2796          */
2797         REG_INIT(AB8540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2798         /*
2799          * 0x3f, Vsmps2Sel2
2800          */
2801         REG_INIT(AB8540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2802         /*
2803          * 0x3f, Vsmps2Sel3
2804          */
2805         REG_INIT(AB8540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2806         /*
2807          * 0x7f, Vsmps3Sel1
2808          * NOTE! PRCMU register
2809          */
2810         REG_INIT(AB8540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2811         /*
2812          * 0x7f, Vsmps3Sel2
2813          * NOTE! PRCMU register
2814          */
2815         REG_INIT(AB8540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2816         /*
2817          * 0x0f, Vaux1Sel
2818          */
2819         REG_INIT(AB8540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2820         /*
2821          * 0x0f, Vaux2Sel
2822          */
2823         REG_INIT(AB8540_VAUX2SEL,               0x04, 0x20, 0x0f),
2824         /*
2825          * 0x07, Vaux3Sel
2826          * 0x70, Vrf1Sel
2827          */
2828         REG_INIT(AB8540_VRF1VAUX3SEL,           0x04, 0x21, 0x77),
2829         /*
2830          * 0x01, VextSupply12LP
2831          */
2832         REG_INIT(AB8540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2833         /*
2834          * 0x07, Vanasel
2835          * 0x30, Vpllsel
2836          */
2837         REG_INIT(AB8540_VANAVPLLSEL,            0x04, 0x29, 0x37),
2838         /*
2839          * 0x03, Vaux4RequestCtrl
2840          */
2841         REG_INIT(AB8540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2842         /*
2843          * 0x03, Vaux4Regu
2844          */
2845         REG_INIT(AB8540_VAUX4REGU,              0x04, 0x2e, 0x03),
2846         /*
2847          * 0x0f, Vaux4Sel
2848          */
2849         REG_INIT(AB8540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2850         /*
2851          * 0x03, Vaux5RequestCtrl
2852          */
2853         REG_INIT(AB8540_VAUX5REQCTRL,           0x04, 0x31, 0x03),
2854         /*
2855          * 0x03, Vaux5Regu
2856          */
2857         REG_INIT(AB8540_VAUX5REGU,              0x04, 0x32, 0x03),
2858         /*
2859          * 0x3f, Vaux5Sel
2860          */
2861         REG_INIT(AB8540_VAUX5SEL,               0x04, 0x33, 0x3f),
2862         /*
2863          * 0x03, Vaux6RequestCtrl
2864          */
2865         REG_INIT(AB8540_VAUX6REQCTRL,           0x04, 0x34, 0x03),
2866         /*
2867          * 0x03, Vaux6Regu
2868          */
2869         REG_INIT(AB8540_VAUX6REGU,              0x04, 0x35, 0x03),
2870         /*
2871          * 0x3f, Vaux6Sel
2872          */
2873         REG_INIT(AB8540_VAUX6SEL,               0x04, 0x36, 0x3f),
2874         /*
2875          * 0x03, VCLKBRequestCtrl
2876          */
2877         REG_INIT(AB8540_VCLKBREQCTRL,           0x04, 0x37, 0x03),
2878         /*
2879          * 0x03, VCLKBRegu
2880          */
2881         REG_INIT(AB8540_VCLKBREGU,              0x04, 0x38, 0x03),
2882         /*
2883          * 0x07, VCLKBSel
2884          */
2885         REG_INIT(AB8540_VCLKBSEL,               0x04, 0x39, 0x07),
2886         /*
2887          * 0x03, Vrf1RequestCtrl
2888          */
2889         REG_INIT(AB8540_VRF1REQCTRL,            0x04, 0x3a, 0x03),
2890         /*
2891          * 0x01, VpllDisch
2892          * 0x02, Vrf1Disch
2893          * 0x04, Vaux1Disch
2894          * 0x08, Vaux2Disch
2895          * 0x10, Vaux3Disch
2896          * 0x20, Vintcore12Disch
2897          * 0x40, VTVoutDisch
2898          * 0x80, VaudioDisch
2899          */
2900         REG_INIT(AB8540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2901         /*
2902          * 0x02, VanaDisch
2903          * 0x04, VdmicPullDownEna
2904          * 0x08, VpllPullDownEna
2905          * 0x10, VdmicDisch
2906          */
2907         REG_INIT(AB8540_REGUCTRLDISCH2,         0x04, 0x44, 0x1e),
2908         /*
2909          * 0x01, Vaux4Disch
2910          */
2911         REG_INIT(AB8540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2912         /*
2913          * 0x01, Vaux5Disch
2914          * 0x02, Vaux6Disch
2915          * 0x04, VCLKBDisch
2916          */
2917         REG_INIT(AB8540_REGUCTRLDISCH4,         0x04, 0x49, 0x07),
2918 };
2919
2920 static struct of_regulator_match ab8500_regulator_match[] = {
2921         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
2922         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
2923         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
2924         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
2925         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
2926         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
2927         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
2928         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
2929         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
2930         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
2931 };
2932
2933 static struct of_regulator_match ab8505_regulator_match[] = {
2934         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
2935         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
2936         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
2937         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
2938         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
2939         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
2940         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
2941         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
2942         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
2943         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
2944         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
2945         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
2946         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
2947 };
2948
2949 static struct of_regulator_match ab8540_regulator_match[] = {
2950         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8540_LDO_AUX1, },
2951         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8540_LDO_AUX2, },
2952         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8540_LDO_AUX3, },
2953         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8540_LDO_AUX4, },
2954         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8540_LDO_AUX5, },
2955         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8540_LDO_AUX6, },
2956         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8540_LDO_INTCORE, },
2957         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8540_LDO_TVOUT, },
2958         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8540_LDO_AUDIO, },
2959         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8540_LDO_ANAMIC1, },
2960         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8540_LDO_ANAMIC2, },
2961         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8540_LDO_DMIC, },
2962         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8540_LDO_ANA, },
2963         { .name = "ab8500_ldo_sdio",    .driver_data = (void *) AB8540_LDO_SDIO, },
2964 };
2965
2966 static struct of_regulator_match ab9540_regulator_match[] = {
2967         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB9540_LDO_AUX1, },
2968         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB9540_LDO_AUX2, },
2969         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB9540_LDO_AUX3, },
2970         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB9540_LDO_AUX4, },
2971         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, },
2972         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB9540_LDO_TVOUT, },
2973         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB9540_LDO_AUDIO, },
2974         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, },
2975         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, },
2976         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB9540_LDO_DMIC, },
2977         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB9540_LDO_ANA, },
2978 };
2979
2980 static struct {
2981         struct ab8500_regulator_info *info;
2982         int info_size;
2983         struct ab8500_reg_init *init;
2984         int init_size;
2985         struct of_regulator_match *match;
2986         int match_size;
2987 } abx500_regulator;
2988
2989 static void abx500_get_regulator_info(struct ab8500 *ab8500)
2990 {
2991         if (is_ab9540(ab8500)) {
2992                 abx500_regulator.info = ab9540_regulator_info;
2993                 abx500_regulator.info_size = ARRAY_SIZE(ab9540_regulator_info);
2994                 abx500_regulator.init = ab9540_reg_init;
2995                 abx500_regulator.init_size = AB9540_NUM_REGULATOR_REGISTERS;
2996                 abx500_regulator.match = ab9540_regulator_match;
2997                 abx500_regulator.match_size = ARRAY_SIZE(ab9540_regulator_match);
2998         } else if (is_ab8505(ab8500)) {
2999                 abx500_regulator.info = ab8505_regulator_info;
3000                 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
3001                 abx500_regulator.init = ab8505_reg_init;
3002                 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
3003                 abx500_regulator.match = ab8505_regulator_match;
3004                 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
3005         } else if (is_ab8540(ab8500)) {
3006                 abx500_regulator.info = ab8540_regulator_info;
3007                 abx500_regulator.info_size = ARRAY_SIZE(ab8540_regulator_info);
3008                 abx500_regulator.init = ab8540_reg_init;
3009                 abx500_regulator.init_size = AB8540_NUM_REGULATOR_REGISTERS;
3010                 abx500_regulator.match = ab8540_regulator_match;
3011                 abx500_regulator.match_size = ARRAY_SIZE(ab8540_regulator_match);
3012         } else {
3013                 abx500_regulator.info = ab8500_regulator_info;
3014                 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
3015                 abx500_regulator.init = ab8500_reg_init;
3016                 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
3017                 abx500_regulator.match = ab8500_regulator_match;
3018                 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
3019         }
3020 }
3021
3022 static int ab8500_regulator_init_registers(struct platform_device *pdev,
3023                                            int id, int mask, int value)
3024 {
3025         struct ab8500_reg_init *reg_init = abx500_regulator.init;
3026         int err;
3027
3028         BUG_ON(value & ~mask);
3029         BUG_ON(mask & ~reg_init[id].mask);
3030
3031         /* initialize register */
3032         err = abx500_mask_and_set_register_interruptible(
3033                 &pdev->dev,
3034                 reg_init[id].bank,
3035                 reg_init[id].addr,
3036                 mask, value);
3037         if (err < 0) {
3038                 dev_err(&pdev->dev,
3039                         "Failed to initialize 0x%02x, 0x%02x.\n",
3040                         reg_init[id].bank,
3041                         reg_init[id].addr);
3042                 return err;
3043         }
3044         dev_vdbg(&pdev->dev,
3045                  "  init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
3046                  reg_init[id].bank,
3047                  reg_init[id].addr,
3048                  mask, value);
3049
3050         return 0;
3051 }
3052
3053 static int ab8500_regulator_register(struct platform_device *pdev,
3054                                      struct regulator_init_data *init_data,
3055                                      int id, struct device_node *np)
3056 {
3057         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3058         struct ab8500_regulator_info *info = NULL;
3059         struct regulator_config config = { };
3060         int err;
3061
3062         /* assign per-regulator data */
3063         info = &abx500_regulator.info[id];
3064         info->dev = &pdev->dev;
3065
3066         config.dev = &pdev->dev;
3067         config.init_data = init_data;
3068         config.driver_data = info;
3069         config.of_node = np;
3070
3071         /* fix for hardware before ab8500v2.0 */
3072         if (is_ab8500_1p1_or_earlier(ab8500)) {
3073                 if (info->desc.id == AB8500_LDO_AUX3) {
3074                         info->desc.n_voltages =
3075                                 ARRAY_SIZE(ldo_vauxn_voltages);
3076                         info->desc.volt_table = ldo_vauxn_voltages;
3077                         info->voltage_mask = 0xf;
3078                 }
3079         }
3080
3081         /* register regulator with framework */
3082         info->regulator = regulator_register(&info->desc, &config);
3083         if (IS_ERR(info->regulator)) {
3084                 err = PTR_ERR(info->regulator);
3085                 dev_err(&pdev->dev, "failed to register regulator %s\n",
3086                         info->desc.name);
3087                 /* when we fail, un-register all earlier regulators */
3088                 while (--id >= 0) {
3089                         info = &abx500_regulator.info[id];
3090                         regulator_unregister(info->regulator);
3091                 }
3092                 return err;
3093         }
3094
3095         return 0;
3096 }
3097
3098 static int
3099 ab8500_regulator_of_probe(struct platform_device *pdev,
3100                           struct device_node *np)
3101 {
3102         struct of_regulator_match *match = abx500_regulator.match;
3103         int err, i;
3104
3105         for (i = 0; i < abx500_regulator.info_size; i++) {
3106                 err = ab8500_regulator_register(
3107                         pdev, match[i].init_data, i, match[i].of_node);
3108                 if (err)
3109                         return err;
3110         }
3111
3112         return 0;
3113 }
3114
3115 static int ab8500_regulator_probe(struct platform_device *pdev)
3116 {
3117         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3118         struct device_node *np = pdev->dev.of_node;
3119         struct ab8500_platform_data *ppdata;
3120         struct ab8500_regulator_platform_data *pdata;
3121         int i, err;
3122
3123         if (!ab8500) {
3124                 dev_err(&pdev->dev, "null mfd parent\n");
3125                 return -EINVAL;
3126         }
3127
3128         abx500_get_regulator_info(ab8500);
3129
3130         if (np) {
3131                 err = of_regulator_match(&pdev->dev, np,
3132                                          abx500_regulator.match,
3133                                          abx500_regulator.match_size);
3134                 if (err < 0) {
3135                         dev_err(&pdev->dev,
3136                                 "Error parsing regulator init data: %d\n", err);
3137                         return err;
3138                 }
3139
3140                 err = ab8500_regulator_of_probe(pdev, np);
3141                 return err;
3142         }
3143
3144         ppdata = dev_get_platdata(ab8500->dev);
3145         if (!ppdata) {
3146                 dev_err(&pdev->dev, "null parent pdata\n");
3147                 return -EINVAL;
3148         }
3149
3150         pdata = ppdata->regulator;
3151         if (!pdata) {
3152                 dev_err(&pdev->dev, "null pdata\n");
3153                 return -EINVAL;
3154         }
3155
3156         /* make sure the platform data has the correct size */
3157         if (pdata->num_regulator != abx500_regulator.info_size) {
3158                 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
3159                 return -EINVAL;
3160         }
3161
3162         /* initialize debug (initial state is recorded with this call) */
3163         err = ab8500_regulator_debug_init(pdev);
3164         if (err)
3165                 return err;
3166
3167         /* initialize registers */
3168         for (i = 0; i < pdata->num_reg_init; i++) {
3169                 int id, mask, value;
3170
3171                 id = pdata->reg_init[i].id;
3172                 mask = pdata->reg_init[i].mask;
3173                 value = pdata->reg_init[i].value;
3174
3175                 /* check for configuration errors */
3176                 BUG_ON(id >= abx500_regulator.init_size);
3177
3178                 err = ab8500_regulator_init_registers(pdev, id, mask, value);
3179                 if (err < 0)
3180                         return err;
3181         }
3182
3183         if (!is_ab8505(ab8500)) {
3184                 /* register external regulators (before Vaux1, 2 and 3) */
3185                 err = ab8500_ext_regulator_init(pdev);
3186                 if (err)
3187                         return err;
3188         }
3189
3190         /* register all regulators */
3191         for (i = 0; i < abx500_regulator.info_size; i++) {
3192                 err = ab8500_regulator_register(pdev, &pdata->regulator[i],
3193                                                 i, NULL);
3194                 if (err < 0)
3195                         return err;
3196         }
3197
3198         return 0;
3199 }
3200
3201 static int ab8500_regulator_remove(struct platform_device *pdev)
3202 {
3203         int i, err;
3204         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3205
3206         for (i = 0; i < abx500_regulator.info_size; i++) {
3207                 struct ab8500_regulator_info *info = NULL;
3208                 info = &abx500_regulator.info[i];
3209
3210                 dev_vdbg(rdev_get_dev(info->regulator),
3211                         "%s-remove\n", info->desc.name);
3212
3213                 regulator_unregister(info->regulator);
3214         }
3215
3216         if (!is_ab8505(ab8500)) {
3217                 /* remove external regulators (after Vaux1, 2 and 3) */
3218                 err = ab8500_ext_regulator_exit(pdev);
3219                 if (err)
3220                         return err;
3221         }
3222
3223         /* remove regulator debug */
3224         err = ab8500_regulator_debug_exit(pdev);
3225         if (err)
3226                 return err;
3227
3228         return 0;
3229 }
3230
3231 static struct platform_driver ab8500_regulator_driver = {
3232         .probe = ab8500_regulator_probe,
3233         .remove = ab8500_regulator_remove,
3234         .driver         = {
3235                 .name   = "ab8500-regulator",
3236                 .owner  = THIS_MODULE,
3237         },
3238 };
3239
3240 static int __init ab8500_regulator_init(void)
3241 {
3242         int ret;
3243
3244         ret = platform_driver_register(&ab8500_regulator_driver);
3245         if (ret != 0)
3246                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
3247
3248         return ret;
3249 }
3250 subsys_initcall(ab8500_regulator_init);
3251
3252 static void __exit ab8500_regulator_exit(void)
3253 {
3254         platform_driver_unregister(&ab8500_regulator_driver);
3255 }
3256 module_exit(ab8500_regulator_exit);
3257
3258 MODULE_LICENSE("GPL v2");
3259 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
3260 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
3261 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
3262 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
3263 MODULE_ALIAS("platform:ab8500-regulator");