Pileus Git - ~andy/linux/blob - drivers/regulator/ab8500.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * License Terms: GNU General Public License v2
   5  *
   6  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
   7  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
   8  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
   9  *
  10  * AB8500 peripheral regulators
  11  *
  12  * AB8500 supports the following regulators:
  13  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  14  *
  15  * AB8505 supports the following regulators:
  16  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  17  */
  18 #include <linux/init.h>
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/err.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/mfd/abx500.h>
  24 #include <linux/mfd/abx500/ab8500.h>
  25 #include <linux/of.h>
  26 #include <linux/regulator/of_regulator.h>
  27 #include <linux/regulator/driver.h>
  28 #include <linux/regulator/machine.h>
  29 #include <linux/regulator/ab8500.h>
  30 #include <linux/slab.h>
  31
  32 /**
  33  * struct ab8500_shared_mode - is used when mode is shared between
  34  * two regulators.
  35  * @shared_regulator: pointer to the other sharing regulator
  36  * @lp_mode_req: low power mode requested by this regulator
  37  */
  38 struct ab8500_shared_mode {
  39         struct ab8500_regulator_info *shared_regulator;
  40         bool lp_mode_req;
  41 };
  42
  43 /**
  44  * struct ab8500_regulator_info - ab8500 regulator information
  45  * @dev: device pointer
  46  * @desc: regulator description
  47  * @regulator_dev: regulator device
  48  * @shared_mode: used when mode is shared between two regulators
  49  * @is_enabled: status of regulator (on/off)
  50  * @load_lp_uA: maximum load in idle (low power) mode
  51  * @update_bank: bank to control on/off
  52  * @update_reg: register to control on/off
  53  * @update_mask: mask to enable/disable and set mode of regulator
  54  * @update_val: bits holding the regulator current mode
  55  * @update_val_idle: bits to enable the regulator in idle (low power) mode
  56  * @update_val_normal: bits to enable the regulator in normal (high power) mode
  57  * @mode_bank: bank with location of mode register
  58  * @mode_reg: mode register
  59  * @mode_mask: mask for setting mode
  60  * @mode_val_idle: mode setting for low power
  61  * @mode_val_normal: mode setting for normal power
  62  * @voltage_bank: bank to control regulator voltage
  63  * @voltage_reg: register to control regulator voltage
  64  * @voltage_mask: mask to control regulator voltage
  65  * @voltage_shift: shift to control regulator voltage
  66  */
  67 struct ab8500_regulator_info {
  68         struct device           *dev;
  69         struct regulator_desc   desc;
  70         struct regulator_dev    *regulator;
  71         struct ab8500_shared_mode *shared_mode;
  72         bool is_enabled;
  73         int load_lp_uA;
  74         u8 update_bank;
  75         u8 update_reg;
  76         u8 update_mask;
  77         u8 update_val;
  78         u8 update_val_idle;
  79         u8 update_val_normal;
  80         u8 mode_bank;
  81         u8 mode_reg;
  82         u8 mode_mask;
  83         u8 mode_val_idle;
  84         u8 mode_val_normal;
  85         u8 voltage_bank;
  86         u8 voltage_reg;
  87         u8 voltage_mask;
  88         u8 voltage_shift;
  89         struct {
  90                 u8 voltage_limit;
  91                 u8 voltage_bank;
  92                 u8 voltage_reg;
  93                 u8 voltage_mask;
  94                 u8 voltage_shift;
  95         } expand_register;
  96 };
  97
  98 /* voltage tables for the vauxn/vintcore supplies */
  99 static const unsigned int ldo_vauxn_voltages[] = {
 100         1100000,
 101         1200000,
 102         1300000,
 103         1400000,
 104         1500000,
 105         1800000,
 106         1850000,
 107         1900000,
 108         2500000,
 109         2650000,
 110         2700000,
 111         2750000,
 112         2800000,
 113         2900000,
 114         3000000,
 115         3300000,
 116 };
 117
 118 static const unsigned int ldo_vaux3_voltages[] = {
 119         1200000,
 120         1500000,
 121         1800000,
 122         2100000,
 123         2500000,
 124         2750000,
 125         2790000,
 126         2910000,
 127 };
 128
 129 static const unsigned int ldo_vaux56_voltages[] = {
 130         1800000,
 131         1050000,
 132         1100000,
 133         1200000,
 134         1500000,
 135         2200000,
 136         2500000,
 137         2790000,
 138 };
 139
 140 static const unsigned int ldo_vaux3_ab8540_voltages[] = {
 141         1200000,
 142         1500000,
 143         1800000,
 144         2100000,
 145         2500000,
 146         2750000,
 147         2790000,
 148         2910000,
 149         3050000,
 150 };
 151
 152 static const unsigned int ldo_vaux56_ab8540_voltages[] = {
 153         750000, 760000, 770000, 780000, 790000, 800000,
 154         810000, 820000, 830000, 840000, 850000, 860000,
 155         870000, 880000, 890000, 900000, 910000, 920000,
 156         930000, 940000, 950000, 960000, 970000, 980000,
 157         990000, 1000000, 1010000, 1020000, 1030000,
 158         1040000, 1050000, 1060000, 1070000, 1080000,
 159         1090000, 1100000, 1110000, 1120000, 1130000,
 160         1140000, 1150000, 1160000, 1170000, 1180000,
 161         1190000, 1200000, 1210000, 1220000, 1230000,
 162         1240000, 1250000, 1260000, 1270000, 1280000,
 163         1290000, 1300000, 1310000, 1320000, 1330000,
 164         1340000, 1350000, 1360000, 1800000, 2790000,
 165 };
 166
 167 static const unsigned int ldo_vintcore_voltages[] = {
 168         1200000,
 169         1225000,
 170         1250000,
 171         1275000,
 172         1300000,
 173         1325000,
 174         1350000,
 175 };
 176
 177 static const unsigned int ldo_sdio_voltages[] = {
 178         1160000,
 179         1050000,
 180         1100000,
 181         1500000,
 182         1800000,
 183         2200000,
 184         2910000,
 185         3050000,
 186 };
 187
 188 static const unsigned int fixed_1200000_voltage[] = {
 189         1200000,
 190 };
 191
 192 static const unsigned int fixed_1800000_voltage[] = {
 193         1800000,
 194 };
 195
 196 static const unsigned int fixed_2000000_voltage[] = {
 197         2000000,
 198 };
 199
 200 static const unsigned int fixed_2050000_voltage[] = {
 201         2050000,
 202 };
 203
 204 static const unsigned int fixed_3300000_voltage[] = {
 205         3300000,
 206 };
 207
 208 static const unsigned int ldo_vana_voltages[] = {
 209         1050000,
 210         1075000,
 211         1100000,
 212         1125000,
 213         1150000,
 214         1175000,
 215         1200000,
 216         1225000,
 217 };
 218
 219 static const unsigned int ldo_vaudio_voltages[] = {
 220         2000000,
 221         2100000,
 222         2200000,
 223         2300000,
 224         2400000,
 225         2500000,
 226         2600000,
 227         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 228 };
 229
 230 static const unsigned int ldo_vdmic_voltages[] = {
 231         1800000,
 232         1900000,
 233         2000000,
 234         2850000,
 235 };
 236
 237 static DEFINE_MUTEX(shared_mode_mutex);
 238 static struct ab8500_shared_mode ldo_anamic1_shared;
 239 static struct ab8500_shared_mode ldo_anamic2_shared;
 240 static struct ab8500_shared_mode ab8540_ldo_anamic1_shared;
 241 static struct ab8500_shared_mode ab8540_ldo_anamic2_shared;
 242
 243 static int ab8500_regulator_enable(struct regulator_dev *rdev)
 244 {
 245         int ret;
 246         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 247
 248         if (info == NULL) {
 249                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 250                 return -EINVAL;
 251         }
 252
 253         ret = abx500_mask_and_set_register_interruptible(info->dev,
 254                 info->update_bank, info->update_reg,
 255                 info->update_mask, info->update_val);
 256         if (ret < 0) {
 257                 dev_err(rdev_get_dev(rdev),
 258                         "couldn't set enable bits for regulator\n");
 259                 return ret;
 260         }
 261
 262         info->is_enabled = true;
 263
 264         dev_vdbg(rdev_get_dev(rdev),
 265                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 266                 info->desc.name, info->update_bank, info->update_reg,
 267                 info->update_mask, info->update_val);
 268
 269         return ret;
 270 }
 271
 272 static int ab8500_regulator_disable(struct regulator_dev *rdev)
 273 {
 274         int ret;
 275         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 276
 277         if (info == NULL) {
 278                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 279                 return -EINVAL;
 280         }
 281
 282         ret = abx500_mask_and_set_register_interruptible(info->dev,
 283                 info->update_bank, info->update_reg,
 284                 info->update_mask, 0x0);
 285         if (ret < 0) {
 286                 dev_err(rdev_get_dev(rdev),
 287                         "couldn't set disable bits for regulator\n");
 288                 return ret;
 289         }
 290
 291         info->is_enabled = false;
 292
 293         dev_vdbg(rdev_get_dev(rdev),
 294                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 295                 info->desc.name, info->update_bank, info->update_reg,
 296                 info->update_mask, 0x0);
 297
 298         return ret;
 299 }
 300
 301 static unsigned int ab8500_regulator_get_optimum_mode(
 302                 struct regulator_dev *rdev, int input_uV,
 303                 int output_uV, int load_uA)
 304 {
 305         unsigned int mode;
 306
 307         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 308
 309         if (info == NULL) {
 310                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 311                 return -EINVAL;
 312         }
 313
 314         if (load_uA <= info->load_lp_uA)
 315                 mode = REGULATOR_MODE_IDLE;
 316         else
 317                 mode = REGULATOR_MODE_NORMAL;
 318
 319         return mode;
 320 }
 321
 322 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 323                                      unsigned int mode)
 324 {
 325         int ret = 0;
 326         u8 bank;
 327         u8 reg;
 328         u8 mask;
 329         u8 val;
 330         bool dmr = false; /* Dedicated mode register */
 331         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 332
 333         if (info == NULL) {
 334                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 335                 return -EINVAL;
 336         }
 337
 338         if (info->shared_mode) {
 339                 /*
 340                  * Special case where mode is shared between two regulators.
 341                  */
 342                 struct ab8500_shared_mode *sm = info->shared_mode;
 343                 mutex_lock(&shared_mode_mutex);
 344
 345                 if (mode == REGULATOR_MODE_IDLE) {
 346                         sm->lp_mode_req = true; /* Low power mode requested */
 347                         if (!((sm->shared_regulator)->
 348                               shared_mode->lp_mode_req)) {
 349                                 mutex_unlock(&shared_mode_mutex);
 350                                 return 0; /* Other regulator prevent LP mode */
 351                         }
 352                 } else {
 353                         sm->lp_mode_req = false;
 354                 }
 355         }
 356
 357         if (info->mode_mask) {
 358                 /* Dedicated register for handling mode */
 359
 360                 dmr = true;
 361
 362                 switch (mode) {
 363                 case REGULATOR_MODE_NORMAL:
 364                         val = info->mode_val_normal;
 365                         break;
 366                 case REGULATOR_MODE_IDLE:
 367                         val = info->mode_val_idle;
 368                         break;
 369                 default:
 370                         if (info->shared_mode)
 371                                 mutex_unlock(&shared_mode_mutex);
 372                         return -EINVAL;
 373                 }
 374
 375                 bank = info->mode_bank;
 376                 reg = info->mode_reg;
 377                 mask = info->mode_mask;
 378         } else {
 379                 /* Mode register same as enable register */
 380
 381                 switch (mode) {
 382                 case REGULATOR_MODE_NORMAL:
 383                         info->update_val = info->update_val_normal;
 384                         val = info->update_val_normal;
 385                         break;
 386                 case REGULATOR_MODE_IDLE:
 387                         info->update_val = info->update_val_idle;
 388                         val = info->update_val_idle;
 389                         break;
 390                 default:
 391                         if (info->shared_mode)
 392                                 mutex_unlock(&shared_mode_mutex);
 393                         return -EINVAL;
 394                 }
 395
 396                 bank = info->update_bank;
 397                 reg = info->update_reg;
 398                 mask = info->update_mask;
 399         }
 400
 401         if (info->is_enabled || dmr) {
 402                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 403                         bank, reg, mask, val);
 404                 if (ret < 0)
 405                         dev_err(rdev_get_dev(rdev),
 406                                 "couldn't set regulator mode\n");
 407
 408                 dev_vdbg(rdev_get_dev(rdev),
 409                         "%s-set_mode (bank, reg, mask, value): "
 410                         "0x%x, 0x%x, 0x%x, 0x%x\n",
 411                         info->desc.name, bank, reg,
 412                         mask, val);
 413         }
 414
 415         if (info->shared_mode)
 416                 mutex_unlock(&shared_mode_mutex);
 417
 418         return ret;
 419 }
 420
 421 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 422 {
 423         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 424         int ret;
 425         u8 val;
 426         u8 val_normal;
 427         u8 val_idle;
 428
 429         if (info == NULL) {
 430                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 431                 return -EINVAL;
 432         }
 433
 434         /* Need special handling for shared mode */
 435         if (info->shared_mode) {
 436                 if (info->shared_mode->lp_mode_req)
 437                         return REGULATOR_MODE_IDLE;
 438                 else
 439                         return REGULATOR_MODE_NORMAL;
 440         }
 441
 442         if (info->mode_mask) {
 443                 /* Dedicated register for handling mode */
 444                 ret = abx500_get_register_interruptible(info->dev,
 445                 info->mode_bank, info->mode_reg, &val);
 446                 val = val & info->mode_mask;
 447
 448                 val_normal = info->mode_val_normal;
 449                 val_idle = info->mode_val_idle;
 450         } else {
 451                 /* Mode register same as enable register */
 452                 val = info->update_val;
 453                 val_normal = info->update_val_normal;
 454                 val_idle = info->update_val_idle;
 455         }
 456
 457         if (val == val_normal)
 458                 ret = REGULATOR_MODE_NORMAL;
 459         else if (val == val_idle)
 460                 ret = REGULATOR_MODE_IDLE;
 461         else
 462                 ret = -EINVAL;
 463
 464         return ret;
 465 }
 466
 467 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 468 {
 469         int ret;
 470         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 471         u8 regval;
 472
 473         if (info == NULL) {
 474                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 475                 return -EINVAL;
 476         }
 477
 478         ret = abx500_get_register_interruptible(info->dev,
 479                 info->update_bank, info->update_reg, &regval);
 480         if (ret < 0) {
 481                 dev_err(rdev_get_dev(rdev),
 482                         "couldn't read 0x%x register\n", info->update_reg);
 483                 return ret;
 484         }
 485
 486         dev_vdbg(rdev_get_dev(rdev),
 487                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 488                 " 0x%x\n",
 489                 info->desc.name, info->update_bank, info->update_reg,
 490                 info->update_mask, regval);
 491
 492         if (regval & info->update_mask)
 493                 info->is_enabled = true;
 494         else
 495                 info->is_enabled = false;
 496
 497         return info->is_enabled;
 498 }
 499
 500 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 501 {
 502         int ret, val;
 503         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 504         u8 regval;
 505
 506         if (info == NULL) {
 507                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 508                 return -EINVAL;
 509         }
 510
 511         ret = abx500_get_register_interruptible(info->dev,
 512                         info->voltage_bank, info->voltage_reg, &regval);
 513         if (ret < 0) {
 514                 dev_err(rdev_get_dev(rdev),
 515                         "couldn't read voltage reg for regulator\n");
 516                 return ret;
 517         }
 518
 519         dev_vdbg(rdev_get_dev(rdev),
 520                 "%s-get_voltage (bank, reg, mask, shift, value): "
 521                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 522                 info->desc.name, info->voltage_bank,
 523                 info->voltage_reg, info->voltage_mask,
 524                 info->voltage_shift, regval);
 525
 526         val = regval & info->voltage_mask;
 527         return val >> info->voltage_shift;
 528 }
 529
 530 static int ab8540_aux3_regulator_get_voltage_sel(struct regulator_dev *rdev)
 531 {
 532         int ret, val;
 533         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 534         u8 regval, regval_expand;
 535
 536         if (info == NULL) {
 537                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 538                 return -EINVAL;
 539         }
 540
 541         ret = abx500_get_register_interruptible(info->dev,
 542                         info->voltage_bank, info->voltage_reg, &regval);
 543
 544         if (ret < 0) {
 545                 dev_err(rdev_get_dev(rdev),
 546                         "couldn't read voltage reg for regulator\n");
 547                 return ret;
 548         }
 549
 550         ret = abx500_get_register_interruptible(info->dev,
 551                         info->expand_register.voltage_bank,
 552                         info->expand_register.voltage_reg, &regval_expand);
 553
 554         if (ret < 0) {
 555                 dev_err(rdev_get_dev(rdev),
 556                         "couldn't read voltage reg for regulator\n");
 557                 return ret;
 558         }
 559
 560         dev_vdbg(rdev_get_dev(rdev),
 561                 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 562                 " 0x%x\n",
 563                 info->desc.name, info->voltage_bank, info->voltage_reg,
 564                 info->voltage_mask, regval);
 565         dev_vdbg(rdev_get_dev(rdev),
 566                 "%s-get_voltage expand (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 567                 " 0x%x\n",
 568                 info->desc.name, info->expand_register.voltage_bank,
 569                 info->expand_register.voltage_reg,
 570                 info->expand_register.voltage_mask, regval_expand);
 571
 572         if (regval_expand&(info->expand_register.voltage_mask))
 573                 /* Vaux3 has a different layout */
 574                 val = info->expand_register.voltage_limit;
 575         else
 576                 val = (regval & info->voltage_mask) >> info->voltage_shift;
 577
 578         return val;
 579 }
 580
 581 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 582                                             unsigned selector)
 583 {
 584         int ret;
 585         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 586         u8 regval;
 587
 588         if (info == NULL) {
 589                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 590                 return -EINVAL;
 591         }
 592
 593         /* set the registers for the request */
 594         regval = (u8)selector << info->voltage_shift;
 595         ret = abx500_mask_and_set_register_interruptible(info->dev,
 596                         info->voltage_bank, info->voltage_reg,
 597                         info->voltage_mask, regval);
 598         if (ret < 0)
 599                 dev_err(rdev_get_dev(rdev),
 600                 "couldn't set voltage reg for regulator\n");
 601
 602         dev_vdbg(rdev_get_dev(rdev),
 603                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 604                 " 0x%x\n",
 605                 info->desc.name, info->voltage_bank, info->voltage_reg,
 606                 info->voltage_mask, regval);
 607
 608         return ret;
 609 }
 610
 611 static int ab8540_aux3_regulator_set_voltage_sel(struct regulator_dev *rdev,
 612                                                 unsigned selector)
 613 {
 614         int ret;
 615         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 616         u8 regval;
 617
 618         if (info == NULL) {
 619                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 620                 return -EINVAL;
 621         }
 622
 623         if (selector >= info->expand_register.voltage_limit) {
 624                 /* Vaux3 bit4 has different layout */
 625                 regval = (u8)selector << info->expand_register.voltage_shift;
 626                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 627                                         info->expand_register.voltage_bank,
 628                                         info->expand_register.voltage_reg,
 629                                         info->expand_register.voltage_mask,
 630                                         regval);
 631         } else {
 632                 /* set the registers for the request */
 633                 regval = (u8)selector << info->voltage_shift;
 634                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 635                                 info->voltage_bank, info->voltage_reg,
 636                                 info->voltage_mask, regval);
 637         }
 638         if (ret < 0)
 639                 dev_err(rdev_get_dev(rdev),
 640                         "couldn't set voltage reg for regulator\n");
 641
 642         dev_vdbg(rdev_get_dev(rdev),
 643                         "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 644                         " 0x%x\n",
 645                         info->desc.name, info->voltage_bank, info->voltage_reg,
 646                         info->voltage_mask, regval);
 647
 648         return ret;
 649 }
 650
 651 static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
 652                                              unsigned int old_sel,
 653                                              unsigned int new_sel)
 654 {
 655         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 656
 657         return info->desc.enable_time;
 658 }
 659
 660 static struct regulator_ops ab8500_regulator_volt_mode_ops = {
 661         .enable                 = ab8500_regulator_enable,
 662         .disable                = ab8500_regulator_disable,
 663         .is_enabled             = ab8500_regulator_is_enabled,
 664         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 665         .set_mode               = ab8500_regulator_set_mode,
 666         .get_mode               = ab8500_regulator_get_mode,
 667         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 668         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 669         .list_voltage           = regulator_list_voltage_table,
 670 };
 671
 672 static struct regulator_ops ab8540_aux3_regulator_volt_mode_ops = {
 673         .enable         = ab8500_regulator_enable,
 674         .disable        = ab8500_regulator_disable,
 675         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 676         .set_mode       = ab8500_regulator_set_mode,
 677         .get_mode       = ab8500_regulator_get_mode,
 678         .is_enabled     = ab8500_regulator_is_enabled,
 679         .get_voltage_sel = ab8540_aux3_regulator_get_voltage_sel,
 680         .set_voltage_sel = ab8540_aux3_regulator_set_voltage_sel,
 681         .list_voltage   = regulator_list_voltage_table,
 682         .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
 683 };
 684
 685 static struct regulator_ops ab8500_regulator_volt_ops = {
 686         .enable         = ab8500_regulator_enable,
 687         .disable        = ab8500_regulator_disable,
 688         .is_enabled     = ab8500_regulator_is_enabled,
 689         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 690         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 691         .list_voltage   = regulator_list_voltage_table,
 692         .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
 693 };
 694
 695 static struct regulator_ops ab8500_regulator_mode_ops = {
 696         .enable                 = ab8500_regulator_enable,
 697         .disable                = ab8500_regulator_disable,
 698         .is_enabled             = ab8500_regulator_is_enabled,
 699         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 700         .set_mode               = ab8500_regulator_set_mode,
 701         .get_mode               = ab8500_regulator_get_mode,
 702         .list_voltage           = regulator_list_voltage_linear,
 703 };
 704
 705 static struct regulator_ops ab8500_regulator_ops = {
 706         .enable                 = ab8500_regulator_enable,
 707         .disable                = ab8500_regulator_disable,
 708         .is_enabled             = ab8500_regulator_is_enabled,
 709         .list_voltage           = regulator_list_voltage_linear,
 710 };
 711
 712 static struct regulator_ops ab8500_regulator_anamic_mode_ops = {
 713         .enable         = ab8500_regulator_enable,
 714         .disable        = ab8500_regulator_disable,
 715         .is_enabled     = ab8500_regulator_is_enabled,
 716         .set_mode       = ab8500_regulator_set_mode,
 717         .get_mode       = ab8500_regulator_get_mode,
 718         .list_voltage   = regulator_list_voltage_table,
 719 };
 720
 721 /* AB8500 regulator information */
 722 static struct ab8500_regulator_info
 723                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 724         /*
 725          * Variable Voltage Regulators
 726          *   name, min mV, max mV,
 727          *   update bank, reg, mask, enable val
 728          *   volt bank, reg, mask
 729          */
 730         [AB8500_LDO_AUX1] = {
 731                 .desc = {
 732                         .name           = "LDO-AUX1",
 733                         .ops            = &ab8500_regulator_volt_mode_ops,
 734                         .type           = REGULATOR_VOLTAGE,
 735                         .id             = AB8500_LDO_AUX1,
 736                         .owner          = THIS_MODULE,
 737                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 738                         .volt_table     = ldo_vauxn_voltages,
 739                         .enable_time    = 200,
 740                 },
 741                 .load_lp_uA             = 5000,
 742                 .update_bank            = 0x04,
 743                 .update_reg             = 0x09,
 744                 .update_mask            = 0x03,
 745                 .update_val             = 0x01,
 746                 .update_val_idle        = 0x03,
 747                 .update_val_normal      = 0x01,
 748                 .voltage_bank           = 0x04,
 749                 .voltage_reg            = 0x1f,
 750                 .voltage_mask           = 0x0f,
 751         },
 752         [AB8500_LDO_AUX2] = {
 753                 .desc = {
 754                         .name           = "LDO-AUX2",
 755                         .ops            = &ab8500_regulator_volt_mode_ops,
 756                         .type           = REGULATOR_VOLTAGE,
 757                         .id             = AB8500_LDO_AUX2,
 758                         .owner          = THIS_MODULE,
 759                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 760                         .volt_table     = ldo_vauxn_voltages,
 761                         .enable_time    = 200,
 762                 },
 763                 .load_lp_uA             = 5000,
 764                 .update_bank            = 0x04,
 765                 .update_reg             = 0x09,
 766                 .update_mask            = 0x0c,
 767                 .update_val             = 0x04,
 768                 .update_val_idle        = 0x0c,
 769                 .update_val_normal      = 0x04,
 770                 .voltage_bank           = 0x04,
 771                 .voltage_reg            = 0x20,
 772                 .voltage_mask           = 0x0f,
 773         },
 774         [AB8500_LDO_AUX3] = {
 775                 .desc = {
 776                         .name           = "LDO-AUX3",
 777                         .ops            = &ab8500_regulator_volt_mode_ops,
 778                         .type           = REGULATOR_VOLTAGE,
 779                         .id             = AB8500_LDO_AUX3,
 780                         .owner          = THIS_MODULE,
 781                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 782                         .volt_table     = ldo_vaux3_voltages,
 783                         .enable_time    = 450,
 784                 },
 785                 .load_lp_uA             = 5000,
 786                 .update_bank            = 0x04,
 787                 .update_reg             = 0x0a,
 788                 .update_mask            = 0x03,
 789                 .update_val             = 0x01,
 790                 .update_val_idle        = 0x03,
 791                 .update_val_normal      = 0x01,
 792                 .voltage_bank           = 0x04,
 793                 .voltage_reg            = 0x21,
 794                 .voltage_mask           = 0x07,
 795         },
 796         [AB8500_LDO_INTCORE] = {
 797                 .desc = {
 798                         .name           = "LDO-INTCORE",
 799                         .ops            = &ab8500_regulator_volt_mode_ops,
 800                         .type           = REGULATOR_VOLTAGE,
 801                         .id             = AB8500_LDO_INTCORE,
 802                         .owner          = THIS_MODULE,
 803                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 804                         .volt_table     = ldo_vintcore_voltages,
 805                         .enable_time    = 750,
 806                 },
 807                 .load_lp_uA             = 5000,
 808                 .update_bank            = 0x03,
 809                 .update_reg             = 0x80,
 810                 .update_mask            = 0x44,
 811                 .update_val             = 0x44,
 812                 .update_val_idle        = 0x44,
 813                 .update_val_normal      = 0x04,
 814                 .voltage_bank           = 0x03,
 815                 .voltage_reg            = 0x80,
 816                 .voltage_mask           = 0x38,
 817                 .voltage_shift          = 3,
 818         },
 819
 820         /*
 821          * Fixed Voltage Regulators
 822          *   name, fixed mV,
 823          *   update bank, reg, mask, enable val
 824          */
 825         [AB8500_LDO_TVOUT] = {
 826                 .desc = {
 827                         .name           = "LDO-TVOUT",
 828                         .ops            = &ab8500_regulator_mode_ops,
 829                         .type           = REGULATOR_VOLTAGE,
 830                         .id             = AB8500_LDO_TVOUT,
 831                         .owner          = THIS_MODULE,
 832                         .n_voltages     = 1,
 833                         .volt_table     = fixed_2000000_voltage,
 834                         .enable_time    = 500,
 835                 },
 836                 .load_lp_uA             = 1000,
 837                 .update_bank            = 0x03,
 838                 .update_reg             = 0x80,
 839                 .update_mask            = 0x82,
 840                 .update_val             = 0x02,
 841                 .update_val_idle        = 0x82,
 842                 .update_val_normal      = 0x02,
 843         },
 844         [AB8500_LDO_AUDIO] = {
 845                 .desc = {
 846                         .name           = "LDO-AUDIO",
 847                         .ops            = &ab8500_regulator_ops,
 848                         .type           = REGULATOR_VOLTAGE,
 849                         .id             = AB8500_LDO_AUDIO,
 850                         .owner          = THIS_MODULE,
 851                         .n_voltages     = 1,
 852                         .enable_time    = 140,
 853                         .volt_table     = fixed_2000000_voltage,
 854                 },
 855                 .update_bank            = 0x03,
 856                 .update_reg             = 0x83,
 857                 .update_mask            = 0x02,
 858                 .update_val             = 0x02,
 859         },
 860         [AB8500_LDO_ANAMIC1] = {
 861                 .desc = {
 862                         .name           = "LDO-ANAMIC1",
 863                         .ops            = &ab8500_regulator_ops,
 864                         .type           = REGULATOR_VOLTAGE,
 865                         .id             = AB8500_LDO_ANAMIC1,
 866                         .owner          = THIS_MODULE,
 867                         .n_voltages     = 1,
 868                         .enable_time    = 500,
 869                         .volt_table     = fixed_2050000_voltage,
 870                 },
 871                 .update_bank            = 0x03,
 872                 .update_reg             = 0x83,
 873                 .update_mask            = 0x08,
 874                 .update_val             = 0x08,
 875         },
 876         [AB8500_LDO_ANAMIC2] = {
 877                 .desc = {
 878                         .name           = "LDO-ANAMIC2",
 879                         .ops            = &ab8500_regulator_ops,
 880                         .type           = REGULATOR_VOLTAGE,
 881                         .id             = AB8500_LDO_ANAMIC2,
 882                         .owner          = THIS_MODULE,
 883                         .n_voltages     = 1,
 884                         .enable_time    = 500,
 885                         .volt_table     = fixed_2050000_voltage,
 886                 },
 887                 .update_bank            = 0x03,
 888                 .update_reg             = 0x83,
 889                 .update_mask            = 0x10,
 890                 .update_val             = 0x10,
 891         },
 892         [AB8500_LDO_DMIC] = {
 893                 .desc = {
 894                         .name           = "LDO-DMIC",
 895                         .ops            = &ab8500_regulator_ops,
 896                         .type           = REGULATOR_VOLTAGE,
 897                         .id             = AB8500_LDO_DMIC,
 898                         .owner          = THIS_MODULE,
 899                         .n_voltages     = 1,
 900                         .enable_time    = 420,
 901                         .volt_table     = fixed_1800000_voltage,
 902                 },
 903                 .update_bank            = 0x03,
 904                 .update_reg             = 0x83,
 905                 .update_mask            = 0x04,
 906                 .update_val             = 0x04,
 907         },
 908
 909         /*
 910          * Regulators with fixed voltage and normal/idle modes
 911          */
 912         [AB8500_LDO_ANA] = {
 913                 .desc = {
 914                         .name           = "LDO-ANA",
 915                         .ops            = &ab8500_regulator_mode_ops,
 916                         .type           = REGULATOR_VOLTAGE,
 917                         .id             = AB8500_LDO_ANA,
 918                         .owner          = THIS_MODULE,
 919                         .n_voltages     = 1,
 920                         .enable_time    = 140,
 921                         .volt_table     = fixed_1200000_voltage,
 922                 },
 923                 .load_lp_uA             = 1000,
 924                 .update_bank            = 0x04,
 925                 .update_reg             = 0x06,
 926                 .update_mask            = 0x0c,
 927                 .update_val             = 0x04,
 928                 .update_val_idle        = 0x0c,
 929                 .update_val_normal      = 0x04,
 930         },
 931 };
 932
 933 /* AB8505 regulator information */
 934 static struct ab8500_regulator_info
 935                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 936         /*
 937          * Variable Voltage Regulators
 938          *   name, min mV, max mV,
 939          *   update bank, reg, mask, enable val
 940          *   volt bank, reg, mask, table, table length
 941          */
 942         [AB8505_LDO_AUX1] = {
 943                 .desc = {
 944                         .name           = "LDO-AUX1",
 945                         .ops            = &ab8500_regulator_volt_mode_ops,
 946                         .type           = REGULATOR_VOLTAGE,
 947                         .id             = AB8505_LDO_AUX1,
 948                         .owner          = THIS_MODULE,
 949                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 950                         .volt_table     = ldo_vauxn_voltages,
 951                 },
 952                 .load_lp_uA             = 5000,
 953                 .update_bank            = 0x04,
 954                 .update_reg             = 0x09,
 955                 .update_mask            = 0x03,
 956                 .update_val             = 0x01,
 957                 .update_val_idle        = 0x03,
 958                 .update_val_normal      = 0x01,
 959                 .voltage_bank           = 0x04,
 960                 .voltage_reg            = 0x1f,
 961                 .voltage_mask           = 0x0f,
 962         },
 963         [AB8505_LDO_AUX2] = {
 964                 .desc = {
 965                         .name           = "LDO-AUX2",
 966                         .ops            = &ab8500_regulator_volt_mode_ops,
 967                         .type           = REGULATOR_VOLTAGE,
 968                         .id             = AB8505_LDO_AUX2,
 969                         .owner          = THIS_MODULE,
 970                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 971                         .volt_table     = ldo_vauxn_voltages,
 972                 },
 973                 .load_lp_uA             = 5000,
 974                 .update_bank            = 0x04,
 975                 .update_reg             = 0x09,
 976                 .update_mask            = 0x0c,
 977                 .update_val             = 0x04,
 978                 .update_val_idle        = 0x0c,
 979                 .update_val_normal      = 0x04,
 980                 .voltage_bank           = 0x04,
 981                 .voltage_reg            = 0x20,
 982                 .voltage_mask           = 0x0f,
 983         },
 984         [AB8505_LDO_AUX3] = {
 985                 .desc = {
 986                         .name           = "LDO-AUX3",
 987                         .ops            = &ab8500_regulator_volt_mode_ops,
 988                         .type           = REGULATOR_VOLTAGE,
 989                         .id             = AB8505_LDO_AUX3,
 990                         .owner          = THIS_MODULE,
 991                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 992                         .volt_table     = ldo_vaux3_voltages,
 993                 },
 994                 .load_lp_uA             = 5000,
 995                 .update_bank            = 0x04,
 996                 .update_reg             = 0x0a,
 997                 .update_mask            = 0x03,
 998                 .update_val             = 0x01,
 999                 .update_val_idle        = 0x03,
1000                 .update_val_normal      = 0x01,
1001                 .voltage_bank           = 0x04,
1002                 .voltage_reg            = 0x21,
1003                 .voltage_mask           = 0x07,
1004         },
1005         [AB8505_LDO_AUX4] = {
1006                 .desc = {
1007                         .name           = "LDO-AUX4",
1008                         .ops            = &ab8500_regulator_volt_mode_ops,
1009                         .type           = REGULATOR_VOLTAGE,
1010                         .id             = AB8505_LDO_AUX4,
1011                         .owner          = THIS_MODULE,
1012                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1013                         .volt_table     = ldo_vauxn_voltages,
1014                 },
1015                 .load_lp_uA             = 5000,
1016                 /* values for Vaux4Regu register */
1017                 .update_bank            = 0x04,
1018                 .update_reg             = 0x2e,
1019                 .update_mask            = 0x03,
1020                 .update_val             = 0x01,
1021                 .update_val_idle        = 0x03,
1022                 .update_val_normal      = 0x01,
1023                 /* values for Vaux4SEL register */
1024                 .voltage_bank           = 0x04,
1025                 .voltage_reg            = 0x2f,
1026                 .voltage_mask           = 0x0f,
1027         },
1028         [AB8505_LDO_AUX5] = {
1029                 .desc = {
1030                         .name           = "LDO-AUX5",
1031                         .ops            = &ab8500_regulator_volt_mode_ops,
1032                         .type           = REGULATOR_VOLTAGE,
1033                         .id             = AB8505_LDO_AUX5,
1034                         .owner          = THIS_MODULE,
1035                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
1036                         .volt_table     = ldo_vaux56_voltages,
1037                 },
1038                 .load_lp_uA             = 2000,
1039                 /* values for CtrlVaux5 register */
1040                 .update_bank            = 0x01,
1041                 .update_reg             = 0x55,
1042                 .update_mask            = 0x18,
1043                 .update_val             = 0x10,
1044                 .update_val_idle        = 0x18,
1045                 .update_val_normal      = 0x10,
1046                 .voltage_bank           = 0x01,
1047                 .voltage_reg            = 0x55,
1048                 .voltage_mask           = 0x07,
1049         },
1050         [AB8505_LDO_AUX6] = {
1051                 .desc = {
1052                         .name           = "LDO-AUX6",
1053                         .ops            = &ab8500_regulator_volt_mode_ops,
1054                         .type           = REGULATOR_VOLTAGE,
1055                         .id             = AB8505_LDO_AUX6,
1056                         .owner          = THIS_MODULE,
1057                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
1058                         .volt_table     = ldo_vaux56_voltages,
1059                 },
1060                 .load_lp_uA             = 2000,
1061                 /* values for CtrlVaux6 register */
1062                 .update_bank            = 0x01,
1063                 .update_reg             = 0x56,
1064                 .update_mask            = 0x18,
1065                 .update_val             = 0x10,
1066                 .update_val_idle        = 0x18,
1067                 .update_val_normal      = 0x10,
1068                 .voltage_bank           = 0x01,
1069                 .voltage_reg            = 0x56,
1070                 .voltage_mask           = 0x07,
1071         },
1072         [AB8505_LDO_INTCORE] = {
1073                 .desc = {
1074                         .name           = "LDO-INTCORE",
1075                         .ops            = &ab8500_regulator_volt_mode_ops,
1076                         .type           = REGULATOR_VOLTAGE,
1077                         .id             = AB8505_LDO_INTCORE,
1078                         .owner          = THIS_MODULE,
1079                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1080                         .volt_table     = ldo_vintcore_voltages,
1081                 },
1082                 .load_lp_uA             = 5000,
1083                 .update_bank            = 0x03,
1084                 .update_reg             = 0x80,
1085                 .update_mask            = 0x44,
1086                 .update_val             = 0x04,
1087                 .update_val_idle        = 0x44,
1088                 .update_val_normal      = 0x04,
1089                 .voltage_bank           = 0x03,
1090                 .voltage_reg            = 0x80,
1091                 .voltage_mask           = 0x38,
1092                 .voltage_shift          = 3,
1093         },
1094
1095         /*
1096          * Fixed Voltage Regulators
1097          *   name, fixed mV,
1098          *   update bank, reg, mask, enable val
1099          */
1100         [AB8505_LDO_ADC] = {
1101                 .desc = {
1102                         .name           = "LDO-ADC",
1103                         .ops            = &ab8500_regulator_mode_ops,
1104                         .type           = REGULATOR_VOLTAGE,
1105                         .id             = AB8505_LDO_ADC,
1106                         .owner          = THIS_MODULE,
1107                         .n_voltages     = 1,
1108                         .volt_table     = fixed_2000000_voltage,
1109                         .enable_time    = 10000,
1110                 },
1111                 .load_lp_uA             = 1000,
1112                 .update_bank            = 0x03,
1113                 .update_reg             = 0x80,
1114                 .update_mask            = 0x82,
1115                 .update_val             = 0x02,
1116                 .update_val_idle        = 0x82,
1117                 .update_val_normal      = 0x02,
1118         },
1119         [AB8505_LDO_USB] = {
1120                 .desc = {
1121                         .name           = "LDO-USB",
1122                         .ops            = &ab8500_regulator_mode_ops,
1123                         .type           = REGULATOR_VOLTAGE,
1124                         .id             = AB8505_LDO_USB,
1125                         .owner          = THIS_MODULE,
1126                         .n_voltages     = 1,
1127                         .volt_table     = fixed_3300000_voltage,
1128                 },
1129                 .update_bank            = 0x03,
1130                 .update_reg             = 0x82,
1131                 .update_mask            = 0x03,
1132                 .update_val             = 0x01,
1133                 .update_val_idle        = 0x03,
1134                 .update_val_normal      = 0x01,
1135         },
1136         [AB8505_LDO_AUDIO] = {
1137                 .desc = {
1138                         .name           = "LDO-AUDIO",
1139                         .ops            = &ab8500_regulator_volt_ops,
1140                         .type           = REGULATOR_VOLTAGE,
1141                         .id             = AB8505_LDO_AUDIO,
1142                         .owner          = THIS_MODULE,
1143                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
1144                         .volt_table     = ldo_vaudio_voltages,
1145                 },
1146                 .update_bank            = 0x03,
1147                 .update_reg             = 0x83,
1148                 .update_mask            = 0x02,
1149                 .update_val             = 0x02,
1150                 .voltage_bank           = 0x01,
1151                 .voltage_reg            = 0x57,
1152                 .voltage_mask           = 0x7,
1153                 .voltage_shift          = 4,
1154                 .voltages               = ldo_vaudio_voltages,
1155                 .voltages_len           = ARRAY_SIZE(ldo_vaudio_voltages),
1156         },
1157         [AB8505_LDO_ANAMIC1] = {
1158                 .desc = {
1159                         .name           = "LDO-ANAMIC1",
1160                         .ops            = &ab8500_regulator_anamic_mode_ops,
1161                         .type           = REGULATOR_VOLTAGE,
1162                         .id             = AB8505_LDO_ANAMIC1,
1163                         .owner          = THIS_MODULE,
1164                         .n_voltages     = 1,
1165                         .volt_table     = fixed_2050000_voltage,
1166                 },
1167                 .shared_mode            = &ldo_anamic1_shared,
1168                 .update_bank            = 0x03,
1169                 .update_reg             = 0x83,
1170                 .update_mask            = 0x08,
1171                 .update_val             = 0x08,
1172                 .mode_bank              = 0x01,
1173                 .mode_reg               = 0x54,
1174                 .mode_mask              = 0x04,
1175                 .mode_val_idle          = 0x04,
1176                 .mode_val_normal        = 0x00,
1177         },
1178         [AB8505_LDO_ANAMIC2] = {
1179                 .desc = {
1180                         .name           = "LDO-ANAMIC2",
1181                         .ops            = &ab8500_regulator_anamic_mode_ops,
1182                         .type           = REGULATOR_VOLTAGE,
1183                         .id             = AB8505_LDO_ANAMIC2,
1184                         .owner          = THIS_MODULE,
1185                         .n_voltages     = 1,
1186                         .volt_table     = fixed_2050000_voltage,
1187                 },
1188                 .shared_mode            = &ldo_anamic2_shared,
1189                 .update_bank            = 0x03,
1190                 .update_reg             = 0x83,
1191                 .update_mask            = 0x10,
1192                 .update_val             = 0x10,
1193                 .mode_bank              = 0x01,
1194                 .mode_reg               = 0x54,
1195                 .mode_mask              = 0x04,
1196                 .mode_val_idle          = 0x04,
1197                 .mode_val_normal        = 0x00,
1198         },
1199         [AB8505_LDO_AUX8] = {
1200                 .desc = {
1201                         .name           = "LDO-AUX8",
1202                         .ops            = &ab8500_regulator_ops,
1203                         .type           = REGULATOR_VOLTAGE,
1204                         .id             = AB8505_LDO_AUX8,
1205                         .owner          = THIS_MODULE,
1206                         .n_voltages     = 1,
1207                         .volt_table     = fixed_1800000_voltage,
1208                 },
1209                 .update_bank            = 0x03,
1210                 .update_reg             = 0x83,
1211                 .update_mask            = 0x04,
1212                 .update_val             = 0x04,
1213         },
1214         /*
1215          * Regulators with fixed voltage and normal/idle modes
1216          */
1217         [AB8505_LDO_ANA] = {
1218                 .desc = {
1219                         .name           = "LDO-ANA",
1220                         .ops            = &ab8500_regulator_volt_mode_ops,
1221                         .type           = REGULATOR_VOLTAGE,
1222                         .id             = AB8505_LDO_ANA,
1223                         .owner          = THIS_MODULE,
1224                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1225                         .volt_table     = ldo_vana_voltages,
1226                 },
1227                 .load_lp_uA             = 1000,
1228                 .update_bank            = 0x04,
1229                 .update_reg             = 0x06,
1230                 .update_mask            = 0x0c,
1231                 .update_val             = 0x04,
1232                 .update_val_idle        = 0x0c,
1233                 .update_val_normal      = 0x04,
1234                 .voltage_bank           = 0x04,
1235                 .voltage_reg            = 0x29,
1236                 .voltage_mask           = 0x7,
1237                 .voltages               = ldo_vana_voltages,
1238                 .voltages_len           = ARRAY_SIZE(ldo_vana_voltages),
1239         },
1240 };
1241
1242 /* AB9540 regulator information */
1243 static struct ab8500_regulator_info
1244                 ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
1245         /*
1246          * Variable Voltage Regulators
1247          *   name, min mV, max mV,
1248          *   update bank, reg, mask, enable val
1249          *   volt bank, reg, mask, table, table length
1250          */
1251         [AB9540_LDO_AUX1] = {
1252                 .desc = {
1253                         .name           = "LDO-AUX1",
1254                         .ops            = &ab8500_regulator_volt_mode_ops,
1255                         .type           = REGULATOR_VOLTAGE,
1256                         .id             = AB9540_LDO_AUX1,
1257                         .owner          = THIS_MODULE,
1258                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1259                         .volt_table     = ldo_vauxn_voltages,
1260                 },
1261                 .load_lp_uA             = 5000,
1262                 .update_bank            = 0x04,
1263                 .update_reg             = 0x09,
1264                 .update_mask            = 0x03,
1265                 .update_val             = 0x01,
1266                 .update_val_idle        = 0x03,
1267                 .update_val_normal      = 0x01,
1268                 .voltage_bank           = 0x04,
1269                 .voltage_reg            = 0x1f,
1270                 .voltage_mask           = 0x0f,
1271         },
1272         [AB9540_LDO_AUX2] = {
1273                 .desc = {
1274                         .name           = "LDO-AUX2",
1275                         .ops            = &ab8500_regulator_volt_mode_ops,
1276                         .type           = REGULATOR_VOLTAGE,
1277                         .id             = AB9540_LDO_AUX2,
1278                         .owner          = THIS_MODULE,
1279                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1280                         .volt_table     = ldo_vauxn_voltages,
1281                 },
1282                 .load_lp_uA             = 5000,
1283                 .update_bank            = 0x04,
1284                 .update_reg             = 0x09,
1285                 .update_mask            = 0x0c,
1286                 .update_val             = 0x04,
1287                 .update_val_idle        = 0x0c,
1288                 .update_val_normal      = 0x04,
1289                 .voltage_bank           = 0x04,
1290                 .voltage_reg            = 0x20,
1291                 .voltage_mask           = 0x0f,
1292         },
1293         [AB9540_LDO_AUX3] = {
1294                 .desc = {
1295                         .name           = "LDO-AUX3",
1296                         .ops            = &ab8500_regulator_volt_mode_ops,
1297                         .type           = REGULATOR_VOLTAGE,
1298                         .id             = AB9540_LDO_AUX3,
1299                         .owner          = THIS_MODULE,
1300                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
1301                         .volt_table     = ldo_vaux3_voltages,
1302                 },
1303                 .load_lp_uA             = 5000,
1304                 .update_bank            = 0x04,
1305                 .update_reg             = 0x0a,
1306                 .update_mask            = 0x03,
1307                 .update_val             = 0x01,
1308                 .update_val_idle        = 0x03,
1309                 .update_val_normal      = 0x01,
1310                 .voltage_bank           = 0x04,
1311                 .voltage_reg            = 0x21,
1312                 .voltage_mask           = 0x07,
1313         },
1314         [AB9540_LDO_AUX4] = {
1315                 .desc = {
1316                         .name           = "LDO-AUX4",
1317                         .ops            = &ab8500_regulator_volt_mode_ops,
1318                         .type           = REGULATOR_VOLTAGE,
1319                         .id             = AB9540_LDO_AUX4,
1320                         .owner          = THIS_MODULE,
1321                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1322                         .volt_table     = ldo_vauxn_voltages,
1323                 },
1324                 .load_lp_uA             = 5000,
1325                 /* values for Vaux4Regu register */
1326                 .update_bank            = 0x04,
1327                 .update_reg             = 0x2e,
1328                 .update_mask            = 0x03,
1329                 .update_val             = 0x01,
1330                 .update_val_idle        = 0x03,
1331                 .update_val_normal      = 0x01,
1332                 /* values for Vaux4SEL register */
1333                 .voltage_bank           = 0x04,
1334                 .voltage_reg            = 0x2f,
1335                 .voltage_mask           = 0x0f,
1336         },
1337         [AB9540_LDO_INTCORE] = {
1338                 .desc = {
1339                         .name           = "LDO-INTCORE",
1340                         .ops            = &ab8500_regulator_volt_mode_ops,
1341                         .type           = REGULATOR_VOLTAGE,
1342                         .id             = AB9540_LDO_INTCORE,
1343                         .owner          = THIS_MODULE,
1344                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1345                         .volt_table     = ldo_vintcore_voltages,
1346                 },
1347                 .load_lp_uA             = 5000,
1348                 .update_bank            = 0x03,
1349                 .update_reg             = 0x80,
1350                 .update_mask            = 0x44,
1351                 .update_val             = 0x44,
1352                 .update_val_idle        = 0x44,
1353                 .update_val_normal      = 0x04,
1354                 .voltage_bank           = 0x03,
1355                 .voltage_reg            = 0x80,
1356                 .voltage_mask           = 0x38,
1357                 .voltage_shift          = 3,
1358         },
1359
1360         /*
1361          * Fixed Voltage Regulators
1362          *   name, fixed mV,
1363          *   update bank, reg, mask, enable val
1364          */
1365         [AB9540_LDO_TVOUT] = {
1366                 .desc = {
1367                         .name           = "LDO-TVOUT",
1368                         .ops            = &ab8500_regulator_mode_ops,
1369                         .type           = REGULATOR_VOLTAGE,
1370                         .id             = AB9540_LDO_TVOUT,
1371                         .owner          = THIS_MODULE,
1372                         .n_voltages     = 1,
1373                         .volt_table     = fixed_2000000_voltage,
1374                         .enable_time    = 10000,
1375                 },
1376                 .load_lp_uA             = 1000,
1377                 .update_bank            = 0x03,
1378                 .update_reg             = 0x80,
1379                 .update_mask            = 0x82,
1380                 .update_val             = 0x02,
1381                 .update_val_idle        = 0x82,
1382                 .update_val_normal      = 0x02,
1383         },
1384         [AB9540_LDO_USB] = {
1385                 .desc = {
1386                         .name           = "LDO-USB",
1387                         .ops            = &ab8500_regulator_ops,
1388                         .type           = REGULATOR_VOLTAGE,
1389                         .id             = AB9540_LDO_USB,
1390                         .owner          = THIS_MODULE,
1391                         .n_voltages     = 1,
1392                         .volt_table     = fixed_3300000_voltage,
1393                 },
1394                 .update_bank            = 0x03,
1395                 .update_reg             = 0x82,
1396                 .update_mask            = 0x03,
1397                 .update_val             = 0x01,
1398                 .update_val_idle        = 0x03,
1399                 .update_val_normal      = 0x01,
1400         },
1401         [AB9540_LDO_AUDIO] = {
1402                 .desc = {
1403                         .name           = "LDO-AUDIO",
1404                         .ops            = &ab8500_regulator_ops,
1405                         .type           = REGULATOR_VOLTAGE,
1406                         .id             = AB9540_LDO_AUDIO,
1407                         .owner          = THIS_MODULE,
1408                         .n_voltages     = 1,
1409                         .volt_table     = fixed_2000000_voltage,
1410                 },
1411                 .update_bank            = 0x03,
1412                 .update_reg             = 0x83,
1413                 .update_mask            = 0x02,
1414                 .update_val             = 0x02,
1415         },
1416         [AB9540_LDO_ANAMIC1] = {
1417                 .desc = {
1418                         .name           = "LDO-ANAMIC1",
1419                         .ops            = &ab8500_regulator_ops,
1420                         .type           = REGULATOR_VOLTAGE,
1421                         .id             = AB9540_LDO_ANAMIC1,
1422                         .owner          = THIS_MODULE,
1423                         .n_voltages     = 1,
1424                         .volt_table     = fixed_2050000_voltage,
1425                 },
1426                 .update_bank            = 0x03,
1427                 .update_reg             = 0x83,
1428                 .update_mask            = 0x08,
1429                 .update_val             = 0x08,
1430         },
1431         [AB9540_LDO_ANAMIC2] = {
1432                 .desc = {
1433                         .name           = "LDO-ANAMIC2",
1434                         .ops            = &ab8500_regulator_ops,
1435                         .type           = REGULATOR_VOLTAGE,
1436                         .id             = AB9540_LDO_ANAMIC2,
1437                         .owner          = THIS_MODULE,
1438                         .n_voltages     = 1,
1439                         .volt_table     = fixed_2050000_voltage,
1440                 },
1441                 .update_bank            = 0x03,
1442                 .update_reg             = 0x83,
1443                 .update_mask            = 0x10,
1444                 .update_val             = 0x10,
1445         },
1446         [AB9540_LDO_DMIC] = {
1447                 .desc = {
1448                         .name           = "LDO-DMIC",
1449                         .ops            = &ab8500_regulator_ops,
1450                         .type           = REGULATOR_VOLTAGE,
1451                         .id             = AB9540_LDO_DMIC,
1452                         .owner          = THIS_MODULE,
1453                         .n_voltages     = 1,
1454                         .volt_table     = fixed_1800000_voltage,
1455                 },
1456                 .update_bank            = 0x03,
1457                 .update_reg             = 0x83,
1458                 .update_mask            = 0x04,
1459                 .update_val             = 0x04,
1460         },
1461
1462         /*
1463          * Regulators with fixed voltage and normal/idle modes
1464          */
1465         [AB9540_LDO_ANA] = {
1466                 .desc = {
1467                         .name           = "LDO-ANA",
1468                         .ops            = &ab8500_regulator_mode_ops,
1469                         .type           = REGULATOR_VOLTAGE,
1470                         .id             = AB9540_LDO_ANA,
1471                         .owner          = THIS_MODULE,
1472                         .n_voltages     = 1,
1473                         .volt_table     = fixed_1200000_voltage,
1474                 },
1475                 .load_lp_uA             = 1000,
1476                 .update_bank            = 0x04,
1477                 .update_reg             = 0x06,
1478                 .update_mask            = 0x0c,
1479                 .update_val             = 0x08,
1480                 .update_val_idle        = 0x0c,
1481                 .update_val_normal      = 0x08,
1482         },
1483 };
1484
1485 /* AB8540 regulator information */
1486 static struct ab8500_regulator_info
1487                 ab8540_regulator_info[AB8540_NUM_REGULATORS] = {
1488         /*
1489          * Variable Voltage Regulators
1490          *   name, min mV, max mV,
1491          *   update bank, reg, mask, enable val
1492          *   volt bank, reg, mask, table, table length
1493          */
1494         [AB8540_LDO_AUX1] = {
1495                 .desc = {
1496                         .name           = "LDO-AUX1",
1497                         .ops            = &ab8500_regulator_volt_mode_ops,
1498                         .type           = REGULATOR_VOLTAGE,
1499                         .id             = AB8540_LDO_AUX1,
1500                         .owner          = THIS_MODULE,
1501                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1502                         .volt_table     = ldo_vauxn_voltages,
1503                 },
1504                 .load_lp_uA             = 5000,
1505                 .update_bank            = 0x04,
1506                 .update_reg             = 0x09,
1507                 .update_mask            = 0x03,
1508                 .update_val             = 0x01,
1509                 .update_val_idle        = 0x03,
1510                 .update_val_normal      = 0x01,
1511                 .voltage_bank           = 0x04,
1512                 .voltage_reg            = 0x1f,
1513                 .voltage_mask           = 0x0f,
1514         },
1515         [AB8540_LDO_AUX2] = {
1516                 .desc = {
1517                         .name           = "LDO-AUX2",
1518                         .ops            = &ab8500_regulator_volt_mode_ops,
1519                         .type           = REGULATOR_VOLTAGE,
1520                         .id             = AB8540_LDO_AUX2,
1521                         .owner          = THIS_MODULE,
1522                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1523                         .volt_table     = ldo_vauxn_voltages,
1524                 },
1525                 .load_lp_uA             = 5000,
1526                 .update_bank            = 0x04,
1527                 .update_reg             = 0x09,
1528                 .update_mask            = 0x0c,
1529                 .update_val             = 0x04,
1530                 .update_val_idle        = 0x0c,
1531                 .update_val_normal      = 0x04,
1532                 .voltage_bank           = 0x04,
1533                 .voltage_reg            = 0x20,
1534                 .voltage_mask           = 0x0f,
1535         },
1536         [AB8540_LDO_AUX3] = {
1537                 .desc = {
1538                         .name           = "LDO-AUX3",
1539                         .ops            = &ab8540_aux3_regulator_volt_mode_ops,
1540                         .type           = REGULATOR_VOLTAGE,
1541                         .id             = AB8540_LDO_AUX3,
1542                         .owner          = THIS_MODULE,
1543                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_ab8540_voltages),
1544                         .volt_table     = ldo_vaux3_ab8540_voltages,
1545                 },
1546                 .load_lp_uA             = 5000,
1547                 .update_bank            = 0x04,
1548                 .update_reg             = 0x0a,
1549                 .update_mask            = 0x03,
1550                 .update_val             = 0x01,
1551                 .update_val_idle        = 0x03,
1552                 .update_val_normal      = 0x01,
1553                 .voltage_bank           = 0x04,
1554                 .voltage_reg            = 0x21,
1555                 .voltage_mask           = 0x07,
1556                 .expand_register = {
1557                         .voltage_limit          = 8,
1558                         .voltage_bank           = 0x04,
1559                         .voltage_reg            = 0x01,
1560                         .voltage_mask           = 0x10,
1561                         .voltage_shift          = 1,
1562                 }
1563         },
1564         [AB8540_LDO_AUX4] = {
1565                 .desc = {
1566                         .name           = "LDO-AUX4",
1567                         .ops            = &ab8500_regulator_volt_mode_ops,
1568                         .type           = REGULATOR_VOLTAGE,
1569                         .id             = AB8540_LDO_AUX4,
1570                         .owner          = THIS_MODULE,
1571                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1572                         .volt_table     = ldo_vauxn_voltages,
1573                 },
1574                 .load_lp_uA             = 5000,
1575                 /* values for Vaux4Regu register */
1576                 .update_bank            = 0x04,
1577                 .update_reg             = 0x2e,
1578                 .update_mask            = 0x03,
1579                 .update_val             = 0x01,
1580                 .update_val_idle        = 0x03,
1581                 .update_val_normal      = 0x01,
1582                 /* values for Vaux4SEL register */
1583                 .voltage_bank           = 0x04,
1584                 .voltage_reg            = 0x2f,
1585                 .voltage_mask           = 0x0f,
1586         },
1587         [AB8540_LDO_AUX5] = {
1588                 .desc = {
1589                         .name           = "LDO-AUX5",
1590                         .ops            = &ab8500_regulator_volt_mode_ops,
1591                         .type           = REGULATOR_VOLTAGE,
1592                         .id             = AB8540_LDO_AUX5,
1593                         .owner          = THIS_MODULE,
1594                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1595                 },
1596                 .load_lp_uA             = 20000,
1597                 /* values for Vaux5Regu register */
1598                 .update_bank            = 0x04,
1599                 .update_reg             = 0x32,
1600                 .update_mask            = 0x03,
1601                 .update_val             = 0x01,
1602                 .update_val_idle        = 0x03,
1603                 .update_val_normal      = 0x01,
1604                 /* values for Vaux5SEL register */
1605                 .voltage_bank           = 0x04,
1606                 .voltage_reg            = 0x33,
1607                 .voltage_mask           = 0x3f,
1608                 .voltages               = ldo_vaux56_ab8540_voltages,
1609                 .voltages_len           = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1610         },
1611         [AB8540_LDO_AUX6] = {
1612                 .desc = {
1613                         .name           = "LDO-AUX6",
1614                         .ops            = &ab8500_regulator_volt_mode_ops,
1615                         .type           = REGULATOR_VOLTAGE,
1616                         .id             = AB8540_LDO_AUX6,
1617                         .owner          = THIS_MODULE,
1618                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1619                 },
1620                 .load_lp_uA             = 20000,
1621                 /* values for Vaux6Regu register */
1622                 .update_bank            = 0x04,
1623                 .update_reg             = 0x35,
1624                 .update_mask            = 0x03,
1625                 .update_val             = 0x01,
1626                 .update_val_idle        = 0x03,
1627                 .update_val_normal      = 0x01,
1628                 /* values for Vaux6SEL register */
1629                 .voltage_bank           = 0x04,
1630                 .voltage_reg            = 0x36,
1631                 .voltage_mask           = 0x3f,
1632                 .voltages               = ldo_vaux56_ab8540_voltages,
1633                 .voltages_len           = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1634         },
1635         [AB8540_LDO_INTCORE] = {
1636                 .desc = {
1637                         .name           = "LDO-INTCORE",
1638                         .ops            = &ab8500_regulator_volt_mode_ops,
1639                         .type           = REGULATOR_VOLTAGE,
1640                         .id             = AB8540_LDO_INTCORE,
1641                         .owner          = THIS_MODULE,
1642                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1643                         .volt_table     = ldo_vintcore_voltages,
1644                 },
1645                 .load_lp_uA             = 5000,
1646                 .update_bank            = 0x03,
1647                 .update_reg             = 0x80,
1648                 .update_mask            = 0x44,
1649                 .update_val             = 0x44,
1650                 .update_val_idle        = 0x44,
1651                 .update_val_normal      = 0x04,
1652                 .voltage_bank           = 0x03,
1653                 .voltage_reg            = 0x80,
1654                 .voltage_mask           = 0x38,
1655                 .voltage_shift          = 3,
1656         },
1657
1658         /*
1659          * Fixed Voltage Regulators
1660          *   name, fixed mV,
1661          *   update bank, reg, mask, enable val
1662          */
1663         [AB8540_LDO_TVOUT] = {
1664                 .desc = {
1665                         .name           = "LDO-TVOUT",
1666                         .ops            = &ab8500_regulator_mode_ops,
1667                         .type           = REGULATOR_VOLTAGE,
1668                         .id             = AB8540_LDO_TVOUT,
1669                         .owner          = THIS_MODULE,
1670                         .n_voltages     = 1,
1671                         .enable_time    = 10000,
1672                 },
1673                 .load_lp_uA             = 1000,
1674                 .update_bank            = 0x03,
1675                 .update_reg             = 0x80,
1676                 .update_mask            = 0x82,
1677                 .update_val             = 0x02,
1678                 .update_val_idle        = 0x82,
1679                 .update_val_normal      = 0x02,
1680         },
1681         [AB8540_LDO_AUDIO] = {
1682                 .desc = {
1683                         .name           = "LDO-AUDIO",
1684                         .ops            = &ab8500_regulator_ops,
1685                         .type           = REGULATOR_VOLTAGE,
1686                         .id             = AB8540_LDO_AUDIO,
1687                         .owner          = THIS_MODULE,
1688                         .n_voltages     = 1,
1689                         .volt_table     = fixed_2000000_voltage,
1690                 },
1691                 .update_bank            = 0x03,
1692                 .update_reg             = 0x83,
1693                 .update_mask            = 0x02,
1694                 .update_val             = 0x02,
1695         },
1696         [AB8540_LDO_ANAMIC1] = {
1697                 .desc = {
1698                         .name           = "LDO-ANAMIC1",
1699                         .ops            = &ab8500_regulator_anamic_mode_ops,
1700                         .type           = REGULATOR_VOLTAGE,
1701                         .id             = AB8540_LDO_ANAMIC1,
1702                         .owner          = THIS_MODULE,
1703                         .n_voltages     = 1,
1704                         .volt_table     = fixed_2050000_voltage,
1705                 },
1706                 .shared_mode            = &ab8540_ldo_anamic1_shared,
1707                 .update_bank            = 0x03,
1708                 .update_reg             = 0x83,
1709                 .update_mask            = 0x08,
1710                 .update_val             = 0x08,
1711                 .mode_bank              = 0x03,
1712                 .mode_reg               = 0x83,
1713                 .mode_mask              = 0x20,
1714                 .mode_val_idle          = 0x20,
1715                 .mode_val_normal        = 0x00,
1716         },
1717         [AB8540_LDO_ANAMIC2] = {
1718                 .desc = {
1719                         .name           = "LDO-ANAMIC2",
1720                         .ops            = &ab8500_regulator_anamic_mode_ops,
1721                         .type           = REGULATOR_VOLTAGE,
1722                         .id             = AB8540_LDO_ANAMIC2,
1723                         .owner          = THIS_MODULE,
1724                         .n_voltages     = 1,
1725                         .volt_table     = fixed_2050000_voltage,
1726                 },
1727                 .shared_mode            = &ab8540_ldo_anamic2_shared,
1728                 .update_bank            = 0x03,
1729                 .update_reg             = 0x83,
1730                 .update_mask            = 0x10,
1731                 .update_val             = 0x10,
1732                 .mode_bank              = 0x03,
1733                 .mode_reg               = 0x83,
1734                 .mode_mask              = 0x20,
1735                 .mode_val_idle          = 0x20,
1736                 .mode_val_normal        = 0x00,
1737         },
1738         [AB8540_LDO_DMIC] = {
1739                 .desc = {
1740                         .name           = "LDO-DMIC",
1741                         .ops            = &ab8500_regulator_volt_mode_ops,
1742                         .type           = REGULATOR_VOLTAGE,
1743                         .id             = AB8540_LDO_DMIC,
1744                         .owner          = THIS_MODULE,
1745                         .n_voltages     = ARRAY_SIZE(ldo_vdmic_voltages),
1746                 },
1747                 .load_lp_uA             = 1000,
1748                 .update_bank            = 0x03,
1749                 .update_reg             = 0x83,
1750                 .update_mask            = 0x04,
1751                 .update_val             = 0x04,
1752                 .voltage_bank           = 0x03,
1753                 .voltage_reg            = 0x83,
1754                 .voltage_mask           = 0xc0,
1755                 .voltages               = ldo_vdmic_voltages,
1756                 .voltages_len           = ARRAY_SIZE(ldo_vdmic_voltages),
1757         },
1758
1759         /*
1760          * Regulators with fixed voltage and normal/idle modes
1761          */
1762         [AB8540_LDO_ANA] = {
1763                 .desc = {
1764                         .name           = "LDO-ANA",
1765                         .ops            = &ab8500_regulator_mode_ops,
1766                         .type           = REGULATOR_VOLTAGE,
1767                         .id             = AB8540_LDO_ANA,
1768                         .owner          = THIS_MODULE,
1769                         .n_voltages     = 1,
1770                         .volt_table     = fixed_1200000_voltage,
1771                 },
1772                 .load_lp_uA             = 1000,
1773                 .update_bank            = 0x04,
1774                 .update_reg             = 0x06,
1775                 .update_mask            = 0x0c,
1776                 .update_val             = 0x04,
1777                 .update_val_idle        = 0x0c,
1778                 .update_val_normal      = 0x04,
1779         },
1780         [AB8540_LDO_SDIO] = {
1781                 .desc = {
1782                         .name           = "LDO-SDIO",
1783                         .ops            = &ab8500_regulator_volt_mode_ops,
1784                         .type           = REGULATOR_VOLTAGE,
1785                         .id             = AB8540_LDO_SDIO,
1786                         .owner          = THIS_MODULE,
1787                         .n_voltages     = ARRAY_SIZE(ldo_sdio_voltages),
1788                         .volt_table     = ldo_sdio_voltages,
1789                 },
1790                 .load_lp_uA             = 5000,
1791                 .update_bank            = 0x03,
1792                 .update_reg             = 0x88,
1793                 .update_mask            = 0x30,
1794                 .update_val             = 0x10,
1795                 .update_val_idle        = 0x30,
1796                 .update_val_normal      = 0x10,
1797                 .voltage_bank           = 0x03,
1798                 .voltage_reg            = 0x88,
1799                 .voltage_mask           = 0x07,
1800         },
1801 };
1802
1803 static struct ab8500_shared_mode ldo_anamic1_shared = {
1804         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1805 };
1806
1807 static struct ab8500_shared_mode ldo_anamic2_shared = {
1808         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1809 };
1810
1811 static struct ab8500_shared_mode ab8540_ldo_anamic1_shared = {
1812         .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC2],
1813 };
1814
1815 static struct ab8500_shared_mode ab8540_ldo_anamic2_shared = {
1816         .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC1],
1817 };
1818
1819 struct ab8500_reg_init {
1820         u8 bank;
1821         u8 addr;
1822         u8 mask;
1823 };
1824
1825 #define REG_INIT(_id, _bank, _addr, _mask)      \
1826         [_id] = {                               \
1827                 .bank = _bank,                  \
1828                 .addr = _addr,                  \
1829                 .mask = _mask,                  \
1830         }
1831
1832 /* AB8500 register init */
1833 static struct ab8500_reg_init ab8500_reg_init[] = {
1834         /*
1835          * 0x30, VanaRequestCtrl
1836          * 0xc0, VextSupply1RequestCtrl
1837          */
1838         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1839         /*
1840          * 0x03, VextSupply2RequestCtrl
1841          * 0x0c, VextSupply3RequestCtrl
1842          * 0x30, Vaux1RequestCtrl
1843          * 0xc0, Vaux2RequestCtrl
1844          */
1845         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1846         /*
1847          * 0x03, Vaux3RequestCtrl
1848          * 0x04, SwHPReq
1849          */
1850         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1851         /*
1852          * 0x08, VanaSysClkReq1HPValid
1853          * 0x20, Vaux1SysClkReq1HPValid
1854          * 0x40, Vaux2SysClkReq1HPValid
1855          * 0x80, Vaux3SysClkReq1HPValid
1856          */
1857         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1858         /*
1859          * 0x10, VextSupply1SysClkReq1HPValid
1860          * 0x20, VextSupply2SysClkReq1HPValid
1861          * 0x40, VextSupply3SysClkReq1HPValid
1862          */
1863         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1864         /*
1865          * 0x08, VanaHwHPReq1Valid
1866          * 0x20, Vaux1HwHPReq1Valid
1867          * 0x40, Vaux2HwHPReq1Valid
1868          * 0x80, Vaux3HwHPReq1Valid
1869          */
1870         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1871         /*
1872          * 0x01, VextSupply1HwHPReq1Valid
1873          * 0x02, VextSupply2HwHPReq1Valid
1874          * 0x04, VextSupply3HwHPReq1Valid
1875          */
1876         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1877         /*
1878          * 0x08, VanaHwHPReq2Valid
1879          * 0x20, Vaux1HwHPReq2Valid
1880          * 0x40, Vaux2HwHPReq2Valid
1881          * 0x80, Vaux3HwHPReq2Valid
1882          */
1883         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1884         /*
1885          * 0x01, VextSupply1HwHPReq2Valid
1886          * 0x02, VextSupply2HwHPReq2Valid
1887          * 0x04, VextSupply3HwHPReq2Valid
1888          */
1889         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1890         /*
1891          * 0x20, VanaSwHPReqValid
1892          * 0x80, Vaux1SwHPReqValid
1893          */
1894         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1895         /*
1896          * 0x01, Vaux2SwHPReqValid
1897          * 0x02, Vaux3SwHPReqValid
1898          * 0x04, VextSupply1SwHPReqValid
1899          * 0x08, VextSupply2SwHPReqValid
1900          * 0x10, VextSupply3SwHPReqValid
1901          */
1902         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1903         /*
1904          * 0x02, SysClkReq2Valid1
1905          * 0x04, SysClkReq3Valid1
1906          * 0x08, SysClkReq4Valid1
1907          * 0x10, SysClkReq5Valid1
1908          * 0x20, SysClkReq6Valid1
1909          * 0x40, SysClkReq7Valid1
1910          * 0x80, SysClkReq8Valid1
1911          */
1912         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1913         /*
1914          * 0x02, SysClkReq2Valid2
1915          * 0x04, SysClkReq3Valid2
1916          * 0x08, SysClkReq4Valid2
1917          * 0x10, SysClkReq5Valid2
1918          * 0x20, SysClkReq6Valid2
1919          * 0x40, SysClkReq7Valid2
1920          * 0x80, SysClkReq8Valid2
1921          */
1922         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1923         /*
1924          * 0x02, VTVoutEna
1925          * 0x04, Vintcore12Ena
1926          * 0x38, Vintcore12Sel
1927          * 0x40, Vintcore12LP
1928          * 0x80, VTVoutLP
1929          */
1930         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1931         /*
1932          * 0x02, VaudioEna
1933          * 0x04, VdmicEna
1934          * 0x08, Vamic1Ena
1935          * 0x10, Vamic2Ena
1936          */
1937         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1938         /*
1939          * 0x01, Vamic1_dzout
1940          * 0x02, Vamic2_dzout
1941          */
1942         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1943         /*
1944          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1945          * 0x0c, VanaRegu
1946          */
1947         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1948         /*
1949          * 0x01, VrefDDREna
1950          * 0x02, VrefDDRSleepMode
1951          */
1952         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1953         /*
1954          * 0x03, VextSupply1Regu
1955          * 0x0c, VextSupply2Regu
1956          * 0x30, VextSupply3Regu
1957          * 0x40, ExtSupply2Bypass
1958          * 0x80, ExtSupply3Bypass
1959          */
1960         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1961         /*
1962          * 0x03, Vaux1Regu
1963          * 0x0c, Vaux2Regu
1964          */
1965         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1966         /*
1967          * 0x03, Vaux3Regu
1968          */
1969         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1970         /*
1971          * 0x0f, Vaux1Sel
1972          */
1973         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1974         /*
1975          * 0x0f, Vaux2Sel
1976          */
1977         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1978         /*
1979          * 0x07, Vaux3Sel
1980          */
1981         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1982         /*
1983          * 0x01, VextSupply12LP
1984          */
1985         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1986         /*
1987          * 0x04, Vaux1Disch
1988          * 0x08, Vaux2Disch
1989          * 0x10, Vaux3Disch
1990          * 0x20, Vintcore12Disch
1991          * 0x40, VTVoutDisch
1992          * 0x80, VaudioDisch
1993          */
1994         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1995         /*
1996          * 0x02, VanaDisch
1997          * 0x04, VdmicPullDownEna
1998          * 0x10, VdmicDisch
1999          */
2000         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
2001 };
2002
2003 /* AB8505 register init */
2004 static struct ab8500_reg_init ab8505_reg_init[] = {
2005         /*
2006          * 0x03, VarmRequestCtrl
2007          * 0x0c, VsmpsCRequestCtrl
2008          * 0x30, VsmpsARequestCtrl
2009          * 0xc0, VsmpsBRequestCtrl
2010          */
2011         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2012         /*
2013          * 0x03, VsafeRequestCtrl
2014          * 0x0c, VpllRequestCtrl
2015          * 0x30, VanaRequestCtrl
2016          */
2017         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
2018         /*
2019          * 0x30, Vaux1RequestCtrl
2020          * 0xc0, Vaux2RequestCtrl
2021          */
2022         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
2023         /*
2024          * 0x03, Vaux3RequestCtrl
2025          * 0x04, SwHPReq
2026          */
2027         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2028         /*
2029          * 0x01, VsmpsASysClkReq1HPValid
2030          * 0x02, VsmpsBSysClkReq1HPValid
2031          * 0x04, VsafeSysClkReq1HPValid
2032          * 0x08, VanaSysClkReq1HPValid
2033          * 0x10, VpllSysClkReq1HPValid
2034          * 0x20, Vaux1SysClkReq1HPValid
2035          * 0x40, Vaux2SysClkReq1HPValid
2036          * 0x80, Vaux3SysClkReq1HPValid
2037          */
2038         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2039         /*
2040          * 0x01, VsmpsCSysClkReq1HPValid
2041          * 0x02, VarmSysClkReq1HPValid
2042          * 0x04, VbbSysClkReq1HPValid
2043          * 0x08, VsmpsMSysClkReq1HPValid
2044          */
2045         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
2046         /*
2047          * 0x01, VsmpsAHwHPReq1Valid
2048          * 0x02, VsmpsBHwHPReq1Valid
2049          * 0x04, VsafeHwHPReq1Valid
2050          * 0x08, VanaHwHPReq1Valid
2051          * 0x10, VpllHwHPReq1Valid
2052          * 0x20, Vaux1HwHPReq1Valid
2053          * 0x40, Vaux2HwHPReq1Valid
2054          * 0x80, Vaux3HwHPReq1Valid
2055          */
2056         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2057         /*
2058          * 0x08, VsmpsMHwHPReq1Valid
2059          */
2060         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
2061         /*
2062          * 0x01, VsmpsAHwHPReq2Valid
2063          * 0x02, VsmpsBHwHPReq2Valid
2064          * 0x04, VsafeHwHPReq2Valid
2065          * 0x08, VanaHwHPReq2Valid
2066          * 0x10, VpllHwHPReq2Valid
2067          * 0x20, Vaux1HwHPReq2Valid
2068          * 0x40, Vaux2HwHPReq2Valid
2069          * 0x80, Vaux3HwHPReq2Valid
2070          */
2071         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2072         /*
2073          * 0x08, VsmpsMHwHPReq2Valid
2074          */
2075         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
2076         /*
2077          * 0x01, VsmpsCSwHPReqValid
2078          * 0x02, VarmSwHPReqValid
2079          * 0x04, VsmpsASwHPReqValid
2080          * 0x08, VsmpsBSwHPReqValid
2081          * 0x10, VsafeSwHPReqValid
2082          * 0x20, VanaSwHPReqValid
2083          * 0x40, VpllSwHPReqValid
2084          * 0x80, Vaux1SwHPReqValid
2085          */
2086         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2087         /*
2088          * 0x01, Vaux2SwHPReqValid
2089          * 0x02, Vaux3SwHPReqValid
2090          * 0x20, VsmpsMSwHPReqValid
2091          */
2092         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
2093         /*
2094          * 0x02, SysClkReq2Valid1
2095          * 0x04, SysClkReq3Valid1
2096          * 0x08, SysClkReq4Valid1
2097          */
2098         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
2099         /*
2100          * 0x02, SysClkReq2Valid2
2101          * 0x04, SysClkReq3Valid2
2102          * 0x08, SysClkReq4Valid2
2103          */
2104         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
2105         /*
2106          * 0x01, Vaux4SwHPReqValid
2107          * 0x02, Vaux4HwHPReq2Valid
2108          * 0x04, Vaux4HwHPReq1Valid
2109          * 0x08, Vaux4SysClkReq1HPValid
2110          */
2111         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2112         /*
2113          * 0x02, VadcEna
2114          * 0x04, VintCore12Ena
2115          * 0x38, VintCore12Sel
2116          * 0x40, VintCore12LP
2117          * 0x80, VadcLP
2118          */
2119         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
2120         /*
2121          * 0x02, VaudioEna
2122          * 0x04, VdmicEna
2123          * 0x08, Vamic1Ena
2124          * 0x10, Vamic2Ena
2125          */
2126         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2127         /*
2128          * 0x01, Vamic1_dzout
2129          * 0x02, Vamic2_dzout
2130          */
2131         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2132         /*
2133          * 0x03, VsmpsARegu
2134          * 0x0c, VsmpsASelCtrl
2135          * 0x10, VsmpsAAutoMode
2136          * 0x20, VsmpsAPWMMode
2137          */
2138         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
2139         /*
2140          * 0x03, VsmpsBRegu
2141          * 0x0c, VsmpsBSelCtrl
2142          * 0x10, VsmpsBAutoMode
2143          * 0x20, VsmpsBPWMMode
2144          */
2145         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
2146         /*
2147          * 0x03, VsafeRegu
2148          * 0x0c, VsafeSelCtrl
2149          * 0x10, VsafeAutoMode
2150          * 0x20, VsafePWMMode
2151          */
2152         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
2153         /*
2154          * 0x03, VpllRegu (NOTE! PRCMU register bits)
2155          * 0x0c, VanaRegu
2156          */
2157         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2158         /*
2159          * 0x03, VextSupply1Regu
2160          * 0x0c, VextSupply2Regu
2161          * 0x30, VextSupply3Regu
2162          * 0x40, ExtSupply2Bypass
2163          * 0x80, ExtSupply3Bypass
2164          */
2165         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2166         /*
2167          * 0x03, Vaux1Regu
2168          * 0x0c, Vaux2Regu
2169          */
2170         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
2171         /*
2172          * 0x0f, Vaux3Regu
2173          */
2174         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2175         /*
2176          * 0x3f, VsmpsASel1
2177          */
2178         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
2179         /*
2180          * 0x3f, VsmpsASel2
2181          */
2182         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
2183         /*
2184          * 0x3f, VsmpsASel3
2185          */
2186         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
2187         /*
2188          * 0x3f, VsmpsBSel1
2189          */
2190         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
2191         /*
2192          * 0x3f, VsmpsBSel2
2193          */
2194         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
2195         /*
2196          * 0x3f, VsmpsBSel3
2197          */
2198         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
2199         /*
2200          * 0x7f, VsafeSel1
2201          */
2202         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
2203         /*
2204          * 0x3f, VsafeSel2
2205          */
2206         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
2207         /*
2208          * 0x3f, VsafeSel3
2209          */
2210         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
2211         /*
2212          * 0x0f, Vaux1Sel
2213          */
2214         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
2215         /*
2216          * 0x0f, Vaux2Sel
2217          */
2218         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
2219         /*
2220          * 0x07, Vaux3Sel
2221          * 0x30, VRF1Sel
2222          */
2223         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2224         /*
2225          * 0x03, Vaux4RequestCtrl
2226          */
2227         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2228         /*
2229          * 0x03, Vaux4Regu
2230          */
2231         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
2232         /*
2233          * 0x0f, Vaux4Sel
2234          */
2235         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
2236         /*
2237          * 0x04, Vaux1Disch
2238          * 0x08, Vaux2Disch
2239          * 0x10, Vaux3Disch
2240          * 0x20, Vintcore12Disch
2241          * 0x40, VTVoutDisch
2242          * 0x80, VaudioDisch
2243          */
2244         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
2245         /*
2246          * 0x02, VanaDisch
2247          * 0x04, VdmicPullDownEna
2248          * 0x10, VdmicDisch
2249          */
2250         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
2251         /*
2252          * 0x01, Vaux4Disch
2253          */
2254         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2255         /*
2256          * 0x07, Vaux5Sel
2257          * 0x08, Vaux5LP
2258          * 0x10, Vaux5Ena
2259          * 0x20, Vaux5Disch
2260          * 0x40, Vaux5DisSfst
2261          * 0x80, Vaux5DisPulld
2262          */
2263         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
2264         /*
2265          * 0x07, Vaux6Sel
2266          * 0x08, Vaux6LP
2267          * 0x10, Vaux6Ena
2268          * 0x80, Vaux6DisPulld
2269          */
2270         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
2271 };
2272
2273 /* AB9540 register init */
2274 static struct ab8500_reg_init ab9540_reg_init[] = {
2275         /*
2276          * 0x03, VarmRequestCtrl
2277          * 0x0c, VapeRequestCtrl
2278          * 0x30, Vsmps1RequestCtrl
2279          * 0xc0, Vsmps2RequestCtrl
2280          */
2281         REG_INIT(AB9540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2282         /*
2283          * 0x03, Vsmps3RequestCtrl
2284          * 0x0c, VpllRequestCtrl
2285          * 0x30, VanaRequestCtrl
2286          * 0xc0, VextSupply1RequestCtrl
2287          */
2288         REG_INIT(AB9540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2289         /*
2290          * 0x03, VextSupply2RequestCtrl
2291          * 0x0c, VextSupply3RequestCtrl
2292          * 0x30, Vaux1RequestCtrl
2293          * 0xc0, Vaux2RequestCtrl
2294          */
2295         REG_INIT(AB9540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2296         /*
2297          * 0x03, Vaux3RequestCtrl
2298          * 0x04, SwHPReq
2299          */
2300         REG_INIT(AB9540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2301         /*
2302          * 0x01, Vsmps1SysClkReq1HPValid
2303          * 0x02, Vsmps2SysClkReq1HPValid
2304          * 0x04, Vsmps3SysClkReq1HPValid
2305          * 0x08, VanaSysClkReq1HPValid
2306          * 0x10, VpllSysClkReq1HPValid
2307          * 0x20, Vaux1SysClkReq1HPValid
2308          * 0x40, Vaux2SysClkReq1HPValid
2309          * 0x80, Vaux3SysClkReq1HPValid
2310          */
2311         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2312         /*
2313          * 0x01, VapeSysClkReq1HPValid
2314          * 0x02, VarmSysClkReq1HPValid
2315          * 0x04, VbbSysClkReq1HPValid
2316          * 0x08, VmodSysClkReq1HPValid
2317          * 0x10, VextSupply1SysClkReq1HPValid
2318          * 0x20, VextSupply2SysClkReq1HPValid
2319          * 0x40, VextSupply3SysClkReq1HPValid
2320          */
2321         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
2322         /*
2323          * 0x01, Vsmps1HwHPReq1Valid
2324          * 0x02, Vsmps2HwHPReq1Valid
2325          * 0x04, Vsmps3HwHPReq1Valid
2326          * 0x08, VanaHwHPReq1Valid
2327          * 0x10, VpllHwHPReq1Valid
2328          * 0x20, Vaux1HwHPReq1Valid
2329          * 0x40, Vaux2HwHPReq1Valid
2330          * 0x80, Vaux3HwHPReq1Valid
2331          */
2332         REG_INIT(AB9540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2333         /*
2334          * 0x01, VextSupply1HwHPReq1Valid
2335          * 0x02, VextSupply2HwHPReq1Valid
2336          * 0x04, VextSupply3HwHPReq1Valid
2337          * 0x08, VmodHwHPReq1Valid
2338          */
2339         REG_INIT(AB9540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x0f),
2340         /*
2341          * 0x01, Vsmps1HwHPReq2Valid
2342          * 0x02, Vsmps2HwHPReq2Valid
2343          * 0x03, Vsmps3HwHPReq2Valid
2344          * 0x08, VanaHwHPReq2Valid
2345          * 0x10, VpllHwHPReq2Valid
2346          * 0x20, Vaux1HwHPReq2Valid
2347          * 0x40, Vaux2HwHPReq2Valid
2348          * 0x80, Vaux3HwHPReq2Valid
2349          */
2350         REG_INIT(AB9540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2351         /*
2352          * 0x01, VextSupply1HwHPReq2Valid
2353          * 0x02, VextSupply2HwHPReq2Valid
2354          * 0x04, VextSupply3HwHPReq2Valid
2355          * 0x08, VmodHwHPReq2Valid
2356          */
2357         REG_INIT(AB9540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x0f),
2358         /*
2359          * 0x01, VapeSwHPReqValid
2360          * 0x02, VarmSwHPReqValid
2361          * 0x04, Vsmps1SwHPReqValid
2362          * 0x08, Vsmps2SwHPReqValid
2363          * 0x10, Vsmps3SwHPReqValid
2364          * 0x20, VanaSwHPReqValid
2365          * 0x40, VpllSwHPReqValid
2366          * 0x80, Vaux1SwHPReqValid
2367          */
2368         REG_INIT(AB9540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2369         /*
2370          * 0x01, Vaux2SwHPReqValid
2371          * 0x02, Vaux3SwHPReqValid
2372          * 0x04, VextSupply1SwHPReqValid
2373          * 0x08, VextSupply2SwHPReqValid
2374          * 0x10, VextSupply3SwHPReqValid
2375          * 0x20, VmodSwHPReqValid
2376          */
2377         REG_INIT(AB9540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x3f),
2378         /*
2379          * 0x02, SysClkReq2Valid1
2380          * ...
2381          * 0x80, SysClkReq8Valid1
2382          */
2383         REG_INIT(AB9540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
2384         /*
2385          * 0x02, SysClkReq2Valid2
2386          * ...
2387          * 0x80, SysClkReq8Valid2
2388          */
2389         REG_INIT(AB9540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
2390         /*
2391          * 0x01, Vaux4SwHPReqValid
2392          * 0x02, Vaux4HwHPReq2Valid
2393          * 0x04, Vaux4HwHPReq1Valid
2394          * 0x08, Vaux4SysClkReq1HPValid
2395          */
2396         REG_INIT(AB9540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2397         /*
2398          * 0x02, VTVoutEna
2399          * 0x04, Vintcore12Ena
2400          * 0x38, Vintcore12Sel
2401          * 0x40, Vintcore12LP
2402          * 0x80, VTVoutLP
2403          */
2404         REG_INIT(AB9540_REGUMISC1,              0x03, 0x80, 0xfe),
2405         /*
2406          * 0x02, VaudioEna
2407          * 0x04, VdmicEna
2408          * 0x08, Vamic1Ena
2409          * 0x10, Vamic2Ena
2410          */
2411         REG_INIT(AB9540_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2412         /*
2413          * 0x01, Vamic1_dzout
2414          * 0x02, Vamic2_dzout
2415          */
2416         REG_INIT(AB9540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2417         /*
2418          * 0x03, Vsmps1Regu
2419          * 0x0c, Vsmps1SelCtrl
2420          * 0x10, Vsmps1AutoMode
2421          * 0x20, Vsmps1PWMMode
2422          */
2423         REG_INIT(AB9540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2424         /*
2425          * 0x03, Vsmps2Regu
2426          * 0x0c, Vsmps2SelCtrl
2427          * 0x10, Vsmps2AutoMode
2428          * 0x20, Vsmps2PWMMode
2429          */
2430         REG_INIT(AB9540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2431         /*
2432          * 0x03, Vsmps3Regu
2433          * 0x0c, Vsmps3SelCtrl
2434          * NOTE! PRCMU register
2435          */
2436         REG_INIT(AB9540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2437         /*
2438          * 0x03, VpllRegu
2439          * 0x0c, VanaRegu
2440          */
2441         REG_INIT(AB9540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2442         /*
2443          * 0x03, VextSupply1Regu
2444          * 0x0c, VextSupply2Regu
2445          * 0x30, VextSupply3Regu
2446          * 0x40, ExtSupply2Bypass
2447          * 0x80, ExtSupply3Bypass
2448          */
2449         REG_INIT(AB9540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2450         /*
2451          * 0x03, Vaux1Regu
2452          * 0x0c, Vaux2Regu
2453          */
2454         REG_INIT(AB9540_VAUX12REGU,             0x04, 0x09, 0x0f),
2455         /*
2456          * 0x0c, Vrf1Regu
2457          * 0x03, Vaux3Regu
2458          */
2459         REG_INIT(AB9540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2460         /*
2461          * 0x3f, Vsmps1Sel1
2462          */
2463         REG_INIT(AB9540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2464         /*
2465          * 0x3f, Vsmps1Sel2
2466          */
2467         REG_INIT(AB9540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2468         /*
2469          * 0x3f, Vsmps1Sel3
2470          */
2471         REG_INIT(AB9540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2472         /*
2473          * 0x3f, Vsmps2Sel1
2474          */
2475         REG_INIT(AB9540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2476         /*
2477          * 0x3f, Vsmps2Sel2
2478          */
2479         REG_INIT(AB9540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2480         /*
2481          * 0x3f, Vsmps2Sel3
2482          */
2483         REG_INIT(AB9540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2484         /*
2485          * 0x7f, Vsmps3Sel1
2486          * NOTE! PRCMU register
2487          */
2488         REG_INIT(AB9540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2489         /*
2490          * 0x7f, Vsmps3Sel2
2491          * NOTE! PRCMU register
2492          */
2493         REG_INIT(AB9540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2494         /*
2495          * 0x0f, Vaux1Sel
2496          */
2497         REG_INIT(AB9540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2498         /*
2499          * 0x0f, Vaux2Sel
2500          */
2501         REG_INIT(AB9540_VAUX2SEL,               0x04, 0x20, 0x0f),
2502         /*
2503          * 0x07, Vaux3Sel
2504          * 0x30, Vrf1Sel
2505          */
2506         REG_INIT(AB9540_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2507         /*
2508          * 0x01, VextSupply12LP
2509          */
2510         REG_INIT(AB9540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2511         /*
2512          * 0x03, Vaux4RequestCtrl
2513          */
2514         REG_INIT(AB9540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2515         /*
2516          * 0x03, Vaux4Regu
2517          */
2518         REG_INIT(AB9540_VAUX4REGU,              0x04, 0x2e, 0x03),
2519         /*
2520          * 0x08, Vaux4Sel
2521          */
2522         REG_INIT(AB9540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2523         /*
2524          * 0x01, VpllDisch
2525          * 0x02, Vrf1Disch
2526          * 0x04, Vaux1Disch
2527          * 0x08, Vaux2Disch
2528          * 0x10, Vaux3Disch
2529          * 0x20, Vintcore12Disch
2530          * 0x40, VTVoutDisch
2531          * 0x80, VaudioDisch
2532          */
2533         REG_INIT(AB9540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2534         /*
2535          * 0x01, VsimDisch
2536          * 0x02, VanaDisch
2537          * 0x04, VdmicPullDownEna
2538          * 0x08, VpllPullDownEna
2539          * 0x10, VdmicDisch
2540          */
2541         REG_INIT(AB9540_REGUCTRLDISCH2,         0x04, 0x44, 0x1f),
2542         /*
2543          * 0x01, Vaux4Disch
2544          */
2545         REG_INIT(AB9540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2546 };
2547
2548 /* AB8540 register init */
2549 static struct ab8500_reg_init ab8540_reg_init[] = {
2550         /*
2551          * 0x01, VSimSycClkReq1Valid
2552          * 0x02, VSimSycClkReq2Valid
2553          * 0x04, VSimSycClkReq3Valid
2554          * 0x08, VSimSycClkReq4Valid
2555          * 0x10, VSimSycClkReq5Valid
2556          * 0x20, VSimSycClkReq6Valid
2557          * 0x40, VSimSycClkReq7Valid
2558          * 0x80, VSimSycClkReq8Valid
2559          */
2560         REG_INIT(AB8540_VSIMSYSCLKCTRL,         0x02, 0x33, 0xff),
2561         /*
2562          * 0x03, VarmRequestCtrl
2563          * 0x0c, VapeRequestCtrl
2564          * 0x30, Vsmps1RequestCtrl
2565          * 0xc0, Vsmps2RequestCtrl
2566          */
2567         REG_INIT(AB8540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2568         /*
2569          * 0x03, Vsmps3RequestCtrl
2570          * 0x0c, VpllRequestCtrl
2571          * 0x30, VanaRequestCtrl
2572          * 0xc0, VextSupply1RequestCtrl
2573          */
2574         REG_INIT(AB8540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2575         /*
2576          * 0x03, VextSupply2RequestCtrl
2577          * 0x0c, VextSupply3RequestCtrl
2578          * 0x30, Vaux1RequestCtrl
2579          * 0xc0, Vaux2RequestCtrl
2580          */
2581         REG_INIT(AB8540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2582         /*
2583          * 0x03, Vaux3RequestCtrl
2584          * 0x04, SwHPReq
2585          */
2586         REG_INIT(AB8540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2587         /*
2588          * 0x01, Vsmps1SysClkReq1HPValid
2589          * 0x02, Vsmps2SysClkReq1HPValid
2590          * 0x04, Vsmps3SysClkReq1HPValid
2591          * 0x08, VanaSysClkReq1HPValid
2592          * 0x10, VpllSysClkReq1HPValid
2593          * 0x20, Vaux1SysClkReq1HPValid
2594          * 0x40, Vaux2SysClkReq1HPValid
2595          * 0x80, Vaux3SysClkReq1HPValid
2596          */
2597         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2598         /*
2599          * 0x01, VapeSysClkReq1HPValid
2600          * 0x02, VarmSysClkReq1HPValid
2601          * 0x04, VbbSysClkReq1HPValid
2602          * 0x10, VextSupply1SysClkReq1HPValid
2603          * 0x20, VextSupply2SysClkReq1HPValid
2604          * 0x40, VextSupply3SysClkReq1HPValid
2605          */
2606         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x77),
2607         /*
2608          * 0x01, Vsmps1HwHPReq1Valid
2609          * 0x02, Vsmps2HwHPReq1Valid
2610          * 0x04, Vsmps3HwHPReq1Valid
2611          * 0x08, VanaHwHPReq1Valid
2612          * 0x10, VpllHwHPReq1Valid
2613          * 0x20, Vaux1HwHPReq1Valid
2614          * 0x40, Vaux2HwHPReq1Valid
2615          * 0x80, Vaux3HwHPReq1Valid
2616          */
2617         REG_INIT(AB8540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2618         /*
2619          * 0x01, VextSupply1HwHPReq1Valid
2620          * 0x02, VextSupply2HwHPReq1Valid
2621          * 0x04, VextSupply3HwHPReq1Valid
2622          */
2623         REG_INIT(AB8540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
2624         /*
2625          * 0x01, Vsmps1HwHPReq2Valid
2626          * 0x02, Vsmps2HwHPReq2Valid
2627          * 0x03, Vsmps3HwHPReq2Valid
2628          * 0x08, VanaHwHPReq2Valid
2629          * 0x10, VpllHwHPReq2Valid
2630          * 0x20, Vaux1HwHPReq2Valid
2631          * 0x40, Vaux2HwHPReq2Valid
2632          * 0x80, Vaux3HwHPReq2Valid
2633          */
2634         REG_INIT(AB8540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2635         /*
2636          * 0x01, VextSupply1HwHPReq2Valid
2637          * 0x02, VextSupply2HwHPReq2Valid
2638          * 0x04, VextSupply3HwHPReq2Valid
2639          */
2640         REG_INIT(AB8540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
2641         /*
2642          * 0x01, VapeSwHPReqValid
2643          * 0x02, VarmSwHPReqValid
2644          * 0x04, Vsmps1SwHPReqValid
2645          * 0x08, Vsmps2SwHPReqValid
2646          * 0x10, Vsmps3SwHPReqValid
2647          * 0x20, VanaSwHPReqValid
2648          * 0x40, VpllSwHPReqValid
2649          * 0x80, Vaux1SwHPReqValid
2650          */
2651         REG_INIT(AB8540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2652         /*
2653          * 0x01, Vaux2SwHPReqValid
2654          * 0x02, Vaux3SwHPReqValid
2655          * 0x04, VextSupply1SwHPReqValid
2656          * 0x08, VextSupply2SwHPReqValid
2657          * 0x10, VextSupply3SwHPReqValid
2658          */
2659         REG_INIT(AB8540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
2660         /*
2661          * 0x02, SysClkReq2Valid1
2662          * ...
2663          * 0x80, SysClkReq8Valid1
2664          */
2665         REG_INIT(AB8540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xff),
2666         /*
2667          * 0x02, SysClkReq2Valid2
2668          * ...
2669          * 0x80, SysClkReq8Valid2
2670          */
2671         REG_INIT(AB8540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xff),
2672         /*
2673          * 0x01, Vaux4SwHPReqValid
2674          * 0x02, Vaux4HwHPReq2Valid
2675          * 0x04, Vaux4HwHPReq1Valid
2676          * 0x08, Vaux4SysClkReq1HPValid
2677          */
2678         REG_INIT(AB8540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2679         /*
2680          * 0x01, Vaux5SwHPReqValid
2681          * 0x02, Vaux5HwHPReq2Valid
2682          * 0x04, Vaux5HwHPReq1Valid
2683          * 0x08, Vaux5SysClkReq1HPValid
2684          */
2685         REG_INIT(AB8540_REGUVAUX5REQVALID,      0x03, 0x12, 0x0f),
2686         /*
2687          * 0x01, Vaux6SwHPReqValid
2688          * 0x02, Vaux6HwHPReq2Valid
2689          * 0x04, Vaux6HwHPReq1Valid
2690          * 0x08, Vaux6SysClkReq1HPValid
2691          */
2692         REG_INIT(AB8540_REGUVAUX6REQVALID,      0x03, 0x13, 0x0f),
2693         /*
2694          * 0x01, VclkbSwHPReqValid
2695          * 0x02, VclkbHwHPReq2Valid
2696          * 0x04, VclkbHwHPReq1Valid
2697          * 0x08, VclkbSysClkReq1HPValid
2698          */
2699         REG_INIT(AB8540_REGUVCLKBREQVALID,      0x03, 0x14, 0x0f),
2700         /*
2701          * 0x01, Vrf1SwHPReqValid
2702          * 0x02, Vrf1HwHPReq2Valid
2703          * 0x04, Vrf1HwHPReq1Valid
2704          * 0x08, Vrf1SysClkReq1HPValid
2705          */
2706         REG_INIT(AB8540_REGUVRF1REQVALID,       0x03, 0x15, 0x0f),
2707         /*
2708          * 0x02, VTVoutEna
2709          * 0x04, Vintcore12Ena
2710          * 0x38, Vintcore12Sel
2711          * 0x40, Vintcore12LP
2712          * 0x80, VTVoutLP
2713          */
2714         REG_INIT(AB8540_REGUMISC1,              0x03, 0x80, 0xfe),
2715         /*
2716          * 0x02, VaudioEna
2717          * 0x04, VdmicEna
2718          * 0x08, Vamic1Ena
2719          * 0x10, Vamic2Ena
2720          * 0x20, Vamic12LP
2721          * 0xC0, VdmicSel
2722          */
2723         REG_INIT(AB8540_VAUDIOSUPPLY,           0x03, 0x83, 0xfe),
2724         /*
2725          * 0x01, Vamic1_dzout
2726          * 0x02, Vamic2_dzout
2727          */
2728         REG_INIT(AB8540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2729         /*
2730          * 0x07, VHSICSel
2731          * 0x08, VHSICOffState
2732          * 0x10, VHSIEna
2733          * 0x20, VHSICLP
2734          */
2735         REG_INIT(AB8540_VHSIC,                  0x03, 0x87, 0x3f),
2736         /*
2737          * 0x07, VSDIOSel
2738          * 0x08, VSDIOOffState
2739          * 0x10, VSDIOEna
2740          * 0x20, VSDIOLP
2741          */
2742         REG_INIT(AB8540_VSDIO,                  0x03, 0x88, 0x3f),
2743         /*
2744          * 0x03, Vsmps1Regu
2745          * 0x0c, Vsmps1SelCtrl
2746          * 0x10, Vsmps1AutoMode
2747          * 0x20, Vsmps1PWMMode
2748          */
2749         REG_INIT(AB8540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2750         /*
2751          * 0x03, Vsmps2Regu
2752          * 0x0c, Vsmps2SelCtrl
2753          * 0x10, Vsmps2AutoMode
2754          * 0x20, Vsmps2PWMMode
2755          */
2756         REG_INIT(AB8540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2757         /*
2758          * 0x03, Vsmps3Regu
2759          * 0x0c, Vsmps3SelCtrl
2760          * 0x10, Vsmps3AutoMode
2761          * 0x20, Vsmps3PWMMode
2762          * NOTE! PRCMU register
2763          */
2764         REG_INIT(AB8540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2765         /*
2766          * 0x03, VpllRegu
2767          * 0x0c, VanaRegu
2768          */
2769         REG_INIT(AB8540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2770         /*
2771          * 0x03, VextSupply1Regu
2772          * 0x0c, VextSupply2Regu
2773          * 0x30, VextSupply3Regu
2774          * 0x40, ExtSupply2Bypass
2775          * 0x80, ExtSupply3Bypass
2776          */
2777         REG_INIT(AB8540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2778         /*
2779          * 0x03, Vaux1Regu
2780          * 0x0c, Vaux2Regu
2781          */
2782         REG_INIT(AB8540_VAUX12REGU,             0x04, 0x09, 0x0f),
2783         /*
2784          * 0x0c, VRF1Regu
2785          * 0x03, Vaux3Regu
2786          */
2787         REG_INIT(AB8540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2788         /*
2789          * 0x3f, Vsmps1Sel1
2790          */
2791         REG_INIT(AB8540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2792         /*
2793          * 0x3f, Vsmps1Sel2
2794          */
2795         REG_INIT(AB8540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2796         /*
2797          * 0x3f, Vsmps1Sel3
2798          */
2799         REG_INIT(AB8540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2800         /*
2801          * 0x3f, Vsmps2Sel1
2802          */
2803         REG_INIT(AB8540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2804         /*
2805          * 0x3f, Vsmps2Sel2
2806          */
2807         REG_INIT(AB8540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2808         /*
2809          * 0x3f, Vsmps2Sel3
2810          */
2811         REG_INIT(AB8540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2812         /*
2813          * 0x7f, Vsmps3Sel1
2814          * NOTE! PRCMU register
2815          */
2816         REG_INIT(AB8540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2817         /*
2818          * 0x7f, Vsmps3Sel2
2819          * NOTE! PRCMU register
2820          */
2821         REG_INIT(AB8540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2822         /*
2823          * 0x0f, Vaux1Sel
2824          */
2825         REG_INIT(AB8540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2826         /*
2827          * 0x0f, Vaux2Sel
2828          */
2829         REG_INIT(AB8540_VAUX2SEL,               0x04, 0x20, 0x0f),
2830         /*
2831          * 0x07, Vaux3Sel
2832          * 0x70, Vrf1Sel
2833          */
2834         REG_INIT(AB8540_VRF1VAUX3SEL,           0x04, 0x21, 0x77),
2835         /*
2836          * 0x01, VextSupply12LP
2837          */
2838         REG_INIT(AB8540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2839         /*
2840          * 0x07, Vanasel
2841          * 0x30, Vpllsel
2842          */
2843         REG_INIT(AB8540_VANAVPLLSEL,            0x04, 0x29, 0x37),
2844         /*
2845          * 0x03, Vaux4RequestCtrl
2846          */
2847         REG_INIT(AB8540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2848         /*
2849          * 0x03, Vaux4Regu
2850          */
2851         REG_INIT(AB8540_VAUX4REGU,              0x04, 0x2e, 0x03),
2852         /*
2853          * 0x0f, Vaux4Sel
2854          */
2855         REG_INIT(AB8540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2856         /*
2857          * 0x03, Vaux5RequestCtrl
2858          */
2859         REG_INIT(AB8540_VAUX5REQCTRL,           0x04, 0x31, 0x03),
2860         /*
2861          * 0x03, Vaux5Regu
2862          */
2863         REG_INIT(AB8540_VAUX5REGU,              0x04, 0x32, 0x03),
2864         /*
2865          * 0x3f, Vaux5Sel
2866          */
2867         REG_INIT(AB8540_VAUX5SEL,               0x04, 0x33, 0x3f),
2868         /*
2869          * 0x03, Vaux6RequestCtrl
2870          */
2871         REG_INIT(AB8540_VAUX6REQCTRL,           0x04, 0x34, 0x03),
2872         /*
2873          * 0x03, Vaux6Regu
2874          */
2875         REG_INIT(AB8540_VAUX6REGU,              0x04, 0x35, 0x03),
2876         /*
2877          * 0x3f, Vaux6Sel
2878          */
2879         REG_INIT(AB8540_VAUX6SEL,               0x04, 0x36, 0x3f),
2880         /*
2881          * 0x03, VCLKBRequestCtrl
2882          */
2883         REG_INIT(AB8540_VCLKBREQCTRL,           0x04, 0x37, 0x03),
2884         /*
2885          * 0x03, VCLKBRegu
2886          */
2887         REG_INIT(AB8540_VCLKBREGU,              0x04, 0x38, 0x03),
2888         /*
2889          * 0x07, VCLKBSel
2890          */
2891         REG_INIT(AB8540_VCLKBSEL,               0x04, 0x39, 0x07),
2892         /*
2893          * 0x03, Vrf1RequestCtrl
2894          */
2895         REG_INIT(AB8540_VRF1REQCTRL,            0x04, 0x3a, 0x03),
2896         /*
2897          * 0x01, VpllDisch
2898          * 0x02, Vrf1Disch
2899          * 0x04, Vaux1Disch
2900          * 0x08, Vaux2Disch
2901          * 0x10, Vaux3Disch
2902          * 0x20, Vintcore12Disch
2903          * 0x40, VTVoutDisch
2904          * 0x80, VaudioDisch
2905          */
2906         REG_INIT(AB8540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2907         /*
2908          * 0x02, VanaDisch
2909          * 0x04, VdmicPullDownEna
2910          * 0x08, VpllPullDownEna
2911          * 0x10, VdmicDisch
2912          */
2913         REG_INIT(AB8540_REGUCTRLDISCH2,         0x04, 0x44, 0x1e),
2914         /*
2915          * 0x01, Vaux4Disch
2916          */
2917         REG_INIT(AB8540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2918         /*
2919          * 0x01, Vaux5Disch
2920          * 0x02, Vaux6Disch
2921          * 0x04, VCLKBDisch
2922          */
2923         REG_INIT(AB8540_REGUCTRLDISCH4,         0x04, 0x49, 0x07),
2924 };
2925
2926 static struct {
2927         struct ab8500_regulator_info *info;
2928         int info_size;
2929         struct ab8500_reg_init *init;
2930         int init_size;
2931         struct of_regulator_match *match;
2932         int match_size;
2933 } abx500_regulator;
2934
2935 static int ab8500_regulator_init_registers(struct platform_device *pdev,
2936                                            int id, int mask, int value)
2937 {
2938         struct ab8500_reg_init *reg_init = abx500_regulator.init;
2939         int err;
2940
2941         BUG_ON(value & ~mask);
2942         BUG_ON(mask & ~reg_init[id].mask);
2943
2944         /* initialize register */
2945         err = abx500_mask_and_set_register_interruptible(
2946                 &pdev->dev,
2947                 reg_init[id].bank,
2948                 reg_init[id].addr,
2949                 mask, value);
2950         if (err < 0) {
2951                 dev_err(&pdev->dev,
2952                         "Failed to initialize 0x%02x, 0x%02x.\n",
2953                         reg_init[id].bank,
2954                         reg_init[id].addr);
2955                 return err;
2956         }
2957         dev_vdbg(&pdev->dev,
2958                  "  init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
2959                  reg_init[id].bank,
2960                  reg_init[id].addr,
2961                  mask, value);
2962
2963         return 0;
2964 }
2965
2966 static int ab8500_regulator_register(struct platform_device *pdev,
2967                                      struct regulator_init_data *init_data,
2968                                      int id, struct device_node *np)
2969 {
2970         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
2971         struct ab8500_regulator_info *info = NULL;
2972         struct regulator_config config = { };
2973         int err;
2974
2975         /* assign per-regulator data */
2976         info = &abx500_regulator.info[id];
2977         info->dev = &pdev->dev;
2978
2979         config.dev = &pdev->dev;
2980         config.init_data = init_data;
2981         config.driver_data = info;
2982         config.of_node = np;
2983
2984         /* fix for hardware before ab8500v2.0 */
2985         if (is_ab8500_1p1_or_earlier(ab8500)) {
2986                 if (info->desc.id == AB8500_LDO_AUX3) {
2987                         info->desc.n_voltages =
2988                                 ARRAY_SIZE(ldo_vauxn_voltages);
2989                         info->desc.volt_table = ldo_vauxn_voltages;
2990                         info->voltage_mask = 0xf;
2991                 }
2992         }
2993
2994         /* register regulator with framework */
2995         info->regulator = regulator_register(&info->desc, &config);
2996         if (IS_ERR(info->regulator)) {
2997                 err = PTR_ERR(info->regulator);
2998                 dev_err(&pdev->dev, "failed to register regulator %s\n",
2999                         info->desc.name);
3000                 /* when we fail, un-register all earlier regulators */
3001                 while (--id >= 0) {
3002                         info = &abx500_regulator.info[id];
3003                         regulator_unregister(info->regulator);
3004                 }
3005                 return err;
3006         }
3007
3008         return 0;
3009 }
3010
3011 static struct of_regulator_match ab8500_regulator_match[] = {
3012         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
3013         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
3014         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
3015         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
3016         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
3017         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
3018         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
3019         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
3020         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
3021         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
3022 };
3023
3024 static struct of_regulator_match ab8505_regulator_match[] = {
3025         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
3026         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
3027         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
3028         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
3029         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
3030         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
3031         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
3032         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
3033         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
3034         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
3035         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
3036         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
3037         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
3038 };
3039
3040 static struct of_regulator_match ab8540_regulator_match[] = {
3041         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8540_LDO_AUX1, },
3042         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8540_LDO_AUX2, },
3043         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8540_LDO_AUX3, },
3044         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8540_LDO_AUX4, },
3045         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8540_LDO_AUX5, },
3046         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8540_LDO_AUX6, },
3047         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8540_LDO_INTCORE, },
3048         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8540_LDO_TVOUT, },
3049         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8540_LDO_AUDIO, },
3050         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8540_LDO_ANAMIC1, },
3051         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8540_LDO_ANAMIC2, },
3052         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8540_LDO_DMIC, },
3053         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8540_LDO_ANA, },
3054         { .name = "ab8500_ldo_sdio",    .driver_data = (void *) AB8540_LDO_SDIO, },
3055 };
3056
3057 static struct of_regulator_match ab9540_regulator_match[] = {
3058         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB9540_LDO_AUX1, },
3059         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB9540_LDO_AUX2, },
3060         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB9540_LDO_AUX3, },
3061         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB9540_LDO_AUX4, },
3062         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, },
3063         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB9540_LDO_TVOUT, },
3064         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB9540_LDO_AUDIO, },
3065         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, },
3066         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, },
3067         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB9540_LDO_DMIC, },
3068         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB9540_LDO_ANA, },
3069 };
3070
3071 static void abx500_get_regulator_info(struct ab8500 *ab8500)
3072 {
3073         if (is_ab9540(ab8500)) {
3074                 abx500_regulator.info = ab9540_regulator_info;
3075                 abx500_regulator.info_size = ARRAY_SIZE(ab9540_regulator_info);
3076                 abx500_regulator.init = ab9540_reg_init;
3077                 abx500_regulator.init_size = AB9540_NUM_REGULATOR_REGISTERS;
3078                 abx500_regulator.match = ab9540_regulator_match;
3079                 abx500_regulator.match_size = ARRAY_SIZE(ab9540_regulator_match);
3080         } else if (is_ab8505(ab8500)) {
3081                 abx500_regulator.info = ab8505_regulator_info;
3082                 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
3083                 abx500_regulator.init = ab8505_reg_init;
3084                 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
3085                 abx500_regulator.match = ab8505_regulator_match;
3086                 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
3087         } else if (is_ab8540(ab8500)) {
3088                 abx500_regulator.info = ab8540_regulator_info;
3089                 abx500_regulator.info_size = ARRAY_SIZE(ab8540_regulator_info);
3090                 abx500_regulator.init = ab8540_reg_init;
3091                 abx500_regulator.init_size = AB8540_NUM_REGULATOR_REGISTERS;
3092                 abx500_regulator.match = ab8540_regulator_match;
3093                 abx500_regulator.match_size = ARRAY_SIZE(ab8540_regulator_match);
3094         } else {
3095                 abx500_regulator.info = ab8500_regulator_info;
3096                 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
3097                 abx500_regulator.init = ab8500_reg_init;
3098                 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
3099                 abx500_regulator.match = ab8500_regulator_match;
3100                 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
3101         }
3102 }
3103
3104 static int
3105 ab8500_regulator_of_probe(struct platform_device *pdev,
3106                           struct device_node *np)
3107 {
3108         struct of_regulator_match *match = abx500_regulator.match;
3109         int err, i;
3110
3111         for (i = 0; i < abx500_regulator.info_size; i++) {
3112                 err = ab8500_regulator_register(
3113                         pdev, match[i].init_data, i, match[i].of_node);
3114                 if (err)
3115                         return err;
3116         }
3117
3118         return 0;
3119 }
3120
3121 static int ab8500_regulator_probe(struct platform_device *pdev)
3122 {
3123         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3124         struct device_node *np = pdev->dev.of_node;
3125         struct ab8500_platform_data *ppdata;
3126         struct ab8500_regulator_platform_data *pdata;
3127         int i, err;
3128
3129         if (!ab8500) {
3130                 dev_err(&pdev->dev, "null mfd parent\n");
3131                 return -EINVAL;
3132         }
3133
3134         abx500_get_regulator_info(ab8500);
3135
3136         if (np) {
3137                 err = of_regulator_match(&pdev->dev, np,
3138                                          abx500_regulator.match,
3139                                          abx500_regulator.match_size);
3140                 if (err < 0) {
3141                         dev_err(&pdev->dev,
3142                                 "Error parsing regulator init data: %d\n", err);
3143                         return err;
3144                 }
3145
3146                 err = ab8500_regulator_of_probe(pdev, np);
3147                 return err;
3148         }
3149
3150         ppdata = dev_get_platdata(ab8500->dev);
3151         if (!ppdata) {
3152                 dev_err(&pdev->dev, "null parent pdata\n");
3153                 return -EINVAL;
3154         }
3155
3156         pdata = ppdata->regulator;
3157         if (!pdata) {
3158                 dev_err(&pdev->dev, "null pdata\n");
3159                 return -EINVAL;
3160         }
3161
3162         /* make sure the platform data has the correct size */
3163         if (pdata->num_regulator != abx500_regulator.info_size) {
3164                 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
3165                 return -EINVAL;
3166         }
3167
3168         /* initialize debug (initial state is recorded with this call) */
3169         err = ab8500_regulator_debug_init(pdev);
3170         if (err)
3171                 return err;
3172
3173         /* initialize registers */
3174         for (i = 0; i < pdata->num_reg_init; i++) {
3175                 int id, mask, value;
3176
3177                 id = pdata->reg_init[i].id;
3178                 mask = pdata->reg_init[i].mask;
3179                 value = pdata->reg_init[i].value;
3180
3181                 /* check for configuration errors */
3182                 BUG_ON(id >= abx500_regulator.init_size);
3183
3184                 err = ab8500_regulator_init_registers(pdev, id, mask, value);
3185                 if (err < 0)
3186                         return err;
3187         }
3188
3189         if (!is_ab8505(ab8500)) {
3190                 /* register external regulators (before Vaux1, 2 and 3) */
3191                 err = ab8500_ext_regulator_init(pdev);
3192                 if (err)
3193                         return err;
3194         }
3195
3196         /* register all regulators */
3197         for (i = 0; i < abx500_regulator.info_size; i++) {
3198                 err = ab8500_regulator_register(pdev, &pdata->regulator[i],
3199                                                 i, NULL);
3200                 if (err < 0)
3201                         return err;
3202         }
3203
3204         return 0;
3205 }
3206
3207 static int ab8500_regulator_remove(struct platform_device *pdev)
3208 {
3209         int i, err;
3210         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3211
3212         for (i = 0; i < abx500_regulator.info_size; i++) {
3213                 struct ab8500_regulator_info *info = NULL;
3214                 info = &abx500_regulator.info[i];
3215
3216                 dev_vdbg(rdev_get_dev(info->regulator),
3217                         "%s-remove\n", info->desc.name);
3218
3219                 regulator_unregister(info->regulator);
3220         }
3221
3222         if (!is_ab8505(ab8500)) {
3223                 /* remove external regulators (after Vaux1, 2 and 3) */
3224                 err = ab8500_ext_regulator_exit(pdev);
3225                 if (err)
3226                         return err;
3227         }
3228
3229         /* remove regulator debug */
3230         err = ab8500_regulator_debug_exit(pdev);
3231         if (err)
3232                 return err;
3233
3234         return 0;
3235 }
3236
3237 static struct platform_driver ab8500_regulator_driver = {
3238         .probe = ab8500_regulator_probe,
3239         .remove = ab8500_regulator_remove,
3240         .driver         = {
3241                 .name   = "ab8500-regulator",
3242                 .owner  = THIS_MODULE,
3243         },
3244 };
3245
3246 static int __init ab8500_regulator_init(void)
3247 {
3248         int ret;
3249
3250         ret = platform_driver_register(&ab8500_regulator_driver);
3251         if (ret != 0)
3252                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
3253
3254         return ret;
3255 }
3256 subsys_initcall(ab8500_regulator_init);
3257
3258 static void __exit ab8500_regulator_exit(void)
3259 {
3260         platform_driver_unregister(&ab8500_regulator_driver);
3261 }
3262 module_exit(ab8500_regulator_exit);
3263
3264 MODULE_LICENSE("GPL v2");
3265 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
3266 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
3267 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
3268 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
3269 MODULE_ALIAS("platform:ab8500-regulator");