Pileus Git - ~andy/linux/blob - drivers/regulator/ab8500.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * License Terms: GNU General Public License v2
   5  *
   6  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
   7  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
   8  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
   9  *
  10  * AB8500 peripheral regulators
  11  *
  12  * AB8500 supports the following regulators:
  13  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  14  *
  15  * AB8505 supports the following regulators:
  16  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  17  */
  18 #include <linux/init.h>
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/err.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/mfd/abx500.h>
  24 #include <linux/mfd/abx500/ab8500.h>
  25 #include <linux/of.h>
  26 #include <linux/regulator/of_regulator.h>
  27 #include <linux/regulator/driver.h>
  28 #include <linux/regulator/machine.h>
  29 #include <linux/regulator/ab8500.h>
  30 #include <linux/slab.h>
  31
  32 /**
  33  * struct ab8500_shared_mode - is used when mode is shared between
  34  * two regulators.
  35  * @shared_regulator: pointer to the other sharing regulator
  36  * @lp_mode_req: low power mode requested by this regulator
  37  */
  38 struct ab8500_shared_mode {
  39         struct ab8500_regulator_info *shared_regulator;
  40         bool lp_mode_req;
  41 };
  42
  43 /**
  44  * struct ab8500_regulator_info - ab8500 regulator information
  45  * @dev: device pointer
  46  * @desc: regulator description
  47  * @regulator_dev: regulator device
  48  * @shared_mode: used when mode is shared between two regulators
  49  * @load_lp_uA: maximum load in idle (low power) mode
  50  * @update_bank: bank to control on/off
  51  * @update_reg: register to control on/off
  52  * @update_mask: mask to enable/disable and set mode of regulator
  53  * @update_val: bits holding the regulator current mode
  54  * @update_val_idle: bits to enable the regulator in idle (low power) mode
  55  * @update_val_normal: bits to enable the regulator in normal (high power) mode
  56  * @mode_bank: bank with location of mode register
  57  * @mode_reg: mode register
  58  * @mode_mask: mask for setting mode
  59  * @mode_val_idle: mode setting for low power
  60  * @mode_val_normal: mode setting for normal power
  61  * @voltage_bank: bank to control regulator voltage
  62  * @voltage_reg: register to control regulator voltage
  63  * @voltage_mask: mask to control regulator voltage
  64  * @voltage_shift: shift to control regulator voltage
  65  */
  66 struct ab8500_regulator_info {
  67         struct device           *dev;
  68         struct regulator_desc   desc;
  69         struct regulator_dev    *regulator;
  70         struct ab8500_shared_mode *shared_mode;
  71         int load_lp_uA;
  72         u8 update_bank;
  73         u8 update_reg;
  74         u8 update_mask;
  75         u8 update_val;
  76         u8 update_val_idle;
  77         u8 update_val_normal;
  78         u8 mode_bank;
  79         u8 mode_reg;
  80         u8 mode_mask;
  81         u8 mode_val_idle;
  82         u8 mode_val_normal;
  83         u8 voltage_bank;
  84         u8 voltage_reg;
  85         u8 voltage_mask;
  86         u8 voltage_shift;
  87         struct {
  88                 u8 voltage_limit;
  89                 u8 voltage_bank;
  90                 u8 voltage_reg;
  91                 u8 voltage_mask;
  92                 u8 voltage_shift;
  93         } expand_register;
  94 };
  95
  96 /* voltage tables for the vauxn/vintcore supplies */
  97 static const unsigned int ldo_vauxn_voltages[] = {
  98         1100000,
  99         1200000,
 100         1300000,
 101         1400000,
 102         1500000,
 103         1800000,
 104         1850000,
 105         1900000,
 106         2500000,
 107         2650000,
 108         2700000,
 109         2750000,
 110         2800000,
 111         2900000,
 112         3000000,
 113         3300000,
 114 };
 115
 116 static const unsigned int ldo_vaux3_voltages[] = {
 117         1200000,
 118         1500000,
 119         1800000,
 120         2100000,
 121         2500000,
 122         2750000,
 123         2790000,
 124         2910000,
 125 };
 126
 127 static const unsigned int ldo_vaux56_voltages[] = {
 128         1800000,
 129         1050000,
 130         1100000,
 131         1200000,
 132         1500000,
 133         2200000,
 134         2500000,
 135         2790000,
 136 };
 137
 138 static const unsigned int ldo_vaux3_ab8540_voltages[] = {
 139         1200000,
 140         1500000,
 141         1800000,
 142         2100000,
 143         2500000,
 144         2750000,
 145         2790000,
 146         2910000,
 147         3050000,
 148 };
 149
 150 static const unsigned int ldo_vaux56_ab8540_voltages[] = {
 151         750000, 760000, 770000, 780000, 790000, 800000,
 152         810000, 820000, 830000, 840000, 850000, 860000,
 153         870000, 880000, 890000, 900000, 910000, 920000,
 154         930000, 940000, 950000, 960000, 970000, 980000,
 155         990000, 1000000, 1010000, 1020000, 1030000,
 156         1040000, 1050000, 1060000, 1070000, 1080000,
 157         1090000, 1100000, 1110000, 1120000, 1130000,
 158         1140000, 1150000, 1160000, 1170000, 1180000,
 159         1190000, 1200000, 1210000, 1220000, 1230000,
 160         1240000, 1250000, 1260000, 1270000, 1280000,
 161         1290000, 1300000, 1310000, 1320000, 1330000,
 162         1340000, 1350000, 1360000, 1800000, 2790000,
 163 };
 164
 165 static const unsigned int ldo_vintcore_voltages[] = {
 166         1200000,
 167         1225000,
 168         1250000,
 169         1275000,
 170         1300000,
 171         1325000,
 172         1350000,
 173 };
 174
 175 static const unsigned int ldo_sdio_voltages[] = {
 176         1160000,
 177         1050000,
 178         1100000,
 179         1500000,
 180         1800000,
 181         2200000,
 182         2910000,
 183         3050000,
 184 };
 185
 186 static const unsigned int fixed_1200000_voltage[] = {
 187         1200000,
 188 };
 189
 190 static const unsigned int fixed_1800000_voltage[] = {
 191         1800000,
 192 };
 193
 194 static const unsigned int fixed_2000000_voltage[] = {
 195         2000000,
 196 };
 197
 198 static const unsigned int fixed_2050000_voltage[] = {
 199         2050000,
 200 };
 201
 202 static const unsigned int fixed_3300000_voltage[] = {
 203         3300000,
 204 };
 205
 206 static const unsigned int ldo_vana_voltages[] = {
 207         1050000,
 208         1075000,
 209         1100000,
 210         1125000,
 211         1150000,
 212         1175000,
 213         1200000,
 214         1225000,
 215 };
 216
 217 static const unsigned int ldo_vaudio_voltages[] = {
 218         2000000,
 219         2100000,
 220         2200000,
 221         2300000,
 222         2400000,
 223         2500000,
 224         2600000,
 225         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 226 };
 227
 228 static const unsigned int ldo_vdmic_voltages[] = {
 229         1800000,
 230         1900000,
 231         2000000,
 232         2850000,
 233 };
 234
 235 static DEFINE_MUTEX(shared_mode_mutex);
 236 static struct ab8500_shared_mode ldo_anamic1_shared;
 237 static struct ab8500_shared_mode ldo_anamic2_shared;
 238 static struct ab8500_shared_mode ab8540_ldo_anamic1_shared;
 239 static struct ab8500_shared_mode ab8540_ldo_anamic2_shared;
 240
 241 static int ab8500_regulator_enable(struct regulator_dev *rdev)
 242 {
 243         int ret;
 244         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 245
 246         if (info == NULL) {
 247                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 248                 return -EINVAL;
 249         }
 250
 251         ret = abx500_mask_and_set_register_interruptible(info->dev,
 252                 info->update_bank, info->update_reg,
 253                 info->update_mask, info->update_val);
 254         if (ret < 0) {
 255                 dev_err(rdev_get_dev(rdev),
 256                         "couldn't set enable bits for regulator\n");
 257                 return ret;
 258         }
 259
 260         dev_vdbg(rdev_get_dev(rdev),
 261                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 262                 info->desc.name, info->update_bank, info->update_reg,
 263                 info->update_mask, info->update_val);
 264
 265         return ret;
 266 }
 267
 268 static int ab8500_regulator_disable(struct regulator_dev *rdev)
 269 {
 270         int ret;
 271         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 272
 273         if (info == NULL) {
 274                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 275                 return -EINVAL;
 276         }
 277
 278         ret = abx500_mask_and_set_register_interruptible(info->dev,
 279                 info->update_bank, info->update_reg,
 280                 info->update_mask, 0x0);
 281         if (ret < 0) {
 282                 dev_err(rdev_get_dev(rdev),
 283                         "couldn't set disable bits for regulator\n");
 284                 return ret;
 285         }
 286
 287         dev_vdbg(rdev_get_dev(rdev),
 288                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 289                 info->desc.name, info->update_bank, info->update_reg,
 290                 info->update_mask, 0x0);
 291
 292         return ret;
 293 }
 294
 295 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 296 {
 297         int ret;
 298         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 299         u8 regval;
 300
 301         if (info == NULL) {
 302                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 303                 return -EINVAL;
 304         }
 305
 306         ret = abx500_get_register_interruptible(info->dev,
 307                 info->update_bank, info->update_reg, &regval);
 308         if (ret < 0) {
 309                 dev_err(rdev_get_dev(rdev),
 310                         "couldn't read 0x%x register\n", info->update_reg);
 311                 return ret;
 312         }
 313
 314         dev_vdbg(rdev_get_dev(rdev),
 315                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 316                 " 0x%x\n",
 317                 info->desc.name, info->update_bank, info->update_reg,
 318                 info->update_mask, regval);
 319
 320         if (regval & info->update_mask)
 321                 return 1;
 322         else
 323                 return 0;
 324 }
 325
 326 static unsigned int ab8500_regulator_get_optimum_mode(
 327                 struct regulator_dev *rdev, int input_uV,
 328                 int output_uV, int load_uA)
 329 {
 330         unsigned int mode;
 331
 332         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 333
 334         if (info == NULL) {
 335                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 336                 return -EINVAL;
 337         }
 338
 339         if (load_uA <= info->load_lp_uA)
 340                 mode = REGULATOR_MODE_IDLE;
 341         else
 342                 mode = REGULATOR_MODE_NORMAL;
 343
 344         return mode;
 345 }
 346
 347 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 348                                      unsigned int mode)
 349 {
 350         int ret = 0;
 351         u8 bank;
 352         u8 reg;
 353         u8 mask;
 354         u8 val;
 355         bool dmr = false; /* Dedicated mode register */
 356         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 357
 358         if (info == NULL) {
 359                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 360                 return -EINVAL;
 361         }
 362
 363         if (info->shared_mode) {
 364                 /*
 365                  * Special case where mode is shared between two regulators.
 366                  */
 367                 struct ab8500_shared_mode *sm = info->shared_mode;
 368                 mutex_lock(&shared_mode_mutex);
 369
 370                 if (mode == REGULATOR_MODE_IDLE) {
 371                         sm->lp_mode_req = true; /* Low power mode requested */
 372                         if (!((sm->shared_regulator)->
 373                               shared_mode->lp_mode_req)) {
 374                                 mutex_unlock(&shared_mode_mutex);
 375                                 return 0; /* Other regulator prevent LP mode */
 376                         }
 377                 } else {
 378                         sm->lp_mode_req = false;
 379                 }
 380         }
 381
 382         if (info->mode_mask) {
 383                 /* Dedicated register for handling mode */
 384
 385                 dmr = true;
 386
 387                 switch (mode) {
 388                 case REGULATOR_MODE_NORMAL:
 389                         val = info->mode_val_normal;
 390                         break;
 391                 case REGULATOR_MODE_IDLE:
 392                         val = info->mode_val_idle;
 393                         break;
 394                 default:
 395                         if (info->shared_mode)
 396                                 mutex_unlock(&shared_mode_mutex);
 397                         return -EINVAL;
 398                 }
 399
 400                 bank = info->mode_bank;
 401                 reg = info->mode_reg;
 402                 mask = info->mode_mask;
 403         } else {
 404                 /* Mode register same as enable register */
 405
 406                 switch (mode) {
 407                 case REGULATOR_MODE_NORMAL:
 408                         info->update_val = info->update_val_normal;
 409                         val = info->update_val_normal;
 410                         break;
 411                 case REGULATOR_MODE_IDLE:
 412                         info->update_val = info->update_val_idle;
 413                         val = info->update_val_idle;
 414                         break;
 415                 default:
 416                         if (info->shared_mode)
 417                                 mutex_unlock(&shared_mode_mutex);
 418                         return -EINVAL;
 419                 }
 420
 421                 bank = info->update_bank;
 422                 reg = info->update_reg;
 423                 mask = info->update_mask;
 424         }
 425
 426         if (dmr || ab8500_regulator_is_enabled(rdev)) {
 427                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 428                         bank, reg, mask, val);
 429                 if (ret < 0)
 430                         dev_err(rdev_get_dev(rdev),
 431                                 "couldn't set regulator mode\n");
 432
 433                 dev_vdbg(rdev_get_dev(rdev),
 434                         "%s-set_mode (bank, reg, mask, value): "
 435                         "0x%x, 0x%x, 0x%x, 0x%x\n",
 436                         info->desc.name, bank, reg,
 437                         mask, val);
 438         }
 439
 440         if (info->shared_mode)
 441                 mutex_unlock(&shared_mode_mutex);
 442
 443         return ret;
 444 }
 445
 446 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 447 {
 448         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 449         int ret;
 450         u8 val;
 451         u8 val_normal;
 452         u8 val_idle;
 453
 454         if (info == NULL) {
 455                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 456                 return -EINVAL;
 457         }
 458
 459         /* Need special handling for shared mode */
 460         if (info->shared_mode) {
 461                 if (info->shared_mode->lp_mode_req)
 462                         return REGULATOR_MODE_IDLE;
 463                 else
 464                         return REGULATOR_MODE_NORMAL;
 465         }
 466
 467         if (info->mode_mask) {
 468                 /* Dedicated register for handling mode */
 469                 ret = abx500_get_register_interruptible(info->dev,
 470                 info->mode_bank, info->mode_reg, &val);
 471                 val = val & info->mode_mask;
 472
 473                 val_normal = info->mode_val_normal;
 474                 val_idle = info->mode_val_idle;
 475         } else {
 476                 /* Mode register same as enable register */
 477                 val = info->update_val;
 478                 val_normal = info->update_val_normal;
 479                 val_idle = info->update_val_idle;
 480         }
 481
 482         if (val == val_normal)
 483                 ret = REGULATOR_MODE_NORMAL;
 484         else if (val == val_idle)
 485                 ret = REGULATOR_MODE_IDLE;
 486         else
 487                 ret = -EINVAL;
 488
 489         return ret;
 490 }
 491
 492 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 493 {
 494         int ret, val;
 495         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 496         u8 regval;
 497
 498         if (info == NULL) {
 499                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 500                 return -EINVAL;
 501         }
 502
 503         ret = abx500_get_register_interruptible(info->dev,
 504                         info->voltage_bank, info->voltage_reg, &regval);
 505         if (ret < 0) {
 506                 dev_err(rdev_get_dev(rdev),
 507                         "couldn't read voltage reg for regulator\n");
 508                 return ret;
 509         }
 510
 511         dev_vdbg(rdev_get_dev(rdev),
 512                 "%s-get_voltage (bank, reg, mask, shift, value): "
 513                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 514                 info->desc.name, info->voltage_bank,
 515                 info->voltage_reg, info->voltage_mask,
 516                 info->voltage_shift, regval);
 517
 518         val = regval & info->voltage_mask;
 519         return val >> info->voltage_shift;
 520 }
 521
 522 static int ab8540_aux3_regulator_get_voltage_sel(struct regulator_dev *rdev)
 523 {
 524         int ret, val;
 525         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 526         u8 regval, regval_expand;
 527
 528         if (info == NULL) {
 529                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 530                 return -EINVAL;
 531         }
 532
 533         ret = abx500_get_register_interruptible(info->dev,
 534                         info->voltage_bank, info->voltage_reg, &regval);
 535
 536         if (ret < 0) {
 537                 dev_err(rdev_get_dev(rdev),
 538                         "couldn't read voltage reg for regulator\n");
 539                 return ret;
 540         }
 541
 542         ret = abx500_get_register_interruptible(info->dev,
 543                         info->expand_register.voltage_bank,
 544                         info->expand_register.voltage_reg, &regval_expand);
 545
 546         if (ret < 0) {
 547                 dev_err(rdev_get_dev(rdev),
 548                         "couldn't read voltage reg for regulator\n");
 549                 return ret;
 550         }
 551
 552         dev_vdbg(rdev_get_dev(rdev),
 553                 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 554                 " 0x%x\n",
 555                 info->desc.name, info->voltage_bank, info->voltage_reg,
 556                 info->voltage_mask, regval);
 557         dev_vdbg(rdev_get_dev(rdev),
 558                 "%s-get_voltage expand (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 559                 " 0x%x\n",
 560                 info->desc.name, info->expand_register.voltage_bank,
 561                 info->expand_register.voltage_reg,
 562                 info->expand_register.voltage_mask, regval_expand);
 563
 564         if (regval_expand&(info->expand_register.voltage_mask))
 565                 /* Vaux3 has a different layout */
 566                 val = info->expand_register.voltage_limit;
 567         else
 568                 val = (regval & info->voltage_mask) >> info->voltage_shift;
 569
 570         return val;
 571 }
 572
 573 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 574                                             unsigned selector)
 575 {
 576         int ret;
 577         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 578         u8 regval;
 579
 580         if (info == NULL) {
 581                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 582                 return -EINVAL;
 583         }
 584
 585         /* set the registers for the request */
 586         regval = (u8)selector << info->voltage_shift;
 587         ret = abx500_mask_and_set_register_interruptible(info->dev,
 588                         info->voltage_bank, info->voltage_reg,
 589                         info->voltage_mask, regval);
 590         if (ret < 0)
 591                 dev_err(rdev_get_dev(rdev),
 592                 "couldn't set voltage reg for regulator\n");
 593
 594         dev_vdbg(rdev_get_dev(rdev),
 595                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 596                 " 0x%x\n",
 597                 info->desc.name, info->voltage_bank, info->voltage_reg,
 598                 info->voltage_mask, regval);
 599
 600         return ret;
 601 }
 602
 603 static int ab8540_aux3_regulator_set_voltage_sel(struct regulator_dev *rdev,
 604                                                 unsigned selector)
 605 {
 606         int ret;
 607         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 608         u8 regval;
 609
 610         if (info == NULL) {
 611                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 612                 return -EINVAL;
 613         }
 614
 615         if (selector >= info->expand_register.voltage_limit) {
 616                 /* Vaux3 bit4 has different layout */
 617                 regval = (u8)selector << info->expand_register.voltage_shift;
 618                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 619                                         info->expand_register.voltage_bank,
 620                                         info->expand_register.voltage_reg,
 621                                         info->expand_register.voltage_mask,
 622                                         regval);
 623         } else {
 624                 /* set the registers for the request */
 625                 regval = (u8)selector << info->voltage_shift;
 626                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 627                                 info->voltage_bank, info->voltage_reg,
 628                                 info->voltage_mask, regval);
 629         }
 630         if (ret < 0)
 631                 dev_err(rdev_get_dev(rdev),
 632                         "couldn't set voltage reg for regulator\n");
 633
 634         dev_vdbg(rdev_get_dev(rdev),
 635                         "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 636                         " 0x%x\n",
 637                         info->desc.name, info->voltage_bank, info->voltage_reg,
 638                         info->voltage_mask, regval);
 639
 640         return ret;
 641 }
 642
 643 static struct regulator_ops ab8500_regulator_volt_mode_ops = {
 644         .enable                 = ab8500_regulator_enable,
 645         .disable                = ab8500_regulator_disable,
 646         .is_enabled             = ab8500_regulator_is_enabled,
 647         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 648         .set_mode               = ab8500_regulator_set_mode,
 649         .get_mode               = ab8500_regulator_get_mode,
 650         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 651         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 652         .list_voltage           = regulator_list_voltage_table,
 653 };
 654
 655 static struct regulator_ops ab8540_aux3_regulator_volt_mode_ops = {
 656         .enable         = ab8500_regulator_enable,
 657         .disable        = ab8500_regulator_disable,
 658         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 659         .set_mode       = ab8500_regulator_set_mode,
 660         .get_mode       = ab8500_regulator_get_mode,
 661         .is_enabled     = ab8500_regulator_is_enabled,
 662         .get_voltage_sel = ab8540_aux3_regulator_get_voltage_sel,
 663         .set_voltage_sel = ab8540_aux3_regulator_set_voltage_sel,
 664         .list_voltage   = regulator_list_voltage_table,
 665 };
 666
 667 static struct regulator_ops ab8500_regulator_volt_ops = {
 668         .enable         = ab8500_regulator_enable,
 669         .disable        = ab8500_regulator_disable,
 670         .is_enabled     = ab8500_regulator_is_enabled,
 671         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 672         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 673         .list_voltage   = regulator_list_voltage_table,
 674 };
 675
 676 static struct regulator_ops ab8500_regulator_mode_ops = {
 677         .enable                 = ab8500_regulator_enable,
 678         .disable                = ab8500_regulator_disable,
 679         .is_enabled             = ab8500_regulator_is_enabled,
 680         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 681         .set_mode               = ab8500_regulator_set_mode,
 682         .get_mode               = ab8500_regulator_get_mode,
 683         .list_voltage           = regulator_list_voltage_table,
 684 };
 685
 686 static struct regulator_ops ab8500_regulator_ops = {
 687         .enable                 = ab8500_regulator_enable,
 688         .disable                = ab8500_regulator_disable,
 689         .is_enabled             = ab8500_regulator_is_enabled,
 690         .list_voltage           = regulator_list_voltage_table,
 691 };
 692
 693 static struct regulator_ops ab8500_regulator_anamic_mode_ops = {
 694         .enable         = ab8500_regulator_enable,
 695         .disable        = ab8500_regulator_disable,
 696         .is_enabled     = ab8500_regulator_is_enabled,
 697         .set_mode       = ab8500_regulator_set_mode,
 698         .get_mode       = ab8500_regulator_get_mode,
 699         .list_voltage   = regulator_list_voltage_table,
 700 };
 701
 702 /* AB8500 regulator information */
 703 static struct ab8500_regulator_info
 704                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 705         /*
 706          * Variable Voltage Regulators
 707          *   name, min mV, max mV,
 708          *   update bank, reg, mask, enable val
 709          *   volt bank, reg, mask
 710          */
 711         [AB8500_LDO_AUX1] = {
 712                 .desc = {
 713                         .name           = "LDO-AUX1",
 714                         .ops            = &ab8500_regulator_volt_mode_ops,
 715                         .type           = REGULATOR_VOLTAGE,
 716                         .id             = AB8500_LDO_AUX1,
 717                         .owner          = THIS_MODULE,
 718                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 719                         .volt_table     = ldo_vauxn_voltages,
 720                         .enable_time    = 200,
 721                 },
 722                 .load_lp_uA             = 5000,
 723                 .update_bank            = 0x04,
 724                 .update_reg             = 0x09,
 725                 .update_mask            = 0x03,
 726                 .update_val             = 0x01,
 727                 .update_val_idle        = 0x03,
 728                 .update_val_normal      = 0x01,
 729                 .voltage_bank           = 0x04,
 730                 .voltage_reg            = 0x1f,
 731                 .voltage_mask           = 0x0f,
 732         },
 733         [AB8500_LDO_AUX2] = {
 734                 .desc = {
 735                         .name           = "LDO-AUX2",
 736                         .ops            = &ab8500_regulator_volt_mode_ops,
 737                         .type           = REGULATOR_VOLTAGE,
 738                         .id             = AB8500_LDO_AUX2,
 739                         .owner          = THIS_MODULE,
 740                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 741                         .volt_table     = ldo_vauxn_voltages,
 742                         .enable_time    = 200,
 743                 },
 744                 .load_lp_uA             = 5000,
 745                 .update_bank            = 0x04,
 746                 .update_reg             = 0x09,
 747                 .update_mask            = 0x0c,
 748                 .update_val             = 0x04,
 749                 .update_val_idle        = 0x0c,
 750                 .update_val_normal      = 0x04,
 751                 .voltage_bank           = 0x04,
 752                 .voltage_reg            = 0x20,
 753                 .voltage_mask           = 0x0f,
 754         },
 755         [AB8500_LDO_AUX3] = {
 756                 .desc = {
 757                         .name           = "LDO-AUX3",
 758                         .ops            = &ab8500_regulator_volt_mode_ops,
 759                         .type           = REGULATOR_VOLTAGE,
 760                         .id             = AB8500_LDO_AUX3,
 761                         .owner          = THIS_MODULE,
 762                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 763                         .volt_table     = ldo_vaux3_voltages,
 764                         .enable_time    = 450,
 765                 },
 766                 .load_lp_uA             = 5000,
 767                 .update_bank            = 0x04,
 768                 .update_reg             = 0x0a,
 769                 .update_mask            = 0x03,
 770                 .update_val             = 0x01,
 771                 .update_val_idle        = 0x03,
 772                 .update_val_normal      = 0x01,
 773                 .voltage_bank           = 0x04,
 774                 .voltage_reg            = 0x21,
 775                 .voltage_mask           = 0x07,
 776         },
 777         [AB8500_LDO_INTCORE] = {
 778                 .desc = {
 779                         .name           = "LDO-INTCORE",
 780                         .ops            = &ab8500_regulator_volt_mode_ops,
 781                         .type           = REGULATOR_VOLTAGE,
 782                         .id             = AB8500_LDO_INTCORE,
 783                         .owner          = THIS_MODULE,
 784                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 785                         .volt_table     = ldo_vintcore_voltages,
 786                         .enable_time    = 750,
 787                 },
 788                 .load_lp_uA             = 5000,
 789                 .update_bank            = 0x03,
 790                 .update_reg             = 0x80,
 791                 .update_mask            = 0x44,
 792                 .update_val             = 0x44,
 793                 .update_val_idle        = 0x44,
 794                 .update_val_normal      = 0x04,
 795                 .voltage_bank           = 0x03,
 796                 .voltage_reg            = 0x80,
 797                 .voltage_mask           = 0x38,
 798                 .voltage_shift          = 3,
 799         },
 800
 801         /*
 802          * Fixed Voltage Regulators
 803          *   name, fixed mV,
 804          *   update bank, reg, mask, enable val
 805          */
 806         [AB8500_LDO_TVOUT] = {
 807                 .desc = {
 808                         .name           = "LDO-TVOUT",
 809                         .ops            = &ab8500_regulator_mode_ops,
 810                         .type           = REGULATOR_VOLTAGE,
 811                         .id             = AB8500_LDO_TVOUT,
 812                         .owner          = THIS_MODULE,
 813                         .n_voltages     = 1,
 814                         .volt_table     = fixed_2000000_voltage,
 815                         .enable_time    = 500,
 816                 },
 817                 .load_lp_uA             = 1000,
 818                 .update_bank            = 0x03,
 819                 .update_reg             = 0x80,
 820                 .update_mask            = 0x82,
 821                 .update_val             = 0x02,
 822                 .update_val_idle        = 0x82,
 823                 .update_val_normal      = 0x02,
 824         },
 825         [AB8500_LDO_AUDIO] = {
 826                 .desc = {
 827                         .name           = "LDO-AUDIO",
 828                         .ops            = &ab8500_regulator_ops,
 829                         .type           = REGULATOR_VOLTAGE,
 830                         .id             = AB8500_LDO_AUDIO,
 831                         .owner          = THIS_MODULE,
 832                         .n_voltages     = 1,
 833                         .enable_time    = 140,
 834                         .volt_table     = fixed_2000000_voltage,
 835                 },
 836                 .update_bank            = 0x03,
 837                 .update_reg             = 0x83,
 838                 .update_mask            = 0x02,
 839                 .update_val             = 0x02,
 840         },
 841         [AB8500_LDO_ANAMIC1] = {
 842                 .desc = {
 843                         .name           = "LDO-ANAMIC1",
 844                         .ops            = &ab8500_regulator_ops,
 845                         .type           = REGULATOR_VOLTAGE,
 846                         .id             = AB8500_LDO_ANAMIC1,
 847                         .owner          = THIS_MODULE,
 848                         .n_voltages     = 1,
 849                         .enable_time    = 500,
 850                         .volt_table     = fixed_2050000_voltage,
 851                 },
 852                 .update_bank            = 0x03,
 853                 .update_reg             = 0x83,
 854                 .update_mask            = 0x08,
 855                 .update_val             = 0x08,
 856         },
 857         [AB8500_LDO_ANAMIC2] = {
 858                 .desc = {
 859                         .name           = "LDO-ANAMIC2",
 860                         .ops            = &ab8500_regulator_ops,
 861                         .type           = REGULATOR_VOLTAGE,
 862                         .id             = AB8500_LDO_ANAMIC2,
 863                         .owner          = THIS_MODULE,
 864                         .n_voltages     = 1,
 865                         .enable_time    = 500,
 866                         .volt_table     = fixed_2050000_voltage,
 867                 },
 868                 .update_bank            = 0x03,
 869                 .update_reg             = 0x83,
 870                 .update_mask            = 0x10,
 871                 .update_val             = 0x10,
 872         },
 873         [AB8500_LDO_DMIC] = {
 874                 .desc = {
 875                         .name           = "LDO-DMIC",
 876                         .ops            = &ab8500_regulator_ops,
 877                         .type           = REGULATOR_VOLTAGE,
 878                         .id             = AB8500_LDO_DMIC,
 879                         .owner          = THIS_MODULE,
 880                         .n_voltages     = 1,
 881                         .enable_time    = 420,
 882                         .volt_table     = fixed_1800000_voltage,
 883                 },
 884                 .update_bank            = 0x03,
 885                 .update_reg             = 0x83,
 886                 .update_mask            = 0x04,
 887                 .update_val             = 0x04,
 888         },
 889
 890         /*
 891          * Regulators with fixed voltage and normal/idle modes
 892          */
 893         [AB8500_LDO_ANA] = {
 894                 .desc = {
 895                         .name           = "LDO-ANA",
 896                         .ops            = &ab8500_regulator_mode_ops,
 897                         .type           = REGULATOR_VOLTAGE,
 898                         .id             = AB8500_LDO_ANA,
 899                         .owner          = THIS_MODULE,
 900                         .n_voltages     = 1,
 901                         .enable_time    = 140,
 902                         .volt_table     = fixed_1200000_voltage,
 903                 },
 904                 .load_lp_uA             = 1000,
 905                 .update_bank            = 0x04,
 906                 .update_reg             = 0x06,
 907                 .update_mask            = 0x0c,
 908                 .update_val             = 0x04,
 909                 .update_val_idle        = 0x0c,
 910                 .update_val_normal      = 0x04,
 911         },
 912 };
 913
 914 /* AB8505 regulator information */
 915 static struct ab8500_regulator_info
 916                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 917         /*
 918          * Variable Voltage Regulators
 919          *   name, min mV, max mV,
 920          *   update bank, reg, mask, enable val
 921          *   volt bank, reg, mask
 922          */
 923         [AB8505_LDO_AUX1] = {
 924                 .desc = {
 925                         .name           = "LDO-AUX1",
 926                         .ops            = &ab8500_regulator_volt_mode_ops,
 927                         .type           = REGULATOR_VOLTAGE,
 928                         .id             = AB8505_LDO_AUX1,
 929                         .owner          = THIS_MODULE,
 930                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 931                         .volt_table     = ldo_vauxn_voltages,
 932                 },
 933                 .load_lp_uA             = 5000,
 934                 .update_bank            = 0x04,
 935                 .update_reg             = 0x09,
 936                 .update_mask            = 0x03,
 937                 .update_val             = 0x01,
 938                 .update_val_idle        = 0x03,
 939                 .update_val_normal      = 0x01,
 940                 .voltage_bank           = 0x04,
 941                 .voltage_reg            = 0x1f,
 942                 .voltage_mask           = 0x0f,
 943         },
 944         [AB8505_LDO_AUX2] = {
 945                 .desc = {
 946                         .name           = "LDO-AUX2",
 947                         .ops            = &ab8500_regulator_volt_mode_ops,
 948                         .type           = REGULATOR_VOLTAGE,
 949                         .id             = AB8505_LDO_AUX2,
 950                         .owner          = THIS_MODULE,
 951                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 952                         .volt_table     = ldo_vauxn_voltages,
 953                 },
 954                 .load_lp_uA             = 5000,
 955                 .update_bank            = 0x04,
 956                 .update_reg             = 0x09,
 957                 .update_mask            = 0x0c,
 958                 .update_val             = 0x04,
 959                 .update_val_idle        = 0x0c,
 960                 .update_val_normal      = 0x04,
 961                 .voltage_bank           = 0x04,
 962                 .voltage_reg            = 0x20,
 963                 .voltage_mask           = 0x0f,
 964         },
 965         [AB8505_LDO_AUX3] = {
 966                 .desc = {
 967                         .name           = "LDO-AUX3",
 968                         .ops            = &ab8500_regulator_volt_mode_ops,
 969                         .type           = REGULATOR_VOLTAGE,
 970                         .id             = AB8505_LDO_AUX3,
 971                         .owner          = THIS_MODULE,
 972                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 973                         .volt_table     = ldo_vaux3_voltages,
 974                 },
 975                 .load_lp_uA             = 5000,
 976                 .update_bank            = 0x04,
 977                 .update_reg             = 0x0a,
 978                 .update_mask            = 0x03,
 979                 .update_val             = 0x01,
 980                 .update_val_idle        = 0x03,
 981                 .update_val_normal      = 0x01,
 982                 .voltage_bank           = 0x04,
 983                 .voltage_reg            = 0x21,
 984                 .voltage_mask           = 0x07,
 985         },
 986         [AB8505_LDO_AUX4] = {
 987                 .desc = {
 988                         .name           = "LDO-AUX4",
 989                         .ops            = &ab8500_regulator_volt_mode_ops,
 990                         .type           = REGULATOR_VOLTAGE,
 991                         .id             = AB8505_LDO_AUX4,
 992                         .owner          = THIS_MODULE,
 993                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 994                         .volt_table     = ldo_vauxn_voltages,
 995                 },
 996                 .load_lp_uA             = 5000,
 997                 /* values for Vaux4Regu register */
 998                 .update_bank            = 0x04,
 999                 .update_reg             = 0x2e,
1000                 .update_mask            = 0x03,
1001                 .update_val             = 0x01,
1002                 .update_val_idle        = 0x03,
1003                 .update_val_normal      = 0x01,
1004                 /* values for Vaux4SEL register */
1005                 .voltage_bank           = 0x04,
1006                 .voltage_reg            = 0x2f,
1007                 .voltage_mask           = 0x0f,
1008         },
1009         [AB8505_LDO_AUX5] = {
1010                 .desc = {
1011                         .name           = "LDO-AUX5",
1012                         .ops            = &ab8500_regulator_volt_mode_ops,
1013                         .type           = REGULATOR_VOLTAGE,
1014                         .id             = AB8505_LDO_AUX5,
1015                         .owner          = THIS_MODULE,
1016                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
1017                         .volt_table     = ldo_vaux56_voltages,
1018                 },
1019                 .load_lp_uA             = 2000,
1020                 /* values for CtrlVaux5 register */
1021                 .update_bank            = 0x01,
1022                 .update_reg             = 0x55,
1023                 .update_mask            = 0x18,
1024                 .update_val             = 0x10,
1025                 .update_val_idle        = 0x18,
1026                 .update_val_normal      = 0x10,
1027                 .voltage_bank           = 0x01,
1028                 .voltage_reg            = 0x55,
1029                 .voltage_mask           = 0x07,
1030         },
1031         [AB8505_LDO_AUX6] = {
1032                 .desc = {
1033                         .name           = "LDO-AUX6",
1034                         .ops            = &ab8500_regulator_volt_mode_ops,
1035                         .type           = REGULATOR_VOLTAGE,
1036                         .id             = AB8505_LDO_AUX6,
1037                         .owner          = THIS_MODULE,
1038                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
1039                         .volt_table     = ldo_vaux56_voltages,
1040                 },
1041                 .load_lp_uA             = 2000,
1042                 /* values for CtrlVaux6 register */
1043                 .update_bank            = 0x01,
1044                 .update_reg             = 0x56,
1045                 .update_mask            = 0x18,
1046                 .update_val             = 0x10,
1047                 .update_val_idle        = 0x18,
1048                 .update_val_normal      = 0x10,
1049                 .voltage_bank           = 0x01,
1050                 .voltage_reg            = 0x56,
1051                 .voltage_mask           = 0x07,
1052         },
1053         [AB8505_LDO_INTCORE] = {
1054                 .desc = {
1055                         .name           = "LDO-INTCORE",
1056                         .ops            = &ab8500_regulator_volt_mode_ops,
1057                         .type           = REGULATOR_VOLTAGE,
1058                         .id             = AB8505_LDO_INTCORE,
1059                         .owner          = THIS_MODULE,
1060                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1061                         .volt_table     = ldo_vintcore_voltages,
1062                 },
1063                 .load_lp_uA             = 5000,
1064                 .update_bank            = 0x03,
1065                 .update_reg             = 0x80,
1066                 .update_mask            = 0x44,
1067                 .update_val             = 0x04,
1068                 .update_val_idle        = 0x44,
1069                 .update_val_normal      = 0x04,
1070                 .voltage_bank           = 0x03,
1071                 .voltage_reg            = 0x80,
1072                 .voltage_mask           = 0x38,
1073                 .voltage_shift          = 3,
1074         },
1075
1076         /*
1077          * Fixed Voltage Regulators
1078          *   name, fixed mV,
1079          *   update bank, reg, mask, enable val
1080          */
1081         [AB8505_LDO_ADC] = {
1082                 .desc = {
1083                         .name           = "LDO-ADC",
1084                         .ops            = &ab8500_regulator_mode_ops,
1085                         .type           = REGULATOR_VOLTAGE,
1086                         .id             = AB8505_LDO_ADC,
1087                         .owner          = THIS_MODULE,
1088                         .n_voltages     = 1,
1089                         .volt_table     = fixed_2000000_voltage,
1090                         .enable_time    = 10000,
1091                 },
1092                 .load_lp_uA             = 1000,
1093                 .update_bank            = 0x03,
1094                 .update_reg             = 0x80,
1095                 .update_mask            = 0x82,
1096                 .update_val             = 0x02,
1097                 .update_val_idle        = 0x82,
1098                 .update_val_normal      = 0x02,
1099         },
1100         [AB8505_LDO_USB] = {
1101                 .desc = {
1102                         .name           = "LDO-USB",
1103                         .ops            = &ab8500_regulator_mode_ops,
1104                         .type           = REGULATOR_VOLTAGE,
1105                         .id             = AB8505_LDO_USB,
1106                         .owner          = THIS_MODULE,
1107                         .n_voltages     = 1,
1108                         .volt_table     = fixed_3300000_voltage,
1109                 },
1110                 .update_bank            = 0x03,
1111                 .update_reg             = 0x82,
1112                 .update_mask            = 0x03,
1113                 .update_val             = 0x01,
1114                 .update_val_idle        = 0x03,
1115                 .update_val_normal      = 0x01,
1116         },
1117         [AB8505_LDO_AUDIO] = {
1118                 .desc = {
1119                         .name           = "LDO-AUDIO",
1120                         .ops            = &ab8500_regulator_volt_ops,
1121                         .type           = REGULATOR_VOLTAGE,
1122                         .id             = AB8505_LDO_AUDIO,
1123                         .owner          = THIS_MODULE,
1124                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
1125                         .volt_table     = ldo_vaudio_voltages,
1126                 },
1127                 .update_bank            = 0x03,
1128                 .update_reg             = 0x83,
1129                 .update_mask            = 0x02,
1130                 .update_val             = 0x02,
1131                 .voltage_bank           = 0x01,
1132                 .voltage_reg            = 0x57,
1133                 .voltage_mask           = 0x70,
1134                 .voltage_shift          = 4,
1135         },
1136         [AB8505_LDO_ANAMIC1] = {
1137                 .desc = {
1138                         .name           = "LDO-ANAMIC1",
1139                         .ops            = &ab8500_regulator_anamic_mode_ops,
1140                         .type           = REGULATOR_VOLTAGE,
1141                         .id             = AB8505_LDO_ANAMIC1,
1142                         .owner          = THIS_MODULE,
1143                         .n_voltages     = 1,
1144                         .volt_table     = fixed_2050000_voltage,
1145                 },
1146                 .shared_mode            = &ldo_anamic1_shared,
1147                 .update_bank            = 0x03,
1148                 .update_reg             = 0x83,
1149                 .update_mask            = 0x08,
1150                 .update_val             = 0x08,
1151                 .mode_bank              = 0x01,
1152                 .mode_reg               = 0x54,
1153                 .mode_mask              = 0x04,
1154                 .mode_val_idle          = 0x04,
1155                 .mode_val_normal        = 0x00,
1156         },
1157         [AB8505_LDO_ANAMIC2] = {
1158                 .desc = {
1159                         .name           = "LDO-ANAMIC2",
1160                         .ops            = &ab8500_regulator_anamic_mode_ops,
1161                         .type           = REGULATOR_VOLTAGE,
1162                         .id             = AB8505_LDO_ANAMIC2,
1163                         .owner          = THIS_MODULE,
1164                         .n_voltages     = 1,
1165                         .volt_table     = fixed_2050000_voltage,
1166                 },
1167                 .shared_mode            = &ldo_anamic2_shared,
1168                 .update_bank            = 0x03,
1169                 .update_reg             = 0x83,
1170                 .update_mask            = 0x10,
1171                 .update_val             = 0x10,
1172                 .mode_bank              = 0x01,
1173                 .mode_reg               = 0x54,
1174                 .mode_mask              = 0x04,
1175                 .mode_val_idle          = 0x04,
1176                 .mode_val_normal        = 0x00,
1177         },
1178         [AB8505_LDO_AUX8] = {
1179                 .desc = {
1180                         .name           = "LDO-AUX8",
1181                         .ops            = &ab8500_regulator_ops,
1182                         .type           = REGULATOR_VOLTAGE,
1183                         .id             = AB8505_LDO_AUX8,
1184                         .owner          = THIS_MODULE,
1185                         .n_voltages     = 1,
1186                         .volt_table     = fixed_1800000_voltage,
1187                 },
1188                 .update_bank            = 0x03,
1189                 .update_reg             = 0x83,
1190                 .update_mask            = 0x04,
1191                 .update_val             = 0x04,
1192         },
1193         /*
1194          * Regulators with fixed voltage and normal/idle modes
1195          */
1196         [AB8505_LDO_ANA] = {
1197                 .desc = {
1198                         .name           = "LDO-ANA",
1199                         .ops            = &ab8500_regulator_volt_mode_ops,
1200                         .type           = REGULATOR_VOLTAGE,
1201                         .id             = AB8505_LDO_ANA,
1202                         .owner          = THIS_MODULE,
1203                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1204                         .volt_table     = ldo_vana_voltages,
1205                 },
1206                 .load_lp_uA             = 1000,
1207                 .update_bank            = 0x04,
1208                 .update_reg             = 0x06,
1209                 .update_mask            = 0x0c,
1210                 .update_val             = 0x04,
1211                 .update_val_idle        = 0x0c,
1212                 .update_val_normal      = 0x04,
1213                 .voltage_bank           = 0x04,
1214                 .voltage_reg            = 0x29,
1215                 .voltage_mask           = 0x7,
1216         },
1217 };
1218
1219 /* AB9540 regulator information */
1220 static struct ab8500_regulator_info
1221                 ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
1222         /*
1223          * Variable Voltage Regulators
1224          *   name, min mV, max mV,
1225          *   update bank, reg, mask, enable val
1226          *   volt bank, reg, mask
1227          */
1228         [AB9540_LDO_AUX1] = {
1229                 .desc = {
1230                         .name           = "LDO-AUX1",
1231                         .ops            = &ab8500_regulator_volt_mode_ops,
1232                         .type           = REGULATOR_VOLTAGE,
1233                         .id             = AB9540_LDO_AUX1,
1234                         .owner          = THIS_MODULE,
1235                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1236                         .volt_table     = ldo_vauxn_voltages,
1237                 },
1238                 .load_lp_uA             = 5000,
1239                 .update_bank            = 0x04,
1240                 .update_reg             = 0x09,
1241                 .update_mask            = 0x03,
1242                 .update_val             = 0x01,
1243                 .update_val_idle        = 0x03,
1244                 .update_val_normal      = 0x01,
1245                 .voltage_bank           = 0x04,
1246                 .voltage_reg            = 0x1f,
1247                 .voltage_mask           = 0x0f,
1248         },
1249         [AB9540_LDO_AUX2] = {
1250                 .desc = {
1251                         .name           = "LDO-AUX2",
1252                         .ops            = &ab8500_regulator_volt_mode_ops,
1253                         .type           = REGULATOR_VOLTAGE,
1254                         .id             = AB9540_LDO_AUX2,
1255                         .owner          = THIS_MODULE,
1256                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1257                         .volt_table     = ldo_vauxn_voltages,
1258                 },
1259                 .load_lp_uA             = 5000,
1260                 .update_bank            = 0x04,
1261                 .update_reg             = 0x09,
1262                 .update_mask            = 0x0c,
1263                 .update_val             = 0x04,
1264                 .update_val_idle        = 0x0c,
1265                 .update_val_normal      = 0x04,
1266                 .voltage_bank           = 0x04,
1267                 .voltage_reg            = 0x20,
1268                 .voltage_mask           = 0x0f,
1269         },
1270         [AB9540_LDO_AUX3] = {
1271                 .desc = {
1272                         .name           = "LDO-AUX3",
1273                         .ops            = &ab8500_regulator_volt_mode_ops,
1274                         .type           = REGULATOR_VOLTAGE,
1275                         .id             = AB9540_LDO_AUX3,
1276                         .owner          = THIS_MODULE,
1277                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
1278                         .volt_table     = ldo_vaux3_voltages,
1279                 },
1280                 .load_lp_uA             = 5000,
1281                 .update_bank            = 0x04,
1282                 .update_reg             = 0x0a,
1283                 .update_mask            = 0x03,
1284                 .update_val             = 0x01,
1285                 .update_val_idle        = 0x03,
1286                 .update_val_normal      = 0x01,
1287                 .voltage_bank           = 0x04,
1288                 .voltage_reg            = 0x21,
1289                 .voltage_mask           = 0x07,
1290         },
1291         [AB9540_LDO_AUX4] = {
1292                 .desc = {
1293                         .name           = "LDO-AUX4",
1294                         .ops            = &ab8500_regulator_volt_mode_ops,
1295                         .type           = REGULATOR_VOLTAGE,
1296                         .id             = AB9540_LDO_AUX4,
1297                         .owner          = THIS_MODULE,
1298                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1299                         .volt_table     = ldo_vauxn_voltages,
1300                 },
1301                 .load_lp_uA             = 5000,
1302                 /* values for Vaux4Regu register */
1303                 .update_bank            = 0x04,
1304                 .update_reg             = 0x2e,
1305                 .update_mask            = 0x03,
1306                 .update_val             = 0x01,
1307                 .update_val_idle        = 0x03,
1308                 .update_val_normal      = 0x01,
1309                 /* values for Vaux4SEL register */
1310                 .voltage_bank           = 0x04,
1311                 .voltage_reg            = 0x2f,
1312                 .voltage_mask           = 0x0f,
1313         },
1314         [AB9540_LDO_INTCORE] = {
1315                 .desc = {
1316                         .name           = "LDO-INTCORE",
1317                         .ops            = &ab8500_regulator_volt_mode_ops,
1318                         .type           = REGULATOR_VOLTAGE,
1319                         .id             = AB9540_LDO_INTCORE,
1320                         .owner          = THIS_MODULE,
1321                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1322                         .volt_table     = ldo_vintcore_voltages,
1323                 },
1324                 .load_lp_uA             = 5000,
1325                 .update_bank            = 0x03,
1326                 .update_reg             = 0x80,
1327                 .update_mask            = 0x44,
1328                 .update_val             = 0x44,
1329                 .update_val_idle        = 0x44,
1330                 .update_val_normal      = 0x04,
1331                 .voltage_bank           = 0x03,
1332                 .voltage_reg            = 0x80,
1333                 .voltage_mask           = 0x38,
1334                 .voltage_shift          = 3,
1335         },
1336
1337         /*
1338          * Fixed Voltage Regulators
1339          *   name, fixed mV,
1340          *   update bank, reg, mask, enable val
1341          */
1342         [AB9540_LDO_TVOUT] = {
1343                 .desc = {
1344                         .name           = "LDO-TVOUT",
1345                         .ops            = &ab8500_regulator_mode_ops,
1346                         .type           = REGULATOR_VOLTAGE,
1347                         .id             = AB9540_LDO_TVOUT,
1348                         .owner          = THIS_MODULE,
1349                         .n_voltages     = 1,
1350                         .volt_table     = fixed_2000000_voltage,
1351                         .enable_time    = 10000,
1352                 },
1353                 .load_lp_uA             = 1000,
1354                 .update_bank            = 0x03,
1355                 .update_reg             = 0x80,
1356                 .update_mask            = 0x82,
1357                 .update_val             = 0x02,
1358                 .update_val_idle        = 0x82,
1359                 .update_val_normal      = 0x02,
1360         },
1361         [AB9540_LDO_USB] = {
1362                 .desc = {
1363                         .name           = "LDO-USB",
1364                         .ops            = &ab8500_regulator_ops,
1365                         .type           = REGULATOR_VOLTAGE,
1366                         .id             = AB9540_LDO_USB,
1367                         .owner          = THIS_MODULE,
1368                         .n_voltages     = 1,
1369                         .volt_table     = fixed_3300000_voltage,
1370                 },
1371                 .update_bank            = 0x03,
1372                 .update_reg             = 0x82,
1373                 .update_mask            = 0x03,
1374                 .update_val             = 0x01,
1375                 .update_val_idle        = 0x03,
1376                 .update_val_normal      = 0x01,
1377         },
1378         [AB9540_LDO_AUDIO] = {
1379                 .desc = {
1380                         .name           = "LDO-AUDIO",
1381                         .ops            = &ab8500_regulator_ops,
1382                         .type           = REGULATOR_VOLTAGE,
1383                         .id             = AB9540_LDO_AUDIO,
1384                         .owner          = THIS_MODULE,
1385                         .n_voltages     = 1,
1386                         .volt_table     = fixed_2000000_voltage,
1387                 },
1388                 .update_bank            = 0x03,
1389                 .update_reg             = 0x83,
1390                 .update_mask            = 0x02,
1391                 .update_val             = 0x02,
1392         },
1393         [AB9540_LDO_ANAMIC1] = {
1394                 .desc = {
1395                         .name           = "LDO-ANAMIC1",
1396                         .ops            = &ab8500_regulator_ops,
1397                         .type           = REGULATOR_VOLTAGE,
1398                         .id             = AB9540_LDO_ANAMIC1,
1399                         .owner          = THIS_MODULE,
1400                         .n_voltages     = 1,
1401                         .volt_table     = fixed_2050000_voltage,
1402                 },
1403                 .update_bank            = 0x03,
1404                 .update_reg             = 0x83,
1405                 .update_mask            = 0x08,
1406                 .update_val             = 0x08,
1407         },
1408         [AB9540_LDO_ANAMIC2] = {
1409                 .desc = {
1410                         .name           = "LDO-ANAMIC2",
1411                         .ops            = &ab8500_regulator_ops,
1412                         .type           = REGULATOR_VOLTAGE,
1413                         .id             = AB9540_LDO_ANAMIC2,
1414                         .owner          = THIS_MODULE,
1415                         .n_voltages     = 1,
1416                         .volt_table     = fixed_2050000_voltage,
1417                 },
1418                 .update_bank            = 0x03,
1419                 .update_reg             = 0x83,
1420                 .update_mask            = 0x10,
1421                 .update_val             = 0x10,
1422         },
1423         [AB9540_LDO_DMIC] = {
1424                 .desc = {
1425                         .name           = "LDO-DMIC",
1426                         .ops            = &ab8500_regulator_ops,
1427                         .type           = REGULATOR_VOLTAGE,
1428                         .id             = AB9540_LDO_DMIC,
1429                         .owner          = THIS_MODULE,
1430                         .n_voltages     = 1,
1431                         .volt_table     = fixed_1800000_voltage,
1432                 },
1433                 .update_bank            = 0x03,
1434                 .update_reg             = 0x83,
1435                 .update_mask            = 0x04,
1436                 .update_val             = 0x04,
1437         },
1438
1439         /*
1440          * Regulators with fixed voltage and normal/idle modes
1441          */
1442         [AB9540_LDO_ANA] = {
1443                 .desc = {
1444                         .name           = "LDO-ANA",
1445                         .ops            = &ab8500_regulator_mode_ops,
1446                         .type           = REGULATOR_VOLTAGE,
1447                         .id             = AB9540_LDO_ANA,
1448                         .owner          = THIS_MODULE,
1449                         .n_voltages     = 1,
1450                         .volt_table     = fixed_1200000_voltage,
1451                 },
1452                 .load_lp_uA             = 1000,
1453                 .update_bank            = 0x04,
1454                 .update_reg             = 0x06,
1455                 .update_mask            = 0x0c,
1456                 .update_val             = 0x08,
1457                 .update_val_idle        = 0x0c,
1458                 .update_val_normal      = 0x08,
1459         },
1460 };
1461
1462 /* AB8540 regulator information */
1463 static struct ab8500_regulator_info
1464                 ab8540_regulator_info[AB8540_NUM_REGULATORS] = {
1465         /*
1466          * Variable Voltage Regulators
1467          *   name, min mV, max mV,
1468          *   update bank, reg, mask, enable val
1469          *   volt bank, reg, mask
1470          */
1471         [AB8540_LDO_AUX1] = {
1472                 .desc = {
1473                         .name           = "LDO-AUX1",
1474                         .ops            = &ab8500_regulator_volt_mode_ops,
1475                         .type           = REGULATOR_VOLTAGE,
1476                         .id             = AB8540_LDO_AUX1,
1477                         .owner          = THIS_MODULE,
1478                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1479                         .volt_table     = ldo_vauxn_voltages,
1480                 },
1481                 .load_lp_uA             = 5000,
1482                 .update_bank            = 0x04,
1483                 .update_reg             = 0x09,
1484                 .update_mask            = 0x03,
1485                 .update_val             = 0x01,
1486                 .update_val_idle        = 0x03,
1487                 .update_val_normal      = 0x01,
1488                 .voltage_bank           = 0x04,
1489                 .voltage_reg            = 0x1f,
1490                 .voltage_mask           = 0x0f,
1491         },
1492         [AB8540_LDO_AUX2] = {
1493                 .desc = {
1494                         .name           = "LDO-AUX2",
1495                         .ops            = &ab8500_regulator_volt_mode_ops,
1496                         .type           = REGULATOR_VOLTAGE,
1497                         .id             = AB8540_LDO_AUX2,
1498                         .owner          = THIS_MODULE,
1499                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1500                         .volt_table     = ldo_vauxn_voltages,
1501                 },
1502                 .load_lp_uA             = 5000,
1503                 .update_bank            = 0x04,
1504                 .update_reg             = 0x09,
1505                 .update_mask            = 0x0c,
1506                 .update_val             = 0x04,
1507                 .update_val_idle        = 0x0c,
1508                 .update_val_normal      = 0x04,
1509                 .voltage_bank           = 0x04,
1510                 .voltage_reg            = 0x20,
1511                 .voltage_mask           = 0x0f,
1512         },
1513         [AB8540_LDO_AUX3] = {
1514                 .desc = {
1515                         .name           = "LDO-AUX3",
1516                         .ops            = &ab8540_aux3_regulator_volt_mode_ops,
1517                         .type           = REGULATOR_VOLTAGE,
1518                         .id             = AB8540_LDO_AUX3,
1519                         .owner          = THIS_MODULE,
1520                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_ab8540_voltages),
1521                         .volt_table     = ldo_vaux3_ab8540_voltages,
1522                 },
1523                 .load_lp_uA             = 5000,
1524                 .update_bank            = 0x04,
1525                 .update_reg             = 0x0a,
1526                 .update_mask            = 0x03,
1527                 .update_val             = 0x01,
1528                 .update_val_idle        = 0x03,
1529                 .update_val_normal      = 0x01,
1530                 .voltage_bank           = 0x04,
1531                 .voltage_reg            = 0x21,
1532                 .voltage_mask           = 0x07,
1533                 .expand_register = {
1534                         .voltage_limit          = 8,
1535                         .voltage_bank           = 0x04,
1536                         .voltage_reg            = 0x01,
1537                         .voltage_mask           = 0x10,
1538                         .voltage_shift          = 1,
1539                 }
1540         },
1541         [AB8540_LDO_AUX4] = {
1542                 .desc = {
1543                         .name           = "LDO-AUX4",
1544                         .ops            = &ab8500_regulator_volt_mode_ops,
1545                         .type           = REGULATOR_VOLTAGE,
1546                         .id             = AB8540_LDO_AUX4,
1547                         .owner          = THIS_MODULE,
1548                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1549                         .volt_table     = ldo_vauxn_voltages,
1550                 },
1551                 .load_lp_uA             = 5000,
1552                 /* values for Vaux4Regu register */
1553                 .update_bank            = 0x04,
1554                 .update_reg             = 0x2e,
1555                 .update_mask            = 0x03,
1556                 .update_val             = 0x01,
1557                 .update_val_idle        = 0x03,
1558                 .update_val_normal      = 0x01,
1559                 /* values for Vaux4SEL register */
1560                 .voltage_bank           = 0x04,
1561                 .voltage_reg            = 0x2f,
1562                 .voltage_mask           = 0x0f,
1563         },
1564         [AB8540_LDO_AUX5] = {
1565                 .desc = {
1566                         .name           = "LDO-AUX5",
1567                         .ops            = &ab8500_regulator_volt_mode_ops,
1568                         .type           = REGULATOR_VOLTAGE,
1569                         .id             = AB8540_LDO_AUX5,
1570                         .owner          = THIS_MODULE,
1571                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1572                         .volt_table     = ldo_vaux56_ab8540_voltages,
1573                 },
1574                 .load_lp_uA             = 20000,
1575                 /* values for Vaux5Regu register */
1576                 .update_bank            = 0x04,
1577                 .update_reg             = 0x32,
1578                 .update_mask            = 0x03,
1579                 .update_val             = 0x01,
1580                 .update_val_idle        = 0x03,
1581                 .update_val_normal      = 0x01,
1582                 /* values for Vaux5SEL register */
1583                 .voltage_bank           = 0x04,
1584                 .voltage_reg            = 0x33,
1585                 .voltage_mask           = 0x3f,
1586         },
1587         [AB8540_LDO_AUX6] = {
1588                 .desc = {
1589                         .name           = "LDO-AUX6",
1590                         .ops            = &ab8500_regulator_volt_mode_ops,
1591                         .type           = REGULATOR_VOLTAGE,
1592                         .id             = AB8540_LDO_AUX6,
1593                         .owner          = THIS_MODULE,
1594                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1595                         .volt_table     = ldo_vaux56_ab8540_voltages,
1596                 },
1597                 .load_lp_uA             = 20000,
1598                 /* values for Vaux6Regu register */
1599                 .update_bank            = 0x04,
1600                 .update_reg             = 0x35,
1601                 .update_mask            = 0x03,
1602                 .update_val             = 0x01,
1603                 .update_val_idle        = 0x03,
1604                 .update_val_normal      = 0x01,
1605                 /* values for Vaux6SEL register */
1606                 .voltage_bank           = 0x04,
1607                 .voltage_reg            = 0x36,
1608                 .voltage_mask           = 0x3f,
1609         },
1610         [AB8540_LDO_INTCORE] = {
1611                 .desc = {
1612                         .name           = "LDO-INTCORE",
1613                         .ops            = &ab8500_regulator_volt_mode_ops,
1614                         .type           = REGULATOR_VOLTAGE,
1615                         .id             = AB8540_LDO_INTCORE,
1616                         .owner          = THIS_MODULE,
1617                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1618                         .volt_table     = ldo_vintcore_voltages,
1619                 },
1620                 .load_lp_uA             = 5000,
1621                 .update_bank            = 0x03,
1622                 .update_reg             = 0x80,
1623                 .update_mask            = 0x44,
1624                 .update_val             = 0x44,
1625                 .update_val_idle        = 0x44,
1626                 .update_val_normal      = 0x04,
1627                 .voltage_bank           = 0x03,
1628                 .voltage_reg            = 0x80,
1629                 .voltage_mask           = 0x38,
1630                 .voltage_shift          = 3,
1631         },
1632
1633         /*
1634          * Fixed Voltage Regulators
1635          *   name, fixed mV,
1636          *   update bank, reg, mask, enable val
1637          */
1638         [AB8540_LDO_TVOUT] = {
1639                 .desc = {
1640                         .name           = "LDO-TVOUT",
1641                         .ops            = &ab8500_regulator_mode_ops,
1642                         .type           = REGULATOR_VOLTAGE,
1643                         .id             = AB8540_LDO_TVOUT,
1644                         .owner          = THIS_MODULE,
1645                         .n_voltages     = 1,
1646                         .volt_table     = fixed_2000000_voltage,
1647                         .enable_time    = 10000,
1648                 },
1649                 .load_lp_uA             = 1000,
1650                 .update_bank            = 0x03,
1651                 .update_reg             = 0x80,
1652                 .update_mask            = 0x82,
1653                 .update_val             = 0x02,
1654                 .update_val_idle        = 0x82,
1655                 .update_val_normal      = 0x02,
1656         },
1657         [AB8540_LDO_AUDIO] = {
1658                 .desc = {
1659                         .name           = "LDO-AUDIO",
1660                         .ops            = &ab8500_regulator_ops,
1661                         .type           = REGULATOR_VOLTAGE,
1662                         .id             = AB8540_LDO_AUDIO,
1663                         .owner          = THIS_MODULE,
1664                         .n_voltages     = 1,
1665                         .volt_table     = fixed_2000000_voltage,
1666                 },
1667                 .update_bank            = 0x03,
1668                 .update_reg             = 0x83,
1669                 .update_mask            = 0x02,
1670                 .update_val             = 0x02,
1671         },
1672         [AB8540_LDO_ANAMIC1] = {
1673                 .desc = {
1674                         .name           = "LDO-ANAMIC1",
1675                         .ops            = &ab8500_regulator_anamic_mode_ops,
1676                         .type           = REGULATOR_VOLTAGE,
1677                         .id             = AB8540_LDO_ANAMIC1,
1678                         .owner          = THIS_MODULE,
1679                         .n_voltages     = 1,
1680                         .volt_table     = fixed_2050000_voltage,
1681                 },
1682                 .shared_mode            = &ab8540_ldo_anamic1_shared,
1683                 .update_bank            = 0x03,
1684                 .update_reg             = 0x83,
1685                 .update_mask            = 0x08,
1686                 .update_val             = 0x08,
1687                 .mode_bank              = 0x03,
1688                 .mode_reg               = 0x83,
1689                 .mode_mask              = 0x20,
1690                 .mode_val_idle          = 0x20,
1691                 .mode_val_normal        = 0x00,
1692         },
1693         [AB8540_LDO_ANAMIC2] = {
1694                 .desc = {
1695                         .name           = "LDO-ANAMIC2",
1696                         .ops            = &ab8500_regulator_anamic_mode_ops,
1697                         .type           = REGULATOR_VOLTAGE,
1698                         .id             = AB8540_LDO_ANAMIC2,
1699                         .owner          = THIS_MODULE,
1700                         .n_voltages     = 1,
1701                         .volt_table     = fixed_2050000_voltage,
1702                 },
1703                 .shared_mode            = &ab8540_ldo_anamic2_shared,
1704                 .update_bank            = 0x03,
1705                 .update_reg             = 0x83,
1706                 .update_mask            = 0x10,
1707                 .update_val             = 0x10,
1708                 .mode_bank              = 0x03,
1709                 .mode_reg               = 0x83,
1710                 .mode_mask              = 0x20,
1711                 .mode_val_idle          = 0x20,
1712                 .mode_val_normal        = 0x00,
1713         },
1714         [AB8540_LDO_DMIC] = {
1715                 .desc = {
1716                         .name           = "LDO-DMIC",
1717                         .ops            = &ab8500_regulator_volt_mode_ops,
1718                         .type           = REGULATOR_VOLTAGE,
1719                         .id             = AB8540_LDO_DMIC,
1720                         .owner          = THIS_MODULE,
1721                         .n_voltages     = ARRAY_SIZE(ldo_vdmic_voltages),
1722                         .volt_table     = ldo_vdmic_voltages,
1723                 },
1724                 .load_lp_uA             = 1000,
1725                 .update_bank            = 0x03,
1726                 .update_reg             = 0x83,
1727                 .update_mask            = 0x04,
1728                 .update_val             = 0x04,
1729                 .voltage_bank           = 0x03,
1730                 .voltage_reg            = 0x83,
1731                 .voltage_mask           = 0xc0,
1732                 .voltage_shift          = 6,
1733         },
1734
1735         /*
1736          * Regulators with fixed voltage and normal/idle modes
1737          */
1738         [AB8540_LDO_ANA] = {
1739                 .desc = {
1740                         .name           = "LDO-ANA",
1741                         .ops            = &ab8500_regulator_mode_ops,
1742                         .type           = REGULATOR_VOLTAGE,
1743                         .id             = AB8540_LDO_ANA,
1744                         .owner          = THIS_MODULE,
1745                         .n_voltages     = 1,
1746                         .volt_table     = fixed_1200000_voltage,
1747                 },
1748                 .load_lp_uA             = 1000,
1749                 .update_bank            = 0x04,
1750                 .update_reg             = 0x06,
1751                 .update_mask            = 0x0c,
1752                 .update_val             = 0x04,
1753                 .update_val_idle        = 0x0c,
1754                 .update_val_normal      = 0x04,
1755         },
1756         [AB8540_LDO_SDIO] = {
1757                 .desc = {
1758                         .name           = "LDO-SDIO",
1759                         .ops            = &ab8500_regulator_volt_mode_ops,
1760                         .type           = REGULATOR_VOLTAGE,
1761                         .id             = AB8540_LDO_SDIO,
1762                         .owner          = THIS_MODULE,
1763                         .n_voltages     = ARRAY_SIZE(ldo_sdio_voltages),
1764                         .volt_table     = ldo_sdio_voltages,
1765                 },
1766                 .load_lp_uA             = 5000,
1767                 .update_bank            = 0x03,
1768                 .update_reg             = 0x88,
1769                 .update_mask            = 0x30,
1770                 .update_val             = 0x10,
1771                 .update_val_idle        = 0x30,
1772                 .update_val_normal      = 0x10,
1773                 .voltage_bank           = 0x03,
1774                 .voltage_reg            = 0x88,
1775                 .voltage_mask           = 0x07,
1776         },
1777 };
1778
1779 static struct ab8500_shared_mode ldo_anamic1_shared = {
1780         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1781 };
1782
1783 static struct ab8500_shared_mode ldo_anamic2_shared = {
1784         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1785 };
1786
1787 static struct ab8500_shared_mode ab8540_ldo_anamic1_shared = {
1788         .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC2],
1789 };
1790
1791 static struct ab8500_shared_mode ab8540_ldo_anamic2_shared = {
1792         .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC1],
1793 };
1794
1795 struct ab8500_reg_init {
1796         u8 bank;
1797         u8 addr;
1798         u8 mask;
1799 };
1800
1801 #define REG_INIT(_id, _bank, _addr, _mask)      \
1802         [_id] = {                               \
1803                 .bank = _bank,                  \
1804                 .addr = _addr,                  \
1805                 .mask = _mask,                  \
1806         }
1807
1808 /* AB8500 register init */
1809 static struct ab8500_reg_init ab8500_reg_init[] = {
1810         /*
1811          * 0x30, VanaRequestCtrl
1812          * 0xc0, VextSupply1RequestCtrl
1813          */
1814         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1815         /*
1816          * 0x03, VextSupply2RequestCtrl
1817          * 0x0c, VextSupply3RequestCtrl
1818          * 0x30, Vaux1RequestCtrl
1819          * 0xc0, Vaux2RequestCtrl
1820          */
1821         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1822         /*
1823          * 0x03, Vaux3RequestCtrl
1824          * 0x04, SwHPReq
1825          */
1826         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1827         /*
1828          * 0x08, VanaSysClkReq1HPValid
1829          * 0x20, Vaux1SysClkReq1HPValid
1830          * 0x40, Vaux2SysClkReq1HPValid
1831          * 0x80, Vaux3SysClkReq1HPValid
1832          */
1833         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1834         /*
1835          * 0x10, VextSupply1SysClkReq1HPValid
1836          * 0x20, VextSupply2SysClkReq1HPValid
1837          * 0x40, VextSupply3SysClkReq1HPValid
1838          */
1839         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1840         /*
1841          * 0x08, VanaHwHPReq1Valid
1842          * 0x20, Vaux1HwHPReq1Valid
1843          * 0x40, Vaux2HwHPReq1Valid
1844          * 0x80, Vaux3HwHPReq1Valid
1845          */
1846         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1847         /*
1848          * 0x01, VextSupply1HwHPReq1Valid
1849          * 0x02, VextSupply2HwHPReq1Valid
1850          * 0x04, VextSupply3HwHPReq1Valid
1851          */
1852         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1853         /*
1854          * 0x08, VanaHwHPReq2Valid
1855          * 0x20, Vaux1HwHPReq2Valid
1856          * 0x40, Vaux2HwHPReq2Valid
1857          * 0x80, Vaux3HwHPReq2Valid
1858          */
1859         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1860         /*
1861          * 0x01, VextSupply1HwHPReq2Valid
1862          * 0x02, VextSupply2HwHPReq2Valid
1863          * 0x04, VextSupply3HwHPReq2Valid
1864          */
1865         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1866         /*
1867          * 0x20, VanaSwHPReqValid
1868          * 0x80, Vaux1SwHPReqValid
1869          */
1870         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1871         /*
1872          * 0x01, Vaux2SwHPReqValid
1873          * 0x02, Vaux3SwHPReqValid
1874          * 0x04, VextSupply1SwHPReqValid
1875          * 0x08, VextSupply2SwHPReqValid
1876          * 0x10, VextSupply3SwHPReqValid
1877          */
1878         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1879         /*
1880          * 0x02, SysClkReq2Valid1
1881          * 0x04, SysClkReq3Valid1
1882          * 0x08, SysClkReq4Valid1
1883          * 0x10, SysClkReq5Valid1
1884          * 0x20, SysClkReq6Valid1
1885          * 0x40, SysClkReq7Valid1
1886          * 0x80, SysClkReq8Valid1
1887          */
1888         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1889         /*
1890          * 0x02, SysClkReq2Valid2
1891          * 0x04, SysClkReq3Valid2
1892          * 0x08, SysClkReq4Valid2
1893          * 0x10, SysClkReq5Valid2
1894          * 0x20, SysClkReq6Valid2
1895          * 0x40, SysClkReq7Valid2
1896          * 0x80, SysClkReq8Valid2
1897          */
1898         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1899         /*
1900          * 0x02, VTVoutEna
1901          * 0x04, Vintcore12Ena
1902          * 0x38, Vintcore12Sel
1903          * 0x40, Vintcore12LP
1904          * 0x80, VTVoutLP
1905          */
1906         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1907         /*
1908          * 0x02, VaudioEna
1909          * 0x04, VdmicEna
1910          * 0x08, Vamic1Ena
1911          * 0x10, Vamic2Ena
1912          */
1913         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1914         /*
1915          * 0x01, Vamic1_dzout
1916          * 0x02, Vamic2_dzout
1917          */
1918         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1919         /*
1920          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1921          * 0x0c, VanaRegu
1922          */
1923         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1924         /*
1925          * 0x01, VrefDDREna
1926          * 0x02, VrefDDRSleepMode
1927          */
1928         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1929         /*
1930          * 0x03, VextSupply1Regu
1931          * 0x0c, VextSupply2Regu
1932          * 0x30, VextSupply3Regu
1933          * 0x40, ExtSupply2Bypass
1934          * 0x80, ExtSupply3Bypass
1935          */
1936         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1937         /*
1938          * 0x03, Vaux1Regu
1939          * 0x0c, Vaux2Regu
1940          */
1941         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1942         /*
1943          * 0x03, Vaux3Regu
1944          */
1945         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1946         /*
1947          * 0x0f, Vaux1Sel
1948          */
1949         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1950         /*
1951          * 0x0f, Vaux2Sel
1952          */
1953         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1954         /*
1955          * 0x07, Vaux3Sel
1956          */
1957         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1958         /*
1959          * 0x01, VextSupply12LP
1960          */
1961         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1962         /*
1963          * 0x04, Vaux1Disch
1964          * 0x08, Vaux2Disch
1965          * 0x10, Vaux3Disch
1966          * 0x20, Vintcore12Disch
1967          * 0x40, VTVoutDisch
1968          * 0x80, VaudioDisch
1969          */
1970         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1971         /*
1972          * 0x02, VanaDisch
1973          * 0x04, VdmicPullDownEna
1974          * 0x10, VdmicDisch
1975          */
1976         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1977 };
1978
1979 /* AB8505 register init */
1980 static struct ab8500_reg_init ab8505_reg_init[] = {
1981         /*
1982          * 0x03, VarmRequestCtrl
1983          * 0x0c, VsmpsCRequestCtrl
1984          * 0x30, VsmpsARequestCtrl
1985          * 0xc0, VsmpsBRequestCtrl
1986          */
1987         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1988         /*
1989          * 0x03, VsafeRequestCtrl
1990          * 0x0c, VpllRequestCtrl
1991          * 0x30, VanaRequestCtrl
1992          */
1993         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
1994         /*
1995          * 0x30, Vaux1RequestCtrl
1996          * 0xc0, Vaux2RequestCtrl
1997          */
1998         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
1999         /*
2000          * 0x03, Vaux3RequestCtrl
2001          * 0x04, SwHPReq
2002          */
2003         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2004         /*
2005          * 0x01, VsmpsASysClkReq1HPValid
2006          * 0x02, VsmpsBSysClkReq1HPValid
2007          * 0x04, VsafeSysClkReq1HPValid
2008          * 0x08, VanaSysClkReq1HPValid
2009          * 0x10, VpllSysClkReq1HPValid
2010          * 0x20, Vaux1SysClkReq1HPValid
2011          * 0x40, Vaux2SysClkReq1HPValid
2012          * 0x80, Vaux3SysClkReq1HPValid
2013          */
2014         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2015         /*
2016          * 0x01, VsmpsCSysClkReq1HPValid
2017          * 0x02, VarmSysClkReq1HPValid
2018          * 0x04, VbbSysClkReq1HPValid
2019          * 0x08, VsmpsMSysClkReq1HPValid
2020          */
2021         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
2022         /*
2023          * 0x01, VsmpsAHwHPReq1Valid
2024          * 0x02, VsmpsBHwHPReq1Valid
2025          * 0x04, VsafeHwHPReq1Valid
2026          * 0x08, VanaHwHPReq1Valid
2027          * 0x10, VpllHwHPReq1Valid
2028          * 0x20, Vaux1HwHPReq1Valid
2029          * 0x40, Vaux2HwHPReq1Valid
2030          * 0x80, Vaux3HwHPReq1Valid
2031          */
2032         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2033         /*
2034          * 0x08, VsmpsMHwHPReq1Valid
2035          */
2036         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
2037         /*
2038          * 0x01, VsmpsAHwHPReq2Valid
2039          * 0x02, VsmpsBHwHPReq2Valid
2040          * 0x04, VsafeHwHPReq2Valid
2041          * 0x08, VanaHwHPReq2Valid
2042          * 0x10, VpllHwHPReq2Valid
2043          * 0x20, Vaux1HwHPReq2Valid
2044          * 0x40, Vaux2HwHPReq2Valid
2045          * 0x80, Vaux3HwHPReq2Valid
2046          */
2047         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2048         /*
2049          * 0x08, VsmpsMHwHPReq2Valid
2050          */
2051         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
2052         /*
2053          * 0x01, VsmpsCSwHPReqValid
2054          * 0x02, VarmSwHPReqValid
2055          * 0x04, VsmpsASwHPReqValid
2056          * 0x08, VsmpsBSwHPReqValid
2057          * 0x10, VsafeSwHPReqValid
2058          * 0x20, VanaSwHPReqValid
2059          * 0x40, VpllSwHPReqValid
2060          * 0x80, Vaux1SwHPReqValid
2061          */
2062         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2063         /*
2064          * 0x01, Vaux2SwHPReqValid
2065          * 0x02, Vaux3SwHPReqValid
2066          * 0x20, VsmpsMSwHPReqValid
2067          */
2068         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
2069         /*
2070          * 0x02, SysClkReq2Valid1
2071          * 0x04, SysClkReq3Valid1
2072          * 0x08, SysClkReq4Valid1
2073          */
2074         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
2075         /*
2076          * 0x02, SysClkReq2Valid2
2077          * 0x04, SysClkReq3Valid2
2078          * 0x08, SysClkReq4Valid2
2079          */
2080         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
2081         /*
2082          * 0x01, Vaux4SwHPReqValid
2083          * 0x02, Vaux4HwHPReq2Valid
2084          * 0x04, Vaux4HwHPReq1Valid
2085          * 0x08, Vaux4SysClkReq1HPValid
2086          */
2087         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2088         /*
2089          * 0x02, VadcEna
2090          * 0x04, VintCore12Ena
2091          * 0x38, VintCore12Sel
2092          * 0x40, VintCore12LP
2093          * 0x80, VadcLP
2094          */
2095         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
2096         /*
2097          * 0x02, VaudioEna
2098          * 0x04, VdmicEna
2099          * 0x08, Vamic1Ena
2100          * 0x10, Vamic2Ena
2101          */
2102         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2103         /*
2104          * 0x01, Vamic1_dzout
2105          * 0x02, Vamic2_dzout
2106          */
2107         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2108         /*
2109          * 0x03, VsmpsARegu
2110          * 0x0c, VsmpsASelCtrl
2111          * 0x10, VsmpsAAutoMode
2112          * 0x20, VsmpsAPWMMode
2113          */
2114         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
2115         /*
2116          * 0x03, VsmpsBRegu
2117          * 0x0c, VsmpsBSelCtrl
2118          * 0x10, VsmpsBAutoMode
2119          * 0x20, VsmpsBPWMMode
2120          */
2121         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
2122         /*
2123          * 0x03, VsafeRegu
2124          * 0x0c, VsafeSelCtrl
2125          * 0x10, VsafeAutoMode
2126          * 0x20, VsafePWMMode
2127          */
2128         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
2129         /*
2130          * 0x03, VpllRegu (NOTE! PRCMU register bits)
2131          * 0x0c, VanaRegu
2132          */
2133         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2134         /*
2135          * 0x03, VextSupply1Regu
2136          * 0x0c, VextSupply2Regu
2137          * 0x30, VextSupply3Regu
2138          * 0x40, ExtSupply2Bypass
2139          * 0x80, ExtSupply3Bypass
2140          */
2141         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2142         /*
2143          * 0x03, Vaux1Regu
2144          * 0x0c, Vaux2Regu
2145          */
2146         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
2147         /*
2148          * 0x0f, Vaux3Regu
2149          */
2150         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2151         /*
2152          * 0x3f, VsmpsASel1
2153          */
2154         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
2155         /*
2156          * 0x3f, VsmpsASel2
2157          */
2158         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
2159         /*
2160          * 0x3f, VsmpsASel3
2161          */
2162         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
2163         /*
2164          * 0x3f, VsmpsBSel1
2165          */
2166         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
2167         /*
2168          * 0x3f, VsmpsBSel2
2169          */
2170         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
2171         /*
2172          * 0x3f, VsmpsBSel3
2173          */
2174         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
2175         /*
2176          * 0x7f, VsafeSel1
2177          */
2178         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
2179         /*
2180          * 0x3f, VsafeSel2
2181          */
2182         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
2183         /*
2184          * 0x3f, VsafeSel3
2185          */
2186         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
2187         /*
2188          * 0x0f, Vaux1Sel
2189          */
2190         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
2191         /*
2192          * 0x0f, Vaux2Sel
2193          */
2194         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
2195         /*
2196          * 0x07, Vaux3Sel
2197          * 0x30, VRF1Sel
2198          */
2199         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2200         /*
2201          * 0x03, Vaux4RequestCtrl
2202          */
2203         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2204         /*
2205          * 0x03, Vaux4Regu
2206          */
2207         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
2208         /*
2209          * 0x0f, Vaux4Sel
2210          */
2211         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
2212         /*
2213          * 0x04, Vaux1Disch
2214          * 0x08, Vaux2Disch
2215          * 0x10, Vaux3Disch
2216          * 0x20, Vintcore12Disch
2217          * 0x40, VTVoutDisch
2218          * 0x80, VaudioDisch
2219          */
2220         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
2221         /*
2222          * 0x02, VanaDisch
2223          * 0x04, VdmicPullDownEna
2224          * 0x10, VdmicDisch
2225          */
2226         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
2227         /*
2228          * 0x01, Vaux4Disch
2229          */
2230         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2231         /*
2232          * 0x07, Vaux5Sel
2233          * 0x08, Vaux5LP
2234          * 0x10, Vaux5Ena
2235          * 0x20, Vaux5Disch
2236          * 0x40, Vaux5DisSfst
2237          * 0x80, Vaux5DisPulld
2238          */
2239         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
2240         /*
2241          * 0x07, Vaux6Sel
2242          * 0x08, Vaux6LP
2243          * 0x10, Vaux6Ena
2244          * 0x80, Vaux6DisPulld
2245          */
2246         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
2247 };
2248
2249 /* AB9540 register init */
2250 static struct ab8500_reg_init ab9540_reg_init[] = {
2251         /*
2252          * 0x03, VarmRequestCtrl
2253          * 0x0c, VapeRequestCtrl
2254          * 0x30, Vsmps1RequestCtrl
2255          * 0xc0, Vsmps2RequestCtrl
2256          */
2257         REG_INIT(AB9540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2258         /*
2259          * 0x03, Vsmps3RequestCtrl
2260          * 0x0c, VpllRequestCtrl
2261          * 0x30, VanaRequestCtrl
2262          * 0xc0, VextSupply1RequestCtrl
2263          */
2264         REG_INIT(AB9540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2265         /*
2266          * 0x03, VextSupply2RequestCtrl
2267          * 0x0c, VextSupply3RequestCtrl
2268          * 0x30, Vaux1RequestCtrl
2269          * 0xc0, Vaux2RequestCtrl
2270          */
2271         REG_INIT(AB9540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2272         /*
2273          * 0x03, Vaux3RequestCtrl
2274          * 0x04, SwHPReq
2275          */
2276         REG_INIT(AB9540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2277         /*
2278          * 0x01, Vsmps1SysClkReq1HPValid
2279          * 0x02, Vsmps2SysClkReq1HPValid
2280          * 0x04, Vsmps3SysClkReq1HPValid
2281          * 0x08, VanaSysClkReq1HPValid
2282          * 0x10, VpllSysClkReq1HPValid
2283          * 0x20, Vaux1SysClkReq1HPValid
2284          * 0x40, Vaux2SysClkReq1HPValid
2285          * 0x80, Vaux3SysClkReq1HPValid
2286          */
2287         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2288         /*
2289          * 0x01, VapeSysClkReq1HPValid
2290          * 0x02, VarmSysClkReq1HPValid
2291          * 0x04, VbbSysClkReq1HPValid
2292          * 0x08, VmodSysClkReq1HPValid
2293          * 0x10, VextSupply1SysClkReq1HPValid
2294          * 0x20, VextSupply2SysClkReq1HPValid
2295          * 0x40, VextSupply3SysClkReq1HPValid
2296          */
2297         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
2298         /*
2299          * 0x01, Vsmps1HwHPReq1Valid
2300          * 0x02, Vsmps2HwHPReq1Valid
2301          * 0x04, Vsmps3HwHPReq1Valid
2302          * 0x08, VanaHwHPReq1Valid
2303          * 0x10, VpllHwHPReq1Valid
2304          * 0x20, Vaux1HwHPReq1Valid
2305          * 0x40, Vaux2HwHPReq1Valid
2306          * 0x80, Vaux3HwHPReq1Valid
2307          */
2308         REG_INIT(AB9540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2309         /*
2310          * 0x01, VextSupply1HwHPReq1Valid
2311          * 0x02, VextSupply2HwHPReq1Valid
2312          * 0x04, VextSupply3HwHPReq1Valid
2313          * 0x08, VmodHwHPReq1Valid
2314          */
2315         REG_INIT(AB9540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x0f),
2316         /*
2317          * 0x01, Vsmps1HwHPReq2Valid
2318          * 0x02, Vsmps2HwHPReq2Valid
2319          * 0x03, Vsmps3HwHPReq2Valid
2320          * 0x08, VanaHwHPReq2Valid
2321          * 0x10, VpllHwHPReq2Valid
2322          * 0x20, Vaux1HwHPReq2Valid
2323          * 0x40, Vaux2HwHPReq2Valid
2324          * 0x80, Vaux3HwHPReq2Valid
2325          */
2326         REG_INIT(AB9540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2327         /*
2328          * 0x01, VextSupply1HwHPReq2Valid
2329          * 0x02, VextSupply2HwHPReq2Valid
2330          * 0x04, VextSupply3HwHPReq2Valid
2331          * 0x08, VmodHwHPReq2Valid
2332          */
2333         REG_INIT(AB9540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x0f),
2334         /*
2335          * 0x01, VapeSwHPReqValid
2336          * 0x02, VarmSwHPReqValid
2337          * 0x04, Vsmps1SwHPReqValid
2338          * 0x08, Vsmps2SwHPReqValid
2339          * 0x10, Vsmps3SwHPReqValid
2340          * 0x20, VanaSwHPReqValid
2341          * 0x40, VpllSwHPReqValid
2342          * 0x80, Vaux1SwHPReqValid
2343          */
2344         REG_INIT(AB9540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2345         /*
2346          * 0x01, Vaux2SwHPReqValid
2347          * 0x02, Vaux3SwHPReqValid
2348          * 0x04, VextSupply1SwHPReqValid
2349          * 0x08, VextSupply2SwHPReqValid
2350          * 0x10, VextSupply3SwHPReqValid
2351          * 0x20, VmodSwHPReqValid
2352          */
2353         REG_INIT(AB9540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x3f),
2354         /*
2355          * 0x02, SysClkReq2Valid1
2356          * ...
2357          * 0x80, SysClkReq8Valid1
2358          */
2359         REG_INIT(AB9540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
2360         /*
2361          * 0x02, SysClkReq2Valid2
2362          * ...
2363          * 0x80, SysClkReq8Valid2
2364          */
2365         REG_INIT(AB9540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
2366         /*
2367          * 0x01, Vaux4SwHPReqValid
2368          * 0x02, Vaux4HwHPReq2Valid
2369          * 0x04, Vaux4HwHPReq1Valid
2370          * 0x08, Vaux4SysClkReq1HPValid
2371          */
2372         REG_INIT(AB9540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2373         /*
2374          * 0x02, VTVoutEna
2375          * 0x04, Vintcore12Ena
2376          * 0x38, Vintcore12Sel
2377          * 0x40, Vintcore12LP
2378          * 0x80, VTVoutLP
2379          */
2380         REG_INIT(AB9540_REGUMISC1,              0x03, 0x80, 0xfe),
2381         /*
2382          * 0x02, VaudioEna
2383          * 0x04, VdmicEna
2384          * 0x08, Vamic1Ena
2385          * 0x10, Vamic2Ena
2386          */
2387         REG_INIT(AB9540_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2388         /*
2389          * 0x01, Vamic1_dzout
2390          * 0x02, Vamic2_dzout
2391          */
2392         REG_INIT(AB9540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2393         /*
2394          * 0x03, Vsmps1Regu
2395          * 0x0c, Vsmps1SelCtrl
2396          * 0x10, Vsmps1AutoMode
2397          * 0x20, Vsmps1PWMMode
2398          */
2399         REG_INIT(AB9540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2400         /*
2401          * 0x03, Vsmps2Regu
2402          * 0x0c, Vsmps2SelCtrl
2403          * 0x10, Vsmps2AutoMode
2404          * 0x20, Vsmps2PWMMode
2405          */
2406         REG_INIT(AB9540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2407         /*
2408          * 0x03, Vsmps3Regu
2409          * 0x0c, Vsmps3SelCtrl
2410          * NOTE! PRCMU register
2411          */
2412         REG_INIT(AB9540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2413         /*
2414          * 0x03, VpllRegu
2415          * 0x0c, VanaRegu
2416          */
2417         REG_INIT(AB9540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2418         /*
2419          * 0x03, VextSupply1Regu
2420          * 0x0c, VextSupply2Regu
2421          * 0x30, VextSupply3Regu
2422          * 0x40, ExtSupply2Bypass
2423          * 0x80, ExtSupply3Bypass
2424          */
2425         REG_INIT(AB9540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2426         /*
2427          * 0x03, Vaux1Regu
2428          * 0x0c, Vaux2Regu
2429          */
2430         REG_INIT(AB9540_VAUX12REGU,             0x04, 0x09, 0x0f),
2431         /*
2432          * 0x0c, Vrf1Regu
2433          * 0x03, Vaux3Regu
2434          */
2435         REG_INIT(AB9540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2436         /*
2437          * 0x3f, Vsmps1Sel1
2438          */
2439         REG_INIT(AB9540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2440         /*
2441          * 0x3f, Vsmps1Sel2
2442          */
2443         REG_INIT(AB9540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2444         /*
2445          * 0x3f, Vsmps1Sel3
2446          */
2447         REG_INIT(AB9540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2448         /*
2449          * 0x3f, Vsmps2Sel1
2450          */
2451         REG_INIT(AB9540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2452         /*
2453          * 0x3f, Vsmps2Sel2
2454          */
2455         REG_INIT(AB9540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2456         /*
2457          * 0x3f, Vsmps2Sel3
2458          */
2459         REG_INIT(AB9540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2460         /*
2461          * 0x7f, Vsmps3Sel1
2462          * NOTE! PRCMU register
2463          */
2464         REG_INIT(AB9540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2465         /*
2466          * 0x7f, Vsmps3Sel2
2467          * NOTE! PRCMU register
2468          */
2469         REG_INIT(AB9540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2470         /*
2471          * 0x0f, Vaux1Sel
2472          */
2473         REG_INIT(AB9540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2474         /*
2475          * 0x0f, Vaux2Sel
2476          */
2477         REG_INIT(AB9540_VAUX2SEL,               0x04, 0x20, 0x0f),
2478         /*
2479          * 0x07, Vaux3Sel
2480          * 0x30, Vrf1Sel
2481          */
2482         REG_INIT(AB9540_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2483         /*
2484          * 0x01, VextSupply12LP
2485          */
2486         REG_INIT(AB9540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2487         /*
2488          * 0x03, Vaux4RequestCtrl
2489          */
2490         REG_INIT(AB9540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2491         /*
2492          * 0x03, Vaux4Regu
2493          */
2494         REG_INIT(AB9540_VAUX4REGU,              0x04, 0x2e, 0x03),
2495         /*
2496          * 0x08, Vaux4Sel
2497          */
2498         REG_INIT(AB9540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2499         /*
2500          * 0x01, VpllDisch
2501          * 0x02, Vrf1Disch
2502          * 0x04, Vaux1Disch
2503          * 0x08, Vaux2Disch
2504          * 0x10, Vaux3Disch
2505          * 0x20, Vintcore12Disch
2506          * 0x40, VTVoutDisch
2507          * 0x80, VaudioDisch
2508          */
2509         REG_INIT(AB9540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2510         /*
2511          * 0x01, VsimDisch
2512          * 0x02, VanaDisch
2513          * 0x04, VdmicPullDownEna
2514          * 0x08, VpllPullDownEna
2515          * 0x10, VdmicDisch
2516          */
2517         REG_INIT(AB9540_REGUCTRLDISCH2,         0x04, 0x44, 0x1f),
2518         /*
2519          * 0x01, Vaux4Disch
2520          */
2521         REG_INIT(AB9540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2522 };
2523
2524 /* AB8540 register init */
2525 static struct ab8500_reg_init ab8540_reg_init[] = {
2526         /*
2527          * 0x01, VSimSycClkReq1Valid
2528          * 0x02, VSimSycClkReq2Valid
2529          * 0x04, VSimSycClkReq3Valid
2530          * 0x08, VSimSycClkReq4Valid
2531          * 0x10, VSimSycClkReq5Valid
2532          * 0x20, VSimSycClkReq6Valid
2533          * 0x40, VSimSycClkReq7Valid
2534          * 0x80, VSimSycClkReq8Valid
2535          */
2536         REG_INIT(AB8540_VSIMSYSCLKCTRL,         0x02, 0x33, 0xff),
2537         /*
2538          * 0x03, VarmRequestCtrl
2539          * 0x0c, VapeRequestCtrl
2540          * 0x30, Vsmps1RequestCtrl
2541          * 0xc0, Vsmps2RequestCtrl
2542          */
2543         REG_INIT(AB8540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2544         /*
2545          * 0x03, Vsmps3RequestCtrl
2546          * 0x0c, VpllRequestCtrl
2547          * 0x30, VanaRequestCtrl
2548          * 0xc0, VextSupply1RequestCtrl
2549          */
2550         REG_INIT(AB8540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2551         /*
2552          * 0x03, VextSupply2RequestCtrl
2553          * 0x0c, VextSupply3RequestCtrl
2554          * 0x30, Vaux1RequestCtrl
2555          * 0xc0, Vaux2RequestCtrl
2556          */
2557         REG_INIT(AB8540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2558         /*
2559          * 0x03, Vaux3RequestCtrl
2560          * 0x04, SwHPReq
2561          */
2562         REG_INIT(AB8540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2563         /*
2564          * 0x01, Vsmps1SysClkReq1HPValid
2565          * 0x02, Vsmps2SysClkReq1HPValid
2566          * 0x04, Vsmps3SysClkReq1HPValid
2567          * 0x08, VanaSysClkReq1HPValid
2568          * 0x10, VpllSysClkReq1HPValid
2569          * 0x20, Vaux1SysClkReq1HPValid
2570          * 0x40, Vaux2SysClkReq1HPValid
2571          * 0x80, Vaux3SysClkReq1HPValid
2572          */
2573         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2574         /*
2575          * 0x01, VapeSysClkReq1HPValid
2576          * 0x02, VarmSysClkReq1HPValid
2577          * 0x04, VbbSysClkReq1HPValid
2578          * 0x10, VextSupply1SysClkReq1HPValid
2579          * 0x20, VextSupply2SysClkReq1HPValid
2580          * 0x40, VextSupply3SysClkReq1HPValid
2581          */
2582         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x77),
2583         /*
2584          * 0x01, Vsmps1HwHPReq1Valid
2585          * 0x02, Vsmps2HwHPReq1Valid
2586          * 0x04, Vsmps3HwHPReq1Valid
2587          * 0x08, VanaHwHPReq1Valid
2588          * 0x10, VpllHwHPReq1Valid
2589          * 0x20, Vaux1HwHPReq1Valid
2590          * 0x40, Vaux2HwHPReq1Valid
2591          * 0x80, Vaux3HwHPReq1Valid
2592          */
2593         REG_INIT(AB8540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2594         /*
2595          * 0x01, VextSupply1HwHPReq1Valid
2596          * 0x02, VextSupply2HwHPReq1Valid
2597          * 0x04, VextSupply3HwHPReq1Valid
2598          */
2599         REG_INIT(AB8540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
2600         /*
2601          * 0x01, Vsmps1HwHPReq2Valid
2602          * 0x02, Vsmps2HwHPReq2Valid
2603          * 0x03, Vsmps3HwHPReq2Valid
2604          * 0x08, VanaHwHPReq2Valid
2605          * 0x10, VpllHwHPReq2Valid
2606          * 0x20, Vaux1HwHPReq2Valid
2607          * 0x40, Vaux2HwHPReq2Valid
2608          * 0x80, Vaux3HwHPReq2Valid
2609          */
2610         REG_INIT(AB8540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2611         /*
2612          * 0x01, VextSupply1HwHPReq2Valid
2613          * 0x02, VextSupply2HwHPReq2Valid
2614          * 0x04, VextSupply3HwHPReq2Valid
2615          */
2616         REG_INIT(AB8540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
2617         /*
2618          * 0x01, VapeSwHPReqValid
2619          * 0x02, VarmSwHPReqValid
2620          * 0x04, Vsmps1SwHPReqValid
2621          * 0x08, Vsmps2SwHPReqValid
2622          * 0x10, Vsmps3SwHPReqValid
2623          * 0x20, VanaSwHPReqValid
2624          * 0x40, VpllSwHPReqValid
2625          * 0x80, Vaux1SwHPReqValid
2626          */
2627         REG_INIT(AB8540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2628         /*
2629          * 0x01, Vaux2SwHPReqValid
2630          * 0x02, Vaux3SwHPReqValid
2631          * 0x04, VextSupply1SwHPReqValid
2632          * 0x08, VextSupply2SwHPReqValid
2633          * 0x10, VextSupply3SwHPReqValid
2634          */
2635         REG_INIT(AB8540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
2636         /*
2637          * 0x02, SysClkReq2Valid1
2638          * ...
2639          * 0x80, SysClkReq8Valid1
2640          */
2641         REG_INIT(AB8540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xff),
2642         /*
2643          * 0x02, SysClkReq2Valid2
2644          * ...
2645          * 0x80, SysClkReq8Valid2
2646          */
2647         REG_INIT(AB8540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xff),
2648         /*
2649          * 0x01, Vaux4SwHPReqValid
2650          * 0x02, Vaux4HwHPReq2Valid
2651          * 0x04, Vaux4HwHPReq1Valid
2652          * 0x08, Vaux4SysClkReq1HPValid
2653          */
2654         REG_INIT(AB8540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2655         /*
2656          * 0x01, Vaux5SwHPReqValid
2657          * 0x02, Vaux5HwHPReq2Valid
2658          * 0x04, Vaux5HwHPReq1Valid
2659          * 0x08, Vaux5SysClkReq1HPValid
2660          */
2661         REG_INIT(AB8540_REGUVAUX5REQVALID,      0x03, 0x12, 0x0f),
2662         /*
2663          * 0x01, Vaux6SwHPReqValid
2664          * 0x02, Vaux6HwHPReq2Valid
2665          * 0x04, Vaux6HwHPReq1Valid
2666          * 0x08, Vaux6SysClkReq1HPValid
2667          */
2668         REG_INIT(AB8540_REGUVAUX6REQVALID,      0x03, 0x13, 0x0f),
2669         /*
2670          * 0x01, VclkbSwHPReqValid
2671          * 0x02, VclkbHwHPReq2Valid
2672          * 0x04, VclkbHwHPReq1Valid
2673          * 0x08, VclkbSysClkReq1HPValid
2674          */
2675         REG_INIT(AB8540_REGUVCLKBREQVALID,      0x03, 0x14, 0x0f),
2676         /*
2677          * 0x01, Vrf1SwHPReqValid
2678          * 0x02, Vrf1HwHPReq2Valid
2679          * 0x04, Vrf1HwHPReq1Valid
2680          * 0x08, Vrf1SysClkReq1HPValid
2681          */
2682         REG_INIT(AB8540_REGUVRF1REQVALID,       0x03, 0x15, 0x0f),
2683         /*
2684          * 0x02, VTVoutEna
2685          * 0x04, Vintcore12Ena
2686          * 0x38, Vintcore12Sel
2687          * 0x40, Vintcore12LP
2688          * 0x80, VTVoutLP
2689          */
2690         REG_INIT(AB8540_REGUMISC1,              0x03, 0x80, 0xfe),
2691         /*
2692          * 0x02, VaudioEna
2693          * 0x04, VdmicEna
2694          * 0x08, Vamic1Ena
2695          * 0x10, Vamic2Ena
2696          * 0x20, Vamic12LP
2697          * 0xC0, VdmicSel
2698          */
2699         REG_INIT(AB8540_VAUDIOSUPPLY,           0x03, 0x83, 0xfe),
2700         /*
2701          * 0x01, Vamic1_dzout
2702          * 0x02, Vamic2_dzout
2703          */
2704         REG_INIT(AB8540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2705         /*
2706          * 0x07, VHSICSel
2707          * 0x08, VHSICOffState
2708          * 0x10, VHSIEna
2709          * 0x20, VHSICLP
2710          */
2711         REG_INIT(AB8540_VHSIC,                  0x03, 0x87, 0x3f),
2712         /*
2713          * 0x07, VSDIOSel
2714          * 0x08, VSDIOOffState
2715          * 0x10, VSDIOEna
2716          * 0x20, VSDIOLP
2717          */
2718         REG_INIT(AB8540_VSDIO,                  0x03, 0x88, 0x3f),
2719         /*
2720          * 0x03, Vsmps1Regu
2721          * 0x0c, Vsmps1SelCtrl
2722          * 0x10, Vsmps1AutoMode
2723          * 0x20, Vsmps1PWMMode
2724          */
2725         REG_INIT(AB8540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2726         /*
2727          * 0x03, Vsmps2Regu
2728          * 0x0c, Vsmps2SelCtrl
2729          * 0x10, Vsmps2AutoMode
2730          * 0x20, Vsmps2PWMMode
2731          */
2732         REG_INIT(AB8540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2733         /*
2734          * 0x03, Vsmps3Regu
2735          * 0x0c, Vsmps3SelCtrl
2736          * 0x10, Vsmps3AutoMode
2737          * 0x20, Vsmps3PWMMode
2738          * NOTE! PRCMU register
2739          */
2740         REG_INIT(AB8540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2741         /*
2742          * 0x03, VpllRegu
2743          * 0x0c, VanaRegu
2744          */
2745         REG_INIT(AB8540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2746         /*
2747          * 0x03, VextSupply1Regu
2748          * 0x0c, VextSupply2Regu
2749          * 0x30, VextSupply3Regu
2750          * 0x40, ExtSupply2Bypass
2751          * 0x80, ExtSupply3Bypass
2752          */
2753         REG_INIT(AB8540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2754         /*
2755          * 0x03, Vaux1Regu
2756          * 0x0c, Vaux2Regu
2757          */
2758         REG_INIT(AB8540_VAUX12REGU,             0x04, 0x09, 0x0f),
2759         /*
2760          * 0x0c, VRF1Regu
2761          * 0x03, Vaux3Regu
2762          */
2763         REG_INIT(AB8540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2764         /*
2765          * 0x3f, Vsmps1Sel1
2766          */
2767         REG_INIT(AB8540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2768         /*
2769          * 0x3f, Vsmps1Sel2
2770          */
2771         REG_INIT(AB8540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2772         /*
2773          * 0x3f, Vsmps1Sel3
2774          */
2775         REG_INIT(AB8540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2776         /*
2777          * 0x3f, Vsmps2Sel1
2778          */
2779         REG_INIT(AB8540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2780         /*
2781          * 0x3f, Vsmps2Sel2
2782          */
2783         REG_INIT(AB8540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2784         /*
2785          * 0x3f, Vsmps2Sel3
2786          */
2787         REG_INIT(AB8540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2788         /*
2789          * 0x7f, Vsmps3Sel1
2790          * NOTE! PRCMU register
2791          */
2792         REG_INIT(AB8540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2793         /*
2794          * 0x7f, Vsmps3Sel2
2795          * NOTE! PRCMU register
2796          */
2797         REG_INIT(AB8540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2798         /*
2799          * 0x0f, Vaux1Sel
2800          */
2801         REG_INIT(AB8540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2802         /*
2803          * 0x0f, Vaux2Sel
2804          */
2805         REG_INIT(AB8540_VAUX2SEL,               0x04, 0x20, 0x0f),
2806         /*
2807          * 0x07, Vaux3Sel
2808          * 0x70, Vrf1Sel
2809          */
2810         REG_INIT(AB8540_VRF1VAUX3SEL,           0x04, 0x21, 0x77),
2811         /*
2812          * 0x01, VextSupply12LP
2813          */
2814         REG_INIT(AB8540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2815         /*
2816          * 0x07, Vanasel
2817          * 0x30, Vpllsel
2818          */
2819         REG_INIT(AB8540_VANAVPLLSEL,            0x04, 0x29, 0x37),
2820         /*
2821          * 0x03, Vaux4RequestCtrl
2822          */
2823         REG_INIT(AB8540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2824         /*
2825          * 0x03, Vaux4Regu
2826          */
2827         REG_INIT(AB8540_VAUX4REGU,              0x04, 0x2e, 0x03),
2828         /*
2829          * 0x0f, Vaux4Sel
2830          */
2831         REG_INIT(AB8540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2832         /*
2833          * 0x03, Vaux5RequestCtrl
2834          */
2835         REG_INIT(AB8540_VAUX5REQCTRL,           0x04, 0x31, 0x03),
2836         /*
2837          * 0x03, Vaux5Regu
2838          */
2839         REG_INIT(AB8540_VAUX5REGU,              0x04, 0x32, 0x03),
2840         /*
2841          * 0x3f, Vaux5Sel
2842          */
2843         REG_INIT(AB8540_VAUX5SEL,               0x04, 0x33, 0x3f),
2844         /*
2845          * 0x03, Vaux6RequestCtrl
2846          */
2847         REG_INIT(AB8540_VAUX6REQCTRL,           0x04, 0x34, 0x03),
2848         /*
2849          * 0x03, Vaux6Regu
2850          */
2851         REG_INIT(AB8540_VAUX6REGU,              0x04, 0x35, 0x03),
2852         /*
2853          * 0x3f, Vaux6Sel
2854          */
2855         REG_INIT(AB8540_VAUX6SEL,               0x04, 0x36, 0x3f),
2856         /*
2857          * 0x03, VCLKBRequestCtrl
2858          */
2859         REG_INIT(AB8540_VCLKBREQCTRL,           0x04, 0x37, 0x03),
2860         /*
2861          * 0x03, VCLKBRegu
2862          */
2863         REG_INIT(AB8540_VCLKBREGU,              0x04, 0x38, 0x03),
2864         /*
2865          * 0x07, VCLKBSel
2866          */
2867         REG_INIT(AB8540_VCLKBSEL,               0x04, 0x39, 0x07),
2868         /*
2869          * 0x03, Vrf1RequestCtrl
2870          */
2871         REG_INIT(AB8540_VRF1REQCTRL,            0x04, 0x3a, 0x03),
2872         /*
2873          * 0x01, VpllDisch
2874          * 0x02, Vrf1Disch
2875          * 0x04, Vaux1Disch
2876          * 0x08, Vaux2Disch
2877          * 0x10, Vaux3Disch
2878          * 0x20, Vintcore12Disch
2879          * 0x40, VTVoutDisch
2880          * 0x80, VaudioDisch
2881          */
2882         REG_INIT(AB8540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2883         /*
2884          * 0x02, VanaDisch
2885          * 0x04, VdmicPullDownEna
2886          * 0x08, VpllPullDownEna
2887          * 0x10, VdmicDisch
2888          */
2889         REG_INIT(AB8540_REGUCTRLDISCH2,         0x04, 0x44, 0x1e),
2890         /*
2891          * 0x01, Vaux4Disch
2892          */
2893         REG_INIT(AB8540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2894         /*
2895          * 0x01, Vaux5Disch
2896          * 0x02, Vaux6Disch
2897          * 0x04, VCLKBDisch
2898          */
2899         REG_INIT(AB8540_REGUCTRLDISCH4,         0x04, 0x49, 0x07),
2900 };
2901
2902 static struct of_regulator_match ab8500_regulator_match[] = {
2903         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
2904         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
2905         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
2906         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
2907         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
2908         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
2909         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
2910         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
2911         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
2912         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
2913 };
2914
2915 static struct of_regulator_match ab8505_regulator_match[] = {
2916         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
2917         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
2918         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
2919         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
2920         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
2921         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
2922         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
2923         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
2924         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
2925         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
2926         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
2927         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
2928         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
2929 };
2930
2931 static struct of_regulator_match ab8540_regulator_match[] = {
2932         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8540_LDO_AUX1, },
2933         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8540_LDO_AUX2, },
2934         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8540_LDO_AUX3, },
2935         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8540_LDO_AUX4, },
2936         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8540_LDO_AUX5, },
2937         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8540_LDO_AUX6, },
2938         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8540_LDO_INTCORE, },
2939         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8540_LDO_TVOUT, },
2940         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8540_LDO_AUDIO, },
2941         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8540_LDO_ANAMIC1, },
2942         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8540_LDO_ANAMIC2, },
2943         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8540_LDO_DMIC, },
2944         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8540_LDO_ANA, },
2945         { .name = "ab8500_ldo_sdio",    .driver_data = (void *) AB8540_LDO_SDIO, },
2946 };
2947
2948 static struct of_regulator_match ab9540_regulator_match[] = {
2949         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB9540_LDO_AUX1, },
2950         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB9540_LDO_AUX2, },
2951         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB9540_LDO_AUX3, },
2952         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB9540_LDO_AUX4, },
2953         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, },
2954         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB9540_LDO_TVOUT, },
2955         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB9540_LDO_AUDIO, },
2956         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, },
2957         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, },
2958         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB9540_LDO_DMIC, },
2959         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB9540_LDO_ANA, },
2960 };
2961
2962 static struct {
2963         struct ab8500_regulator_info *info;
2964         int info_size;
2965         struct ab8500_reg_init *init;
2966         int init_size;
2967         struct of_regulator_match *match;
2968         int match_size;
2969 } abx500_regulator;
2970
2971 static void abx500_get_regulator_info(struct ab8500 *ab8500)
2972 {
2973         if (is_ab9540(ab8500)) {
2974                 abx500_regulator.info = ab9540_regulator_info;
2975                 abx500_regulator.info_size = ARRAY_SIZE(ab9540_regulator_info);
2976                 abx500_regulator.init = ab9540_reg_init;
2977                 abx500_regulator.init_size = AB9540_NUM_REGULATOR_REGISTERS;
2978                 abx500_regulator.match = ab9540_regulator_match;
2979                 abx500_regulator.match_size = ARRAY_SIZE(ab9540_regulator_match);
2980         } else if (is_ab8505(ab8500)) {
2981                 abx500_regulator.info = ab8505_regulator_info;
2982                 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
2983                 abx500_regulator.init = ab8505_reg_init;
2984                 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
2985                 abx500_regulator.match = ab8505_regulator_match;
2986                 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
2987         } else if (is_ab8540(ab8500)) {
2988                 abx500_regulator.info = ab8540_regulator_info;
2989                 abx500_regulator.info_size = ARRAY_SIZE(ab8540_regulator_info);
2990                 abx500_regulator.init = ab8540_reg_init;
2991                 abx500_regulator.init_size = AB8540_NUM_REGULATOR_REGISTERS;
2992                 abx500_regulator.match = ab8540_regulator_match;
2993                 abx500_regulator.match_size = ARRAY_SIZE(ab8540_regulator_match);
2994         } else {
2995                 abx500_regulator.info = ab8500_regulator_info;
2996                 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
2997                 abx500_regulator.init = ab8500_reg_init;
2998                 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
2999                 abx500_regulator.match = ab8500_regulator_match;
3000                 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
3001         }
3002 }
3003
3004 static int ab8500_regulator_init_registers(struct platform_device *pdev,
3005                                            int id, int mask, int value)
3006 {
3007         struct ab8500_reg_init *reg_init = abx500_regulator.init;
3008         int err;
3009
3010         BUG_ON(value & ~mask);
3011         BUG_ON(mask & ~reg_init[id].mask);
3012
3013         /* initialize register */
3014         err = abx500_mask_and_set_register_interruptible(
3015                 &pdev->dev,
3016                 reg_init[id].bank,
3017                 reg_init[id].addr,
3018                 mask, value);
3019         if (err < 0) {
3020                 dev_err(&pdev->dev,
3021                         "Failed to initialize 0x%02x, 0x%02x.\n",
3022                         reg_init[id].bank,
3023                         reg_init[id].addr);
3024                 return err;
3025         }
3026         dev_vdbg(&pdev->dev,
3027                  "  init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
3028                  reg_init[id].bank,
3029                  reg_init[id].addr,
3030                  mask, value);
3031
3032         return 0;
3033 }
3034
3035 static int ab8500_regulator_register(struct platform_device *pdev,
3036                                      struct regulator_init_data *init_data,
3037                                      int id, struct device_node *np)
3038 {
3039         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3040         struct ab8500_regulator_info *info = NULL;
3041         struct regulator_config config = { };
3042         int err;
3043
3044         /* assign per-regulator data */
3045         info = &abx500_regulator.info[id];
3046         info->dev = &pdev->dev;
3047
3048         config.dev = &pdev->dev;
3049         config.init_data = init_data;
3050         config.driver_data = info;
3051         config.of_node = np;
3052
3053         /* fix for hardware before ab8500v2.0 */
3054         if (is_ab8500_1p1_or_earlier(ab8500)) {
3055                 if (info->desc.id == AB8500_LDO_AUX3) {
3056                         info->desc.n_voltages =
3057                                 ARRAY_SIZE(ldo_vauxn_voltages);
3058                         info->desc.volt_table = ldo_vauxn_voltages;
3059                         info->voltage_mask = 0xf;
3060                 }
3061         }
3062
3063         /* register regulator with framework */
3064         info->regulator = regulator_register(&info->desc, &config);
3065         if (IS_ERR(info->regulator)) {
3066                 err = PTR_ERR(info->regulator);
3067                 dev_err(&pdev->dev, "failed to register regulator %s\n",
3068                         info->desc.name);
3069                 /* when we fail, un-register all earlier regulators */
3070                 while (--id >= 0) {
3071                         info = &abx500_regulator.info[id];
3072                         regulator_unregister(info->regulator);
3073                 }
3074                 return err;
3075         }
3076
3077         return 0;
3078 }
3079
3080 static int
3081 ab8500_regulator_of_probe(struct platform_device *pdev,
3082                           struct device_node *np)
3083 {
3084         struct of_regulator_match *match = abx500_regulator.match;
3085         int err, i;
3086
3087         for (i = 0; i < abx500_regulator.info_size; i++) {
3088                 err = ab8500_regulator_register(
3089                         pdev, match[i].init_data, i, match[i].of_node);
3090                 if (err)
3091                         return err;
3092         }
3093
3094         return 0;
3095 }
3096
3097 static int ab8500_regulator_probe(struct platform_device *pdev)
3098 {
3099         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3100         struct device_node *np = pdev->dev.of_node;
3101         struct ab8500_platform_data *ppdata;
3102         struct ab8500_regulator_platform_data *pdata;
3103         int i, err;
3104
3105         if (!ab8500) {
3106                 dev_err(&pdev->dev, "null mfd parent\n");
3107                 return -EINVAL;
3108         }
3109
3110         abx500_get_regulator_info(ab8500);
3111
3112         if (np) {
3113                 err = of_regulator_match(&pdev->dev, np,
3114                                          abx500_regulator.match,
3115                                          abx500_regulator.match_size);
3116                 if (err < 0) {
3117                         dev_err(&pdev->dev,
3118                                 "Error parsing regulator init data: %d\n", err);
3119                         return err;
3120                 }
3121
3122                 err = ab8500_regulator_of_probe(pdev, np);
3123                 return err;
3124         }
3125
3126         ppdata = dev_get_platdata(ab8500->dev);
3127         if (!ppdata) {
3128                 dev_err(&pdev->dev, "null parent pdata\n");
3129                 return -EINVAL;
3130         }
3131
3132         pdata = ppdata->regulator;
3133         if (!pdata) {
3134                 dev_err(&pdev->dev, "null pdata\n");
3135                 return -EINVAL;
3136         }
3137
3138         /* make sure the platform data has the correct size */
3139         if (pdata->num_regulator != abx500_regulator.info_size) {
3140                 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
3141                 return -EINVAL;
3142         }
3143
3144         /* initialize debug (initial state is recorded with this call) */
3145         err = ab8500_regulator_debug_init(pdev);
3146         if (err)
3147                 return err;
3148
3149         /* initialize registers */
3150         for (i = 0; i < pdata->num_reg_init; i++) {
3151                 int id, mask, value;
3152
3153                 id = pdata->reg_init[i].id;
3154                 mask = pdata->reg_init[i].mask;
3155                 value = pdata->reg_init[i].value;
3156
3157                 /* check for configuration errors */
3158                 BUG_ON(id >= abx500_regulator.init_size);
3159
3160                 err = ab8500_regulator_init_registers(pdev, id, mask, value);
3161                 if (err < 0)
3162                         return err;
3163         }
3164
3165         if (!is_ab8505(ab8500)) {
3166                 /* register external regulators (before Vaux1, 2 and 3) */
3167                 err = ab8500_ext_regulator_init(pdev);
3168                 if (err)
3169                         return err;
3170         }
3171
3172         /* register all regulators */
3173         for (i = 0; i < abx500_regulator.info_size; i++) {
3174                 err = ab8500_regulator_register(pdev, &pdata->regulator[i],
3175                                                 i, NULL);
3176                 if (err < 0) {
3177                         if (!is_ab8505(ab8500))
3178                                 ab8500_ext_regulator_exit(pdev);
3179                         return err;
3180                 }
3181         }
3182
3183         return 0;
3184 }
3185
3186 static int ab8500_regulator_remove(struct platform_device *pdev)
3187 {
3188         int i, err;
3189         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3190
3191         for (i = 0; i < abx500_regulator.info_size; i++) {
3192                 struct ab8500_regulator_info *info = NULL;
3193                 info = &abx500_regulator.info[i];
3194
3195                 dev_vdbg(rdev_get_dev(info->regulator),
3196                         "%s-remove\n", info->desc.name);
3197
3198                 regulator_unregister(info->regulator);
3199         }
3200
3201         /* remove external regulators (after Vaux1, 2 and 3) */
3202         if (!is_ab8505(ab8500))
3203                 ab8500_ext_regulator_exit(pdev);
3204
3205         /* remove regulator debug */
3206         err = ab8500_regulator_debug_exit(pdev);
3207         if (err)
3208                 return err;
3209
3210         return 0;
3211 }
3212
3213 static struct platform_driver ab8500_regulator_driver = {
3214         .probe = ab8500_regulator_probe,
3215         .remove = ab8500_regulator_remove,
3216         .driver         = {
3217                 .name   = "ab8500-regulator",
3218                 .owner  = THIS_MODULE,
3219         },
3220 };
3221
3222 static int __init ab8500_regulator_init(void)
3223 {
3224         int ret;
3225
3226         ret = platform_driver_register(&ab8500_regulator_driver);
3227         if (ret != 0)
3228                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
3229
3230         return ret;
3231 }
3232 subsys_initcall(ab8500_regulator_init);
3233
3234 static void __exit ab8500_regulator_exit(void)
3235 {
3236         platform_driver_unregister(&ab8500_regulator_driver);
3237 }
3238 module_exit(ab8500_regulator_exit);
3239
3240 MODULE_LICENSE("GPL v2");
3241 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
3242 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
3243 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
3244 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
3245 MODULE_ALIAS("platform:ab8500-regulator");