2 * Copyright (C) ST-Ericsson SA 2013
4 * Author: Patrice Chotard <patrice.chotard@st.com>
5 * License terms: GNU General Public License (GPL) version 2
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/slab.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/err.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/gpio.h>
21 #include <linux/irq.h>
22 #include <linux/irqdomain.h>
23 #include <linux/interrupt.h>
24 #include <linux/bitops.h>
25 #include <linux/mfd/abx500.h>
26 #include <linux/mfd/abx500/ab8500.h>
27 #include <linux/mfd/abx500/ab8500-gpio.h>
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/pinctrl/consumer.h>
30 #include <linux/pinctrl/pinmux.h>
31 #include <linux/pinctrl/pinconf.h>
32 #include <linux/pinctrl/pinconf-generic.h>
34 #include "pinctrl-abx500.h"
37 * The AB9540 and AB8540 GPIO support are extended versions
38 * of the AB8500 GPIO support.
39 * The AB9540 supports an additional (7th) register so that
40 * more GPIO may be configured and used.
41 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
42 * internal pull-up and pull-down capabilities.
46 * GPIO registers offset
49 #define AB8500_GPIO_SEL1_REG 0x00
50 #define AB8500_GPIO_SEL2_REG 0x01
51 #define AB8500_GPIO_SEL3_REG 0x02
52 #define AB8500_GPIO_SEL4_REG 0x03
53 #define AB8500_GPIO_SEL5_REG 0x04
54 #define AB8500_GPIO_SEL6_REG 0x05
55 #define AB9540_GPIO_SEL7_REG 0x06
57 #define AB8500_GPIO_DIR1_REG 0x10
58 #define AB8500_GPIO_DIR2_REG 0x11
59 #define AB8500_GPIO_DIR3_REG 0x12
60 #define AB8500_GPIO_DIR4_REG 0x13
61 #define AB8500_GPIO_DIR5_REG 0x14
62 #define AB8500_GPIO_DIR6_REG 0x15
63 #define AB9540_GPIO_DIR7_REG 0x16
65 #define AB8500_GPIO_OUT1_REG 0x20
66 #define AB8500_GPIO_OUT2_REG 0x21
67 #define AB8500_GPIO_OUT3_REG 0x22
68 #define AB8500_GPIO_OUT4_REG 0x23
69 #define AB8500_GPIO_OUT5_REG 0x24
70 #define AB8500_GPIO_OUT6_REG 0x25
71 #define AB9540_GPIO_OUT7_REG 0x26
73 #define AB8500_GPIO_PUD1_REG 0x30
74 #define AB8500_GPIO_PUD2_REG 0x31
75 #define AB8500_GPIO_PUD3_REG 0x32
76 #define AB8500_GPIO_PUD4_REG 0x33
77 #define AB8500_GPIO_PUD5_REG 0x34
78 #define AB8500_GPIO_PUD6_REG 0x35
79 #define AB9540_GPIO_PUD7_REG 0x36
81 #define AB8500_GPIO_IN1_REG 0x40
82 #define AB8500_GPIO_IN2_REG 0x41
83 #define AB8500_GPIO_IN3_REG 0x42
84 #define AB8500_GPIO_IN4_REG 0x43
85 #define AB8500_GPIO_IN5_REG 0x44
86 #define AB8500_GPIO_IN6_REG 0x45
87 #define AB9540_GPIO_IN7_REG 0x46
88 #define AB8540_GPIO_VINSEL_REG 0x47
89 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48
90 #define AB8500_GPIO_ALTFUN_REG 0x50
91 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03
92 #define AB8540_GPIO_VINSEL_MASK 0x03
93 #define AB8540_GPIOX_VBAT_START 51
94 #define AB8540_GPIOX_VBAT_END 54
96 struct abx500_pinctrl {
98 struct pinctrl_dev *pctldev;
99 struct abx500_pinctrl_soc_data *soc;
100 struct gpio_chip chip;
101 struct ab8500 *parent;
102 struct abx500_gpio_irq_cluster *irq_cluster;
103 int irq_cluster_size;
107 * to_abx500_pinctrl() - get the pointer to abx500_pinctrl
108 * @chip: Member of the structure abx500_pinctrl
110 static inline struct abx500_pinctrl *to_abx500_pinctrl(struct gpio_chip *chip)
112 return container_of(chip, struct abx500_pinctrl, chip);
115 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
116 unsigned offset, bool *bit)
118 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
124 ret = abx500_get_register_interruptible(pct->dev,
125 AB8500_MISC, reg, &val);
127 *bit = !!(val & BIT(pos));
131 "%s read reg =%x, offset=%x failed\n",
132 __func__, reg, offset);
137 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
138 unsigned offset, int val)
140 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
145 ret = abx500_mask_and_set_register_interruptible(pct->dev,
146 AB8500_MISC, reg, BIT(pos), val << pos);
148 dev_err(pct->dev, "%s write failed\n", __func__);
154 * abx500_gpio_get() - Get the particular GPIO value
156 * @offset: GPIO number to read
158 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
160 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
164 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
167 dev_err(pct->dev, "%s failed\n", __func__);
174 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
176 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
179 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
181 dev_err(pct->dev, "%s write failed\n", __func__);
184 static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset,
185 enum abx500_gpio_pull_updown *pull_updown)
190 struct pullud *pullud;
192 if (!pct->soc->pullud) {
193 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
199 pullud = pct->soc->pullud;
201 if ((offset < pullud->first_pin)
202 || (offset > pullud->last_pin)) {
207 ret = abx500_get_register_interruptible(pct->dev,
208 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val);
210 pos = (offset - pullud->first_pin) << 1;
211 *pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK;
215 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
220 static int abx500_set_pull_updown(struct abx500_pinctrl *pct,
221 int offset, enum abx500_gpio_pull_updown val)
225 struct pullud *pullud;
227 if (!pct->soc->pullud) {
228 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
234 pullud = pct->soc->pullud;
236 if ((offset < pullud->first_pin)
237 || (offset > pullud->last_pin)) {
241 pos = (offset - pullud->first_pin) << 1;
243 ret = abx500_mask_and_set_register_interruptible(pct->dev,
244 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG,
245 AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos);
249 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
254 static int abx500_gpio_direction_output(struct gpio_chip *chip,
258 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
259 struct pullud *pullud = pct->soc->pullud;
263 /* set direction as output */
264 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 1);
268 /* disable pull down */
269 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_PUD1_REG, offset, 1);
273 /* if supported, disable both pull down and pull up */
275 if (pullud && gpio >= pullud->first_pin && gpio <= pullud->last_pin) {
276 ret = abx500_set_pull_updown(pct,
278 ABX500_GPIO_PULL_NONE);
283 /* set the output as 1 or 0 */
284 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
287 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
289 /* set the register as input */
290 return abx500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 0);
293 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
295 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
296 /* The AB8500 GPIO numbers are off by one */
297 int gpio = offset + 1;
301 for (i = 0; i < pct->irq_cluster_size; i++) {
302 struct abx500_gpio_irq_cluster *cluster =
303 &pct->irq_cluster[i];
305 if (gpio >= cluster->start && gpio <= cluster->end) {
307 * The ABx500 GPIO's associated IRQs are clustered together
308 * throughout the interrupt numbers at irregular intervals.
309 * To solve this quandry, we have placed the read-in values
310 * into the cluster information table.
312 hwirq = gpio - cluster->start + cluster->to_irq;
313 return irq_create_mapping(pct->parent->domain, hwirq);
320 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
321 unsigned gpio, int alt_setting)
323 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
324 struct alternate_functions af = pct->soc->alternate_functions[gpio];
329 const char *modes[] = {
330 [ABX500_DEFAULT] = "default",
331 [ABX500_ALT_A] = "altA",
332 [ABX500_ALT_B] = "altB",
333 [ABX500_ALT_C] = "altC",
337 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
338 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
339 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
340 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
345 /* on ABx5xx, there is no GPIO0, so adjust the offset */
348 switch (alt_setting) {
351 * for ABx5xx family, default mode is always selected by
352 * writing 0 to GPIOSELx register, except for pins which
353 * support at least ALT_B mode, default mode is selected
354 * by writing 1 to GPIOSELx register
357 if (af.alt_bit1 != UNUSED)
360 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
366 * for ABx5xx family, alt_a mode is always selected by
367 * writing 1 to GPIOSELx register, except for pins which
368 * support at least ALT_B mode, alt_a mode is selected
369 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
372 if (af.alt_bit1 != UNUSED) {
373 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
375 ret = abx500_gpio_set_bits(chip,
376 AB8500_GPIO_ALTFUN_REG,
378 !!(af.alta_val && BIT(0)));
379 if (af.alt_bit2 != UNUSED)
380 ret = abx500_gpio_set_bits(chip,
381 AB8500_GPIO_ALTFUN_REG,
383 !!(af.alta_val && BIT(1)));
385 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
390 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
392 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
393 af.alt_bit1, !!(af.altb_val && BIT(0)));
394 if (af.alt_bit2 != UNUSED)
395 ret = abx500_gpio_set_bits(chip,
396 AB8500_GPIO_ALTFUN_REG,
398 !!(af.altb_val && BIT(1)));
402 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
404 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
405 af.alt_bit2, !!(af.altc_val && BIT(0)));
406 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
407 af.alt_bit2, !!(af.altc_val && BIT(1)));
411 dev_dbg(pct->dev, "unknow alt_setting %d\n", alt_setting);
419 static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
426 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
427 struct alternate_functions af = pct->soc->alternate_functions[gpio];
428 /* on ABx5xx, there is no GPIO0, so adjust the offset */
429 unsigned offset = gpio - 1;
432 * if gpiosel_bit is set to unused,
433 * it means no GPIO or special case
435 if (af.gpiosel_bit == UNUSED)
436 return ABX500_DEFAULT;
438 /* read GpioSelx register */
439 abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
440 af.gpiosel_bit, &bit_mode);
444 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
445 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
447 "alt_bitX value not in correct range (-1 to 7)\n");
451 /* if alt_bit2 is used, alt_bit1 must be used too */
452 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
454 "if alt_bit2 is used, alt_bit1 can't be unused\n");
458 /* check if pin use AlternateFunction register */
459 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
462 * if pin GPIOSEL bit is set and pin supports alternate function,
463 * it means DEFAULT mode
466 return ABX500_DEFAULT;
469 * pin use the AlternatFunction register
470 * read alt_bit1 value
472 abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
473 af.alt_bit1, &alt_bit1);
475 if (af.alt_bit2 != UNUSED)
476 /* read alt_bit2 value */
477 abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, af.alt_bit2,
482 mode = (alt_bit2 << 1) + alt_bit1;
483 if (mode == af.alta_val)
485 else if (mode == af.altb_val)
491 #ifdef CONFIG_DEBUG_FS
493 #include <linux/seq_file.h>
495 static void abx500_gpio_dbg_show_one(struct seq_file *s,
496 struct pinctrl_dev *pctldev,
497 struct gpio_chip *chip,
498 unsigned offset, unsigned gpio)
500 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
501 struct pullud *pullud = pct->soc->pullud;
502 const char *label = gpiochip_is_requested(chip, offset - 1);
503 u8 gpio_offset = offset - 1;
507 enum abx500_gpio_pull_updown pud = 0;
509 const char *modes[] = {
510 [ABX500_DEFAULT] = "default",
511 [ABX500_ALT_A] = "altA",
512 [ABX500_ALT_B] = "altB",
513 [ABX500_ALT_C] = "altC",
516 const char *pull_up_down[] = {
517 [ABX500_GPIO_PULL_DOWN] = "pull down",
518 [ABX500_GPIO_PULL_NONE] = "pull none",
519 [ABX500_GPIO_PULL_NONE + 1] = "pull none",
520 [ABX500_GPIO_PULL_UP] = "pull up",
523 abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, gpio_offset, &is_out);
525 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
526 gpio, label ?: "(none)",
527 is_out ? "out" : "in ");
531 (offset >= pullud->first_pin) &&
532 (offset <= pullud->last_pin)) {
533 abx500_get_pull_updown(pct, offset, &pud);
534 seq_printf(s, " %-9s", pull_up_down[pud]);
536 abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
538 seq_printf(s, " %-9s", pull_up_down[pd]);
541 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
544 mode = abx500_get_mode(pctldev, chip, offset);
546 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
549 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
552 unsigned gpio = chip->base;
553 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
554 struct pinctrl_dev *pctldev = pct->pctldev;
556 for (i = 0; i < chip->ngpio; i++, gpio++) {
557 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
558 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
564 static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
565 struct pinctrl_dev *pctldev,
566 struct gpio_chip *chip,
567 unsigned offset, unsigned gpio)
570 #define abx500_gpio_dbg_show NULL
573 static int abx500_gpio_request(struct gpio_chip *chip, unsigned offset)
575 int gpio = chip->base + offset;
577 return pinctrl_request_gpio(gpio);
580 static void abx500_gpio_free(struct gpio_chip *chip, unsigned offset)
582 int gpio = chip->base + offset;
584 pinctrl_free_gpio(gpio);
587 static struct gpio_chip abx500gpio_chip = {
588 .label = "abx500-gpio",
589 .owner = THIS_MODULE,
590 .request = abx500_gpio_request,
591 .free = abx500_gpio_free,
592 .direction_input = abx500_gpio_direction_input,
593 .get = abx500_gpio_get,
594 .direction_output = abx500_gpio_direction_output,
595 .set = abx500_gpio_set,
596 .to_irq = abx500_gpio_to_irq,
597 .dbg_show = abx500_gpio_dbg_show,
600 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
602 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
604 return pct->soc->nfunctions;
607 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
610 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
612 return pct->soc->functions[function].name;
615 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
617 const char * const **groups,
618 unsigned * const num_groups)
620 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
622 *groups = pct->soc->functions[function].groups;
623 *num_groups = pct->soc->functions[function].ngroups;
628 static int abx500_pmx_enable(struct pinctrl_dev *pctldev, unsigned function,
631 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
632 struct gpio_chip *chip = &pct->chip;
633 const struct abx500_pingroup *g;
637 g = &pct->soc->groups[group];
638 if (g->altsetting < 0)
641 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
643 for (i = 0; i < g->npins; i++) {
644 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
645 g->pins[i], g->altsetting);
647 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
653 static void abx500_pmx_disable(struct pinctrl_dev *pctldev,
654 unsigned function, unsigned group)
656 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
657 const struct abx500_pingroup *g;
659 g = &pct->soc->groups[group];
660 if (g->altsetting < 0)
663 /* FIXME: poke out the mux, set the pin to some default state? */
664 dev_dbg(pct->dev, "disable group %s, %u pins\n", g->name, g->npins);
667 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
668 struct pinctrl_gpio_range *range,
671 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
672 const struct abx500_pinrange *p;
677 * Different ranges have different ways to enable GPIO function on a
678 * pin, so refer back to our local range type, where we handily define
679 * what altfunc enables GPIO for a certain pin.
681 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
682 p = &pct->soc->gpio_ranges[i];
683 if ((offset >= p->offset) &&
684 (offset < (p->offset + p->npins)))
688 if (i == pct->soc->gpio_num_ranges) {
689 dev_err(pct->dev, "%s failed to locate range\n", __func__);
693 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
696 ret = abx500_set_mode(pct->pctldev, &pct->chip,
699 dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
706 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
707 struct pinctrl_gpio_range *range,
712 static const struct pinmux_ops abx500_pinmux_ops = {
713 .get_functions_count = abx500_pmx_get_funcs_cnt,
714 .get_function_name = abx500_pmx_get_func_name,
715 .get_function_groups = abx500_pmx_get_func_groups,
716 .enable = abx500_pmx_enable,
717 .disable = abx500_pmx_disable,
718 .gpio_request_enable = abx500_gpio_request_enable,
719 .gpio_disable_free = abx500_gpio_disable_free,
722 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
724 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
726 return pct->soc->ngroups;
729 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
732 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
734 return pct->soc->groups[selector].name;
737 static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
739 const unsigned **pins,
742 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
744 *pins = pct->soc->groups[selector].pins;
745 *num_pins = pct->soc->groups[selector].npins;
750 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
751 struct seq_file *s, unsigned offset)
753 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
754 struct gpio_chip *chip = &pct->chip;
756 abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
757 chip->base + offset - 1);
760 static const struct pinctrl_ops abx500_pinctrl_ops = {
761 .get_groups_count = abx500_get_groups_cnt,
762 .get_group_name = abx500_get_group_name,
763 .get_group_pins = abx500_get_group_pins,
764 .pin_dbg_show = abx500_pin_dbg_show,
767 static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
769 unsigned long *config)
774 static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
776 unsigned long config)
778 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
779 struct pullud *pullud = pct->soc->pullud;
780 struct gpio_chip *chip = &pct->chip;
783 enum pin_config_param param = pinconf_to_config_param(config);
784 enum pin_config_param argument = pinconf_to_config_argument(config);
786 dev_dbg(chip->dev, "pin %d [%#lx]: %s %s\n",
787 pin, config, (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
788 (param == PIN_CONFIG_OUTPUT) ? (argument ? "high" : "low") :
789 (argument ? "pull up" : "pull down"));
791 /* on ABx500, there is no GPIO0, so adjust the offset */
795 case PIN_CONFIG_BIAS_PULL_DOWN:
797 * if argument = 1 set the pull down
798 * else clear the pull down
800 ret = abx500_gpio_direction_input(chip, offset);
802 * Some chips only support pull down, while some actually
803 * support both pull up and pull down. Such chips have
804 * a "pullud" range specified for the pins that support
805 * both features. If the pin is not within that range, we
806 * fall back to the old bit set that only support pull down.
809 pin >= pullud->first_pin &&
810 pin <= pullud->last_pin)
811 ret = abx500_set_pull_updown(pct,
813 argument ? ABX500_GPIO_PULL_DOWN : ABX500_GPIO_PULL_NONE);
815 /* Chip only supports pull down */
816 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_PUD1_REG,
817 offset, argument ? 0 : 1);
820 case PIN_CONFIG_BIAS_PULL_UP:
822 * if argument = 1 set the pull up
823 * else clear the pull up
825 ret = abx500_gpio_direction_input(chip, offset);
827 * Some chips only support pull down, while some actually
828 * support both pull up and pull down. Such chips have
829 * a "pullud" range specified for the pins that support
830 * both features. If the pin is not within that range, do
834 pin >= pullud->first_pin &&
835 pin <= pullud->last_pin) {
836 ret = abx500_set_pull_updown(pct,
838 argument ? ABX500_GPIO_PULL_UP : ABX500_GPIO_PULL_NONE);
842 case PIN_CONFIG_OUTPUT:
843 ret = abx500_gpio_direction_output(chip, offset, argument);
848 dev_err(chip->dev, "illegal configuration requested\n");
856 static const struct pinconf_ops abx500_pinconf_ops = {
857 .pin_config_get = abx500_pin_config_get,
858 .pin_config_set = abx500_pin_config_set,
861 static struct pinctrl_desc abx500_pinctrl_desc = {
862 .name = "pinctrl-abx500",
863 .pctlops = &abx500_pinctrl_ops,
864 .pmxops = &abx500_pinmux_ops,
865 .confops = &abx500_pinconf_ops,
866 .owner = THIS_MODULE,
869 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
871 unsigned int lowest = 0;
872 unsigned int highest = 0;
873 unsigned int npins = 0;
877 * Compute number of GPIOs from the last SoC gpio range descriptors
878 * These ranges may include "holes" but the GPIO number space shall
879 * still be homogeneous, so we need to detect and account for any
880 * such holes so that these are included in the number of GPIO pins.
882 for (i = 0; i < soc->gpio_num_ranges; i++) {
885 const struct abx500_pinrange *p;
887 p = &soc->gpio_ranges[i];
889 gend = p->offset + p->npins - 1;
892 /* First iteration, set start values */
902 /* this gives the absolute number of pins */
903 npins = highest - lowest + 1;
907 static const struct of_device_id abx500_gpio_match[] = {
908 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
909 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
910 { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, },
911 { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, },
915 static int abx500_gpio_probe(struct platform_device *pdev)
917 struct ab8500_platform_data *abx500_pdata =
918 dev_get_platdata(pdev->dev.parent);
919 struct abx500_gpio_platform_data *pdata = NULL;
920 struct device_node *np = pdev->dev.of_node;
921 struct abx500_pinctrl *pct;
922 const struct platform_device_id *platid = platform_get_device_id(pdev);
923 unsigned int id = -1;
928 pdata = abx500_pdata->gpio;
930 if (!(pdata || np)) {
931 dev_err(&pdev->dev, "gpio dt and platform data missing\n");
935 pct = devm_kzalloc(&pdev->dev, sizeof(struct abx500_pinctrl),
939 "failed to allocate memory for pct\n");
943 pct->dev = &pdev->dev;
944 pct->parent = dev_get_drvdata(pdev->dev.parent);
945 pct->chip = abx500gpio_chip;
946 pct->chip.dev = &pdev->dev;
947 pct->chip.base = (np) ? -1 : pdata->gpio_base;
950 id = platid->driver_data;
952 const struct of_device_id *match;
954 match = of_match_device(abx500_gpio_match, &pdev->dev);
956 id = (unsigned long)match->data;
959 /* Poke in other ASIC variants here */
962 abx500_pinctrl_ab8500_init(&pct->soc);
965 abx500_pinctrl_ab8540_init(&pct->soc);
968 abx500_pinctrl_ab9540_init(&pct->soc);
971 abx500_pinctrl_ab8505_init(&pct->soc);
974 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
979 dev_err(&pdev->dev, "Invalid SOC data\n");
983 pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
984 pct->irq_cluster = pct->soc->gpio_irq_cluster;
985 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
987 ret = gpiochip_add(&pct->chip);
989 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
992 dev_info(&pdev->dev, "added gpiochip\n");
994 abx500_pinctrl_desc.pins = pct->soc->pins;
995 abx500_pinctrl_desc.npins = pct->soc->npins;
996 pct->pctldev = pinctrl_register(&abx500_pinctrl_desc, &pdev->dev, pct);
999 "could not register abx500 pinctrl driver\n");
1003 dev_info(&pdev->dev, "registered pin controller\n");
1005 /* We will handle a range of GPIO pins */
1006 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1007 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1009 ret = gpiochip_add_pin_range(&pct->chip,
1010 dev_name(&pdev->dev),
1011 p->offset - 1, p->offset, p->npins);
1016 platform_set_drvdata(pdev, pct);
1017 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1022 err = gpiochip_remove(&pct->chip);
1024 dev_info(&pdev->dev, "failed to remove gpiochip\n");
1030 * abx500_gpio_remove() - remove Ab8500-gpio driver
1031 * @pdev: Platform device registered
1033 static int abx500_gpio_remove(struct platform_device *pdev)
1035 struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1038 ret = gpiochip_remove(&pct->chip);
1040 dev_err(pct->dev, "unable to remove gpiochip: %d\n",
1048 static const struct platform_device_id abx500_pinctrl_id[] = {
1049 { "pinctrl-ab8500", PINCTRL_AB8500 },
1050 { "pinctrl-ab8540", PINCTRL_AB8540 },
1051 { "pinctrl-ab9540", PINCTRL_AB9540 },
1052 { "pinctrl-ab8505", PINCTRL_AB8505 },
1056 static struct platform_driver abx500_gpio_driver = {
1058 .name = "abx500-gpio",
1059 .owner = THIS_MODULE,
1060 .of_match_table = abx500_gpio_match,
1062 .probe = abx500_gpio_probe,
1063 .remove = abx500_gpio_remove,
1064 .id_table = abx500_pinctrl_id,
1067 static int __init abx500_gpio_init(void)
1069 return platform_driver_register(&abx500_gpio_driver);
1071 core_initcall(abx500_gpio_init);
1073 MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>");
1074 MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO");
1075 MODULE_ALIAS("platform:abx500-gpio");
1076 MODULE_LICENSE("GPL v2");