2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
27 #include <linux/delay.h>
28 #include <linux/etherdevice.h>
29 #include <linux/init.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/usb.h>
36 #include "rt2x00usb.h"
37 #include "rt2500usb.h"
40 * Allow hardware encryption to be disabled.
42 static int modparam_nohwcrypt = 0;
43 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
44 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
48 * All access to the CSR registers will go through the methods
49 * rt2500usb_register_read and rt2500usb_register_write.
50 * BBP and RF register require indirect register access,
51 * and use the CSR registers BBPCSR and RFCSR to achieve this.
52 * These indirect registers work with busy bits,
53 * and we will try maximal REGISTER_BUSY_COUNT times to access
54 * the register while taking a REGISTER_BUSY_DELAY us delay
55 * between each attampt. When the busy bit is still set at that time,
56 * the access attempt is considered to have failed,
57 * and we will print an error.
58 * If the csr_mutex is already held then the _lock variants must
61 static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
62 const unsigned int offset,
66 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
67 USB_VENDOR_REQUEST_IN, offset,
68 ®, sizeof(reg), REGISTER_TIMEOUT);
69 *value = le16_to_cpu(reg);
72 static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
73 const unsigned int offset,
77 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
78 USB_VENDOR_REQUEST_IN, offset,
79 ®, sizeof(reg), REGISTER_TIMEOUT);
80 *value = le16_to_cpu(reg);
83 static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
84 const unsigned int offset,
85 void *value, const u16 length)
87 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
88 USB_VENDOR_REQUEST_IN, offset,
90 REGISTER_TIMEOUT16(length));
93 static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
94 const unsigned int offset,
97 __le16 reg = cpu_to_le16(value);
98 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
99 USB_VENDOR_REQUEST_OUT, offset,
100 ®, sizeof(reg), REGISTER_TIMEOUT);
103 static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
104 const unsigned int offset,
107 __le16 reg = cpu_to_le16(value);
108 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
109 USB_VENDOR_REQUEST_OUT, offset,
110 ®, sizeof(reg), REGISTER_TIMEOUT);
113 static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
114 const unsigned int offset,
115 void *value, const u16 length)
117 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
118 USB_VENDOR_REQUEST_OUT, offset,
120 REGISTER_TIMEOUT16(length));
123 static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
124 const unsigned int offset,
125 struct rt2x00_field16 field,
130 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
131 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
132 if (!rt2x00_get_field16(*reg, field))
134 udelay(REGISTER_BUSY_DELAY);
137 ERROR(rt2x00dev, "Indirect register access failed: "
138 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
144 #define WAIT_FOR_BBP(__dev, __reg) \
145 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
146 #define WAIT_FOR_RF(__dev, __reg) \
147 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
149 static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
150 const unsigned int word, const u8 value)
154 mutex_lock(&rt2x00dev->csr_mutex);
157 * Wait until the BBP becomes available, afterwards we
158 * can safely write the new data into the register.
160 if (WAIT_FOR_BBP(rt2x00dev, ®)) {
162 rt2x00_set_field16(®, PHY_CSR7_DATA, value);
163 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word);
164 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0);
166 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
169 mutex_unlock(&rt2x00dev->csr_mutex);
172 static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
173 const unsigned int word, u8 *value)
177 mutex_lock(&rt2x00dev->csr_mutex);
180 * Wait until the BBP becomes available, afterwards we
181 * can safely write the read request into the register.
182 * After the data has been written, we wait until hardware
183 * returns the correct value, if at any time the register
184 * doesn't become available in time, reg will be 0xffffffff
185 * which means we return 0xff to the caller.
187 if (WAIT_FOR_BBP(rt2x00dev, ®)) {
189 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word);
190 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1);
192 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
194 if (WAIT_FOR_BBP(rt2x00dev, ®))
195 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®);
198 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
200 mutex_unlock(&rt2x00dev->csr_mutex);
203 static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
204 const unsigned int word, const u32 value)
208 mutex_lock(&rt2x00dev->csr_mutex);
211 * Wait until the RF becomes available, afterwards we
212 * can safely write the new data into the register.
214 if (WAIT_FOR_RF(rt2x00dev, ®)) {
216 rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value);
217 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
220 rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16);
221 rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
222 rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0);
223 rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1);
225 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
226 rt2x00_rf_write(rt2x00dev, word, value);
229 mutex_unlock(&rt2x00dev->csr_mutex);
232 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
233 static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
234 const unsigned int offset,
237 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
240 static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
241 const unsigned int offset,
244 rt2500usb_register_write(rt2x00dev, offset, value);
247 static const struct rt2x00debug rt2500usb_rt2x00debug = {
248 .owner = THIS_MODULE,
250 .read = _rt2500usb_register_read,
251 .write = _rt2500usb_register_write,
252 .flags = RT2X00DEBUGFS_OFFSET,
253 .word_base = CSR_REG_BASE,
254 .word_size = sizeof(u16),
255 .word_count = CSR_REG_SIZE / sizeof(u16),
258 .read = rt2x00_eeprom_read,
259 .write = rt2x00_eeprom_write,
260 .word_base = EEPROM_BASE,
261 .word_size = sizeof(u16),
262 .word_count = EEPROM_SIZE / sizeof(u16),
265 .read = rt2500usb_bbp_read,
266 .write = rt2500usb_bbp_write,
267 .word_base = BBP_BASE,
268 .word_size = sizeof(u8),
269 .word_count = BBP_SIZE / sizeof(u8),
272 .read = rt2x00_rf_read,
273 .write = rt2500usb_rf_write,
274 .word_base = RF_BASE,
275 .word_size = sizeof(u32),
276 .word_count = RF_SIZE / sizeof(u32),
279 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
281 static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®);
286 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
289 #ifdef CONFIG_RT2X00_LIB_LEDS
290 static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
291 enum led_brightness brightness)
293 struct rt2x00_led *led =
294 container_of(led_cdev, struct rt2x00_led, led_dev);
295 unsigned int enabled = brightness != LED_OFF;
298 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®);
300 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
301 rt2x00_set_field16(®, MAC_CSR20_LINK, enabled);
302 else if (led->type == LED_TYPE_ACTIVITY)
303 rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled);
305 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
308 static int rt2500usb_blink_set(struct led_classdev *led_cdev,
309 unsigned long *delay_on,
310 unsigned long *delay_off)
312 struct rt2x00_led *led =
313 container_of(led_cdev, struct rt2x00_led, led_dev);
316 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®);
317 rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on);
318 rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off);
319 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
324 static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
325 struct rt2x00_led *led,
328 led->rt2x00dev = rt2x00dev;
330 led->led_dev.brightness_set = rt2500usb_brightness_set;
331 led->led_dev.blink_set = rt2500usb_blink_set;
332 led->flags = LED_INITIALIZED;
334 #endif /* CONFIG_RT2X00_LIB_LEDS */
337 * Configuration handlers.
341 * rt2500usb does not differentiate between shared and pairwise
342 * keys, so we should use the same function for both key types.
344 static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
345 struct rt2x00lib_crypto *crypto,
346 struct ieee80211_key_conf *key)
350 enum cipher curr_cipher;
352 if (crypto->cmd == SET_KEY) {
354 * Disallow to set WEP key other than with index 0,
355 * it is known that not work at least on some hardware.
356 * SW crypto will be used in that case.
358 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
359 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
364 * Pairwise key will always be entry 0, but this
365 * could collide with a shared key on the same
368 mask = TXRX_CSR0_KEY_ID.bit_mask;
370 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
371 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
374 if (reg && reg == mask)
377 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
379 key->hw_key_idx += reg ? ffz(reg) : 0;
381 * Hardware requires that all keys use the same cipher
382 * (e.g. TKIP-only, AES-only, but not TKIP+AES).
383 * If this is not the first key, compare the cipher with the
384 * first one and fall back to SW crypto if not the same.
386 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
389 rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
390 crypto->key, sizeof(crypto->key));
393 * The driver does not support the IV/EIV generation
394 * in hardware. However it demands the data to be provided
395 * both separately as well as inside the frame.
396 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
397 * to ensure rt2x00lib will not strip the data from the
398 * frame after the copy, now we must tell mac80211
399 * to generate the IV/EIV data.
401 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
402 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
406 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
407 * a particular key is valid.
409 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
410 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher);
411 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
413 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
414 if (crypto->cmd == SET_KEY)
415 mask |= 1 << key->hw_key_idx;
416 else if (crypto->cmd == DISABLE_KEY)
417 mask &= ~(1 << key->hw_key_idx);
418 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, mask);
419 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
424 static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
425 const unsigned int filter_flags)
430 * Start configuration steps.
431 * Note that the version error will always be dropped
432 * and broadcast frames will always be accepted since
433 * there is no filter for it at this time.
435 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
436 rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC,
437 !(filter_flags & FIF_FCSFAIL));
438 rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL,
439 !(filter_flags & FIF_PLCPFAIL));
440 rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL,
441 !(filter_flags & FIF_CONTROL));
442 rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME,
443 !(filter_flags & FIF_PROMISC_IN_BSS));
444 rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS,
445 !(filter_flags & FIF_PROMISC_IN_BSS) &&
446 !rt2x00dev->intf_ap_count);
447 rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1);
448 rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST,
449 !(filter_flags & FIF_ALLMULTI));
450 rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0);
451 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
454 static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
455 struct rt2x00_intf *intf,
456 struct rt2x00intf_conf *conf,
457 const unsigned int flags)
459 unsigned int bcn_preload;
462 if (flags & CONFIG_UPDATE_TYPE) {
464 * Enable beacon config
466 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
467 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®);
468 rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6);
469 rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW,
470 2 * (conf->type != NL80211_IFTYPE_STATION));
471 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
474 * Enable synchronisation.
476 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®);
477 rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0);
478 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
480 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
481 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1);
482 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync);
483 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1);
484 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
487 if (flags & CONFIG_UPDATE_MAC)
488 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
489 (3 * sizeof(__le16)));
491 if (flags & CONFIG_UPDATE_BSSID)
492 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
493 (3 * sizeof(__le16)));
496 static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
497 struct rt2x00lib_erp *erp)
501 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®);
502 rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE,
503 !!erp->short_preamble);
504 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
506 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
508 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®);
509 rt2x00_set_field16(®, TXRX_CSR18_INTERVAL, erp->beacon_int * 4);
510 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
512 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
513 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
514 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
517 static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
518 struct antenna_setup *ant)
526 * We should never come here because rt2x00lib is supposed
527 * to catch this and send us the correct antenna explicitely.
529 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
530 ant->tx == ANTENNA_SW_DIVERSITY);
532 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
533 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
534 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
535 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
538 * Configure the TX antenna.
541 case ANTENNA_HW_DIVERSITY:
542 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
543 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
544 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
547 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
548 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
549 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
553 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
554 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
555 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
560 * Configure the RX antenna.
563 case ANTENNA_HW_DIVERSITY:
564 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
567 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
571 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
576 * RT2525E and RT5222 need to flip TX I/Q
578 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
579 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
580 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
581 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
584 * RT2525E does not need RX I/Q Flip.
586 if (rt2x00_rf(rt2x00dev, RF2525E))
587 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
589 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
590 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
593 rt2500usb_bbp_write(rt2x00dev, 2, r2);
594 rt2500usb_bbp_write(rt2x00dev, 14, r14);
595 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
596 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
599 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
600 struct rf_channel *rf, const int txpower)
605 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
608 * For RT2525E we should first set the channel to half band higher.
610 if (rt2x00_rf(rt2x00dev, RF2525E)) {
611 static const u32 vals[] = {
612 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
613 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
614 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
615 0x00000902, 0x00000906
618 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
620 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
623 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
624 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
625 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
627 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
630 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
635 rt2x00_rf_read(rt2x00dev, 3, &rf3);
636 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
637 rt2500usb_rf_write(rt2x00dev, 3, rf3);
640 static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
641 struct rt2x00lib_conf *libconf)
643 enum dev_state state =
644 (libconf->conf->flags & IEEE80211_CONF_PS) ?
645 STATE_SLEEP : STATE_AWAKE;
648 if (state == STATE_SLEEP) {
649 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
650 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON,
651 rt2x00dev->beacon_int - 20);
652 rt2x00_set_field16(®, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
653 libconf->conf->listen_interval - 1);
655 /* We must first disable autowake before it can be enabled */
656 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0);
657 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
659 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 1);
660 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
662 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
663 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0);
664 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
667 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
670 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
671 struct rt2x00lib_conf *libconf,
672 const unsigned int flags)
674 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
675 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
676 libconf->conf->power_level);
677 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
678 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
679 rt2500usb_config_txpower(rt2x00dev,
680 libconf->conf->power_level);
681 if (flags & IEEE80211_CONF_CHANGE_PS)
682 rt2500usb_config_ps(rt2x00dev, libconf);
688 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
689 struct link_qual *qual)
694 * Update FCS error count from register.
696 rt2500usb_register_read(rt2x00dev, STA_CSR0, ®);
697 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
700 * Update False CCA count from register.
702 rt2500usb_register_read(rt2x00dev, STA_CSR3, ®);
703 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
706 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
707 struct link_qual *qual)
712 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
713 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
714 rt2500usb_bbp_write(rt2x00dev, 24, value);
716 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
717 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
718 rt2500usb_bbp_write(rt2x00dev, 25, value);
720 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
721 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
722 rt2500usb_bbp_write(rt2x00dev, 61, value);
724 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
725 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
726 rt2500usb_bbp_write(rt2x00dev, 17, value);
728 qual->vgc_level = value;
732 * Initialization functions.
734 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
738 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
739 USB_MODE_TEST, REGISTER_TIMEOUT);
740 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
741 0x00f0, REGISTER_TIMEOUT);
743 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
744 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1);
745 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
747 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
748 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
750 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
751 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1);
752 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1);
753 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0);
754 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
756 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
757 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0);
758 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0);
759 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0);
760 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
762 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®);
763 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13);
764 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1);
765 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12);
766 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1);
767 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
769 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®);
770 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10);
771 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1);
772 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11);
773 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1);
774 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
776 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®);
777 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7);
778 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1);
779 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6);
780 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1);
781 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
783 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®);
784 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5);
785 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1);
786 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0);
787 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0);
788 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
790 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
791 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0);
792 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0);
793 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0);
794 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0);
795 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
797 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
798 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
800 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
803 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
804 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0);
805 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0);
806 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1);
807 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
809 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
810 rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®);
811 rt2x00_set_field16(®, PHY_CSR2_LNA, 0);
814 rt2x00_set_field16(®, PHY_CSR2_LNA, 1);
815 rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3);
817 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
819 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
820 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
821 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
822 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
824 rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®);
825 rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT,
826 rt2x00dev->rx->data_size);
827 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
829 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
830 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
831 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
832 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0);
833 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
835 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
836 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90);
837 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
839 rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®);
840 rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1);
841 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
843 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®);
844 rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1);
845 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
850 static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
855 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
856 rt2500usb_bbp_read(rt2x00dev, 0, &value);
857 if ((value != 0xff) && (value != 0x00))
859 udelay(REGISTER_BUSY_DELAY);
862 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
866 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
873 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
876 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
877 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
878 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
879 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
880 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
881 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
882 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
883 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
884 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
885 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
886 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
887 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
888 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
889 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
890 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
891 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
892 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
893 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
894 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
895 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
896 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
897 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
898 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
899 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
900 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
901 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
902 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
903 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
904 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
905 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
906 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
908 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
909 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
911 if (eeprom != 0xffff && eeprom != 0x0000) {
912 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
913 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
914 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
922 * Device state switch handlers.
924 static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
925 enum dev_state state)
929 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
930 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX,
931 (state == STATE_RADIO_RX_OFF) ||
932 (state == STATE_RADIO_RX_OFF_LINK));
933 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
936 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
939 * Initialize all registers.
941 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
942 rt2500usb_init_bbp(rt2x00dev)))
948 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
950 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
951 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
954 * Disable synchronisation.
956 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
958 rt2x00usb_disable_radio(rt2x00dev);
961 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
962 enum dev_state state)
971 put_to_sleep = (state != STATE_AWAKE);
974 rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state);
975 rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state);
976 rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
977 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
978 rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1);
979 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
982 * Device is not guaranteed to be in the requested state yet.
983 * We must wait until the register indicates that the
984 * device has entered the correct state.
986 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
987 rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2);
988 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
989 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
990 if (bbp_state == state && rf_state == state)
992 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
999 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1000 enum dev_state state)
1005 case STATE_RADIO_ON:
1006 retval = rt2500usb_enable_radio(rt2x00dev);
1008 case STATE_RADIO_OFF:
1009 rt2500usb_disable_radio(rt2x00dev);
1011 case STATE_RADIO_RX_ON:
1012 case STATE_RADIO_RX_ON_LINK:
1013 case STATE_RADIO_RX_OFF:
1014 case STATE_RADIO_RX_OFF_LINK:
1015 rt2500usb_toggle_rx(rt2x00dev, state);
1017 case STATE_RADIO_IRQ_ON:
1018 case STATE_RADIO_IRQ_ON_ISR:
1019 case STATE_RADIO_IRQ_OFF:
1020 case STATE_RADIO_IRQ_OFF_ISR:
1021 /* No support, but no error either */
1023 case STATE_DEEP_SLEEP:
1027 retval = rt2500usb_set_state(rt2x00dev, state);
1034 if (unlikely(retval))
1035 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1042 * TX descriptor initialization
1044 static void rt2500usb_write_tx_desc(struct queue_entry *entry,
1045 struct txentry_desc *txdesc)
1047 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1048 __le32 *txd = (__le32 *) entry->skb->data;
1052 * Start writing the descriptor words.
1054 rt2x00_desc_read(txd, 0, &word);
1055 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1056 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1057 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1058 rt2x00_set_field32(&word, TXD_W0_ACK,
1059 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1060 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1061 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1062 rt2x00_set_field32(&word, TXD_W0_OFDM,
1063 (txdesc->rate_mode == RATE_MODE_OFDM));
1064 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1065 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1066 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1067 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1068 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1069 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1070 rt2x00_desc_write(txd, 0, word);
1072 rt2x00_desc_read(txd, 1, &word);
1073 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1074 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1075 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1076 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1077 rt2x00_desc_write(txd, 1, word);
1079 rt2x00_desc_read(txd, 2, &word);
1080 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1081 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1082 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1083 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1084 rt2x00_desc_write(txd, 2, word);
1086 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1087 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1088 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1092 * Register descriptor details in skb frame descriptor.
1094 skbdesc->flags |= SKBDESC_DESC_IN_SKB;
1095 skbdesc->desc = txd;
1096 skbdesc->desc_len = TXD_DESC_SIZE;
1100 * TX data initialization
1102 static void rt2500usb_beacondone(struct urb *urb);
1104 static void rt2500usb_write_beacon(struct queue_entry *entry,
1105 struct txentry_desc *txdesc)
1107 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1108 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1109 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1110 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1115 * Disable beaconing while we are reloading the beacon data,
1116 * otherwise we might be sending out invalid data.
1118 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
1119 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0);
1120 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1123 * Add space for the descriptor in front of the skb.
1125 skb_push(entry->skb, TXD_DESC_SIZE);
1126 memset(entry->skb->data, 0, TXD_DESC_SIZE);
1129 * Write the TX descriptor for the beacon.
1131 rt2500usb_write_tx_desc(entry, txdesc);
1134 * Dump beacon to userspace through debugfs.
1136 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
1139 * USB devices cannot blindly pass the skb->len as the
1140 * length of the data to usb_fill_bulk_urb. Pass the skb
1141 * to the driver to determine what the length should be.
1143 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1145 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1146 entry->skb->data, length, rt2500usb_beacondone,
1150 * Second we need to create the guardian byte.
1151 * We only need a single byte, so lets recycle
1152 * the 'flags' field we are not using for beacons.
1154 bcn_priv->guardian_data = 0;
1155 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1156 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1160 * Send out the guardian byte.
1162 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1165 * Enable beaconing again.
1167 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1);
1168 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1);
1170 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1);
1172 * Beacon generation will fail initially.
1173 * To prevent this we need to change the TXRX_CSR19
1174 * register several times (reg0 is the same as reg
1175 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1178 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1179 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1180 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1181 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1182 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1185 static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1190 * The length _must_ be a multiple of 2,
1191 * but it must _not_ be a multiple of the USB packet size.
1193 length = roundup(entry->skb->len, 2);
1194 length += (2 * !(length % entry->queue->usb_maxpacket));
1199 static void rt2500usb_kill_tx_queue(struct data_queue *queue)
1201 if (queue->qid == QID_BEACON)
1202 rt2500usb_register_write(queue->rt2x00dev, TXRX_CSR19, 0);
1204 rt2x00usb_kill_tx_queue(queue);
1208 * RX control handlers
1210 static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1211 struct rxdone_entry_desc *rxdesc)
1213 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1214 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1215 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1217 (__le32 *)(entry->skb->data +
1218 (entry_priv->urb->actual_length -
1219 entry->queue->desc_size));
1224 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1225 * frame data in rt2x00usb.
1227 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1228 rxd = (__le32 *)skbdesc->desc;
1231 * It is now safe to read the descriptor on all architectures.
1233 rt2x00_desc_read(rxd, 0, &word0);
1234 rt2x00_desc_read(rxd, 1, &word1);
1236 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1237 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1238 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1239 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1241 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1242 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1243 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1245 if (rxdesc->cipher != CIPHER_NONE) {
1246 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1247 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
1248 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1250 /* ICV is located at the end of frame */
1252 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1253 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1254 rxdesc->flags |= RX_FLAG_DECRYPTED;
1255 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1256 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1260 * Obtain the status about this packet.
1261 * When frame was received with an OFDM bitrate,
1262 * the signal is the PLCP value. If it was received with
1263 * a CCK bitrate the signal is the rate in 100kbit/s.
1265 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1267 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1268 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1270 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1271 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1273 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1274 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1275 rxdesc->dev_flags |= RXDONE_MY_BSS;
1278 * Adjust the skb memory window to the frame boundaries.
1280 skb_trim(entry->skb, rxdesc->size);
1284 * Interrupt functions.
1286 static void rt2500usb_beacondone(struct urb *urb)
1288 struct queue_entry *entry = (struct queue_entry *)urb->context;
1289 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1291 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1295 * Check if this was the guardian beacon,
1296 * if that was the case we need to send the real beacon now.
1297 * Otherwise we should free the sk_buffer, the device
1298 * should be doing the rest of the work now.
1300 if (bcn_priv->guardian_urb == urb) {
1301 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1302 } else if (bcn_priv->urb == urb) {
1303 dev_kfree_skb(entry->skb);
1309 * Device probe functions.
1311 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1317 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1320 * Start validation of the data that has been read.
1322 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1323 if (!is_valid_ether_addr(mac)) {
1324 random_ether_addr(mac);
1325 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
1328 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1329 if (word == 0xffff) {
1330 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1331 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1332 ANTENNA_SW_DIVERSITY);
1333 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1334 ANTENNA_SW_DIVERSITY);
1335 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1337 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1338 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1339 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1340 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1341 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1344 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1345 if (word == 0xffff) {
1346 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1347 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1348 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1349 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1350 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1353 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1354 if (word == 0xffff) {
1355 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1356 DEFAULT_RSSI_OFFSET);
1357 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1358 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1361 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1362 if (word == 0xffff) {
1363 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1364 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1365 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1369 * Switch lower vgc bound to current BBP R17 value,
1370 * lower the value a bit for better quality.
1372 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1375 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1376 if (word == 0xffff) {
1377 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1378 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1379 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1380 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1382 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1383 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1386 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1387 if (word == 0xffff) {
1388 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1389 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1390 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1391 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1394 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1395 if (word == 0xffff) {
1396 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1397 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1398 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1399 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1402 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1403 if (word == 0xffff) {
1404 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1405 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1406 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1407 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1410 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1411 if (word == 0xffff) {
1412 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1413 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1414 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1415 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1421 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1428 * Read EEPROM word for configuration.
1430 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1433 * Identify RF chipset.
1435 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1436 rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®);
1437 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1439 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1440 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1444 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1445 !rt2x00_rf(rt2x00dev, RF2523) &&
1446 !rt2x00_rf(rt2x00dev, RF2524) &&
1447 !rt2x00_rf(rt2x00dev, RF2525) &&
1448 !rt2x00_rf(rt2x00dev, RF2525E) &&
1449 !rt2x00_rf(rt2x00dev, RF5222)) {
1450 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1455 * Identify default antenna configuration.
1457 rt2x00dev->default_ant.tx =
1458 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1459 rt2x00dev->default_ant.rx =
1460 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1463 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1464 * I am not 100% sure about this, but the legacy drivers do not
1465 * indicate antenna swapping in software is required when
1466 * diversity is enabled.
1468 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1469 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1470 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1471 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1474 * Store led mode, for correct led behaviour.
1476 #ifdef CONFIG_RT2X00_LIB_LEDS
1477 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1479 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1480 if (value == LED_MODE_TXRX_ACTIVITY ||
1481 value == LED_MODE_DEFAULT ||
1482 value == LED_MODE_ASUS)
1483 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1485 #endif /* CONFIG_RT2X00_LIB_LEDS */
1488 * Detect if this device has an hardware controlled radio.
1490 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1491 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
1494 * Read the RSSI <-> dBm offset information.
1496 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1497 rt2x00dev->rssi_offset =
1498 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1504 * RF value list for RF2522
1507 static const struct rf_channel rf_vals_bg_2522[] = {
1508 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1509 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1510 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1511 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1512 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1513 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1514 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1515 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1516 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1517 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1518 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1519 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1520 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1521 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1525 * RF value list for RF2523
1528 static const struct rf_channel rf_vals_bg_2523[] = {
1529 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1530 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1531 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1532 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1533 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1534 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1535 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1536 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1537 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1538 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1539 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1540 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1541 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1542 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1546 * RF value list for RF2524
1549 static const struct rf_channel rf_vals_bg_2524[] = {
1550 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1551 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1552 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1553 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1554 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1555 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1556 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1557 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1558 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1559 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1560 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1561 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1562 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1563 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1567 * RF value list for RF2525
1570 static const struct rf_channel rf_vals_bg_2525[] = {
1571 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1572 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1573 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1574 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1575 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1576 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1577 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1578 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1579 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1580 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1581 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1582 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1583 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1584 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1588 * RF value list for RF2525e
1591 static const struct rf_channel rf_vals_bg_2525e[] = {
1592 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1593 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1594 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1595 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1596 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1597 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1598 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1599 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1600 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1601 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1602 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1603 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1604 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1605 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1609 * RF value list for RF5222
1610 * Supports: 2.4 GHz & 5.2 GHz
1612 static const struct rf_channel rf_vals_5222[] = {
1613 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1614 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1615 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1616 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1617 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1618 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1619 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1620 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1621 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1622 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1623 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1624 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1625 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1626 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1628 /* 802.11 UNI / HyperLan 2 */
1629 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1630 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1631 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1632 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1633 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1634 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1635 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1636 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1638 /* 802.11 HyperLan 2 */
1639 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1640 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1641 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1642 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1643 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1644 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1645 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1646 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1647 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1648 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1651 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1652 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1653 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1654 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1655 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1658 static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1660 struct hw_mode_spec *spec = &rt2x00dev->spec;
1661 struct channel_info *info;
1666 * Initialize all hw fields.
1668 rt2x00dev->hw->flags =
1669 IEEE80211_HW_RX_INCLUDES_FCS |
1670 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1671 IEEE80211_HW_SIGNAL_DBM |
1672 IEEE80211_HW_SUPPORTS_PS |
1673 IEEE80211_HW_PS_NULLFUNC_STACK;
1675 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1676 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1677 rt2x00_eeprom_addr(rt2x00dev,
1678 EEPROM_MAC_ADDR_0));
1681 * Initialize hw_mode information.
1683 spec->supported_bands = SUPPORT_BAND_2GHZ;
1684 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1686 if (rt2x00_rf(rt2x00dev, RF2522)) {
1687 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1688 spec->channels = rf_vals_bg_2522;
1689 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
1690 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1691 spec->channels = rf_vals_bg_2523;
1692 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
1693 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1694 spec->channels = rf_vals_bg_2524;
1695 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
1696 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1697 spec->channels = rf_vals_bg_2525;
1698 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1699 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1700 spec->channels = rf_vals_bg_2525e;
1701 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
1702 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1703 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1704 spec->channels = rf_vals_5222;
1708 * Create channel information array
1710 info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
1714 spec->channels_info = info;
1716 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1717 for (i = 0; i < 14; i++) {
1718 info[i].max_power = MAX_TXPOWER;
1719 info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1722 if (spec->num_channels > 14) {
1723 for (i = 14; i < spec->num_channels; i++) {
1724 info[i].max_power = MAX_TXPOWER;
1725 info[i].default_power1 = DEFAULT_TXPOWER;
1732 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1737 * Allocate eeprom data.
1739 retval = rt2500usb_validate_eeprom(rt2x00dev);
1743 retval = rt2500usb_init_eeprom(rt2x00dev);
1748 * Initialize hw specifications.
1750 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1755 * This device requires the atim queue
1757 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1758 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
1759 if (!modparam_nohwcrypt) {
1760 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
1761 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
1763 __set_bit(DRIVER_SUPPORT_WATCHDOG, &rt2x00dev->flags);
1766 * Set the rssi offset.
1768 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1773 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1775 .start = rt2x00mac_start,
1776 .stop = rt2x00mac_stop,
1777 .add_interface = rt2x00mac_add_interface,
1778 .remove_interface = rt2x00mac_remove_interface,
1779 .config = rt2x00mac_config,
1780 .configure_filter = rt2x00mac_configure_filter,
1781 .set_tim = rt2x00mac_set_tim,
1782 .set_key = rt2x00mac_set_key,
1783 .sw_scan_start = rt2x00mac_sw_scan_start,
1784 .sw_scan_complete = rt2x00mac_sw_scan_complete,
1785 .get_stats = rt2x00mac_get_stats,
1786 .bss_info_changed = rt2x00mac_bss_info_changed,
1787 .conf_tx = rt2x00mac_conf_tx,
1788 .rfkill_poll = rt2x00mac_rfkill_poll,
1791 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1792 .probe_hw = rt2500usb_probe_hw,
1793 .initialize = rt2x00usb_initialize,
1794 .uninitialize = rt2x00usb_uninitialize,
1795 .clear_entry = rt2x00usb_clear_entry,
1796 .set_device_state = rt2500usb_set_device_state,
1797 .rfkill_poll = rt2500usb_rfkill_poll,
1798 .link_stats = rt2500usb_link_stats,
1799 .reset_tuner = rt2500usb_reset_tuner,
1800 .watchdog = rt2x00usb_watchdog,
1801 .write_tx_desc = rt2500usb_write_tx_desc,
1802 .write_beacon = rt2500usb_write_beacon,
1803 .get_tx_data_len = rt2500usb_get_tx_data_len,
1804 .kick_tx_queue = rt2x00usb_kick_tx_queue,
1805 .kill_tx_queue = rt2500usb_kill_tx_queue,
1806 .fill_rxdone = rt2500usb_fill_rxdone,
1807 .config_shared_key = rt2500usb_config_key,
1808 .config_pairwise_key = rt2500usb_config_key,
1809 .config_filter = rt2500usb_config_filter,
1810 .config_intf = rt2500usb_config_intf,
1811 .config_erp = rt2500usb_config_erp,
1812 .config_ant = rt2500usb_config_ant,
1813 .config = rt2500usb_config,
1816 static const struct data_queue_desc rt2500usb_queue_rx = {
1817 .entry_num = RX_ENTRIES,
1818 .data_size = DATA_FRAME_SIZE,
1819 .desc_size = RXD_DESC_SIZE,
1820 .priv_size = sizeof(struct queue_entry_priv_usb),
1823 static const struct data_queue_desc rt2500usb_queue_tx = {
1824 .entry_num = TX_ENTRIES,
1825 .data_size = DATA_FRAME_SIZE,
1826 .desc_size = TXD_DESC_SIZE,
1827 .priv_size = sizeof(struct queue_entry_priv_usb),
1830 static const struct data_queue_desc rt2500usb_queue_bcn = {
1831 .entry_num = BEACON_ENTRIES,
1832 .data_size = MGMT_FRAME_SIZE,
1833 .desc_size = TXD_DESC_SIZE,
1834 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1837 static const struct data_queue_desc rt2500usb_queue_atim = {
1838 .entry_num = ATIM_ENTRIES,
1839 .data_size = DATA_FRAME_SIZE,
1840 .desc_size = TXD_DESC_SIZE,
1841 .priv_size = sizeof(struct queue_entry_priv_usb),
1844 static const struct rt2x00_ops rt2500usb_ops = {
1845 .name = KBUILD_MODNAME,
1848 .eeprom_size = EEPROM_SIZE,
1850 .tx_queues = NUM_TX_QUEUES,
1851 .extra_tx_headroom = TXD_DESC_SIZE,
1852 .rx = &rt2500usb_queue_rx,
1853 .tx = &rt2500usb_queue_tx,
1854 .bcn = &rt2500usb_queue_bcn,
1855 .atim = &rt2500usb_queue_atim,
1856 .lib = &rt2500usb_rt2x00_ops,
1857 .hw = &rt2500usb_mac80211_ops,
1858 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1859 .debugfs = &rt2500usb_rt2x00debug,
1860 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1864 * rt2500usb module information.
1866 static struct usb_device_id rt2500usb_device_table[] = {
1868 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1869 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1871 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1872 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1873 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1875 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1876 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1877 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1879 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
1881 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1883 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1885 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1886 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1888 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1890 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
1891 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1892 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1893 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1894 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1896 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1897 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1898 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1900 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1901 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1902 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1903 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1905 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
1907 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1909 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1911 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1913 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
1915 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1917 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
1919 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1923 MODULE_AUTHOR(DRV_PROJECT);
1924 MODULE_VERSION(DRV_VERSION);
1925 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1926 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1927 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1928 MODULE_LICENSE("GPL");
1930 static struct usb_driver rt2500usb_driver = {
1931 .name = KBUILD_MODNAME,
1932 .id_table = rt2500usb_device_table,
1933 .probe = rt2x00usb_probe,
1934 .disconnect = rt2x00usb_disconnect,
1935 .suspend = rt2x00usb_suspend,
1936 .resume = rt2x00usb_resume,
1939 static int __init rt2500usb_init(void)
1941 return usb_register(&rt2500usb_driver);
1944 static void __exit rt2500usb_exit(void)
1946 usb_deregister(&rt2500usb_driver);
1949 module_init(rt2500usb_init);
1950 module_exit(rt2500usb_exit);