2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *ap_rxd_ops;
98 struct mwl8k_rx_queue {
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma)
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
125 struct sk_buff **skb;
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
132 struct mwl8k_device_info *device_info;
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
141 /* hardware/firmware parameters */
143 struct rxd_ops *rxd_ops;
144 struct ieee80211_supported_band band_24;
145 struct ieee80211_channel channels_24[14];
146 struct ieee80211_rate rates_24[14];
147 struct ieee80211_supported_band band_50;
148 struct ieee80211_channel channels_50[4];
149 struct ieee80211_rate rates_50[9];
151 /* firmware access */
152 struct mutex fw_mutex;
153 struct task_struct *fw_mutex_owner;
155 struct completion *hostcmd_wait;
157 /* lock held over TX and TX reap */
160 /* TX quiesce completion, protected by fw_mutex and tx_lock */
161 struct completion *tx_wait;
163 struct ieee80211_vif *vif;
165 /* power management status cookie from firmware */
167 dma_addr_t cookie_dma;
174 * Running count of TX packets in flight, to avoid
175 * iterating over the transmit rings each time.
179 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
180 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
183 bool radio_short_preamble;
184 bool sniffer_enabled;
187 struct work_struct sta_notify_worker;
188 spinlock_t sta_notify_list_lock;
189 struct list_head sta_notify_list;
191 /* XXX need to convert this to handle multiple interfaces */
193 u8 capture_bssid[ETH_ALEN];
194 struct sk_buff *beacon_skb;
197 * This FJ worker has to be global as it is scheduled from the
198 * RX handler. At this point we don't know which interface it
199 * belongs to until the list of bssids waiting to complete join
202 struct work_struct finalize_join_worker;
204 /* Tasklet to perform TX reclaim. */
205 struct tasklet_struct poll_tx_task;
207 /* Tasklet to perform RX. */
208 struct tasklet_struct poll_rx_task;
211 /* Per interface specific private data */
213 /* Non AMPDU sequence number assigned by driver. */
216 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
219 /* Index into station database. Returned by UPDATE_STADB. */
222 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
224 static const struct ieee80211_channel mwl8k_channels_24[] = {
225 { .center_freq = 2412, .hw_value = 1, },
226 { .center_freq = 2417, .hw_value = 2, },
227 { .center_freq = 2422, .hw_value = 3, },
228 { .center_freq = 2427, .hw_value = 4, },
229 { .center_freq = 2432, .hw_value = 5, },
230 { .center_freq = 2437, .hw_value = 6, },
231 { .center_freq = 2442, .hw_value = 7, },
232 { .center_freq = 2447, .hw_value = 8, },
233 { .center_freq = 2452, .hw_value = 9, },
234 { .center_freq = 2457, .hw_value = 10, },
235 { .center_freq = 2462, .hw_value = 11, },
236 { .center_freq = 2467, .hw_value = 12, },
237 { .center_freq = 2472, .hw_value = 13, },
238 { .center_freq = 2484, .hw_value = 14, },
241 static const struct ieee80211_rate mwl8k_rates_24[] = {
242 { .bitrate = 10, .hw_value = 2, },
243 { .bitrate = 20, .hw_value = 4, },
244 { .bitrate = 55, .hw_value = 11, },
245 { .bitrate = 110, .hw_value = 22, },
246 { .bitrate = 220, .hw_value = 44, },
247 { .bitrate = 60, .hw_value = 12, },
248 { .bitrate = 90, .hw_value = 18, },
249 { .bitrate = 120, .hw_value = 24, },
250 { .bitrate = 180, .hw_value = 36, },
251 { .bitrate = 240, .hw_value = 48, },
252 { .bitrate = 360, .hw_value = 72, },
253 { .bitrate = 480, .hw_value = 96, },
254 { .bitrate = 540, .hw_value = 108, },
255 { .bitrate = 720, .hw_value = 144, },
258 static const struct ieee80211_channel mwl8k_channels_50[] = {
259 { .center_freq = 5180, .hw_value = 36, },
260 { .center_freq = 5200, .hw_value = 40, },
261 { .center_freq = 5220, .hw_value = 44, },
262 { .center_freq = 5240, .hw_value = 48, },
265 static const struct ieee80211_rate mwl8k_rates_50[] = {
266 { .bitrate = 60, .hw_value = 12, },
267 { .bitrate = 90, .hw_value = 18, },
268 { .bitrate = 120, .hw_value = 24, },
269 { .bitrate = 180, .hw_value = 36, },
270 { .bitrate = 240, .hw_value = 48, },
271 { .bitrate = 360, .hw_value = 72, },
272 { .bitrate = 480, .hw_value = 96, },
273 { .bitrate = 540, .hw_value = 108, },
274 { .bitrate = 720, .hw_value = 144, },
277 /* Set or get info from Firmware */
278 #define MWL8K_CMD_SET 0x0001
279 #define MWL8K_CMD_GET 0x0000
281 /* Firmware command codes */
282 #define MWL8K_CMD_CODE_DNLD 0x0001
283 #define MWL8K_CMD_GET_HW_SPEC 0x0003
284 #define MWL8K_CMD_SET_HW_SPEC 0x0004
285 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
286 #define MWL8K_CMD_GET_STAT 0x0014
287 #define MWL8K_CMD_RADIO_CONTROL 0x001c
288 #define MWL8K_CMD_RF_TX_POWER 0x001e
289 #define MWL8K_CMD_RF_ANTENNA 0x0020
290 #define MWL8K_CMD_SET_BEACON 0x0100
291 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
292 #define MWL8K_CMD_SET_POST_SCAN 0x0108
293 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
294 #define MWL8K_CMD_SET_AID 0x010d
295 #define MWL8K_CMD_SET_RATE 0x0110
296 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
297 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
298 #define MWL8K_CMD_SET_SLOT 0x0114
299 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
300 #define MWL8K_CMD_SET_WMM_MODE 0x0123
301 #define MWL8K_CMD_MIMO_CONFIG 0x0125
302 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
303 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
304 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
305 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
306 #define MWL8K_CMD_BSS_START 0x1100
307 #define MWL8K_CMD_SET_NEW_STN 0x1111
308 #define MWL8K_CMD_UPDATE_STADB 0x1123
310 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
312 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
313 snprintf(buf, bufsize, "%s", #x);\
316 switch (cmd & ~0x8000) {
317 MWL8K_CMDNAME(CODE_DNLD);
318 MWL8K_CMDNAME(GET_HW_SPEC);
319 MWL8K_CMDNAME(SET_HW_SPEC);
320 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
321 MWL8K_CMDNAME(GET_STAT);
322 MWL8K_CMDNAME(RADIO_CONTROL);
323 MWL8K_CMDNAME(RF_TX_POWER);
324 MWL8K_CMDNAME(RF_ANTENNA);
325 MWL8K_CMDNAME(SET_BEACON);
326 MWL8K_CMDNAME(SET_PRE_SCAN);
327 MWL8K_CMDNAME(SET_POST_SCAN);
328 MWL8K_CMDNAME(SET_RF_CHANNEL);
329 MWL8K_CMDNAME(SET_AID);
330 MWL8K_CMDNAME(SET_RATE);
331 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
332 MWL8K_CMDNAME(RTS_THRESHOLD);
333 MWL8K_CMDNAME(SET_SLOT);
334 MWL8K_CMDNAME(SET_EDCA_PARAMS);
335 MWL8K_CMDNAME(SET_WMM_MODE);
336 MWL8K_CMDNAME(MIMO_CONFIG);
337 MWL8K_CMDNAME(USE_FIXED_RATE);
338 MWL8K_CMDNAME(ENABLE_SNIFFER);
339 MWL8K_CMDNAME(SET_MAC_ADDR);
340 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
341 MWL8K_CMDNAME(BSS_START);
342 MWL8K_CMDNAME(SET_NEW_STN);
343 MWL8K_CMDNAME(UPDATE_STADB);
345 snprintf(buf, bufsize, "0x%x", cmd);
352 /* Hardware and firmware reset */
353 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
355 iowrite32(MWL8K_H2A_INT_RESET,
356 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
357 iowrite32(MWL8K_H2A_INT_RESET,
358 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
362 /* Release fw image */
363 static void mwl8k_release_fw(struct firmware **fw)
367 release_firmware(*fw);
371 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
373 mwl8k_release_fw(&priv->fw_ucode);
374 mwl8k_release_fw(&priv->fw_helper);
377 /* Request fw image */
378 static int mwl8k_request_fw(struct mwl8k_priv *priv,
379 const char *fname, struct firmware **fw)
381 /* release current image */
383 mwl8k_release_fw(fw);
385 return request_firmware((const struct firmware **)fw,
386 fname, &priv->pdev->dev);
389 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
391 struct mwl8k_device_info *di = priv->device_info;
394 if (di->helper_image != NULL) {
395 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
397 printk(KERN_ERR "%s: Error requesting helper "
398 "firmware file %s\n", pci_name(priv->pdev),
404 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
406 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
407 pci_name(priv->pdev), di->fw_image);
408 mwl8k_release_fw(&priv->fw_helper);
415 struct mwl8k_cmd_pkt {
421 } __attribute__((packed));
427 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
429 void __iomem *regs = priv->regs;
433 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
434 if (pci_dma_mapping_error(priv->pdev, dma_addr))
437 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
438 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
439 iowrite32(MWL8K_H2A_INT_DOORBELL,
440 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
441 iowrite32(MWL8K_H2A_INT_DUMMY,
442 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
448 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
449 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
450 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
458 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
460 return loops ? 0 : -ETIMEDOUT;
463 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
464 const u8 *data, size_t length)
466 struct mwl8k_cmd_pkt *cmd;
470 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
474 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
480 int block_size = length > 256 ? 256 : length;
482 memcpy(cmd->payload, data + done, block_size);
483 cmd->length = cpu_to_le16(block_size);
485 rc = mwl8k_send_fw_load_cmd(priv, cmd,
486 sizeof(*cmd) + block_size);
491 length -= block_size;
496 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
504 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
505 const u8 *data, size_t length)
507 unsigned char *buffer;
508 int may_continue, rc = 0;
509 u32 done, prev_block_size;
511 buffer = kmalloc(1024, GFP_KERNEL);
518 while (may_continue > 0) {
521 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
522 if (block_size & 1) {
526 done += prev_block_size;
527 length -= prev_block_size;
530 if (block_size > 1024 || block_size > length) {
540 if (block_size == 0) {
547 prev_block_size = block_size;
548 memcpy(buffer, data + done, block_size);
550 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
555 if (!rc && length != 0)
563 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
565 struct mwl8k_priv *priv = hw->priv;
566 struct firmware *fw = priv->fw_ucode;
570 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
571 struct firmware *helper = priv->fw_helper;
573 if (helper == NULL) {
574 printk(KERN_ERR "%s: helper image needed but none "
575 "given\n", pci_name(priv->pdev));
579 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
581 printk(KERN_ERR "%s: unable to load firmware "
582 "helper image\n", pci_name(priv->pdev));
587 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
589 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
593 printk(KERN_ERR "%s: unable to load firmware image\n",
594 pci_name(priv->pdev));
598 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
604 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
605 if (ready_code == MWL8K_FWAP_READY) {
608 } else if (ready_code == MWL8K_FWSTA_READY) {
617 return loops ? 0 : -ETIMEDOUT;
621 /* DMA header used by firmware and hardware. */
622 struct mwl8k_dma_data {
624 struct ieee80211_hdr wh;
626 } __attribute__((packed));
628 /* Routines to add/remove DMA header from skb. */
629 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
631 struct mwl8k_dma_data *tr;
634 tr = (struct mwl8k_dma_data *)skb->data;
635 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
637 if (hdrlen != sizeof(tr->wh)) {
638 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
639 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
640 *((__le16 *)(tr->data - 2)) = qos;
642 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
646 if (hdrlen != sizeof(*tr))
647 skb_pull(skb, sizeof(*tr) - hdrlen);
650 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
652 struct ieee80211_hdr *wh;
654 struct mwl8k_dma_data *tr;
657 * Add a firmware DMA header; the firmware requires that we
658 * present a 2-byte payload length followed by a 4-address
659 * header (without QoS field), followed (optionally) by any
660 * WEP/ExtIV header (but only filled in for CCMP).
662 wh = (struct ieee80211_hdr *)skb->data;
664 hdrlen = ieee80211_hdrlen(wh->frame_control);
665 if (hdrlen != sizeof(*tr))
666 skb_push(skb, sizeof(*tr) - hdrlen);
668 if (ieee80211_is_data_qos(wh->frame_control))
671 tr = (struct mwl8k_dma_data *)skb->data;
673 memmove(&tr->wh, wh, hdrlen);
674 if (hdrlen != sizeof(tr->wh))
675 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
678 * Firmware length is the length of the fully formed "802.11
679 * payload". That is, everything except for the 802.11 header.
680 * This includes all crypto material including the MIC.
682 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
687 * Packet reception for 88w8366 AP firmware.
689 struct mwl8k_rxd_8366_ap {
693 __le32 pkt_phys_addr;
694 __le32 next_rxd_phys_addr;
698 __le32 hw_noise_floor_info;
705 } __attribute__((packed));
707 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
708 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
709 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
711 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
713 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
715 struct mwl8k_rxd_8366_ap *rxd = _rxd;
717 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
718 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
721 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
723 struct mwl8k_rxd_8366_ap *rxd = _rxd;
725 rxd->pkt_len = cpu_to_le16(len);
726 rxd->pkt_phys_addr = cpu_to_le32(addr);
732 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
735 struct mwl8k_rxd_8366_ap *rxd = _rxd;
737 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
741 memset(status, 0, sizeof(*status));
743 status->signal = -rxd->rssi;
744 status->noise = -rxd->noise_floor;
746 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
747 status->flag |= RX_FLAG_HT;
748 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
749 status->flag |= RX_FLAG_40MHZ;
750 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
754 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
755 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
756 status->rate_idx = i;
762 status->band = IEEE80211_BAND_2GHZ;
763 status->freq = ieee80211_channel_to_frequency(rxd->channel);
765 *qos = rxd->qos_control;
767 return le16_to_cpu(rxd->pkt_len);
770 static struct rxd_ops rxd_8366_ap_ops = {
771 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
772 .rxd_init = mwl8k_rxd_8366_ap_init,
773 .rxd_refill = mwl8k_rxd_8366_ap_refill,
774 .rxd_process = mwl8k_rxd_8366_ap_process,
778 * Packet reception for STA firmware.
780 struct mwl8k_rxd_sta {
784 __le32 pkt_phys_addr;
785 __le32 next_rxd_phys_addr;
795 } __attribute__((packed));
797 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
798 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
799 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
800 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
801 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
802 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
804 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
806 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
808 struct mwl8k_rxd_sta *rxd = _rxd;
810 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
811 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
814 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
816 struct mwl8k_rxd_sta *rxd = _rxd;
818 rxd->pkt_len = cpu_to_le16(len);
819 rxd->pkt_phys_addr = cpu_to_le32(addr);
825 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
828 struct mwl8k_rxd_sta *rxd = _rxd;
831 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
835 rate_info = le16_to_cpu(rxd->rate_info);
837 memset(status, 0, sizeof(*status));
839 status->signal = -rxd->rssi;
840 status->noise = -rxd->noise_level;
841 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
842 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
844 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
845 status->flag |= RX_FLAG_SHORTPRE;
846 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
847 status->flag |= RX_FLAG_40MHZ;
848 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
849 status->flag |= RX_FLAG_SHORT_GI;
850 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
851 status->flag |= RX_FLAG_HT;
853 status->band = IEEE80211_BAND_2GHZ;
854 status->freq = ieee80211_channel_to_frequency(rxd->channel);
856 *qos = rxd->qos_control;
858 return le16_to_cpu(rxd->pkt_len);
861 static struct rxd_ops rxd_sta_ops = {
862 .rxd_size = sizeof(struct mwl8k_rxd_sta),
863 .rxd_init = mwl8k_rxd_sta_init,
864 .rxd_refill = mwl8k_rxd_sta_refill,
865 .rxd_process = mwl8k_rxd_sta_process,
869 #define MWL8K_RX_DESCS 256
870 #define MWL8K_RX_MAXSZ 3800
872 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
874 struct mwl8k_priv *priv = hw->priv;
875 struct mwl8k_rx_queue *rxq = priv->rxq + index;
883 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
885 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
886 if (rxq->rxd == NULL) {
887 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
888 wiphy_name(hw->wiphy));
891 memset(rxq->rxd, 0, size);
893 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
894 if (rxq->buf == NULL) {
895 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
896 wiphy_name(hw->wiphy));
897 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
900 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
902 for (i = 0; i < MWL8K_RX_DESCS; i++) {
906 dma_addr_t next_dma_addr;
908 desc_size = priv->rxd_ops->rxd_size;
909 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
912 if (nexti == MWL8K_RX_DESCS)
914 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
916 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
922 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
924 struct mwl8k_priv *priv = hw->priv;
925 struct mwl8k_rx_queue *rxq = priv->rxq + index;
929 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
935 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
939 addr = pci_map_single(priv->pdev, skb->data,
940 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
944 if (rxq->tail == MWL8K_RX_DESCS)
946 rxq->buf[rx].skb = skb;
947 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
949 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
950 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
958 /* Must be called only when the card's reception is completely halted */
959 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
961 struct mwl8k_priv *priv = hw->priv;
962 struct mwl8k_rx_queue *rxq = priv->rxq + index;
965 for (i = 0; i < MWL8K_RX_DESCS; i++) {
966 if (rxq->buf[i].skb != NULL) {
967 pci_unmap_single(priv->pdev,
968 pci_unmap_addr(&rxq->buf[i], dma),
969 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
970 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
972 kfree_skb(rxq->buf[i].skb);
973 rxq->buf[i].skb = NULL;
980 pci_free_consistent(priv->pdev,
981 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
982 rxq->rxd, rxq->rxd_dma);
988 * Scan a list of BSSIDs to process for finalize join.
989 * Allows for extension to process multiple BSSIDs.
992 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
994 return priv->capture_beacon &&
995 ieee80211_is_beacon(wh->frame_control) &&
996 !compare_ether_addr(wh->addr3, priv->capture_bssid);
999 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1000 struct sk_buff *skb)
1002 struct mwl8k_priv *priv = hw->priv;
1004 priv->capture_beacon = false;
1005 memset(priv->capture_bssid, 0, ETH_ALEN);
1008 * Use GFP_ATOMIC as rxq_process is called from
1009 * the primary interrupt handler, memory allocation call
1012 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1013 if (priv->beacon_skb != NULL)
1014 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1017 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1019 struct mwl8k_priv *priv = hw->priv;
1020 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1024 while (rxq->rxd_count && limit--) {
1025 struct sk_buff *skb;
1028 struct ieee80211_rx_status status;
1031 skb = rxq->buf[rxq->head].skb;
1035 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1037 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1041 rxq->buf[rxq->head].skb = NULL;
1043 pci_unmap_single(priv->pdev,
1044 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1045 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1046 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1049 if (rxq->head == MWL8K_RX_DESCS)
1054 skb_put(skb, pkt_len);
1055 mwl8k_remove_dma_header(skb, qos);
1058 * Check for a pending join operation. Save a
1059 * copy of the beacon and schedule a tasklet to
1060 * send a FINALIZE_JOIN command to the firmware.
1062 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1063 mwl8k_save_beacon(hw, skb);
1065 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1066 ieee80211_rx_irqsafe(hw, skb);
1076 * Packet transmission.
1079 #define MWL8K_TXD_STATUS_OK 0x00000001
1080 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1081 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1082 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1083 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1085 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1086 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1087 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1088 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1089 #define MWL8K_QOS_EOSP 0x0010
1091 struct mwl8k_tx_desc {
1096 __le32 pkt_phys_addr;
1098 __u8 dest_MAC_addr[ETH_ALEN];
1099 __le32 next_txd_phys_addr;
1104 } __attribute__((packed));
1106 #define MWL8K_TX_DESCS 128
1108 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1110 struct mwl8k_priv *priv = hw->priv;
1111 struct mwl8k_tx_queue *txq = priv->txq + index;
1115 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1116 txq->stats.limit = MWL8K_TX_DESCS;
1120 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1122 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1123 if (txq->txd == NULL) {
1124 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1125 wiphy_name(hw->wiphy));
1128 memset(txq->txd, 0, size);
1130 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1131 if (txq->skb == NULL) {
1132 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1133 wiphy_name(hw->wiphy));
1134 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1137 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1139 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1140 struct mwl8k_tx_desc *tx_desc;
1143 tx_desc = txq->txd + i;
1144 nexti = (i + 1) % MWL8K_TX_DESCS;
1146 tx_desc->status = 0;
1147 tx_desc->next_txd_phys_addr =
1148 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1154 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1156 iowrite32(MWL8K_H2A_INT_PPA_READY,
1157 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1158 iowrite32(MWL8K_H2A_INT_DUMMY,
1159 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1160 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1163 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1165 struct mwl8k_priv *priv = hw->priv;
1168 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1169 struct mwl8k_tx_queue *txq = priv->txq + i;
1175 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1176 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1179 status = le32_to_cpu(tx_desc->status);
1180 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1185 if (tx_desc->pkt_len == 0)
1189 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1190 "fw_owned=%d drv_owned=%d unused=%d\n",
1191 wiphy_name(hw->wiphy), i,
1192 txq->stats.len, txq->head, txq->tail,
1193 fw_owned, drv_owned, unused);
1198 * Must be called with priv->fw_mutex held and tx queues stopped.
1200 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1202 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1204 struct mwl8k_priv *priv = hw->priv;
1205 DECLARE_COMPLETION_ONSTACK(tx_wait);
1212 * The TX queues are stopped at this point, so this test
1213 * doesn't need to take ->tx_lock.
1215 if (!priv->pending_tx_pkts)
1221 spin_lock_bh(&priv->tx_lock);
1222 priv->tx_wait = &tx_wait;
1225 unsigned long timeout;
1227 oldcount = priv->pending_tx_pkts;
1229 spin_unlock_bh(&priv->tx_lock);
1230 timeout = wait_for_completion_timeout(&tx_wait,
1231 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1232 spin_lock_bh(&priv->tx_lock);
1235 WARN_ON(priv->pending_tx_pkts);
1237 printk(KERN_NOTICE "%s: tx rings drained\n",
1238 wiphy_name(hw->wiphy));
1243 if (priv->pending_tx_pkts < oldcount) {
1244 printk(KERN_NOTICE "%s: waiting for tx rings "
1245 "to drain (%d -> %d pkts)\n",
1246 wiphy_name(hw->wiphy), oldcount,
1247 priv->pending_tx_pkts);
1252 priv->tx_wait = NULL;
1254 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1255 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1256 mwl8k_dump_tx_rings(hw);
1260 spin_unlock_bh(&priv->tx_lock);
1265 #define MWL8K_TXD_SUCCESS(status) \
1266 ((status) & (MWL8K_TXD_STATUS_OK | \
1267 MWL8K_TXD_STATUS_OK_RETRY | \
1268 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1271 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1273 struct mwl8k_priv *priv = hw->priv;
1274 struct mwl8k_tx_queue *txq = priv->txq + index;
1278 while (txq->stats.len > 0 && limit--) {
1280 struct mwl8k_tx_desc *tx_desc;
1283 struct sk_buff *skb;
1284 struct ieee80211_tx_info *info;
1288 tx_desc = txq->txd + tx;
1290 status = le32_to_cpu(tx_desc->status);
1292 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1296 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1299 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1300 BUG_ON(txq->stats.len == 0);
1302 priv->pending_tx_pkts--;
1304 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1305 size = le16_to_cpu(tx_desc->pkt_len);
1307 txq->skb[tx] = NULL;
1309 BUG_ON(skb == NULL);
1310 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1312 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1314 /* Mark descriptor as unused */
1315 tx_desc->pkt_phys_addr = 0;
1316 tx_desc->pkt_len = 0;
1318 info = IEEE80211_SKB_CB(skb);
1319 ieee80211_tx_info_clear_status(info);
1320 if (MWL8K_TXD_SUCCESS(status))
1321 info->flags |= IEEE80211_TX_STAT_ACK;
1323 ieee80211_tx_status_irqsafe(hw, skb);
1328 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1329 ieee80211_wake_queue(hw, index);
1334 /* must be called only when the card's transmit is completely halted */
1335 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1337 struct mwl8k_priv *priv = hw->priv;
1338 struct mwl8k_tx_queue *txq = priv->txq + index;
1340 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1345 pci_free_consistent(priv->pdev,
1346 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1347 txq->txd, txq->txd_dma);
1352 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1354 struct mwl8k_priv *priv = hw->priv;
1355 struct ieee80211_tx_info *tx_info;
1356 struct mwl8k_vif *mwl8k_vif;
1357 struct ieee80211_hdr *wh;
1358 struct mwl8k_tx_queue *txq;
1359 struct mwl8k_tx_desc *tx;
1365 wh = (struct ieee80211_hdr *)skb->data;
1366 if (ieee80211_is_data_qos(wh->frame_control))
1367 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1371 mwl8k_add_dma_header(skb);
1372 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1374 tx_info = IEEE80211_SKB_CB(skb);
1375 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1377 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1378 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1379 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1380 mwl8k_vif->seqno += 0x10;
1383 /* Setup firmware control bit fields for each frame type. */
1386 if (ieee80211_is_mgmt(wh->frame_control) ||
1387 ieee80211_is_ctl(wh->frame_control)) {
1389 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1390 } else if (ieee80211_is_data(wh->frame_control)) {
1392 if (is_multicast_ether_addr(wh->addr1))
1393 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1395 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1396 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1397 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1399 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1402 dma = pci_map_single(priv->pdev, skb->data,
1403 skb->len, PCI_DMA_TODEVICE);
1405 if (pci_dma_mapping_error(priv->pdev, dma)) {
1406 printk(KERN_DEBUG "%s: failed to dma map skb, "
1407 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1409 return NETDEV_TX_OK;
1412 spin_lock_bh(&priv->tx_lock);
1414 txq = priv->txq + index;
1416 BUG_ON(txq->skb[txq->tail] != NULL);
1417 txq->skb[txq->tail] = skb;
1419 tx = txq->txd + txq->tail;
1420 tx->data_rate = txdatarate;
1421 tx->tx_priority = index;
1422 tx->qos_control = cpu_to_le16(qos);
1423 tx->pkt_phys_addr = cpu_to_le32(dma);
1424 tx->pkt_len = cpu_to_le16(skb->len);
1426 if (!priv->ap_fw && tx_info->control.sta != NULL)
1427 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1431 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1435 priv->pending_tx_pkts++;
1438 if (txq->tail == MWL8K_TX_DESCS)
1441 if (txq->head == txq->tail)
1442 ieee80211_stop_queue(hw, index);
1444 mwl8k_tx_start(priv);
1446 spin_unlock_bh(&priv->tx_lock);
1448 return NETDEV_TX_OK;
1455 * We have the following requirements for issuing firmware commands:
1456 * - Some commands require that the packet transmit path is idle when
1457 * the command is issued. (For simplicity, we'll just quiesce the
1458 * transmit path for every command.)
1459 * - There are certain sequences of commands that need to be issued to
1460 * the hardware sequentially, with no other intervening commands.
1462 * This leads to an implementation of a "firmware lock" as a mutex that
1463 * can be taken recursively, and which is taken by both the low-level
1464 * command submission function (mwl8k_post_cmd) as well as any users of
1465 * that function that require issuing of an atomic sequence of commands,
1466 * and quiesces the transmit path whenever it's taken.
1468 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1470 struct mwl8k_priv *priv = hw->priv;
1472 if (priv->fw_mutex_owner != current) {
1475 mutex_lock(&priv->fw_mutex);
1476 ieee80211_stop_queues(hw);
1478 rc = mwl8k_tx_wait_empty(hw);
1480 ieee80211_wake_queues(hw);
1481 mutex_unlock(&priv->fw_mutex);
1486 priv->fw_mutex_owner = current;
1489 priv->fw_mutex_depth++;
1494 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1496 struct mwl8k_priv *priv = hw->priv;
1498 if (!--priv->fw_mutex_depth) {
1499 ieee80211_wake_queues(hw);
1500 priv->fw_mutex_owner = NULL;
1501 mutex_unlock(&priv->fw_mutex);
1507 * Command processing.
1510 /* Timeout firmware commands after 10s */
1511 #define MWL8K_CMD_TIMEOUT_MS 10000
1513 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1515 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1516 struct mwl8k_priv *priv = hw->priv;
1517 void __iomem *regs = priv->regs;
1518 dma_addr_t dma_addr;
1519 unsigned int dma_size;
1521 unsigned long timeout = 0;
1524 cmd->result = 0xffff;
1525 dma_size = le16_to_cpu(cmd->length);
1526 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1527 PCI_DMA_BIDIRECTIONAL);
1528 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1531 rc = mwl8k_fw_lock(hw);
1533 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1534 PCI_DMA_BIDIRECTIONAL);
1538 priv->hostcmd_wait = &cmd_wait;
1539 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1540 iowrite32(MWL8K_H2A_INT_DOORBELL,
1541 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1542 iowrite32(MWL8K_H2A_INT_DUMMY,
1543 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1545 timeout = wait_for_completion_timeout(&cmd_wait,
1546 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1548 priv->hostcmd_wait = NULL;
1550 mwl8k_fw_unlock(hw);
1552 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1553 PCI_DMA_BIDIRECTIONAL);
1556 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1557 wiphy_name(hw->wiphy),
1558 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1559 MWL8K_CMD_TIMEOUT_MS);
1564 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1566 rc = cmd->result ? -EINVAL : 0;
1568 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1569 wiphy_name(hw->wiphy),
1570 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1571 le16_to_cpu(cmd->result));
1573 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1574 wiphy_name(hw->wiphy),
1575 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1583 * Setup code shared between STA and AP firmware images.
1585 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1587 struct mwl8k_priv *priv = hw->priv;
1589 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1590 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1592 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1593 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1595 priv->band_24.band = IEEE80211_BAND_2GHZ;
1596 priv->band_24.channels = priv->channels_24;
1597 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1598 priv->band_24.bitrates = priv->rates_24;
1599 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1601 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1604 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1606 struct mwl8k_priv *priv = hw->priv;
1608 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1609 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1611 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1612 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1614 priv->band_50.band = IEEE80211_BAND_5GHZ;
1615 priv->band_50.channels = priv->channels_50;
1616 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1617 priv->band_50.bitrates = priv->rates_50;
1618 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1620 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1624 * CMD_GET_HW_SPEC (STA version).
1626 struct mwl8k_cmd_get_hw_spec_sta {
1627 struct mwl8k_cmd_pkt header;
1629 __u8 host_interface;
1631 __u8 perm_addr[ETH_ALEN];
1636 __u8 mcs_bitmap[16];
1637 __le32 rx_queue_ptr;
1638 __le32 num_tx_queues;
1639 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1641 __le32 num_tx_desc_per_queue;
1643 } __attribute__((packed));
1645 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1646 #define MWL8K_CAP_GREENFIELD 0x08000000
1647 #define MWL8K_CAP_AMPDU 0x04000000
1648 #define MWL8K_CAP_RX_STBC 0x01000000
1649 #define MWL8K_CAP_TX_STBC 0x00800000
1650 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1651 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1652 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1653 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1654 #define MWL8K_CAP_DELAY_BA 0x00003000
1655 #define MWL8K_CAP_MIMO 0x00000200
1656 #define MWL8K_CAP_40MHZ 0x00000100
1658 static void mwl8k_set_ht_caps(struct ieee80211_hw *hw, u32 cap)
1660 struct mwl8k_priv *priv = hw->priv;
1661 struct ieee80211_supported_band *band = &priv->band_24;
1665 band->ht_cap.ht_supported = 1;
1667 if (cap & MWL8K_CAP_MAX_AMSDU)
1668 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1669 if (cap & MWL8K_CAP_GREENFIELD)
1670 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1671 if (cap & MWL8K_CAP_AMPDU) {
1672 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1673 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1674 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1676 if (cap & MWL8K_CAP_RX_STBC)
1677 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1678 if (cap & MWL8K_CAP_TX_STBC)
1679 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1680 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1681 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1682 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1683 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1684 if (cap & MWL8K_CAP_DELAY_BA)
1685 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1686 if (cap & MWL8K_CAP_40MHZ)
1687 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1689 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1690 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1692 band->ht_cap.mcs.rx_mask[0] = 0xff;
1693 if (rx_streams >= 2)
1694 band->ht_cap.mcs.rx_mask[1] = 0xff;
1695 if (rx_streams >= 3)
1696 band->ht_cap.mcs.rx_mask[2] = 0xff;
1697 band->ht_cap.mcs.rx_mask[4] = 0x01;
1698 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1700 if (rx_streams != tx_streams) {
1701 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1702 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1703 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1707 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1709 struct mwl8k_priv *priv = hw->priv;
1710 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1714 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1718 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1719 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1721 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1722 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1723 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1724 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1725 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1726 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1727 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1728 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1730 rc = mwl8k_post_cmd(hw, &cmd->header);
1733 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1734 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1735 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1736 priv->hw_rev = cmd->hw_rev;
1737 mwl8k_setup_2ghz_band(hw);
1738 if (cmd->caps & cpu_to_le32(MWL8K_CAP_MIMO))
1739 mwl8k_set_ht_caps(hw, le32_to_cpu(cmd->caps));
1747 * CMD_GET_HW_SPEC (AP version).
1749 struct mwl8k_cmd_get_hw_spec_ap {
1750 struct mwl8k_cmd_pkt header;
1752 __u8 host_interface;
1755 __u8 perm_addr[ETH_ALEN];
1766 } __attribute__((packed));
1768 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1770 struct mwl8k_priv *priv = hw->priv;
1771 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1774 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1778 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1779 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1781 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1782 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1784 rc = mwl8k_post_cmd(hw, &cmd->header);
1789 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1790 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1791 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1792 priv->hw_rev = cmd->hw_rev;
1793 mwl8k_setup_2ghz_band(hw);
1795 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1796 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1798 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1799 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1801 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1802 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1804 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1805 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1807 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1808 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1810 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1811 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1821 struct mwl8k_cmd_set_hw_spec {
1822 struct mwl8k_cmd_pkt header;
1824 __u8 host_interface;
1826 __u8 perm_addr[ETH_ALEN];
1831 __le32 rx_queue_ptr;
1832 __le32 num_tx_queues;
1833 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1835 __le32 num_tx_desc_per_queue;
1837 } __attribute__((packed));
1839 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1840 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1841 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1843 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1845 struct mwl8k_priv *priv = hw->priv;
1846 struct mwl8k_cmd_set_hw_spec *cmd;
1850 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1854 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1855 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1857 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1858 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1859 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1860 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1861 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1862 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1863 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1864 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1865 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1866 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1868 rc = mwl8k_post_cmd(hw, &cmd->header);
1875 * CMD_MAC_MULTICAST_ADR.
1877 struct mwl8k_cmd_mac_multicast_adr {
1878 struct mwl8k_cmd_pkt header;
1881 __u8 addr[0][ETH_ALEN];
1884 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1885 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1886 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1887 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1889 static struct mwl8k_cmd_pkt *
1890 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1891 int mc_count, struct dev_addr_list *mclist)
1893 struct mwl8k_priv *priv = hw->priv;
1894 struct mwl8k_cmd_mac_multicast_adr *cmd;
1897 if (allmulti || mc_count > priv->num_mcaddrs) {
1902 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1904 cmd = kzalloc(size, GFP_ATOMIC);
1908 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1909 cmd->header.length = cpu_to_le16(size);
1910 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1911 MWL8K_ENABLE_RX_BROADCAST);
1914 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1915 } else if (mc_count) {
1918 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1919 cmd->numaddr = cpu_to_le16(mc_count);
1920 for (i = 0; i < mc_count && mclist; i++) {
1921 if (mclist->da_addrlen != ETH_ALEN) {
1925 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1926 mclist = mclist->next;
1930 return &cmd->header;
1936 struct mwl8k_cmd_get_stat {
1937 struct mwl8k_cmd_pkt header;
1939 } __attribute__((packed));
1941 #define MWL8K_STAT_ACK_FAILURE 9
1942 #define MWL8K_STAT_RTS_FAILURE 12
1943 #define MWL8K_STAT_FCS_ERROR 24
1944 #define MWL8K_STAT_RTS_SUCCESS 11
1946 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1947 struct ieee80211_low_level_stats *stats)
1949 struct mwl8k_cmd_get_stat *cmd;
1952 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1956 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1957 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1959 rc = mwl8k_post_cmd(hw, &cmd->header);
1961 stats->dot11ACKFailureCount =
1962 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1963 stats->dot11RTSFailureCount =
1964 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1965 stats->dot11FCSErrorCount =
1966 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1967 stats->dot11RTSSuccessCount =
1968 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1976 * CMD_RADIO_CONTROL.
1978 struct mwl8k_cmd_radio_control {
1979 struct mwl8k_cmd_pkt header;
1983 } __attribute__((packed));
1986 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1988 struct mwl8k_priv *priv = hw->priv;
1989 struct mwl8k_cmd_radio_control *cmd;
1992 if (enable == priv->radio_on && !force)
1995 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1999 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2000 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2001 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2002 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2003 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2005 rc = mwl8k_post_cmd(hw, &cmd->header);
2009 priv->radio_on = enable;
2014 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2016 return mwl8k_cmd_radio_control(hw, 0, 0);
2019 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2021 return mwl8k_cmd_radio_control(hw, 1, 0);
2025 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2027 struct mwl8k_priv *priv = hw->priv;
2029 priv->radio_short_preamble = short_preamble;
2031 return mwl8k_cmd_radio_control(hw, 1, 1);
2037 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
2039 struct mwl8k_cmd_rf_tx_power {
2040 struct mwl8k_cmd_pkt header;
2042 __le16 support_level;
2043 __le16 current_level;
2045 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2046 } __attribute__((packed));
2048 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2050 struct mwl8k_cmd_rf_tx_power *cmd;
2053 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2057 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2058 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2059 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2060 cmd->support_level = cpu_to_le16(dBm);
2062 rc = mwl8k_post_cmd(hw, &cmd->header);
2071 struct mwl8k_cmd_rf_antenna {
2072 struct mwl8k_cmd_pkt header;
2075 } __attribute__((packed));
2077 #define MWL8K_RF_ANTENNA_RX 1
2078 #define MWL8K_RF_ANTENNA_TX 2
2081 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2083 struct mwl8k_cmd_rf_antenna *cmd;
2086 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2090 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2091 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2092 cmd->antenna = cpu_to_le16(antenna);
2093 cmd->mode = cpu_to_le16(mask);
2095 rc = mwl8k_post_cmd(hw, &cmd->header);
2104 struct mwl8k_cmd_set_beacon {
2105 struct mwl8k_cmd_pkt header;
2110 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, u8 *beacon, int len)
2112 struct mwl8k_cmd_set_beacon *cmd;
2115 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2119 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2120 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2121 cmd->beacon_len = cpu_to_le16(len);
2122 memcpy(cmd->beacon, beacon, len);
2124 rc = mwl8k_post_cmd(hw, &cmd->header);
2133 struct mwl8k_cmd_set_pre_scan {
2134 struct mwl8k_cmd_pkt header;
2135 } __attribute__((packed));
2137 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2139 struct mwl8k_cmd_set_pre_scan *cmd;
2142 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2146 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2147 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2149 rc = mwl8k_post_cmd(hw, &cmd->header);
2156 * CMD_SET_POST_SCAN.
2158 struct mwl8k_cmd_set_post_scan {
2159 struct mwl8k_cmd_pkt header;
2161 __u8 bssid[ETH_ALEN];
2162 } __attribute__((packed));
2165 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2167 struct mwl8k_cmd_set_post_scan *cmd;
2170 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2174 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2175 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2177 memcpy(cmd->bssid, mac, ETH_ALEN);
2179 rc = mwl8k_post_cmd(hw, &cmd->header);
2186 * CMD_SET_RF_CHANNEL.
2188 struct mwl8k_cmd_set_rf_channel {
2189 struct mwl8k_cmd_pkt header;
2191 __u8 current_channel;
2192 __le32 channel_flags;
2193 } __attribute__((packed));
2195 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2196 struct ieee80211_conf *conf)
2198 struct ieee80211_channel *channel = conf->channel;
2199 struct mwl8k_cmd_set_rf_channel *cmd;
2202 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2206 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2207 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2208 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2209 cmd->current_channel = channel->hw_value;
2211 if (channel->band == IEEE80211_BAND_2GHZ)
2212 cmd->channel_flags |= cpu_to_le32(0x00000001);
2214 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2215 conf->channel_type == NL80211_CHAN_HT20)
2216 cmd->channel_flags |= cpu_to_le32(0x00000080);
2217 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2218 cmd->channel_flags |= cpu_to_le32(0x000001900);
2219 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2220 cmd->channel_flags |= cpu_to_le32(0x000000900);
2222 rc = mwl8k_post_cmd(hw, &cmd->header);
2231 #define MWL8K_FRAME_PROT_DISABLED 0x00
2232 #define MWL8K_FRAME_PROT_11G 0x07
2233 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2234 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2236 struct mwl8k_cmd_update_set_aid {
2237 struct mwl8k_cmd_pkt header;
2240 /* AP's MAC address (BSSID) */
2241 __u8 bssid[ETH_ALEN];
2242 __le16 protection_mode;
2243 __u8 supp_rates[14];
2244 } __attribute__((packed));
2246 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2252 * Clear nonstandard rates 4 and 13.
2256 for (i = 0, j = 0; i < 14; i++) {
2257 if (mask & (1 << i))
2258 rates[j++] = mwl8k_rates_24[i].hw_value;
2263 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2264 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2266 struct mwl8k_cmd_update_set_aid *cmd;
2270 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2274 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2275 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2276 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2277 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2279 if (vif->bss_conf.use_cts_prot) {
2280 prot_mode = MWL8K_FRAME_PROT_11G;
2282 switch (vif->bss_conf.ht_operation_mode &
2283 IEEE80211_HT_OP_MODE_PROTECTION) {
2284 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2285 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2287 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2288 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2291 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2295 cmd->protection_mode = cpu_to_le16(prot_mode);
2297 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2299 rc = mwl8k_post_cmd(hw, &cmd->header);
2308 struct mwl8k_cmd_set_rate {
2309 struct mwl8k_cmd_pkt header;
2310 __u8 legacy_rates[14];
2312 /* Bitmap for supported MCS codes. */
2315 } __attribute__((packed));
2318 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2319 u32 legacy_rate_mask, u8 *mcs_rates)
2321 struct mwl8k_cmd_set_rate *cmd;
2324 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2328 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2329 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2330 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2331 memcpy(cmd->mcs_set, mcs_rates, 16);
2333 rc = mwl8k_post_cmd(hw, &cmd->header);
2340 * CMD_FINALIZE_JOIN.
2342 #define MWL8K_FJ_BEACON_MAXLEN 128
2344 struct mwl8k_cmd_finalize_join {
2345 struct mwl8k_cmd_pkt header;
2346 __le32 sleep_interval; /* Number of beacon periods to sleep */
2347 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2348 } __attribute__((packed));
2350 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2351 int framelen, int dtim)
2353 struct mwl8k_cmd_finalize_join *cmd;
2354 struct ieee80211_mgmt *payload = frame;
2358 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2362 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2363 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2364 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2366 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2367 if (payload_len < 0)
2369 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2370 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2372 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2374 rc = mwl8k_post_cmd(hw, &cmd->header);
2381 * CMD_SET_RTS_THRESHOLD.
2383 struct mwl8k_cmd_set_rts_threshold {
2384 struct mwl8k_cmd_pkt header;
2387 } __attribute__((packed));
2390 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2392 struct mwl8k_cmd_set_rts_threshold *cmd;
2395 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2399 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2400 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2401 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2402 cmd->threshold = cpu_to_le16(rts_thresh);
2404 rc = mwl8k_post_cmd(hw, &cmd->header);
2413 struct mwl8k_cmd_set_slot {
2414 struct mwl8k_cmd_pkt header;
2417 } __attribute__((packed));
2419 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2421 struct mwl8k_cmd_set_slot *cmd;
2424 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2428 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2429 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2430 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2431 cmd->short_slot = short_slot_time;
2433 rc = mwl8k_post_cmd(hw, &cmd->header);
2440 * CMD_SET_EDCA_PARAMS.
2442 struct mwl8k_cmd_set_edca_params {
2443 struct mwl8k_cmd_pkt header;
2445 /* See MWL8K_SET_EDCA_XXX below */
2448 /* TX opportunity in units of 32 us */
2453 /* Log exponent of max contention period: 0...15 */
2456 /* Log exponent of min contention period: 0...15 */
2459 /* Adaptive interframe spacing in units of 32us */
2462 /* TX queue to configure */
2466 /* Log exponent of max contention period: 0...15 */
2469 /* Log exponent of min contention period: 0...15 */
2472 /* Adaptive interframe spacing in units of 32us */
2475 /* TX queue to configure */
2479 } __attribute__((packed));
2481 #define MWL8K_SET_EDCA_CW 0x01
2482 #define MWL8K_SET_EDCA_TXOP 0x02
2483 #define MWL8K_SET_EDCA_AIFS 0x04
2485 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2486 MWL8K_SET_EDCA_TXOP | \
2487 MWL8K_SET_EDCA_AIFS)
2490 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2491 __u16 cw_min, __u16 cw_max,
2492 __u8 aifs, __u16 txop)
2494 struct mwl8k_priv *priv = hw->priv;
2495 struct mwl8k_cmd_set_edca_params *cmd;
2498 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2502 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2503 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2504 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2505 cmd->txop = cpu_to_le16(txop);
2507 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2508 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2509 cmd->ap.aifs = aifs;
2512 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2513 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2514 cmd->sta.aifs = aifs;
2515 cmd->sta.txq = qnum;
2518 rc = mwl8k_post_cmd(hw, &cmd->header);
2527 struct mwl8k_cmd_set_wmm_mode {
2528 struct mwl8k_cmd_pkt header;
2530 } __attribute__((packed));
2532 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2534 struct mwl8k_priv *priv = hw->priv;
2535 struct mwl8k_cmd_set_wmm_mode *cmd;
2538 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2542 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2543 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2544 cmd->action = cpu_to_le16(!!enable);
2546 rc = mwl8k_post_cmd(hw, &cmd->header);
2550 priv->wmm_enabled = enable;
2558 struct mwl8k_cmd_mimo_config {
2559 struct mwl8k_cmd_pkt header;
2561 __u8 rx_antenna_map;
2562 __u8 tx_antenna_map;
2563 } __attribute__((packed));
2565 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2567 struct mwl8k_cmd_mimo_config *cmd;
2570 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2574 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2575 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2576 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2577 cmd->rx_antenna_map = rx;
2578 cmd->tx_antenna_map = tx;
2580 rc = mwl8k_post_cmd(hw, &cmd->header);
2587 * CMD_USE_FIXED_RATE (STA version).
2589 struct mwl8k_cmd_use_fixed_rate_sta {
2590 struct mwl8k_cmd_pkt header;
2592 __le32 allow_rate_drop;
2596 __le32 enable_retry;
2603 } __attribute__((packed));
2605 #define MWL8K_USE_AUTO_RATE 0x0002
2606 #define MWL8K_UCAST_RATE 0
2608 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2610 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2613 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2617 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2618 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2619 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2620 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2622 rc = mwl8k_post_cmd(hw, &cmd->header);
2629 * CMD_USE_FIXED_RATE (AP version).
2631 struct mwl8k_cmd_use_fixed_rate_ap {
2632 struct mwl8k_cmd_pkt header;
2634 __le32 allow_rate_drop;
2636 struct mwl8k_rate_entry_ap {
2638 __le32 enable_retry;
2643 u8 multicast_rate_type;
2645 } __attribute__((packed));
2648 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2650 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2653 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2657 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2658 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2659 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2660 cmd->multicast_rate = mcast;
2661 cmd->management_rate = mgmt;
2663 rc = mwl8k_post_cmd(hw, &cmd->header);
2670 * CMD_ENABLE_SNIFFER.
2672 struct mwl8k_cmd_enable_sniffer {
2673 struct mwl8k_cmd_pkt header;
2675 } __attribute__((packed));
2677 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2679 struct mwl8k_cmd_enable_sniffer *cmd;
2682 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2686 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2687 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2688 cmd->action = cpu_to_le32(!!enable);
2690 rc = mwl8k_post_cmd(hw, &cmd->header);
2699 struct mwl8k_cmd_set_mac_addr {
2700 struct mwl8k_cmd_pkt header;
2704 __u8 mac_addr[ETH_ALEN];
2706 __u8 mac_addr[ETH_ALEN];
2708 } __attribute__((packed));
2710 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2711 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2713 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2715 struct mwl8k_priv *priv = hw->priv;
2716 struct mwl8k_cmd_set_mac_addr *cmd;
2719 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2723 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2724 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2726 cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
2727 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2729 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2732 rc = mwl8k_post_cmd(hw, &cmd->header);
2739 * CMD_SET_RATEADAPT_MODE.
2741 struct mwl8k_cmd_set_rate_adapt_mode {
2742 struct mwl8k_cmd_pkt header;
2745 } __attribute__((packed));
2747 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2749 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2752 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2756 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2757 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2758 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2759 cmd->mode = cpu_to_le16(mode);
2761 rc = mwl8k_post_cmd(hw, &cmd->header);
2770 struct mwl8k_cmd_bss_start {
2771 struct mwl8k_cmd_pkt header;
2773 } __attribute__((packed));
2775 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, int enable)
2777 struct mwl8k_cmd_bss_start *cmd;
2780 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2784 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2785 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2786 cmd->enable = cpu_to_le32(enable);
2788 rc = mwl8k_post_cmd(hw, &cmd->header);
2797 struct mwl8k_cmd_set_new_stn {
2798 struct mwl8k_cmd_pkt header;
2804 __le32 legacy_rates;
2807 __le16 ht_capabilities_info;
2808 __u8 mac_ht_param_info;
2810 __u8 control_channel;
2817 } __attribute__((packed));
2819 #define MWL8K_STA_ACTION_ADD 0
2820 #define MWL8K_STA_ACTION_REMOVE 2
2822 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2823 struct ieee80211_vif *vif,
2824 struct ieee80211_sta *sta)
2826 struct mwl8k_cmd_set_new_stn *cmd;
2829 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2833 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2834 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2835 cmd->aid = cpu_to_le16(sta->aid);
2836 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2837 cmd->stn_id = cpu_to_le16(sta->aid);
2838 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2839 cmd->legacy_rates = cpu_to_le32(sta->supp_rates[IEEE80211_BAND_2GHZ]);
2840 if (sta->ht_cap.ht_supported) {
2841 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2842 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2843 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2844 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2845 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2846 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2847 ((sta->ht_cap.ampdu_density & 7) << 2);
2848 cmd->is_qos_sta = 1;
2851 rc = mwl8k_post_cmd(hw, &cmd->header);
2857 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2858 struct ieee80211_vif *vif)
2860 struct mwl8k_cmd_set_new_stn *cmd;
2863 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2867 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2868 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2869 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2871 rc = mwl8k_post_cmd(hw, &cmd->header);
2877 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2878 struct ieee80211_vif *vif, u8 *addr)
2880 struct mwl8k_cmd_set_new_stn *cmd;
2883 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2887 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2888 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2889 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2890 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2892 rc = mwl8k_post_cmd(hw, &cmd->header);
2901 struct ewc_ht_info {
2905 } __attribute__((packed));
2907 struct peer_capability_info {
2908 /* Peer type - AP vs. STA. */
2911 /* Basic 802.11 capabilities from assoc resp. */
2914 /* Set if peer supports 802.11n high throughput (HT). */
2917 /* Valid if HT is supported. */
2919 __u8 extended_ht_caps;
2920 struct ewc_ht_info ewc_info;
2922 /* Legacy rate table. Intersection of our rates and peer rates. */
2923 __u8 legacy_rates[12];
2925 /* HT rate table. Intersection of our rates and peer rates. */
2929 /* If set, interoperability mode, no proprietary extensions. */
2933 __le16 amsdu_enabled;
2934 } __attribute__((packed));
2936 struct mwl8k_cmd_update_stadb {
2937 struct mwl8k_cmd_pkt header;
2939 /* See STADB_ACTION_TYPE */
2942 /* Peer MAC address */
2943 __u8 peer_addr[ETH_ALEN];
2947 /* Peer info - valid during add/update. */
2948 struct peer_capability_info peer_info;
2949 } __attribute__((packed));
2951 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2952 #define MWL8K_STA_DB_DEL_ENTRY 2
2954 /* Peer Entry flags - used to define the type of the peer node */
2955 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2957 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
2958 struct ieee80211_vif *vif,
2959 struct ieee80211_sta *sta)
2961 struct mwl8k_cmd_update_stadb *cmd;
2962 struct peer_capability_info *p;
2965 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2969 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2970 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2971 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
2972 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
2974 p = &cmd->peer_info;
2975 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2976 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
2977 p->ht_support = sta->ht_cap.ht_supported;
2978 p->ht_caps = sta->ht_cap.cap;
2979 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
2980 ((sta->ht_cap.ampdu_density & 7) << 2);
2981 legacy_rate_mask_to_array(p->legacy_rates,
2982 sta->supp_rates[IEEE80211_BAND_2GHZ]);
2983 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
2985 p->amsdu_enabled = 0;
2987 rc = mwl8k_post_cmd(hw, &cmd->header);
2990 return rc ? rc : p->station_id;
2993 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2994 struct ieee80211_vif *vif, u8 *addr)
2996 struct mwl8k_cmd_update_stadb *cmd;
2999 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3003 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3004 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3005 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3006 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3008 rc = mwl8k_post_cmd(hw, &cmd->header);
3016 * Interrupt handling.
3018 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3020 struct ieee80211_hw *hw = dev_id;
3021 struct mwl8k_priv *priv = hw->priv;
3024 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3028 if (status & MWL8K_A2H_INT_TX_DONE) {
3029 status &= ~MWL8K_A2H_INT_TX_DONE;
3030 tasklet_schedule(&priv->poll_tx_task);
3033 if (status & MWL8K_A2H_INT_RX_READY) {
3034 status &= ~MWL8K_A2H_INT_RX_READY;
3035 tasklet_schedule(&priv->poll_rx_task);
3039 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3041 if (status & MWL8K_A2H_INT_OPC_DONE) {
3042 if (priv->hostcmd_wait != NULL)
3043 complete(priv->hostcmd_wait);
3046 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3047 if (!mutex_is_locked(&priv->fw_mutex) &&
3048 priv->radio_on && priv->pending_tx_pkts)
3049 mwl8k_tx_start(priv);
3055 static void mwl8k_tx_poll(unsigned long data)
3057 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3058 struct mwl8k_priv *priv = hw->priv;
3064 spin_lock_bh(&priv->tx_lock);
3066 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3067 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3069 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3070 complete(priv->tx_wait);
3071 priv->tx_wait = NULL;
3074 spin_unlock_bh(&priv->tx_lock);
3077 writel(~MWL8K_A2H_INT_TX_DONE,
3078 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3080 tasklet_schedule(&priv->poll_tx_task);
3084 static void mwl8k_rx_poll(unsigned long data)
3086 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3087 struct mwl8k_priv *priv = hw->priv;
3091 limit -= rxq_process(hw, 0, limit);
3092 limit -= rxq_refill(hw, 0, limit);
3095 writel(~MWL8K_A2H_INT_RX_READY,
3096 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3098 tasklet_schedule(&priv->poll_rx_task);
3104 * Core driver operations.
3106 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3108 struct mwl8k_priv *priv = hw->priv;
3109 int index = skb_get_queue_mapping(skb);
3112 if (!priv->radio_on) {
3113 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3114 "disabled\n", wiphy_name(hw->wiphy));
3116 return NETDEV_TX_OK;
3119 rc = mwl8k_txq_xmit(hw, index, skb);
3124 static int mwl8k_start(struct ieee80211_hw *hw)
3126 struct mwl8k_priv *priv = hw->priv;
3129 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3130 IRQF_SHARED, MWL8K_NAME, hw);
3132 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3133 wiphy_name(hw->wiphy));
3137 /* Enable TX reclaim and RX tasklets. */
3138 tasklet_enable(&priv->poll_tx_task);
3139 tasklet_enable(&priv->poll_rx_task);
3141 /* Enable interrupts */
3142 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3144 rc = mwl8k_fw_lock(hw);
3146 rc = mwl8k_cmd_radio_enable(hw);
3150 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3153 rc = mwl8k_cmd_set_pre_scan(hw);
3156 rc = mwl8k_cmd_set_post_scan(hw,
3157 "\x00\x00\x00\x00\x00\x00");
3161 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3164 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3166 mwl8k_fw_unlock(hw);
3170 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3171 free_irq(priv->pdev->irq, hw);
3172 tasklet_disable(&priv->poll_tx_task);
3173 tasklet_disable(&priv->poll_rx_task);
3179 static void mwl8k_stop(struct ieee80211_hw *hw)
3181 struct mwl8k_priv *priv = hw->priv;
3184 mwl8k_cmd_radio_disable(hw);
3186 ieee80211_stop_queues(hw);
3188 /* Disable interrupts */
3189 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3190 free_irq(priv->pdev->irq, hw);
3192 /* Stop finalize join worker */
3193 cancel_work_sync(&priv->finalize_join_worker);
3194 if (priv->beacon_skb != NULL)
3195 dev_kfree_skb(priv->beacon_skb);
3197 /* Stop TX reclaim and RX tasklets. */
3198 tasklet_disable(&priv->poll_tx_task);
3199 tasklet_disable(&priv->poll_rx_task);
3201 /* Return all skbs to mac80211 */
3202 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3203 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3206 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3207 struct ieee80211_vif *vif)
3209 struct mwl8k_priv *priv = hw->priv;
3210 struct mwl8k_vif *mwl8k_vif;
3213 * We only support one active interface at a time.
3215 if (priv->vif != NULL)
3219 * Reject interface creation if sniffer mode is active, as
3220 * STA operation is mutually exclusive with hardware sniffer
3221 * mode. (Sniffer mode is only used on STA firmware.)
3223 if (priv->sniffer_enabled) {
3224 printk(KERN_INFO "%s: unable to create STA "
3225 "interface due to sniffer mode being enabled\n",
3226 wiphy_name(hw->wiphy));
3230 /* Set the mac address. */
3231 mwl8k_cmd_set_mac_addr(hw, vif->addr);
3234 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3236 /* Clean out driver private area */
3237 mwl8k_vif = MWL8K_VIF(vif);
3238 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3240 /* Set Initial sequence number to zero */
3241 mwl8k_vif->seqno = 0;
3248 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3249 struct ieee80211_vif *vif)
3251 struct mwl8k_priv *priv = hw->priv;
3254 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3256 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3261 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3263 struct ieee80211_conf *conf = &hw->conf;
3264 struct mwl8k_priv *priv = hw->priv;
3267 if (conf->flags & IEEE80211_CONF_IDLE) {
3268 mwl8k_cmd_radio_disable(hw);
3272 rc = mwl8k_fw_lock(hw);
3276 rc = mwl8k_cmd_radio_enable(hw);
3280 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3284 if (conf->power_level > 18)
3285 conf->power_level = 18;
3286 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3291 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3293 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3295 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3299 mwl8k_fw_unlock(hw);
3305 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3306 struct ieee80211_bss_conf *info, u32 changed)
3308 struct mwl8k_priv *priv = hw->priv;
3309 u32 ap_legacy_rates;
3310 u8 ap_mcs_rates[16];
3313 if (mwl8k_fw_lock(hw))
3317 * No need to capture a beacon if we're no longer associated.
3319 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3320 priv->capture_beacon = false;
3323 * Get the AP's legacy and MCS rates.
3325 if (vif->bss_conf.assoc) {
3326 struct ieee80211_sta *ap;
3330 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3336 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3337 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3342 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3343 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3347 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3352 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3353 rc = mwl8k_set_radio_preamble(hw,
3354 vif->bss_conf.use_short_preamble);
3359 if (changed & BSS_CHANGED_ERP_SLOT) {
3360 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3365 if (vif->bss_conf.assoc &&
3366 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3368 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3373 if (vif->bss_conf.assoc &&
3374 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3376 * Finalize the join. Tell rx handler to process
3377 * next beacon from our BSSID.
3379 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3380 priv->capture_beacon = true;
3384 mwl8k_fw_unlock(hw);
3388 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3389 struct ieee80211_bss_conf *info, u32 changed)
3393 if (mwl8k_fw_lock(hw))
3396 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3397 rc = mwl8k_set_radio_preamble(hw,
3398 vif->bss_conf.use_short_preamble);
3403 if (changed & BSS_CHANGED_BASIC_RATES) {
3408 * Use lowest supported basic rate for multicasts
3409 * and management frames (such as probe responses --
3410 * beacons will always go out at 1 Mb/s).
3412 idx = ffs(vif->bss_conf.basic_rates);
3413 rate = idx ? mwl8k_rates_24[idx - 1].hw_value : 2;
3415 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3418 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3419 struct sk_buff *skb;
3421 skb = ieee80211_beacon_get(hw, vif);
3423 mwl8k_cmd_set_beacon(hw, skb->data, skb->len);
3428 if (changed & BSS_CHANGED_BEACON_ENABLED)
3429 mwl8k_cmd_bss_start(hw, info->enable_beacon);
3432 mwl8k_fw_unlock(hw);
3436 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3437 struct ieee80211_bss_conf *info, u32 changed)
3439 struct mwl8k_priv *priv = hw->priv;
3442 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3444 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3447 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3448 int mc_count, struct dev_addr_list *mclist)
3450 struct mwl8k_cmd_pkt *cmd;
3453 * Synthesize and return a command packet that programs the
3454 * hardware multicast address filter. At this point we don't
3455 * know whether FIF_ALLMULTI is being requested, but if it is,
3456 * we'll end up throwing this packet away and creating a new
3457 * one in mwl8k_configure_filter().
3459 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3461 return (unsigned long)cmd;
3465 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3466 unsigned int changed_flags,
3467 unsigned int *total_flags)
3469 struct mwl8k_priv *priv = hw->priv;
3472 * Hardware sniffer mode is mutually exclusive with STA
3473 * operation, so refuse to enable sniffer mode if a STA
3474 * interface is active.
3476 if (priv->vif != NULL) {
3477 if (net_ratelimit())
3478 printk(KERN_INFO "%s: not enabling sniffer "
3479 "mode because STA interface is active\n",
3480 wiphy_name(hw->wiphy));
3484 if (!priv->sniffer_enabled) {
3485 if (mwl8k_cmd_enable_sniffer(hw, 1))
3487 priv->sniffer_enabled = true;
3490 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3491 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3497 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3498 unsigned int changed_flags,
3499 unsigned int *total_flags,
3502 struct mwl8k_priv *priv = hw->priv;
3503 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3506 * AP firmware doesn't allow fine-grained control over
3507 * the receive filter.
3510 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3516 * Enable hardware sniffer mode if FIF_CONTROL or
3517 * FIF_OTHER_BSS is requested.
3519 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3520 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3525 /* Clear unsupported feature flags */
3526 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3528 if (mwl8k_fw_lock(hw)) {
3533 if (priv->sniffer_enabled) {
3534 mwl8k_cmd_enable_sniffer(hw, 0);
3535 priv->sniffer_enabled = false;
3538 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3539 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3541 * Disable the BSS filter.
3543 mwl8k_cmd_set_pre_scan(hw);
3548 * Enable the BSS filter.
3550 * If there is an active STA interface, use that
3551 * interface's BSSID, otherwise use a dummy one
3552 * (where the OUI part needs to be nonzero for
3553 * the BSSID to be accepted by POST_SCAN).
3555 bssid = "\x01\x00\x00\x00\x00\x00";
3556 if (priv->vif != NULL)
3557 bssid = priv->vif->bss_conf.bssid;
3559 mwl8k_cmd_set_post_scan(hw, bssid);
3564 * If FIF_ALLMULTI is being requested, throw away the command
3565 * packet that ->prepare_multicast() built and replace it with
3566 * a command packet that enables reception of all multicast
3569 if (*total_flags & FIF_ALLMULTI) {
3571 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3575 mwl8k_post_cmd(hw, cmd);
3579 mwl8k_fw_unlock(hw);
3582 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3584 return mwl8k_cmd_set_rts_threshold(hw, value);
3587 struct mwl8k_sta_notify_item
3589 struct list_head list;
3590 struct ieee80211_vif *vif;
3591 enum sta_notify_cmd cmd;
3592 struct ieee80211_sta sta;
3596 mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
3598 struct mwl8k_priv *priv = hw->priv;
3601 * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
3603 if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3606 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3608 struct ieee80211_sta *sta;
3611 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3613 MWL8K_STA(sta)->peer_id = rc;
3616 } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3617 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3618 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3619 mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
3620 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3621 mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
3625 static void mwl8k_sta_notify_worker(struct work_struct *work)
3627 struct mwl8k_priv *priv =
3628 container_of(work, struct mwl8k_priv, sta_notify_worker);
3629 struct ieee80211_hw *hw = priv->hw;
3631 spin_lock_bh(&priv->sta_notify_list_lock);
3632 while (!list_empty(&priv->sta_notify_list)) {
3633 struct mwl8k_sta_notify_item *s;
3635 s = list_entry(priv->sta_notify_list.next,
3636 struct mwl8k_sta_notify_item, list);
3639 spin_unlock_bh(&priv->sta_notify_list_lock);
3641 mwl8k_do_sta_notify(hw, s);
3644 spin_lock_bh(&priv->sta_notify_list_lock);
3646 spin_unlock_bh(&priv->sta_notify_list_lock);
3650 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3651 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3653 struct mwl8k_priv *priv = hw->priv;
3654 struct mwl8k_sta_notify_item *s;
3656 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3659 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3665 spin_lock(&priv->sta_notify_list_lock);
3666 list_add_tail(&s->list, &priv->sta_notify_list);
3667 spin_unlock(&priv->sta_notify_list_lock);
3669 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3673 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3674 const struct ieee80211_tx_queue_params *params)
3676 struct mwl8k_priv *priv = hw->priv;
3679 rc = mwl8k_fw_lock(hw);
3681 if (!priv->wmm_enabled)
3682 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3685 rc = mwl8k_cmd_set_edca_params(hw, queue,
3691 mwl8k_fw_unlock(hw);
3697 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3698 struct ieee80211_tx_queue_stats *stats)
3700 struct mwl8k_priv *priv = hw->priv;
3701 struct mwl8k_tx_queue *txq;
3704 spin_lock_bh(&priv->tx_lock);
3705 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3706 txq = priv->txq + index;
3707 memcpy(&stats[index], &txq->stats,
3708 sizeof(struct ieee80211_tx_queue_stats));
3710 spin_unlock_bh(&priv->tx_lock);
3715 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3716 struct ieee80211_low_level_stats *stats)
3718 return mwl8k_cmd_get_stat(hw, stats);
3722 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3723 enum ieee80211_ampdu_mlme_action action,
3724 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3727 case IEEE80211_AMPDU_RX_START:
3728 case IEEE80211_AMPDU_RX_STOP:
3729 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3737 static const struct ieee80211_ops mwl8k_ops = {
3739 .start = mwl8k_start,
3741 .add_interface = mwl8k_add_interface,
3742 .remove_interface = mwl8k_remove_interface,
3743 .config = mwl8k_config,
3744 .bss_info_changed = mwl8k_bss_info_changed,
3745 .prepare_multicast = mwl8k_prepare_multicast,
3746 .configure_filter = mwl8k_configure_filter,
3747 .set_rts_threshold = mwl8k_set_rts_threshold,
3748 .sta_notify = mwl8k_sta_notify,
3749 .conf_tx = mwl8k_conf_tx,
3750 .get_tx_stats = mwl8k_get_tx_stats,
3751 .get_stats = mwl8k_get_stats,
3752 .ampdu_action = mwl8k_ampdu_action,
3755 static void mwl8k_finalize_join_worker(struct work_struct *work)
3757 struct mwl8k_priv *priv =
3758 container_of(work, struct mwl8k_priv, finalize_join_worker);
3759 struct sk_buff *skb = priv->beacon_skb;
3761 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3762 priv->vif->bss_conf.dtim_period);
3765 priv->beacon_skb = NULL;
3774 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3776 .part_name = "88w8363",
3777 .helper_image = "mwl8k/helper_8363.fw",
3778 .fw_image = "mwl8k/fmimage_8363.fw",
3781 .part_name = "88w8687",
3782 .helper_image = "mwl8k/helper_8687.fw",
3783 .fw_image = "mwl8k/fmimage_8687.fw",
3786 .part_name = "88w8366",
3787 .helper_image = "mwl8k/helper_8366.fw",
3788 .fw_image = "mwl8k/fmimage_8366.fw",
3789 .ap_rxd_ops = &rxd_8366_ap_ops,
3793 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3794 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3795 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3796 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3797 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3798 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3800 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3801 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3802 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3803 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3804 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3805 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3806 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3809 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3811 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3812 const struct pci_device_id *id)
3814 static int printed_version = 0;
3815 struct ieee80211_hw *hw;
3816 struct mwl8k_priv *priv;
3820 if (!printed_version) {
3821 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3822 printed_version = 1;
3826 rc = pci_enable_device(pdev);
3828 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3833 rc = pci_request_regions(pdev, MWL8K_NAME);
3835 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3837 goto err_disable_device;
3840 pci_set_master(pdev);
3843 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3845 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3850 SET_IEEE80211_DEV(hw, &pdev->dev);
3851 pci_set_drvdata(pdev, hw);
3856 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3859 priv->sram = pci_iomap(pdev, 0, 0x10000);
3860 if (priv->sram == NULL) {
3861 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3862 wiphy_name(hw->wiphy));
3867 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3868 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3870 priv->regs = pci_iomap(pdev, 1, 0x10000);
3871 if (priv->regs == NULL) {
3872 priv->regs = pci_iomap(pdev, 2, 0x10000);
3873 if (priv->regs == NULL) {
3874 printk(KERN_ERR "%s: Cannot map device registers\n",
3875 wiphy_name(hw->wiphy));
3881 /* Reset firmware and hardware */
3882 mwl8k_hw_reset(priv);
3884 /* Ask userland hotplug daemon for the device firmware */
3885 rc = mwl8k_request_firmware(priv);
3887 printk(KERN_ERR "%s: Firmware files not found\n",
3888 wiphy_name(hw->wiphy));
3889 goto err_stop_firmware;
3892 /* Load firmware into hardware */
3893 rc = mwl8k_load_firmware(hw);
3895 printk(KERN_ERR "%s: Cannot start firmware\n",
3896 wiphy_name(hw->wiphy));
3897 goto err_stop_firmware;
3900 /* Reclaim memory once firmware is successfully loaded */
3901 mwl8k_release_firmware(priv);
3905 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3906 if (priv->rxd_ops == NULL) {
3907 printk(KERN_ERR "%s: Driver does not have AP "
3908 "firmware image support for this hardware\n",
3909 wiphy_name(hw->wiphy));
3910 goto err_stop_firmware;
3913 priv->rxd_ops = &rxd_sta_ops;
3916 priv->sniffer_enabled = false;
3917 priv->wmm_enabled = false;
3918 priv->pending_tx_pkts = 0;
3922 * Extra headroom is the size of the required DMA header
3923 * minus the size of the smallest 802.11 frame (CTS frame).
3925 hw->extra_tx_headroom =
3926 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3928 hw->channel_change_time = 10;
3930 hw->queues = MWL8K_TX_QUEUES;
3932 /* Set rssi and noise values to dBm */
3933 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3934 hw->vif_data_size = sizeof(struct mwl8k_vif);
3935 hw->sta_data_size = sizeof(struct mwl8k_sta);
3938 /* Set default radio state and preamble */
3940 priv->radio_short_preamble = 0;
3942 /* Station database handling */
3943 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
3944 spin_lock_init(&priv->sta_notify_list_lock);
3945 INIT_LIST_HEAD(&priv->sta_notify_list);
3947 /* Finalize join worker */
3948 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3950 /* TX reclaim and RX tasklets. */
3951 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
3952 tasklet_disable(&priv->poll_tx_task);
3953 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
3954 tasklet_disable(&priv->poll_rx_task);
3956 /* Power management cookie */
3957 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3958 if (priv->cookie == NULL)
3959 goto err_stop_firmware;
3961 rc = mwl8k_rxq_init(hw, 0);
3963 goto err_free_cookie;
3964 rxq_refill(hw, 0, INT_MAX);
3966 mutex_init(&priv->fw_mutex);
3967 priv->fw_mutex_owner = NULL;
3968 priv->fw_mutex_depth = 0;
3969 priv->hostcmd_wait = NULL;
3971 spin_lock_init(&priv->tx_lock);
3973 priv->tx_wait = NULL;
3975 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3976 rc = mwl8k_txq_init(hw, i);
3978 goto err_free_queues;
3981 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3982 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3983 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
3984 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3985 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3987 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3988 IRQF_SHARED, MWL8K_NAME, hw);
3990 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3991 wiphy_name(hw->wiphy));
3992 goto err_free_queues;
3996 * Temporarily enable interrupts. Initial firmware host
3997 * commands use interrupts and avoid polling. Disable
3998 * interrupts when done.
4000 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4002 /* Get config data, mac addrs etc */
4004 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4006 rc = mwl8k_cmd_set_hw_spec(hw);
4008 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
4010 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4012 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
4015 printk(KERN_ERR "%s: Cannot initialise firmware\n",
4016 wiphy_name(hw->wiphy));
4020 /* Turn radio off */
4021 rc = mwl8k_cmd_radio_disable(hw);
4023 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
4027 /* Clear MAC address */
4028 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
4030 printk(KERN_ERR "%s: Cannot clear MAC address\n",
4031 wiphy_name(hw->wiphy));
4035 /* Disable interrupts */
4036 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4037 free_irq(priv->pdev->irq, hw);
4039 rc = ieee80211_register_hw(hw);
4041 printk(KERN_ERR "%s: Cannot register device\n",
4042 wiphy_name(hw->wiphy));
4043 goto err_free_queues;
4046 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
4047 wiphy_name(hw->wiphy), priv->device_info->part_name,
4048 priv->hw_rev, hw->wiphy->perm_addr,
4049 priv->ap_fw ? "AP" : "STA",
4050 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4051 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4056 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4057 free_irq(priv->pdev->irq, hw);
4060 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4061 mwl8k_txq_deinit(hw, i);
4062 mwl8k_rxq_deinit(hw, 0);
4065 if (priv->cookie != NULL)
4066 pci_free_consistent(priv->pdev, 4,
4067 priv->cookie, priv->cookie_dma);
4070 mwl8k_hw_reset(priv);
4071 mwl8k_release_firmware(priv);
4074 if (priv->regs != NULL)
4075 pci_iounmap(pdev, priv->regs);
4077 if (priv->sram != NULL)
4078 pci_iounmap(pdev, priv->sram);
4080 pci_set_drvdata(pdev, NULL);
4081 ieee80211_free_hw(hw);
4084 pci_release_regions(pdev);
4087 pci_disable_device(pdev);
4092 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4094 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4097 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4099 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4100 struct mwl8k_priv *priv;
4107 ieee80211_stop_queues(hw);
4109 ieee80211_unregister_hw(hw);
4111 /* Remove TX reclaim and RX tasklets. */
4112 tasklet_kill(&priv->poll_tx_task);
4113 tasklet_kill(&priv->poll_rx_task);
4116 mwl8k_hw_reset(priv);
4118 /* Return all skbs to mac80211 */
4119 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4120 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4122 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4123 mwl8k_txq_deinit(hw, i);
4125 mwl8k_rxq_deinit(hw, 0);
4127 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4129 pci_iounmap(pdev, priv->regs);
4130 pci_iounmap(pdev, priv->sram);
4131 pci_set_drvdata(pdev, NULL);
4132 ieee80211_free_hw(hw);
4133 pci_release_regions(pdev);
4134 pci_disable_device(pdev);
4137 static struct pci_driver mwl8k_driver = {
4139 .id_table = mwl8k_pci_id_table,
4140 .probe = mwl8k_probe,
4141 .remove = __devexit_p(mwl8k_remove),
4142 .shutdown = __devexit_p(mwl8k_shutdown),
4145 static int __init mwl8k_init(void)
4147 return pci_register_driver(&mwl8k_driver);
4150 static void __exit mwl8k_exit(void)
4152 pci_unregister_driver(&mwl8k_driver);
4155 module_init(mwl8k_init);
4156 module_exit(mwl8k_exit);
4158 MODULE_DESCRIPTION(MWL8K_DESC);
4159 MODULE_VERSION(MWL8K_VERSION);
4160 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4161 MODULE_LICENSE("GPL");